4 * Copyright (c) 2010,2015, The Linux Foundation. All rights reserved.
5 * Copyright (C) 2015 Linaro Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 and
9 * only version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/platform_device.h>
18 #include <linux/init.h>
19 #include <linux/cpumask.h>
20 #include <linux/export.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/types.h>
23 #include <linux/qcom_scm.h>
25 #include <linux/of_platform.h>
26 #include <linux/clk.h>
27 #include <linux/reset-controller.h>
34 struct clk *iface_clk;
36 struct reset_controller_dev reset;
39 static struct qcom_scm *__scm;
41 static int qcom_scm_clk_enable(void)
45 ret = clk_prepare_enable(__scm->core_clk);
49 ret = clk_prepare_enable(__scm->iface_clk);
53 ret = clk_prepare_enable(__scm->bus_clk);
60 clk_disable_unprepare(__scm->iface_clk);
62 clk_disable_unprepare(__scm->core_clk);
67 static void qcom_scm_clk_disable(void)
69 clk_disable_unprepare(__scm->core_clk);
70 clk_disable_unprepare(__scm->iface_clk);
71 clk_disable_unprepare(__scm->bus_clk);
75 * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
76 * @entry: Entry point function for the cpus
77 * @cpus: The cpumask of cpus that will use the entry point
79 * Set the cold boot address of the cpus. Any cpu outside the supported
80 * range would be removed from the cpu present mask.
82 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
84 return __qcom_scm_set_cold_boot_addr(entry, cpus);
86 EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
89 * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
90 * @entry: Entry point function for the cpus
91 * @cpus: The cpumask of cpus that will use the entry point
93 * Set the Linux entry point for the SCM to transfer control to when coming
94 * out of a power down. CPU power down may be executed on cpuidle or hotplug.
96 int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
98 return __qcom_scm_set_warm_boot_addr(__scm->dev, entry, cpus);
100 EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
103 * qcom_scm_cpu_power_down() - Power down the cpu
104 * @flags - Flags to flush cache
106 * This is an end point to power down cpu. If there was a pending interrupt,
107 * the control would return from this function, otherwise, the cpu jumps to the
108 * warm boot entry point set for this cpu upon reset.
110 void qcom_scm_cpu_power_down(u32 flags)
112 __qcom_scm_cpu_power_down(flags);
114 EXPORT_SYMBOL(qcom_scm_cpu_power_down);
117 * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
119 * Return true if HDCP is supported, false if not.
121 bool qcom_scm_hdcp_available(void)
123 int ret = qcom_scm_clk_enable();
128 ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP,
131 qcom_scm_clk_disable();
133 return ret > 0 ? true : false;
135 EXPORT_SYMBOL(qcom_scm_hdcp_available);
138 * qcom_scm_hdcp_req() - Send HDCP request.
139 * @req: HDCP request array
140 * @req_cnt: HDCP request array count
141 * @resp: response buffer passed to SCM
143 * Write HDCP register(s) through SCM.
145 int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
147 int ret = qcom_scm_clk_enable();
152 ret = __qcom_scm_hdcp_req(__scm->dev, req, req_cnt, resp);
153 qcom_scm_clk_disable();
156 EXPORT_SYMBOL(qcom_scm_hdcp_req);
159 * qcom_scm_pas_supported() - Check if the peripheral authentication service is
160 * available for the given peripherial
161 * @peripheral: peripheral id
163 * Returns true if PAS is supported for this peripheral, otherwise false.
165 bool qcom_scm_pas_supported(u32 peripheral)
169 ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL,
170 QCOM_SCM_PAS_IS_SUPPORTED_CMD);
174 return __qcom_scm_pas_supported(__scm->dev, peripheral);
176 EXPORT_SYMBOL(qcom_scm_pas_supported);
179 * qcom_scm_pas_init_image() - Initialize peripheral authentication service
180 * state machine for a given peripheral, using the
182 * @peripheral: peripheral id
183 * @metadata: pointer to memory containing ELF header, program header table
184 * and optional blob of data used for authenticating the metadata
185 * and the rest of the firmware
186 * @size: size of the metadata
188 * Returns 0 on success.
190 int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
192 dma_addr_t mdata_phys;
197 * During the scm call memory protection will be enabled for the meta
198 * data blob, so make sure it's physically contiguous, 4K aligned and
199 * non-cachable to avoid XPU violations.
201 mdata_buf = dma_alloc_coherent(__scm->dev, size, &mdata_phys,
204 dev_err(__scm->dev, "Allocation of metadata buffer failed.\n");
207 memcpy(mdata_buf, metadata, size);
209 ret = qcom_scm_clk_enable();
213 ret = __qcom_scm_pas_init_image(__scm->dev, peripheral, mdata_phys);
215 qcom_scm_clk_disable();
218 dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
222 EXPORT_SYMBOL(qcom_scm_pas_init_image);
225 * qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral
226 * for firmware loading
227 * @peripheral: peripheral id
228 * @addr: start address of memory area to prepare
229 * @size: size of the memory area to prepare
231 * Returns 0 on success.
233 int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)
237 ret = qcom_scm_clk_enable();
241 ret = __qcom_scm_pas_mem_setup(__scm->dev, peripheral, addr, size);
242 qcom_scm_clk_disable();
246 EXPORT_SYMBOL(qcom_scm_pas_mem_setup);
249 * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmware
250 * and reset the remote processor
251 * @peripheral: peripheral id
253 * Return 0 on success.
255 int qcom_scm_pas_auth_and_reset(u32 peripheral)
259 ret = qcom_scm_clk_enable();
263 ret = __qcom_scm_pas_auth_and_reset(__scm->dev, peripheral);
264 qcom_scm_clk_disable();
268 EXPORT_SYMBOL(qcom_scm_pas_auth_and_reset);
271 * qcom_scm_pas_shutdown() - Shut down the remote processor
272 * @peripheral: peripheral id
274 * Returns 0 on success.
276 int qcom_scm_pas_shutdown(u32 peripheral)
280 ret = qcom_scm_clk_enable();
284 ret = __qcom_scm_pas_shutdown(__scm->dev, peripheral);
285 qcom_scm_clk_disable();
289 EXPORT_SYMBOL(qcom_scm_pas_shutdown);
291 static int qcom_scm_pas_reset_assert(struct reset_controller_dev *rcdev,
297 return __qcom_scm_pas_mss_reset(__scm->dev, 1);
300 static int qcom_scm_pas_reset_deassert(struct reset_controller_dev *rcdev,
306 return __qcom_scm_pas_mss_reset(__scm->dev, 0);
309 static const struct reset_control_ops qcom_scm_pas_reset_ops = {
310 .assert = qcom_scm_pas_reset_assert,
311 .deassert = qcom_scm_pas_reset_deassert,
315 * qcom_scm_is_available() - Checks if SCM is available
317 bool qcom_scm_is_available(void)
321 EXPORT_SYMBOL(qcom_scm_is_available);
323 static int qcom_scm_probe(struct platform_device *pdev)
325 struct qcom_scm *scm;
328 scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL);
332 scm->core_clk = devm_clk_get(&pdev->dev, "core");
333 if (IS_ERR(scm->core_clk)) {
334 if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER)
335 return PTR_ERR(scm->core_clk);
337 scm->core_clk = NULL;
340 if (of_device_is_compatible(pdev->dev.of_node, "qcom,scm")) {
341 scm->iface_clk = devm_clk_get(&pdev->dev, "iface");
342 if (IS_ERR(scm->iface_clk)) {
343 if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER)
344 dev_err(&pdev->dev, "failed to acquire iface clk\n");
345 return PTR_ERR(scm->iface_clk);
348 scm->bus_clk = devm_clk_get(&pdev->dev, "bus");
349 if (IS_ERR(scm->bus_clk)) {
350 if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER)
351 dev_err(&pdev->dev, "failed to acquire bus clk\n");
352 return PTR_ERR(scm->bus_clk);
356 scm->reset.ops = &qcom_scm_pas_reset_ops;
357 scm->reset.nr_resets = 1;
358 scm->reset.of_node = pdev->dev.of_node;
359 reset_controller_register(&scm->reset);
361 /* vote for max clk rate for highest performance */
362 ret = clk_set_rate(scm->core_clk, INT_MAX);
367 __scm->dev = &pdev->dev;
374 static const struct of_device_id qcom_scm_dt_match[] = {
375 { .compatible = "qcom,scm-apq8064",},
376 { .compatible = "qcom,scm-msm8660",},
377 { .compatible = "qcom,scm-msm8960",},
378 { .compatible = "qcom,scm",},
382 static struct platform_driver qcom_scm_driver = {
385 .of_match_table = qcom_scm_dt_match,
387 .probe = qcom_scm_probe,
390 static int __init qcom_scm_init(void)
392 struct device_node *np, *fw_np;
395 fw_np = of_find_node_by_name(NULL, "firmware");
400 np = of_find_matching_node(fw_np, qcom_scm_dt_match);
409 ret = of_platform_populate(fw_np, qcom_scm_dt_match, NULL, NULL);
416 return platform_driver_register(&qcom_scm_driver);
418 subsys_initcall(qcom_scm_init);