1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Clock Protocol
5 * Copyright (C) 2018 ARM Ltd.
10 enum scmi_clock_protocol_cmd {
11 CLOCK_ATTRIBUTES = 0x3,
12 CLOCK_DESCRIBE_RATES = 0x4,
15 CLOCK_CONFIG_SET = 0x7,
18 struct scmi_msg_resp_clock_protocol_attributes {
24 struct scmi_msg_resp_clock_attributes {
26 #define CLOCK_ENABLE BIT(0)
27 u8 name[SCMI_MAX_STR_SIZE];
30 struct scmi_clock_set_config {
35 struct scmi_msg_clock_describe_rates {
40 struct scmi_msg_resp_clock_describe_rates {
41 __le32 num_rates_flags;
42 #define NUM_RETURNED(x) ((x) & 0xfff)
43 #define RATE_DISCRETE(x) !((x) & BIT(12))
44 #define NUM_REMAINING(x) ((x) >> 16)
49 #define RATE_TO_U64(X) \
52 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
56 struct scmi_clock_set_rate {
58 #define CLOCK_SET_ASYNC BIT(0)
59 #define CLOCK_SET_IGNORE_RESP BIT(1)
60 #define CLOCK_SET_ROUND_UP BIT(2)
61 #define CLOCK_SET_ROUND_AUTO BIT(3)
70 atomic_t cur_async_req;
71 struct scmi_clock_info *clk;
74 static int scmi_clock_protocol_attributes_get(const struct scmi_handle *handle,
75 struct clock_info *ci)
79 struct scmi_msg_resp_clock_protocol_attributes *attr;
81 ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES,
82 SCMI_PROTOCOL_CLOCK, 0, sizeof(*attr), &t);
88 ret = scmi_do_xfer(handle, t);
90 ci->num_clocks = le16_to_cpu(attr->num_clocks);
91 ci->max_async_req = attr->max_async_req;
94 scmi_xfer_put(handle, t);
98 static int scmi_clock_attributes_get(const struct scmi_handle *handle,
99 u32 clk_id, struct scmi_clock_info *clk)
103 struct scmi_msg_resp_clock_attributes *attr;
105 ret = scmi_xfer_get_init(handle, CLOCK_ATTRIBUTES, SCMI_PROTOCOL_CLOCK,
106 sizeof(clk_id), sizeof(*attr), &t);
110 put_unaligned_le32(clk_id, t->tx.buf);
113 ret = scmi_do_xfer(handle, t);
115 strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE);
119 scmi_xfer_put(handle, t);
124 scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id,
125 struct scmi_clock_info *clk)
129 bool rate_discrete = false;
130 u32 tot_rate_cnt = 0, rates_flag;
131 u16 num_returned, num_remaining;
133 struct scmi_msg_clock_describe_rates *clk_desc;
134 struct scmi_msg_resp_clock_describe_rates *rlist;
136 ret = scmi_xfer_get_init(handle, CLOCK_DESCRIBE_RATES,
137 SCMI_PROTOCOL_CLOCK, sizeof(*clk_desc), 0, &t);
141 clk_desc = t->tx.buf;
145 clk_desc->id = cpu_to_le32(clk_id);
146 /* Set the number of rates to be skipped/already read */
147 clk_desc->rate_index = cpu_to_le32(tot_rate_cnt);
149 ret = scmi_do_xfer(handle, t);
153 rates_flag = le32_to_cpu(rlist->num_rates_flags);
154 num_remaining = NUM_REMAINING(rates_flag);
155 rate_discrete = RATE_DISCRETE(rates_flag);
156 num_returned = NUM_RETURNED(rates_flag);
158 if (tot_rate_cnt + num_returned > SCMI_MAX_NUM_RATES) {
159 dev_err(handle->dev, "No. of rates > MAX_NUM_RATES");
163 if (!rate_discrete) {
164 clk->range.min_rate = RATE_TO_U64(rlist->rate[0]);
165 clk->range.max_rate = RATE_TO_U64(rlist->rate[1]);
166 clk->range.step_size = RATE_TO_U64(rlist->rate[2]);
167 dev_dbg(handle->dev, "Min %llu Max %llu Step %llu Hz\n",
168 clk->range.min_rate, clk->range.max_rate,
169 clk->range.step_size);
173 rate = &clk->list.rates[tot_rate_cnt];
174 for (cnt = 0; cnt < num_returned; cnt++, rate++) {
175 *rate = RATE_TO_U64(rlist->rate[cnt]);
176 dev_dbg(handle->dev, "Rate %llu Hz\n", *rate);
179 tot_rate_cnt += num_returned;
181 * check for both returned and remaining to avoid infinite
182 * loop due to buggy firmware
184 } while (num_returned && num_remaining);
187 clk->list.num_rates = tot_rate_cnt;
189 clk->rate_discrete = rate_discrete;
192 scmi_xfer_put(handle, t);
197 scmi_clock_rate_get(const struct scmi_handle *handle, u32 clk_id, u64 *value)
202 ret = scmi_xfer_get_init(handle, CLOCK_RATE_GET, SCMI_PROTOCOL_CLOCK,
203 sizeof(__le32), sizeof(u64), &t);
207 put_unaligned_le32(clk_id, t->tx.buf);
209 ret = scmi_do_xfer(handle, t);
211 *value = get_unaligned_le64(t->rx.buf);
213 scmi_xfer_put(handle, t);
217 static int scmi_clock_rate_set(const struct scmi_handle *handle, u32 clk_id,
223 struct scmi_clock_set_rate *cfg;
224 struct clock_info *ci = handle->clk_priv;
226 ret = scmi_xfer_get_init(handle, CLOCK_RATE_SET, SCMI_PROTOCOL_CLOCK,
227 sizeof(*cfg), 0, &t);
231 if (ci->max_async_req &&
232 atomic_inc_return(&ci->cur_async_req) < ci->max_async_req)
233 flags |= CLOCK_SET_ASYNC;
236 cfg->flags = cpu_to_le32(flags);
237 cfg->id = cpu_to_le32(clk_id);
238 cfg->value_low = cpu_to_le32(rate & 0xffffffff);
239 cfg->value_high = cpu_to_le32(rate >> 32);
241 if (flags & CLOCK_SET_ASYNC)
242 ret = scmi_do_xfer_with_response(handle, t);
244 ret = scmi_do_xfer(handle, t);
246 if (ci->max_async_req)
247 atomic_dec(&ci->cur_async_req);
249 scmi_xfer_put(handle, t);
254 scmi_clock_config_set(const struct scmi_handle *handle, u32 clk_id, u32 config)
258 struct scmi_clock_set_config *cfg;
260 ret = scmi_xfer_get_init(handle, CLOCK_CONFIG_SET, SCMI_PROTOCOL_CLOCK,
261 sizeof(*cfg), 0, &t);
266 cfg->id = cpu_to_le32(clk_id);
267 cfg->attributes = cpu_to_le32(config);
269 ret = scmi_do_xfer(handle, t);
271 scmi_xfer_put(handle, t);
275 static int scmi_clock_enable(const struct scmi_handle *handle, u32 clk_id)
277 return scmi_clock_config_set(handle, clk_id, CLOCK_ENABLE);
280 static int scmi_clock_disable(const struct scmi_handle *handle, u32 clk_id)
282 return scmi_clock_config_set(handle, clk_id, 0);
285 static int scmi_clock_count_get(const struct scmi_handle *handle)
287 struct clock_info *ci = handle->clk_priv;
289 return ci->num_clocks;
292 static const struct scmi_clock_info *
293 scmi_clock_info_get(const struct scmi_handle *handle, u32 clk_id)
295 struct clock_info *ci = handle->clk_priv;
296 struct scmi_clock_info *clk = ci->clk + clk_id;
304 static struct scmi_clk_ops clk_ops = {
305 .count_get = scmi_clock_count_get,
306 .info_get = scmi_clock_info_get,
307 .rate_get = scmi_clock_rate_get,
308 .rate_set = scmi_clock_rate_set,
309 .enable = scmi_clock_enable,
310 .disable = scmi_clock_disable,
313 static int scmi_clock_protocol_init(struct scmi_handle *handle)
317 struct clock_info *cinfo;
319 scmi_version_get(handle, SCMI_PROTOCOL_CLOCK, &version);
321 dev_dbg(handle->dev, "Clock Version %d.%d\n",
322 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
324 cinfo = devm_kzalloc(handle->dev, sizeof(*cinfo), GFP_KERNEL);
328 scmi_clock_protocol_attributes_get(handle, cinfo);
330 cinfo->clk = devm_kcalloc(handle->dev, cinfo->num_clocks,
331 sizeof(*cinfo->clk), GFP_KERNEL);
335 for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
336 struct scmi_clock_info *clk = cinfo->clk + clkid;
338 ret = scmi_clock_attributes_get(handle, clkid, clk);
340 scmi_clock_describe_rates_get(handle, clkid, clk);
343 handle->clk_ops = &clk_ops;
344 handle->clk_priv = cinfo;
349 static int __init scmi_clock_init(void)
351 return scmi_protocol_register(SCMI_PROTOCOL_CLOCK,
352 &scmi_clock_protocol_init);
354 subsys_initcall(scmi_clock_init);