drivers/edac/ghes_edac.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * GHES/EDAC Linux driver
   4  *
   5  * Copyright (c) 2013 by Mauro Carvalho Chehab
   6  *
   7  * Red Hat Inc. http://www.redhat.com
   8  */
   9
  10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  11
  12 #include <acpi/ghes.h>
  13 #include <linux/edac.h>
  14 #include <linux/dmi.h>
  15 #include "edac_module.h"
  16 #include <ras/ras_event.h>
  17
  18 struct ghes_pvt {
  19         struct mem_ctl_info *mci;
  20
  21         /* Buffers for the error handling routine */
  22         char other_detail[400];
  23         char msg[80];
  24 };
  25
  26 static refcount_t ghes_refcount = REFCOUNT_INIT(0);
  27
  28 /*
  29  * Access to ghes_pvt must be protected by ghes_lock. The spinlock
  30  * also provides the necessary (implicit) memory barrier for the SMP
  31  * case to make the pointer visible on another CPU.
  32  */
  33 static struct ghes_pvt *ghes_pvt;
  34
  35 /*
  36  * This driver's representation of the system hardware, as collected
  37  * from DMI.
  38  */
  39 struct ghes_hw_desc {
  40         int num_dimms;
  41         struct dimm_info *dimms;
  42 } ghes_hw;
  43
  44 /* GHES registration mutex */
  45 static DEFINE_MUTEX(ghes_reg_mutex);
  46
  47 /*
  48  * Sync with other, potentially concurrent callers of
  49  * ghes_edac_report_mem_error(). We don't know what the
  50  * "inventive" firmware would do.
  51  */
  52 static DEFINE_SPINLOCK(ghes_lock);
  53
  54 /* "ghes_edac.force_load=1" skips the platform check */
  55 static bool __read_mostly force_load;
  56 module_param(force_load, bool, 0);
  57
  58 /* Memory Device - Type 17 of SMBIOS spec */
  59 struct memdev_dmi_entry {
  60         u8 type;
  61         u8 length;
  62         u16 handle;
  63         u16 phys_mem_array_handle;
  64         u16 mem_err_info_handle;
  65         u16 total_width;
  66         u16 data_width;
  67         u16 size;
  68         u8 form_factor;
  69         u8 device_set;
  70         u8 device_locator;
  71         u8 bank_locator;
  72         u8 memory_type;
  73         u16 type_detail;
  74         u16 speed;
  75         u8 manufacturer;
  76         u8 serial_number;
  77         u8 asset_tag;
  78         u8 part_number;
  79         u8 attributes;
  80         u32 extended_size;
  81         u16 conf_mem_clk_speed;
  82 } __attribute__((__packed__));
  83
  84 static struct dimm_info *find_dimm_by_handle(struct mem_ctl_info *mci, u16 handle)
  85 {
  86         struct dimm_info *dimm;
  87
  88         mci_for_each_dimm(mci, dimm) {
  89                 if (dimm->smbios_handle == handle)
  90                         return dimm;
  91         }
  92
  93         return NULL;
  94 }
  95
  96 static void dimm_setup_label(struct dimm_info *dimm, u16 handle)
  97 {
  98         const char *bank = NULL, *device = NULL;
  99
 100         dmi_memdev_name(handle, &bank, &device);
 101
 102         /* both strings must be non-zero */
 103         if (bank && *bank && device && *device)
 104                 snprintf(dimm->label, sizeof(dimm->label), "%s %s", bank, device);
 105 }
 106
 107 static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)
 108 {
 109         u16 rdr_mask = BIT(7) | BIT(13);
 110
 111         if (entry->size == 0xffff) {
 112                 pr_info("Can't get DIMM%i size\n", dimm->idx);
 113                 dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
 114         } else if (entry->size == 0x7fff) {
 115                 dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
 116         } else {
 117                 if (entry->size & BIT(15))
 118                         dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
 119                 else
 120                         dimm->nr_pages = MiB_TO_PAGES(entry->size);
 121         }
 122
 123         switch (entry->memory_type) {
 124         case 0x12:
 125                 if (entry->type_detail & BIT(13))
 126                         dimm->mtype = MEM_RDDR;
 127                 else
 128                         dimm->mtype = MEM_DDR;
 129                 break;
 130         case 0x13:
 131                 if (entry->type_detail & BIT(13))
 132                         dimm->mtype = MEM_RDDR2;
 133                 else
 134                         dimm->mtype = MEM_DDR2;
 135                 break;
 136         case 0x14:
 137                 dimm->mtype = MEM_FB_DDR2;
 138                 break;
 139         case 0x18:
 140                 if (entry->type_detail & BIT(12))
 141                         dimm->mtype = MEM_NVDIMM;
 142                 else if (entry->type_detail & BIT(13))
 143                         dimm->mtype = MEM_RDDR3;
 144                 else
 145                         dimm->mtype = MEM_DDR3;
 146                 break;
 147         case 0x1a:
 148                 if (entry->type_detail & BIT(12))
 149                         dimm->mtype = MEM_NVDIMM;
 150                 else if (entry->type_detail & BIT(13))
 151                         dimm->mtype = MEM_RDDR4;
 152                 else
 153                         dimm->mtype = MEM_DDR4;
 154                 break;
 155         default:
 156                 if (entry->type_detail & BIT(6))
 157                         dimm->mtype = MEM_RMBS;
 158                 else if ((entry->type_detail & rdr_mask) == rdr_mask)
 159                         dimm->mtype = MEM_RDR;
 160                 else if (entry->type_detail & BIT(7))
 161                         dimm->mtype = MEM_SDR;
 162                 else if (entry->type_detail & BIT(9))
 163                         dimm->mtype = MEM_EDO;
 164                 else
 165                         dimm->mtype = MEM_UNKNOWN;
 166         }
 167
 168         /*
 169          * Actually, we can only detect if the memory has bits for
 170          * checksum or not
 171          */
 172         if (entry->total_width == entry->data_width)
 173                 dimm->edac_mode = EDAC_NONE;
 174         else
 175                 dimm->edac_mode = EDAC_SECDED;
 176
 177         dimm->dtype = DEV_UNKNOWN;
 178         dimm->grain = 128;              /* Likely, worse case */
 179
 180         dimm_setup_label(dimm, entry->handle);
 181
 182         if (dimm->nr_pages) {
 183                 edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
 184                         dimm->idx, edac_mem_types[dimm->mtype],
 185                         PAGES_TO_MiB(dimm->nr_pages),
 186                         (dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
 187                 edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
 188                         entry->memory_type, entry->type_detail,
 189                         entry->total_width, entry->data_width);
 190         }
 191
 192         dimm->smbios_handle = entry->handle;
 193 }
 194
 195 static void enumerate_dimms(const struct dmi_header *dh, void *arg)
 196 {
 197         struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
 198         struct ghes_hw_desc *hw = (struct ghes_hw_desc *)arg;
 199         struct dimm_info *d;
 200
 201         if (dh->type != DMI_ENTRY_MEM_DEVICE)
 202                 return;
 203
 204         /* Enlarge the array with additional 16 */
 205         if (!hw->num_dimms || !(hw->num_dimms % 16)) {
 206                 struct dimm_info *new;
 207
 208                 new = krealloc(hw->dimms, (hw->num_dimms + 16) * sizeof(struct dimm_info),
 209                                 GFP_KERNEL);
 210                 if (!new) {
 211                         WARN_ON_ONCE(1);
 212                         return;
 213                 }
 214
 215                 hw->dimms = new;
 216         }
 217
 218         d = &hw->dimms[hw->num_dimms];
 219         d->idx = hw->num_dimms;
 220
 221         assign_dmi_dimm_info(d, entry);
 222
 223         hw->num_dimms++;
 224 }
 225
 226 static void ghes_scan_system(void)
 227 {
 228         static bool scanned;
 229
 230         if (scanned)
 231                 return;
 232
 233         dmi_walk(enumerate_dimms, &ghes_hw);
 234
 235         scanned = true;
 236 }
 237
 238 void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
 239 {
 240         struct edac_raw_error_desc *e;
 241         struct mem_ctl_info *mci;
 242         struct ghes_pvt *pvt;
 243         unsigned long flags;
 244         char *p;
 245
 246         /*
 247          * We can do the locking below because GHES defers error processing
 248          * from NMI to IRQ context. Whenever that changes, we'd at least
 249          * know.
 250          */
 251         if (WARN_ON_ONCE(in_nmi()))
 252                 return;
 253
 254         spin_lock_irqsave(&ghes_lock, flags);
 255
 256         pvt = ghes_pvt;
 257         if (!pvt)
 258                 goto unlock;
 259
 260         mci = pvt->mci;
 261         e = &mci->error_desc;
 262
 263         /* Cleans the error report buffer */
 264         memset(e, 0, sizeof (*e));
 265         e->error_count = 1;
 266         e->grain = 1;
 267         e->msg = pvt->msg;
 268         e->other_detail = pvt->other_detail;
 269         e->top_layer = -1;
 270         e->mid_layer = -1;
 271         e->low_layer = -1;
 272         *pvt->other_detail = '\0';
 273         *pvt->msg = '\0';
 274
 275         switch (sev) {
 276         case GHES_SEV_CORRECTED:
 277                 e->type = HW_EVENT_ERR_CORRECTED;
 278                 break;
 279         case GHES_SEV_RECOVERABLE:
 280                 e->type = HW_EVENT_ERR_UNCORRECTED;
 281                 break;
 282         case GHES_SEV_PANIC:
 283                 e->type = HW_EVENT_ERR_FATAL;
 284                 break;
 285         default:
 286         case GHES_SEV_NO:
 287                 e->type = HW_EVENT_ERR_INFO;
 288         }
 289
 290         edac_dbg(1, "error validation_bits: 0x%08llx\n",
 291                  (long long)mem_err->validation_bits);
 292
 293         /* Error type, mapped on e->msg */
 294         if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
 295                 p = pvt->msg;
 296                 switch (mem_err->error_type) {
 297                 case 0:
 298                         p += sprintf(p, "Unknown");
 299                         break;
 300                 case 1:
 301                         p += sprintf(p, "No error");
 302                         break;
 303                 case 2:
 304                         p += sprintf(p, "Single-bit ECC");
 305                         break;
 306                 case 3:
 307                         p += sprintf(p, "Multi-bit ECC");
 308                         break;
 309                 case 4:
 310                         p += sprintf(p, "Single-symbol ChipKill ECC");
 311                         break;
 312                 case 5:
 313                         p += sprintf(p, "Multi-symbol ChipKill ECC");
 314                         break;
 315                 case 6:
 316                         p += sprintf(p, "Master abort");
 317                         break;
 318                 case 7:
 319                         p += sprintf(p, "Target abort");
 320                         break;
 321                 case 8:
 322                         p += sprintf(p, "Parity Error");
 323                         break;
 324                 case 9:
 325                         p += sprintf(p, "Watchdog timeout");
 326                         break;
 327                 case 10:
 328                         p += sprintf(p, "Invalid address");
 329                         break;
 330                 case 11:
 331                         p += sprintf(p, "Mirror Broken");
 332                         break;
 333                 case 12:
 334                         p += sprintf(p, "Memory Sparing");
 335                         break;
 336                 case 13:
 337                         p += sprintf(p, "Scrub corrected error");
 338                         break;
 339                 case 14:
 340                         p += sprintf(p, "Scrub uncorrected error");
 341                         break;
 342                 case 15:
 343                         p += sprintf(p, "Physical Memory Map-out event");
 344                         break;
 345                 default:
 346                         p += sprintf(p, "reserved error (%d)",
 347                                      mem_err->error_type);
 348                 }
 349         } else {
 350                 strcpy(pvt->msg, "unknown error");
 351         }
 352
 353         /* Error address */
 354         if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
 355                 e->page_frame_number = PHYS_PFN(mem_err->physical_addr);
 356                 e->offset_in_page = offset_in_page(mem_err->physical_addr);
 357         }
 358
 359         /* Error grain */
 360         if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
 361                 e->grain = ~mem_err->physical_addr_mask + 1;
 362
 363         /* Memory error location, mapped on e->location */
 364         p = e->location;
 365         if (mem_err->validation_bits & CPER_MEM_VALID_NODE)
 366                 p += sprintf(p, "node:%d ", mem_err->node);
 367         if (mem_err->validation_bits & CPER_MEM_VALID_CARD)
 368                 p += sprintf(p, "card:%d ", mem_err->card);
 369         if (mem_err->validation_bits & CPER_MEM_VALID_MODULE)
 370                 p += sprintf(p, "module:%d ", mem_err->module);
 371         if (mem_err->validation_bits & CPER_MEM_VALID_RANK_NUMBER)
 372                 p += sprintf(p, "rank:%d ", mem_err->rank);
 373         if (mem_err->validation_bits & CPER_MEM_VALID_BANK)
 374                 p += sprintf(p, "bank:%d ", mem_err->bank);
 375         if (mem_err->validation_bits & CPER_MEM_VALID_ROW)
 376                 p += sprintf(p, "row:%d ", mem_err->row);
 377         if (mem_err->validation_bits & CPER_MEM_VALID_COLUMN)
 378                 p += sprintf(p, "col:%d ", mem_err->column);
 379         if (mem_err->validation_bits & CPER_MEM_VALID_BIT_POSITION)
 380                 p += sprintf(p, "bit_pos:%d ", mem_err->bit_pos);
 381         if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
 382                 const char *bank = NULL, *device = NULL;
 383                 struct dimm_info *dimm;
 384
 385                 dmi_memdev_name(mem_err->mem_dev_handle, &bank, &device);
 386                 if (bank != NULL && device != NULL)
 387                         p += sprintf(p, "DIMM location:%s %s ", bank, device);
 388                 else
 389                         p += sprintf(p, "DIMM DMI handle: 0x%.4x ",
 390                                      mem_err->mem_dev_handle);
 391
 392                 dimm = find_dimm_by_handle(mci, mem_err->mem_dev_handle);
 393                 if (dimm) {
 394                         e->top_layer = dimm->idx;
 395                         strcpy(e->label, dimm->label);
 396                 }
 397         }
 398         if (p > e->location)
 399                 *(p - 1) = '\0';
 400
 401         if (!*e->label)
 402                 strcpy(e->label, "unknown memory");
 403
 404         /* All other fields are mapped on e->other_detail */
 405         p = pvt->other_detail;
 406         p += snprintf(p, sizeof(pvt->other_detail),
 407                 "APEI location: %s ", e->location);
 408         if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_STATUS) {
 409                 u64 status = mem_err->error_status;
 410
 411                 p += sprintf(p, "status(0x%016llx): ", (long long)status);
 412                 switch ((status >> 8) & 0xff) {
 413                 case 1:
 414                         p += sprintf(p, "Error detected internal to the component ");
 415                         break;
 416                 case 16:
 417                         p += sprintf(p, "Error detected in the bus ");
 418                         break;
 419                 case 4:
 420                         p += sprintf(p, "Storage error in DRAM memory ");
 421                         break;
 422                 case 5:
 423                         p += sprintf(p, "Storage error in TLB ");
 424                         break;
 425                 case 6:
 426                         p += sprintf(p, "Storage error in cache ");
 427                         break;
 428                 case 7:
 429                         p += sprintf(p, "Error in one or more functional units ");
 430                         break;
 431                 case 8:
 432                         p += sprintf(p, "component failed self test ");
 433                         break;
 434                 case 9:
 435                         p += sprintf(p, "Overflow or undervalue of internal queue ");
 436                         break;
 437                 case 17:
 438                         p += sprintf(p, "Virtual address not found on IO-TLB or IO-PDIR ");
 439                         break;
 440                 case 18:
 441                         p += sprintf(p, "Improper access error ");
 442                         break;
 443                 case 19:
 444                         p += sprintf(p, "Access to a memory address which is not mapped to any component ");
 445                         break;
 446                 case 20:
 447                         p += sprintf(p, "Loss of Lockstep ");
 448                         break;
 449                 case 21:
 450                         p += sprintf(p, "Response not associated with a request ");
 451                         break;
 452                 case 22:
 453                         p += sprintf(p, "Bus parity error - must also set the A, C, or D Bits ");
 454                         break;
 455                 case 23:
 456                         p += sprintf(p, "Detection of a PATH_ERROR ");
 457                         break;
 458                 case 25:
 459                         p += sprintf(p, "Bus operation timeout ");
 460                         break;
 461                 case 26:
 462                         p += sprintf(p, "A read was issued to data that has been poisoned ");
 463                         break;
 464                 default:
 465                         p += sprintf(p, "reserved ");
 466                         break;
 467                 }
 468         }
 469         if (mem_err->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
 470                 p += sprintf(p, "requestorID: 0x%016llx ",
 471                              (long long)mem_err->requestor_id);
 472         if (mem_err->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
 473                 p += sprintf(p, "responderID: 0x%016llx ",
 474                              (long long)mem_err->responder_id);
 475         if (mem_err->validation_bits & CPER_MEM_VALID_TARGET_ID)
 476                 p += sprintf(p, "targetID: 0x%016llx ",
 477                              (long long)mem_err->responder_id);
 478         if (p > pvt->other_detail)
 479                 *(p - 1) = '\0';
 480
 481         edac_raw_mc_handle_error(e);
 482
 483 unlock:
 484         spin_unlock_irqrestore(&ghes_lock, flags);
 485 }
 486
 487 /*
 488  * Known systems that are safe to enable this module.
 489  */
 490 static struct acpi_platform_list plat_list[] = {
 491         {"HPE   ", "Server  ", 0, ACPI_SIG_FADT, all_versions},
 492         { } /* End */
 493 };
 494
 495 int ghes_edac_register(struct ghes *ghes, struct device *dev)
 496 {
 497         bool fake = false;
 498         struct mem_ctl_info *mci;
 499         struct ghes_pvt *pvt;
 500         struct edac_mc_layer layers[1];
 501         unsigned long flags;
 502         int idx = -1;
 503         int rc = 0;
 504
 505         if (IS_ENABLED(CONFIG_X86)) {
 506                 /* Check if safe to enable on this system */
 507                 idx = acpi_match_platform_list(plat_list);
 508                 if (!force_load && idx < 0)
 509                         return -ENODEV;
 510         } else {
 511                 idx = 0;
 512         }
 513
 514         /* finish another registration/unregistration instance first */
 515         mutex_lock(&ghes_reg_mutex);
 516
 517         /*
 518          * We have only one logical memory controller to which all DIMMs belong.
 519          */
 520         if (refcount_inc_not_zero(&ghes_refcount))
 521                 goto unlock;
 522
 523         ghes_scan_system();
 524
 525         /* Check if we've got a bogus BIOS */
 526         if (!ghes_hw.num_dimms) {
 527                 fake = true;
 528                 ghes_hw.num_dimms = 1;
 529         }
 530
 531         layers[0].type = EDAC_MC_LAYER_ALL_MEM;
 532         layers[0].size = ghes_hw.num_dimms;
 533         layers[0].is_virt_csrow = true;
 534
 535         mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
 536         if (!mci) {
 537                 pr_info("Can't allocate memory for EDAC data\n");
 538                 rc = -ENOMEM;
 539                 goto unlock;
 540         }
 541
 542         pvt             = mci->pvt_info;
 543         pvt->mci        = mci;
 544
 545         mci->pdev = dev;
 546         mci->mtype_cap = MEM_FLAG_EMPTY;
 547         mci->edac_ctl_cap = EDAC_FLAG_NONE;
 548         mci->edac_cap = EDAC_FLAG_NONE;
 549         mci->mod_name = "ghes_edac.c";
 550         mci->ctl_name = "ghes_edac";
 551         mci->dev_name = "ghes";
 552
 553         if (fake) {
 554                 pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
 555                 pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
 556                 pr_info("work on such system. Use this driver with caution\n");
 557         } else if (idx < 0) {
 558                 pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
 559                 pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
 560                 pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
 561                 pr_info("If you find incorrect reports, please contact your hardware vendor\n");
 562                 pr_info("to correct its BIOS.\n");
 563                 pr_info("This system has %d DIMM sockets.\n", ghes_hw.num_dimms);
 564         }
 565
 566         if (!fake) {
 567                 struct dimm_info *src, *dst;
 568                 int i = 0;
 569
 570                 mci_for_each_dimm(mci, dst) {
 571                         src = &ghes_hw.dimms[i];
 572
 573                         dst->idx           = src->idx;
 574                         dst->smbios_handle = src->smbios_handle;
 575                         dst->nr_pages      = src->nr_pages;
 576                         dst->mtype         = src->mtype;
 577                         dst->edac_mode     = src->edac_mode;
 578                         dst->dtype         = src->dtype;
 579                         dst->grain         = src->grain;
 580
 581                         /*
 582                          * If no src->label, preserve default label assigned
 583                          * from EDAC core.
 584                          */
 585                         if (strlen(src->label))
 586                                 memcpy(dst->label, src->label, sizeof(src->label));
 587
 588                         i++;
 589                 }
 590
 591         } else {
 592                 struct dimm_info *dimm = edac_get_dimm(mci, 0, 0, 0);
 593
 594                 dimm->nr_pages = 1;
 595                 dimm->grain = 128;
 596                 dimm->mtype = MEM_UNKNOWN;
 597                 dimm->dtype = DEV_UNKNOWN;
 598                 dimm->edac_mode = EDAC_SECDED;
 599         }
 600
 601         rc = edac_mc_add_mc(mci);
 602         if (rc < 0) {
 603                 pr_info("Can't register with the EDAC core\n");
 604                 edac_mc_free(mci);
 605                 rc = -ENODEV;
 606                 goto unlock;
 607         }
 608
 609         spin_lock_irqsave(&ghes_lock, flags);
 610         ghes_pvt = pvt;
 611         spin_unlock_irqrestore(&ghes_lock, flags);
 612
 613         /* only set on success */
 614         refcount_set(&ghes_refcount, 1);
 615
 616 unlock:
 617
 618         /* Not needed anymore */
 619         kfree(ghes_hw.dimms);
 620         ghes_hw.dimms = NULL;
 621
 622         mutex_unlock(&ghes_reg_mutex);
 623
 624         return rc;
 625 }
 626
 627 void ghes_edac_unregister(struct ghes *ghes)
 628 {
 629         struct mem_ctl_info *mci;
 630         unsigned long flags;
 631
 632         mutex_lock(&ghes_reg_mutex);
 633
 634         if (!refcount_dec_and_test(&ghes_refcount))
 635                 goto unlock;
 636
 637         /*
 638          * Wait for the irq handler being finished.
 639          */
 640         spin_lock_irqsave(&ghes_lock, flags);
 641         mci = ghes_pvt ? ghes_pvt->mci : NULL;
 642         ghes_pvt = NULL;
 643         spin_unlock_irqrestore(&ghes_lock, flags);
 644
 645         if (!mci)
 646                 goto unlock;
 647
 648         mci = edac_mc_del_mc(mci->pdev);
 649         if (mci)
 650                 edac_mc_free(mci);
 651
 652 unlock:
 653         mutex_unlock(&ghes_reg_mutex);
 654 }