drivers/edac/edac_mc.c

   1 /*
   2  * edac_mc kernel module
   3  * (C) 2005, 2006 Linux Networx (http://lnxi.com)
   4  * This file may be distributed under the terms of the
   5  * GNU General Public License.
   6  *
   7  * Written by Thayne Harbaugh
   8  * Based on work by Dan Hollis <goemon at anime dot net> and others.
   9  *      http://www.anime.net/~goemon/linux-ecc/
  10  *
  11  * Modified by Dave Peterson and Doug Thompson
  12  *
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/proc_fs.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/smp.h>
  20 #include <linux/init.h>
  21 #include <linux/sysctl.h>
  22 #include <linux/highmem.h>
  23 #include <linux/timer.h>
  24 #include <linux/slab.h>
  25 #include <linux/jiffies.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/list.h>
  28 #include <linux/ctype.h>
  29 #include <linux/edac.h>
  30 #include <linux/bitops.h>
  31 #include <linux/uaccess.h>
  32 #include <asm/page.h>
  33 #include "edac_mc.h"
  34 #include "edac_module.h"
  35 #include <ras/ras_event.h>
  36
  37 #ifdef CONFIG_EDAC_ATOMIC_SCRUB
  38 #include <asm/edac.h>
  39 #else
  40 #define edac_atomic_scrub(va, size) do { } while (0)
  41 #endif
  42
  43 int edac_op_state = EDAC_OPSTATE_INVAL;
  44 EXPORT_SYMBOL_GPL(edac_op_state);
  45
  46 /* lock to memory controller's control array */
  47 static DEFINE_MUTEX(mem_ctls_mutex);
  48 static LIST_HEAD(mc_devices);
  49
  50 /*
  51  * Used to lock EDAC MC to just one module, avoiding two drivers e. g.
  52  *      apei/ghes and i7core_edac to be used at the same time.
  53  */
  54 static const char *edac_mc_owner;
  55
  56 static struct mem_ctl_info *error_desc_to_mci(struct edac_raw_error_desc *e)
  57 {
  58         return container_of(e, struct mem_ctl_info, error_desc);
  59 }
  60
  61 unsigned int edac_dimm_info_location(struct dimm_info *dimm, char *buf,
  62                                      unsigned int len)
  63 {
  64         struct mem_ctl_info *mci = dimm->mci;
  65         int i, n, count = 0;
  66         char *p = buf;
  67
  68         for (i = 0; i < mci->n_layers; i++) {
  69                 n = snprintf(p, len, "%s %d ",
  70                               edac_layer_name[mci->layers[i].type],
  71                               dimm->location[i]);
  72                 p += n;
  73                 len -= n;
  74                 count += n;
  75                 if (!len)
  76                         break;
  77         }
  78
  79         return count;
  80 }
  81
  82 #ifdef CONFIG_EDAC_DEBUG
  83
  84 static void edac_mc_dump_channel(struct rank_info *chan)
  85 {
  86         edac_dbg(4, "  channel->chan_idx = %d\n", chan->chan_idx);
  87         edac_dbg(4, "    channel = %p\n", chan);
  88         edac_dbg(4, "    channel->csrow = %p\n", chan->csrow);
  89         edac_dbg(4, "    channel->dimm = %p\n", chan->dimm);
  90 }
  91
  92 static void edac_mc_dump_dimm(struct dimm_info *dimm)
  93 {
  94         char location[80];
  95
  96         if (!dimm->nr_pages)
  97                 return;
  98
  99         edac_dimm_info_location(dimm, location, sizeof(location));
 100
 101         edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
 102                  dimm->mci->csbased ? "rank" : "dimm",
 103                  dimm->idx, location, dimm->csrow, dimm->cschannel);
 104         edac_dbg(4, "  dimm = %p\n", dimm);
 105         edac_dbg(4, "  dimm->label = '%s'\n", dimm->label);
 106         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 107         edac_dbg(4, "  dimm->grain = %d\n", dimm->grain);
 108         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 109 }
 110
 111 static void edac_mc_dump_csrow(struct csrow_info *csrow)
 112 {
 113         edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
 114         edac_dbg(4, "  csrow = %p\n", csrow);
 115         edac_dbg(4, "  csrow->first_page = 0x%lx\n", csrow->first_page);
 116         edac_dbg(4, "  csrow->last_page = 0x%lx\n", csrow->last_page);
 117         edac_dbg(4, "  csrow->page_mask = 0x%lx\n", csrow->page_mask);
 118         edac_dbg(4, "  csrow->nr_channels = %d\n", csrow->nr_channels);
 119         edac_dbg(4, "  csrow->channels = %p\n", csrow->channels);
 120         edac_dbg(4, "  csrow->mci = %p\n", csrow->mci);
 121 }
 122
 123 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
 124 {
 125         edac_dbg(3, "\tmci = %p\n", mci);
 126         edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
 127         edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
 128         edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
 129         edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
 130         edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
 131                  mci->nr_csrows, mci->csrows);
 132         edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
 133                  mci->tot_dimms, mci->dimms);
 134         edac_dbg(3, "\tdev = %p\n", mci->pdev);
 135         edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
 136                  mci->mod_name, mci->ctl_name);
 137         edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
 138 }
 139
 140 #endif                          /* CONFIG_EDAC_DEBUG */
 141
 142 const char * const edac_mem_types[] = {
 143         [MEM_EMPTY]     = "Empty",
 144         [MEM_RESERVED]  = "Reserved",
 145         [MEM_UNKNOWN]   = "Unknown",
 146         [MEM_FPM]       = "FPM",
 147         [MEM_EDO]       = "EDO",
 148         [MEM_BEDO]      = "BEDO",
 149         [MEM_SDR]       = "Unbuffered-SDR",
 150         [MEM_RDR]       = "Registered-SDR",
 151         [MEM_DDR]       = "Unbuffered-DDR",
 152         [MEM_RDDR]      = "Registered-DDR",
 153         [MEM_RMBS]      = "RMBS",
 154         [MEM_DDR2]      = "Unbuffered-DDR2",
 155         [MEM_FB_DDR2]   = "FullyBuffered-DDR2",
 156         [MEM_RDDR2]     = "Registered-DDR2",
 157         [MEM_XDR]       = "XDR",
 158         [MEM_DDR3]      = "Unbuffered-DDR3",
 159         [MEM_RDDR3]     = "Registered-DDR3",
 160         [MEM_LRDDR3]    = "Load-Reduced-DDR3-RAM",
 161         [MEM_DDR4]      = "Unbuffered-DDR4",
 162         [MEM_RDDR4]     = "Registered-DDR4",
 163         [MEM_LRDDR4]    = "Load-Reduced-DDR4-RAM",
 164         [MEM_NVDIMM]    = "Non-volatile-RAM",
 165 };
 166 EXPORT_SYMBOL_GPL(edac_mem_types);
 167
 168 /**
 169  * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
 170  * @p:          pointer to a pointer with the memory offset to be used. At
 171  *              return, this will be incremented to point to the next offset
 172  * @size:       Size of the data structure to be reserved
 173  * @n_elems:    Number of elements that should be reserved
 174  *
 175  * If 'size' is a constant, the compiler will optimize this whole function
 176  * down to either a no-op or the addition of a constant to the value of '*p'.
 177  *
 178  * The 'p' pointer is absolutely needed to keep the proper advancing
 179  * further in memory to the proper offsets when allocating the struct along
 180  * with its embedded structs, as edac_device_alloc_ctl_info() does it
 181  * above, for example.
 182  *
 183  * At return, the pointer 'p' will be incremented to be used on a next call
 184  * to this function.
 185  */
 186 void *edac_align_ptr(void **p, unsigned int size, int n_elems)
 187 {
 188         unsigned int align, r;
 189         void *ptr = *p;
 190
 191         *p += size * n_elems;
 192
 193         /*
 194          * 'p' can possibly be an unaligned item X such that sizeof(X) is
 195          * 'size'.  Adjust 'p' so that its alignment is at least as
 196          * stringent as what the compiler would provide for X and return
 197          * the aligned result.
 198          * Here we assume that the alignment of a "long long" is the most
 199          * stringent alignment that the compiler will ever provide by default.
 200          * As far as I know, this is a reasonable assumption.
 201          */
 202         if (size > sizeof(long))
 203                 align = sizeof(long long);
 204         else if (size > sizeof(int))
 205                 align = sizeof(long);
 206         else if (size > sizeof(short))
 207                 align = sizeof(int);
 208         else if (size > sizeof(char))
 209                 align = sizeof(short);
 210         else
 211                 return (char *)ptr;
 212
 213         r = (unsigned long)p % align;
 214
 215         if (r == 0)
 216                 return (char *)ptr;
 217
 218         *p += align - r;
 219
 220         return (void *)(((unsigned long)ptr) + align - r);
 221 }
 222
 223 static void _edac_mc_free(struct mem_ctl_info *mci)
 224 {
 225         put_device(&mci->dev);
 226 }
 227
 228 static void mci_release(struct device *dev)
 229 {
 230         struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
 231         struct csrow_info *csr;
 232         int i, chn, row;
 233
 234         if (mci->dimms) {
 235                 for (i = 0; i < mci->tot_dimms; i++)
 236                         kfree(mci->dimms[i]);
 237                 kfree(mci->dimms);
 238         }
 239
 240         if (mci->csrows) {
 241                 for (row = 0; row < mci->nr_csrows; row++) {
 242                         csr = mci->csrows[row];
 243                         if (!csr)
 244                                 continue;
 245
 246                         if (csr->channels) {
 247                                 for (chn = 0; chn < mci->num_cschannel; chn++)
 248                                         kfree(csr->channels[chn]);
 249                                 kfree(csr->channels);
 250                         }
 251                         kfree(csr);
 252                 }
 253                 kfree(mci->csrows);
 254         }
 255         kfree(mci);
 256 }
 257
 258 static int edac_mc_alloc_csrows(struct mem_ctl_info *mci)
 259 {
 260         unsigned int tot_channels = mci->num_cschannel;
 261         unsigned int tot_csrows = mci->nr_csrows;
 262         unsigned int row, chn;
 263
 264         /*
 265          * Alocate and fill the csrow/channels structs
 266          */
 267         mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
 268         if (!mci->csrows)
 269                 return -ENOMEM;
 270
 271         for (row = 0; row < tot_csrows; row++) {
 272                 struct csrow_info *csr;
 273
 274                 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
 275                 if (!csr)
 276                         return -ENOMEM;
 277
 278                 mci->csrows[row] = csr;
 279                 csr->csrow_idx = row;
 280                 csr->mci = mci;
 281                 csr->nr_channels = tot_channels;
 282                 csr->channels = kcalloc(tot_channels, sizeof(*csr->channels),
 283                                         GFP_KERNEL);
 284                 if (!csr->channels)
 285                         return -ENOMEM;
 286
 287                 for (chn = 0; chn < tot_channels; chn++) {
 288                         struct rank_info *chan;
 289
 290                         chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
 291                         if (!chan)
 292                                 return -ENOMEM;
 293
 294                         csr->channels[chn] = chan;
 295                         chan->chan_idx = chn;
 296                         chan->csrow = csr;
 297                 }
 298         }
 299
 300         return 0;
 301 }
 302
 303 static int edac_mc_alloc_dimms(struct mem_ctl_info *mci)
 304 {
 305         unsigned int pos[EDAC_MAX_LAYERS];
 306         unsigned int row, chn, idx;
 307         int layer;
 308         void *p;
 309
 310         /*
 311          * Allocate and fill the dimm structs
 312          */
 313         mci->dimms  = kcalloc(mci->tot_dimms, sizeof(*mci->dimms), GFP_KERNEL);
 314         if (!mci->dimms)
 315                 return -ENOMEM;
 316
 317         memset(&pos, 0, sizeof(pos));
 318         row = 0;
 319         chn = 0;
 320         for (idx = 0; idx < mci->tot_dimms; idx++) {
 321                 struct dimm_info *dimm;
 322                 struct rank_info *chan;
 323                 int n, len;
 324
 325                 chan = mci->csrows[row]->channels[chn];
 326
 327                 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
 328                 if (!dimm)
 329                         return -ENOMEM;
 330                 mci->dimms[idx] = dimm;
 331                 dimm->mci = mci;
 332                 dimm->idx = idx;
 333
 334                 /*
 335                  * Copy DIMM location and initialize it.
 336                  */
 337                 len = sizeof(dimm->label);
 338                 p = dimm->label;
 339                 n = snprintf(p, len, "mc#%u", mci->mc_idx);
 340                 p += n;
 341                 len -= n;
 342                 for (layer = 0; layer < mci->n_layers; layer++) {
 343                         n = snprintf(p, len, "%s#%u",
 344                                      edac_layer_name[mci->layers[layer].type],
 345                                      pos[layer]);
 346                         p += n;
 347                         len -= n;
 348                         dimm->location[layer] = pos[layer];
 349
 350                         if (len <= 0)
 351                                 break;
 352                 }
 353
 354                 /* Link it to the csrows old API data */
 355                 chan->dimm = dimm;
 356                 dimm->csrow = row;
 357                 dimm->cschannel = chn;
 358
 359                 /* Increment csrow location */
 360                 if (mci->layers[0].is_virt_csrow) {
 361                         chn++;
 362                         if (chn == mci->num_cschannel) {
 363                                 chn = 0;
 364                                 row++;
 365                         }
 366                 } else {
 367                         row++;
 368                         if (row == mci->nr_csrows) {
 369                                 row = 0;
 370                                 chn++;
 371                         }
 372                 }
 373
 374                 /* Increment dimm location */
 375                 for (layer = mci->n_layers - 1; layer >= 0; layer--) {
 376                         pos[layer]++;
 377                         if (pos[layer] < mci->layers[layer].size)
 378                                 break;
 379                         pos[layer] = 0;
 380                 }
 381         }
 382
 383         return 0;
 384 }
 385
 386 struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num,
 387                                    unsigned int n_layers,
 388                                    struct edac_mc_layer *layers,
 389                                    unsigned int sz_pvt)
 390 {
 391         struct mem_ctl_info *mci;
 392         struct edac_mc_layer *layer;
 393         unsigned int idx, size, tot_dimms = 1;
 394         unsigned int tot_csrows = 1, tot_channels = 1;
 395         void *pvt, *ptr = NULL;
 396         bool per_rank = false;
 397
 398         if (WARN_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0))
 399                 return NULL;
 400
 401         /*
 402          * Calculate the total amount of dimms and csrows/cschannels while
 403          * in the old API emulation mode
 404          */
 405         for (idx = 0; idx < n_layers; idx++) {
 406                 tot_dimms *= layers[idx].size;
 407
 408                 if (layers[idx].is_virt_csrow)
 409                         tot_csrows *= layers[idx].size;
 410                 else
 411                         tot_channels *= layers[idx].size;
 412
 413                 if (layers[idx].type == EDAC_MC_LAYER_CHIP_SELECT)
 414                         per_rank = true;
 415         }
 416
 417         /* Figure out the offsets of the various items from the start of an mc
 418          * structure.  We want the alignment of each item to be at least as
 419          * stringent as what the compiler would provide if we could simply
 420          * hardcode everything into a single struct.
 421          */
 422         mci     = edac_align_ptr(&ptr, sizeof(*mci), 1);
 423         layer   = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
 424         pvt     = edac_align_ptr(&ptr, sz_pvt, 1);
 425         size    = ((unsigned long)pvt) + sz_pvt;
 426
 427         edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
 428                  size,
 429                  tot_dimms,
 430                  per_rank ? "ranks" : "dimms",
 431                  tot_csrows * tot_channels);
 432
 433         mci = kzalloc(size, GFP_KERNEL);
 434         if (mci == NULL)
 435                 return NULL;
 436
 437         mci->dev.release = mci_release;
 438         device_initialize(&mci->dev);
 439
 440         /* Adjust pointers so they point within the memory we just allocated
 441          * rather than an imaginary chunk of memory located at address 0.
 442          */
 443         layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
 444         pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
 445
 446         /* setup index and various internal pointers */
 447         mci->mc_idx = mc_num;
 448         mci->tot_dimms = tot_dimms;
 449         mci->pvt_info = pvt;
 450         mci->n_layers = n_layers;
 451         mci->layers = layer;
 452         memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
 453         mci->nr_csrows = tot_csrows;
 454         mci->num_cschannel = tot_channels;
 455         mci->csbased = per_rank;
 456
 457         if (edac_mc_alloc_csrows(mci))
 458                 goto error;
 459
 460         if (edac_mc_alloc_dimms(mci))
 461                 goto error;
 462
 463         mci->op_state = OP_ALLOC;
 464
 465         return mci;
 466
 467 error:
 468         _edac_mc_free(mci);
 469
 470         return NULL;
 471 }
 472 EXPORT_SYMBOL_GPL(edac_mc_alloc);
 473
 474 void edac_mc_free(struct mem_ctl_info *mci)
 475 {
 476         edac_dbg(1, "\n");
 477
 478         _edac_mc_free(mci);
 479 }
 480 EXPORT_SYMBOL_GPL(edac_mc_free);
 481
 482 bool edac_has_mcs(void)
 483 {
 484         bool ret;
 485
 486         mutex_lock(&mem_ctls_mutex);
 487
 488         ret = list_empty(&mc_devices);
 489
 490         mutex_unlock(&mem_ctls_mutex);
 491
 492         return !ret;
 493 }
 494 EXPORT_SYMBOL_GPL(edac_has_mcs);
 495
 496 /* Caller must hold mem_ctls_mutex */
 497 static struct mem_ctl_info *__find_mci_by_dev(struct device *dev)
 498 {
 499         struct mem_ctl_info *mci;
 500         struct list_head *item;
 501
 502         edac_dbg(3, "\n");
 503
 504         list_for_each(item, &mc_devices) {
 505                 mci = list_entry(item, struct mem_ctl_info, link);
 506
 507                 if (mci->pdev == dev)
 508                         return mci;
 509         }
 510
 511         return NULL;
 512 }
 513
 514 /**
 515  * find_mci_by_dev
 516  *
 517  *      scan list of controllers looking for the one that manages
 518  *      the 'dev' device
 519  * @dev: pointer to a struct device related with the MCI
 520  */
 521 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
 522 {
 523         struct mem_ctl_info *ret;
 524
 525         mutex_lock(&mem_ctls_mutex);
 526         ret = __find_mci_by_dev(dev);
 527         mutex_unlock(&mem_ctls_mutex);
 528
 529         return ret;
 530 }
 531 EXPORT_SYMBOL_GPL(find_mci_by_dev);
 532
 533 /*
 534  * edac_mc_workq_function
 535  *      performs the operation scheduled by a workq request
 536  */
 537 static void edac_mc_workq_function(struct work_struct *work_req)
 538 {
 539         struct delayed_work *d_work = to_delayed_work(work_req);
 540         struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
 541
 542         mutex_lock(&mem_ctls_mutex);
 543
 544         if (mci->op_state != OP_RUNNING_POLL) {
 545                 mutex_unlock(&mem_ctls_mutex);
 546                 return;
 547         }
 548
 549         if (edac_op_state == EDAC_OPSTATE_POLL)
 550                 mci->edac_check(mci);
 551
 552         mutex_unlock(&mem_ctls_mutex);
 553
 554         /* Queue ourselves again. */
 555         edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 556 }
 557
 558 /*
 559  * edac_mc_reset_delay_period(unsigned long value)
 560  *
 561  *      user space has updated our poll period value, need to
 562  *      reset our workq delays
 563  */
 564 void edac_mc_reset_delay_period(unsigned long value)
 565 {
 566         struct mem_ctl_info *mci;
 567         struct list_head *item;
 568
 569         mutex_lock(&mem_ctls_mutex);
 570
 571         list_for_each(item, &mc_devices) {
 572                 mci = list_entry(item, struct mem_ctl_info, link);
 573
 574                 if (mci->op_state == OP_RUNNING_POLL)
 575                         edac_mod_work(&mci->work, value);
 576         }
 577         mutex_unlock(&mem_ctls_mutex);
 578 }
 579
 580
 581
 582 /* Return 0 on success, 1 on failure.
 583  * Before calling this function, caller must
 584  * assign a unique value to mci->mc_idx.
 585  *
 586  *      locking model:
 587  *
 588  *              called with the mem_ctls_mutex lock held
 589  */
 590 static int add_mc_to_global_list(struct mem_ctl_info *mci)
 591 {
 592         struct list_head *item, *insert_before;
 593         struct mem_ctl_info *p;
 594
 595         insert_before = &mc_devices;
 596
 597         p = __find_mci_by_dev(mci->pdev);
 598         if (unlikely(p != NULL))
 599                 goto fail0;
 600
 601         list_for_each(item, &mc_devices) {
 602                 p = list_entry(item, struct mem_ctl_info, link);
 603
 604                 if (p->mc_idx >= mci->mc_idx) {
 605                         if (unlikely(p->mc_idx == mci->mc_idx))
 606                                 goto fail1;
 607
 608                         insert_before = item;
 609                         break;
 610                 }
 611         }
 612
 613         list_add_tail_rcu(&mci->link, insert_before);
 614         return 0;
 615
 616 fail0:
 617         edac_printk(KERN_WARNING, EDAC_MC,
 618                 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
 619                 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
 620         return 1;
 621
 622 fail1:
 623         edac_printk(KERN_WARNING, EDAC_MC,
 624                 "bug in low-level driver: attempt to assign\n"
 625                 "    duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
 626         return 1;
 627 }
 628
 629 static int del_mc_from_global_list(struct mem_ctl_info *mci)
 630 {
 631         list_del_rcu(&mci->link);
 632
 633         /* these are for safe removal of devices from global list while
 634          * NMI handlers may be traversing list
 635          */
 636         synchronize_rcu();
 637         INIT_LIST_HEAD(&mci->link);
 638
 639         return list_empty(&mc_devices);
 640 }
 641
 642 struct mem_ctl_info *edac_mc_find(int idx)
 643 {
 644         struct mem_ctl_info *mci;
 645         struct list_head *item;
 646
 647         mutex_lock(&mem_ctls_mutex);
 648
 649         list_for_each(item, &mc_devices) {
 650                 mci = list_entry(item, struct mem_ctl_info, link);
 651                 if (mci->mc_idx == idx)
 652                         goto unlock;
 653         }
 654
 655         mci = NULL;
 656 unlock:
 657         mutex_unlock(&mem_ctls_mutex);
 658         return mci;
 659 }
 660 EXPORT_SYMBOL(edac_mc_find);
 661
 662 const char *edac_get_owner(void)
 663 {
 664         return edac_mc_owner;
 665 }
 666 EXPORT_SYMBOL_GPL(edac_get_owner);
 667
 668 /* FIXME - should a warning be printed if no error detection? correction? */
 669 int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
 670                                const struct attribute_group **groups)
 671 {
 672         int ret = -EINVAL;
 673         edac_dbg(0, "\n");
 674
 675 #ifdef CONFIG_EDAC_DEBUG
 676         if (edac_debug_level >= 3)
 677                 edac_mc_dump_mci(mci);
 678
 679         if (edac_debug_level >= 4) {
 680                 struct dimm_info *dimm;
 681                 int i;
 682
 683                 for (i = 0; i < mci->nr_csrows; i++) {
 684                         struct csrow_info *csrow = mci->csrows[i];
 685                         u32 nr_pages = 0;
 686                         int j;
 687
 688                         for (j = 0; j < csrow->nr_channels; j++)
 689                                 nr_pages += csrow->channels[j]->dimm->nr_pages;
 690                         if (!nr_pages)
 691                                 continue;
 692                         edac_mc_dump_csrow(csrow);
 693                         for (j = 0; j < csrow->nr_channels; j++)
 694                                 if (csrow->channels[j]->dimm->nr_pages)
 695                                         edac_mc_dump_channel(csrow->channels[j]);
 696                 }
 697
 698                 mci_for_each_dimm(mci, dimm)
 699                         edac_mc_dump_dimm(dimm);
 700         }
 701 #endif
 702         mutex_lock(&mem_ctls_mutex);
 703
 704         if (edac_mc_owner && edac_mc_owner != mci->mod_name) {
 705                 ret = -EPERM;
 706                 goto fail0;
 707         }
 708
 709         if (add_mc_to_global_list(mci))
 710                 goto fail0;
 711
 712         /* set load time so that error rate can be tracked */
 713         mci->start_time = jiffies;
 714
 715         mci->bus = edac_get_sysfs_subsys();
 716
 717         if (edac_create_sysfs_mci_device(mci, groups)) {
 718                 edac_mc_printk(mci, KERN_WARNING,
 719                         "failed to create sysfs device\n");
 720                 goto fail1;
 721         }
 722
 723         if (mci->edac_check) {
 724                 mci->op_state = OP_RUNNING_POLL;
 725
 726                 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
 727                 edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 728
 729         } else {
 730                 mci->op_state = OP_RUNNING_INTERRUPT;
 731         }
 732
 733         /* Report action taken */
 734         edac_mc_printk(mci, KERN_INFO,
 735                 "Giving out device to module %s controller %s: DEV %s (%s)\n",
 736                 mci->mod_name, mci->ctl_name, mci->dev_name,
 737                 edac_op_state_to_string(mci->op_state));
 738
 739         edac_mc_owner = mci->mod_name;
 740
 741         mutex_unlock(&mem_ctls_mutex);
 742         return 0;
 743
 744 fail1:
 745         del_mc_from_global_list(mci);
 746
 747 fail0:
 748         mutex_unlock(&mem_ctls_mutex);
 749         return ret;
 750 }
 751 EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups);
 752
 753 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
 754 {
 755         struct mem_ctl_info *mci;
 756
 757         edac_dbg(0, "\n");
 758
 759         mutex_lock(&mem_ctls_mutex);
 760
 761         /* find the requested mci struct in the global list */
 762         mci = __find_mci_by_dev(dev);
 763         if (mci == NULL) {
 764                 mutex_unlock(&mem_ctls_mutex);
 765                 return NULL;
 766         }
 767
 768         /* mark MCI offline: */
 769         mci->op_state = OP_OFFLINE;
 770
 771         if (del_mc_from_global_list(mci))
 772                 edac_mc_owner = NULL;
 773
 774         mutex_unlock(&mem_ctls_mutex);
 775
 776         if (mci->edac_check)
 777                 edac_stop_work(&mci->work);
 778
 779         /* remove from sysfs */
 780         edac_remove_sysfs_mci_device(mci);
 781
 782         edac_printk(KERN_INFO, EDAC_MC,
 783                 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
 784                 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
 785
 786         return mci;
 787 }
 788 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
 789
 790 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
 791                                 u32 size)
 792 {
 793         struct page *pg;
 794         void *virt_addr;
 795         unsigned long flags = 0;
 796
 797         edac_dbg(3, "\n");
 798
 799         /* ECC error page was not in our memory. Ignore it. */
 800         if (!pfn_valid(page))
 801                 return;
 802
 803         /* Find the actual page structure then map it and fix */
 804         pg = pfn_to_page(page);
 805
 806         if (PageHighMem(pg))
 807                 local_irq_save(flags);
 808
 809         virt_addr = kmap_atomic(pg);
 810
 811         /* Perform architecture specific atomic scrub operation */
 812         edac_atomic_scrub(virt_addr + offset, size);
 813
 814         /* Unmap and complete */
 815         kunmap_atomic(virt_addr);
 816
 817         if (PageHighMem(pg))
 818                 local_irq_restore(flags);
 819 }
 820
 821 /* FIXME - should return -1 */
 822 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
 823 {
 824         struct csrow_info **csrows = mci->csrows;
 825         int row, i, j, n;
 826
 827         edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
 828         row = -1;
 829
 830         for (i = 0; i < mci->nr_csrows; i++) {
 831                 struct csrow_info *csrow = csrows[i];
 832                 n = 0;
 833                 for (j = 0; j < csrow->nr_channels; j++) {
 834                         struct dimm_info *dimm = csrow->channels[j]->dimm;
 835                         n += dimm->nr_pages;
 836                 }
 837                 if (n == 0)
 838                         continue;
 839
 840                 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
 841                          mci->mc_idx,
 842                          csrow->first_page, page, csrow->last_page,
 843                          csrow->page_mask);
 844
 845                 if ((page >= csrow->first_page) &&
 846                     (page <= csrow->last_page) &&
 847                     ((page & csrow->page_mask) ==
 848                      (csrow->first_page & csrow->page_mask))) {
 849                         row = i;
 850                         break;
 851                 }
 852         }
 853
 854         if (row == -1)
 855                 edac_mc_printk(mci, KERN_ERR,
 856                         "could not look up page error address %lx\n",
 857                         (unsigned long)page);
 858
 859         return row;
 860 }
 861 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
 862
 863 const char *edac_layer_name[] = {
 864         [EDAC_MC_LAYER_BRANCH] = "branch",
 865         [EDAC_MC_LAYER_CHANNEL] = "channel",
 866         [EDAC_MC_LAYER_SLOT] = "slot",
 867         [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
 868         [EDAC_MC_LAYER_ALL_MEM] = "memory",
 869 };
 870 EXPORT_SYMBOL_GPL(edac_layer_name);
 871
 872 static void edac_inc_ce_error(struct edac_raw_error_desc *e)
 873 {
 874         int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
 875         struct mem_ctl_info *mci = error_desc_to_mci(e);
 876         struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]);
 877
 878         mci->ce_mc += e->error_count;
 879
 880         if (dimm)
 881                 dimm->ce_count += e->error_count;
 882         else
 883                 mci->ce_noinfo_count += e->error_count;
 884 }
 885
 886 static void edac_inc_ue_error(struct edac_raw_error_desc *e)
 887 {
 888         int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
 889         struct mem_ctl_info *mci = error_desc_to_mci(e);
 890         struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]);
 891
 892         mci->ue_mc += e->error_count;
 893
 894         if (dimm)
 895                 dimm->ue_count += e->error_count;
 896         else
 897                 mci->ue_noinfo_count += e->error_count;
 898 }
 899
 900 static void edac_ce_error(struct edac_raw_error_desc *e)
 901 {
 902         struct mem_ctl_info *mci = error_desc_to_mci(e);
 903         unsigned long remapped_page;
 904
 905         if (edac_mc_get_log_ce()) {
 906                 edac_mc_printk(mci, KERN_WARNING,
 907                         "%d CE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx%s%s)\n",
 908                         e->error_count, e->msg,
 909                         *e->msg ? " " : "",
 910                         e->label, e->location, e->page_frame_number, e->offset_in_page,
 911                         e->grain, e->syndrome,
 912                         *e->other_detail ? " - " : "",
 913                         e->other_detail);
 914         }
 915
 916         edac_inc_ce_error(e);
 917
 918         if (mci->scrub_mode == SCRUB_SW_SRC) {
 919                 /*
 920                         * Some memory controllers (called MCs below) can remap
 921                         * memory so that it is still available at a different
 922                         * address when PCI devices map into memory.
 923                         * MC's that can't do this, lose the memory where PCI
 924                         * devices are mapped. This mapping is MC-dependent
 925                         * and so we call back into the MC driver for it to
 926                         * map the MC page to a physical (CPU) page which can
 927                         * then be mapped to a virtual page - which can then
 928                         * be scrubbed.
 929                         */
 930                 remapped_page = mci->ctl_page_to_phys ?
 931                         mci->ctl_page_to_phys(mci, e->page_frame_number) :
 932                         e->page_frame_number;
 933
 934                 edac_mc_scrub_block(remapped_page, e->offset_in_page, e->grain);
 935         }
 936 }
 937
 938 static void edac_ue_error(struct edac_raw_error_desc *e)
 939 {
 940         struct mem_ctl_info *mci = error_desc_to_mci(e);
 941
 942         if (edac_mc_get_log_ue()) {
 943                 edac_mc_printk(mci, KERN_WARNING,
 944                         "%d UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n",
 945                         e->error_count, e->msg,
 946                         *e->msg ? " " : "",
 947                         e->label, e->location, e->page_frame_number, e->offset_in_page,
 948                         e->grain,
 949                         *e->other_detail ? " - " : "",
 950                         e->other_detail);
 951         }
 952
 953         edac_inc_ue_error(e);
 954
 955         if (edac_mc_get_panic_on_ue()) {
 956                 panic("UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n",
 957                         e->msg,
 958                         *e->msg ? " " : "",
 959                         e->label, e->location, e->page_frame_number, e->offset_in_page,
 960                         e->grain,
 961                         *e->other_detail ? " - " : "",
 962                         e->other_detail);
 963         }
 964 }
 965
 966 static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan)
 967 {
 968         struct mem_ctl_info *mci = error_desc_to_mci(e);
 969         enum hw_event_mc_err_type type = e->type;
 970         u16 count = e->error_count;
 971
 972         if (row < 0)
 973                 return;
 974
 975         edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
 976
 977         if (type == HW_EVENT_ERR_CORRECTED) {
 978                 mci->csrows[row]->ce_count += count;
 979                 if (chan >= 0)
 980                         mci->csrows[row]->channels[chan]->ce_count += count;
 981         } else {
 982                 mci->csrows[row]->ue_count += count;
 983         }
 984 }
 985
 986 void edac_raw_mc_handle_error(struct edac_raw_error_desc *e)
 987 {
 988         struct mem_ctl_info *mci = error_desc_to_mci(e);
 989         u8 grain_bits;
 990
 991         /* Sanity-check driver-supplied grain value. */
 992         if (WARN_ON_ONCE(!e->grain))
 993                 e->grain = 1;
 994
 995         grain_bits = fls_long(e->grain - 1);
 996
 997         /* Report the error via the trace interface */
 998         if (IS_ENABLED(CONFIG_RAS))
 999                 trace_mc_event(e->type, e->msg, e->label, e->error_count,
1000                                mci->mc_idx, e->top_layer, e->mid_layer,
1001                                e->low_layer,
1002                                (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
1003                                grain_bits, e->syndrome, e->other_detail);
1004
1005         if (e->type == HW_EVENT_ERR_CORRECTED)
1006                 edac_ce_error(e);
1007         else
1008                 edac_ue_error(e);
1009 }
1010 EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error);
1011
1012 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1013                           struct mem_ctl_info *mci,
1014                           const u16 error_count,
1015                           const unsigned long page_frame_number,
1016                           const unsigned long offset_in_page,
1017                           const unsigned long syndrome,
1018                           const int top_layer,
1019                           const int mid_layer,
1020                           const int low_layer,
1021                           const char *msg,
1022                           const char *other_detail)
1023 {
1024         struct dimm_info *dimm;
1025         char *p;
1026         int row = -1, chan = -1;
1027         int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1028         int i, n_labels = 0;
1029         struct edac_raw_error_desc *e = &mci->error_desc;
1030         bool any_memory = true;
1031
1032         edac_dbg(3, "MC%d\n", mci->mc_idx);
1033
1034         /* Fills the error report buffer */
1035         memset(e, 0, sizeof (*e));
1036         e->error_count = error_count;
1037         e->type = type;
1038         e->top_layer = top_layer;
1039         e->mid_layer = mid_layer;
1040         e->low_layer = low_layer;
1041         e->page_frame_number = page_frame_number;
1042         e->offset_in_page = offset_in_page;
1043         e->syndrome = syndrome;
1044         /* need valid strings here for both: */
1045         e->msg = msg ?: "";
1046         e->other_detail = other_detail ?: "";
1047
1048         /*
1049          * Check if the event report is consistent and if the memory location is
1050          * known. If it is, the DIMM(s) label info will be filled and the DIMM's
1051          * error counters will be incremented.
1052          */
1053         for (i = 0; i < mci->n_layers; i++) {
1054                 if (pos[i] >= (int)mci->layers[i].size) {
1055
1056                         edac_mc_printk(mci, KERN_ERR,
1057                                        "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1058                                        edac_layer_name[mci->layers[i].type],
1059                                        pos[i], mci->layers[i].size);
1060                         /*
1061                          * Instead of just returning it, let's use what's
1062                          * known about the error. The increment routines and
1063                          * the DIMM filter logic will do the right thing by
1064                          * pointing the likely damaged DIMMs.
1065                          */
1066                         pos[i] = -1;
1067                 }
1068                 if (pos[i] >= 0)
1069                         any_memory = false;
1070         }
1071
1072         /*
1073          * Get the dimm label/grain that applies to the match criteria.
1074          * As the error algorithm may not be able to point to just one memory
1075          * stick, the logic here will get all possible labels that could
1076          * pottentially be affected by the error.
1077          * On FB-DIMM memory controllers, for uncorrected errors, it is common
1078          * to have only the MC channel and the MC dimm (also called "branch")
1079          * but the channel is not known, as the memory is arranged in pairs,
1080          * where each memory belongs to a separate channel within the same
1081          * branch.
1082          */
1083         p = e->label;
1084         *p = '\0';
1085
1086         mci_for_each_dimm(mci, dimm) {
1087                 if (top_layer >= 0 && top_layer != dimm->location[0])
1088                         continue;
1089                 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1090                         continue;
1091                 if (low_layer >= 0 && low_layer != dimm->location[2])
1092                         continue;
1093
1094                 /* get the max grain, over the error match range */
1095                 if (dimm->grain > e->grain)
1096                         e->grain = dimm->grain;
1097
1098                 /*
1099                  * If the error is memory-controller wide, there's no need to
1100                  * seek for the affected DIMMs because the whole channel/memory
1101                  * controller/... may be affected. Also, don't show errors for
1102                  * empty DIMM slots.
1103                  */
1104                 if (!dimm->nr_pages)
1105                         continue;
1106
1107                 n_labels++;
1108                 if (n_labels > EDAC_MAX_LABELS) {
1109                         p = e->label;
1110                         *p = '\0';
1111                 } else {
1112                         if (p != e->label) {
1113                                 strcpy(p, OTHER_LABEL);
1114                                 p += strlen(OTHER_LABEL);
1115                         }
1116                         strcpy(p, dimm->label);
1117                         p += strlen(p);
1118                 }
1119
1120                 /*
1121                  * get csrow/channel of the DIMM, in order to allow
1122                  * incrementing the compat API counters
1123                  */
1124                 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1125                         mci->csbased ? "rank" : "dimm",
1126                         dimm->csrow, dimm->cschannel);
1127                 if (row == -1)
1128                         row = dimm->csrow;
1129                 else if (row >= 0 && row != dimm->csrow)
1130                         row = -2;
1131
1132                 if (chan == -1)
1133                         chan = dimm->cschannel;
1134                 else if (chan >= 0 && chan != dimm->cschannel)
1135                         chan = -2;
1136         }
1137
1138         if (any_memory)
1139                 strcpy(e->label, "any memory");
1140         else if (!*e->label)
1141                 strcpy(e->label, "unknown memory");
1142
1143         edac_inc_csrow(e, row, chan);
1144
1145         /* Fill the RAM location data */
1146         p = e->location;
1147
1148         for (i = 0; i < mci->n_layers; i++) {
1149                 if (pos[i] < 0)
1150                         continue;
1151
1152                 p += sprintf(p, "%s:%d ",
1153                              edac_layer_name[mci->layers[i].type],
1154                              pos[i]);
1155         }
1156         if (p > e->location)
1157                 *(p - 1) = '\0';
1158
1159         edac_raw_mc_handle_error(e);
1160 }
1161 EXPORT_SYMBOL_GPL(edac_mc_handle_error);