1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
4 * Synopsys DesignWare eDMA v0 core
6 * Author: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
9 #include <linux/debugfs.h>
10 #include <linux/bitfield.h>
12 #include "dw-edma-v0-debugfs.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(name) \
17 ((void __force *)®s->name)
18 #define REGISTER(name) \
19 { #name, REGS_ADDR(name) }
21 #define WR_REGISTER(name) \
22 { #name, REGS_ADDR(wr_##name) }
23 #define RD_REGISTER(name) \
24 { #name, REGS_ADDR(rd_##name) }
26 #define WR_REGISTER_LEGACY(name) \
27 { #name, REGS_ADDR(type.legacy.wr_##name) }
28 #define RD_REGISTER_LEGACY(name) \
29 { #name, REGS_ADDR(type.legacy.rd_##name) }
31 #define WR_REGISTER_UNROLL(name) \
32 { #name, REGS_ADDR(type.unroll.wr_##name) }
33 #define RD_REGISTER_UNROLL(name) \
34 { #name, REGS_ADDR(type.unroll.rd_##name) }
36 #define WRITE_STR "write"
37 #define READ_STR "read"
38 #define CHANNEL_STR "channel"
39 #define REGISTERS_STR "registers"
41 static struct dw_edma *dw;
42 static struct dw_edma_v0_regs __iomem *regs;
47 } lim[2][EDMA_V0_MAX_NR_CH];
49 struct debugfs_entries {
54 static int dw_edma_debugfs_u32_get(void *data, u64 *val)
56 void __iomem *reg = (void __force __iomem *)data;
57 if (dw->mf == EDMA_MF_EDMA_LEGACY &&
58 reg >= (void __iomem *)®s->type.legacy.ch) {
59 void __iomem *ptr = ®s->type.legacy.ch;
64 for (ch = 0; ch < dw->wr_ch_cnt; ch++)
65 if (lim[0][ch].start >= reg && reg < lim[0][ch].end) {
66 ptr += (reg - lim[0][ch].start);
70 for (ch = 0; ch < dw->rd_ch_cnt; ch++)
71 if (lim[1][ch].start >= reg && reg < lim[1][ch].end) {
72 ptr += (reg - lim[1][ch].start);
78 viewport_sel = BIT(31);
80 viewport_sel |= FIELD_PREP(EDMA_V0_VIEWPORT_MASK, ch);
82 raw_spin_lock_irqsave(&dw->lock, flags);
84 writel(viewport_sel, ®s->type.legacy.viewport_sel);
87 raw_spin_unlock_irqrestore(&dw->lock, flags);
94 DEFINE_DEBUGFS_ATTRIBUTE(fops_x32, dw_edma_debugfs_u32_get, NULL, "0x%08llx\n");
96 static void dw_edma_debugfs_create_x32(const struct debugfs_entries entries[],
97 int nr_entries, struct dentry *dir)
101 for (i = 0; i < nr_entries; i++) {
102 if (!debugfs_create_file_unsafe(entries[i].name, 0444, dir,
103 entries[i].reg, &fops_x32))
108 static void dw_edma_debugfs_regs_ch(struct dw_edma_v0_ch_regs __iomem *regs,
112 const struct debugfs_entries debugfs_regs[] = {
113 REGISTER(ch_control1),
114 REGISTER(ch_control2),
115 REGISTER(transfer_size),
124 nr_entries = ARRAY_SIZE(debugfs_regs);
125 dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, dir);
128 static void dw_edma_debugfs_regs_wr(struct dentry *dir)
130 const struct debugfs_entries debugfs_regs[] = {
131 /* eDMA global registers */
132 WR_REGISTER(engine_en),
133 WR_REGISTER(doorbell),
134 WR_REGISTER(ch_arb_weight.lsb),
135 WR_REGISTER(ch_arb_weight.msb),
136 /* eDMA interrupts registers */
137 WR_REGISTER(int_status),
138 WR_REGISTER(int_mask),
139 WR_REGISTER(int_clear),
140 WR_REGISTER(err_status),
141 WR_REGISTER(done_imwr.lsb),
142 WR_REGISTER(done_imwr.msb),
143 WR_REGISTER(abort_imwr.lsb),
144 WR_REGISTER(abort_imwr.msb),
145 WR_REGISTER(ch01_imwr_data),
146 WR_REGISTER(ch23_imwr_data),
147 WR_REGISTER(ch45_imwr_data),
148 WR_REGISTER(ch67_imwr_data),
149 WR_REGISTER(linked_list_err_en),
151 const struct debugfs_entries debugfs_unroll_regs[] = {
152 /* eDMA channel context grouping */
153 WR_REGISTER_UNROLL(engine_chgroup),
154 WR_REGISTER_UNROLL(engine_hshake_cnt.lsb),
155 WR_REGISTER_UNROLL(engine_hshake_cnt.msb),
156 WR_REGISTER_UNROLL(ch0_pwr_en),
157 WR_REGISTER_UNROLL(ch1_pwr_en),
158 WR_REGISTER_UNROLL(ch2_pwr_en),
159 WR_REGISTER_UNROLL(ch3_pwr_en),
160 WR_REGISTER_UNROLL(ch4_pwr_en),
161 WR_REGISTER_UNROLL(ch5_pwr_en),
162 WR_REGISTER_UNROLL(ch6_pwr_en),
163 WR_REGISTER_UNROLL(ch7_pwr_en),
165 struct dentry *regs_dir, *ch_dir;
169 regs_dir = debugfs_create_dir(WRITE_STR, dir);
173 nr_entries = ARRAY_SIZE(debugfs_regs);
174 dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, regs_dir);
176 if (dw->mf == EDMA_MF_HDMA_COMPAT) {
177 nr_entries = ARRAY_SIZE(debugfs_unroll_regs);
178 dw_edma_debugfs_create_x32(debugfs_unroll_regs, nr_entries,
182 for (i = 0; i < dw->wr_ch_cnt; i++) {
183 snprintf(name, sizeof(name), "%s:%d", CHANNEL_STR, i);
185 ch_dir = debugfs_create_dir(name, regs_dir);
189 dw_edma_debugfs_regs_ch(®s->type.unroll.ch[i].wr, ch_dir);
191 lim[0][i].start = ®s->type.unroll.ch[i].wr;
192 lim[0][i].end = ®s->type.unroll.ch[i].padding_1[0];
196 static void dw_edma_debugfs_regs_rd(struct dentry *dir)
198 const struct debugfs_entries debugfs_regs[] = {
199 /* eDMA global registers */
200 RD_REGISTER(engine_en),
201 RD_REGISTER(doorbell),
202 RD_REGISTER(ch_arb_weight.lsb),
203 RD_REGISTER(ch_arb_weight.msb),
204 /* eDMA interrupts registers */
205 RD_REGISTER(int_status),
206 RD_REGISTER(int_mask),
207 RD_REGISTER(int_clear),
208 RD_REGISTER(err_status.lsb),
209 RD_REGISTER(err_status.msb),
210 RD_REGISTER(linked_list_err_en),
211 RD_REGISTER(done_imwr.lsb),
212 RD_REGISTER(done_imwr.msb),
213 RD_REGISTER(abort_imwr.lsb),
214 RD_REGISTER(abort_imwr.msb),
215 RD_REGISTER(ch01_imwr_data),
216 RD_REGISTER(ch23_imwr_data),
217 RD_REGISTER(ch45_imwr_data),
218 RD_REGISTER(ch67_imwr_data),
220 const struct debugfs_entries debugfs_unroll_regs[] = {
221 /* eDMA channel context grouping */
222 RD_REGISTER_UNROLL(engine_chgroup),
223 RD_REGISTER_UNROLL(engine_hshake_cnt.lsb),
224 RD_REGISTER_UNROLL(engine_hshake_cnt.msb),
225 RD_REGISTER_UNROLL(ch0_pwr_en),
226 RD_REGISTER_UNROLL(ch1_pwr_en),
227 RD_REGISTER_UNROLL(ch2_pwr_en),
228 RD_REGISTER_UNROLL(ch3_pwr_en),
229 RD_REGISTER_UNROLL(ch4_pwr_en),
230 RD_REGISTER_UNROLL(ch5_pwr_en),
231 RD_REGISTER_UNROLL(ch6_pwr_en),
232 RD_REGISTER_UNROLL(ch7_pwr_en),
234 struct dentry *regs_dir, *ch_dir;
238 regs_dir = debugfs_create_dir(READ_STR, dir);
242 nr_entries = ARRAY_SIZE(debugfs_regs);
243 dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, regs_dir);
245 if (dw->mf == EDMA_MF_HDMA_COMPAT) {
246 nr_entries = ARRAY_SIZE(debugfs_unroll_regs);
247 dw_edma_debugfs_create_x32(debugfs_unroll_regs, nr_entries,
251 for (i = 0; i < dw->rd_ch_cnt; i++) {
252 snprintf(name, sizeof(name), "%s:%d", CHANNEL_STR, i);
254 ch_dir = debugfs_create_dir(name, regs_dir);
258 dw_edma_debugfs_regs_ch(®s->type.unroll.ch[i].rd, ch_dir);
260 lim[1][i].start = ®s->type.unroll.ch[i].rd;
261 lim[1][i].end = ®s->type.unroll.ch[i].padding_2[0];
265 static void dw_edma_debugfs_regs(void)
267 const struct debugfs_entries debugfs_regs[] = {
268 REGISTER(ctrl_data_arb_prior),
271 struct dentry *regs_dir;
274 regs_dir = debugfs_create_dir(REGISTERS_STR, dw->debugfs);
278 nr_entries = ARRAY_SIZE(debugfs_regs);
279 dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, regs_dir);
281 dw_edma_debugfs_regs_wr(regs_dir);
282 dw_edma_debugfs_regs_rd(regs_dir);
285 void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip)
291 regs = dw->rg_region.vaddr;
295 dw->debugfs = debugfs_create_dir(dw->name, NULL);
299 debugfs_create_u32("mf", 0444, dw->debugfs, &dw->mf);
300 debugfs_create_u16("wr_ch_cnt", 0444, dw->debugfs, &dw->wr_ch_cnt);
301 debugfs_create_u16("rd_ch_cnt", 0444, dw->debugfs, &dw->rd_ch_cnt);
303 dw_edma_debugfs_regs();
306 void dw_edma_v0_debugfs_off(struct dw_edma_chip *chip)
312 debugfs_remove_recursive(dw->debugfs);