2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
36 config INTEL_MIC_X100_DMA
37 tristate "Intel MIC X100 DMA Driver"
38 depends on 64BIT && X86 && INTEL_MIC_BUS
41 This enables DMA support for the Intel Many Integrated Core
42 (MIC) family of PCIe form factor coprocessor X100 devices that
43 run a 64 bit Linux OS. This driver will be used by both MIC
44 host and card drivers.
46 If you are building host kernel with a MIC device or a card
47 kernel for a MIC device, then say M (recommended) or Y, else
48 say N. If unsure say N.
50 More information about the Intel MIC family as well as the Linux
51 OS and tools for MIC to use with this driver are available from
52 <http://software.intel.com/en-us/mic-developer>.
54 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
58 bool "ARM PrimeCell PL080 or PL081 support"
61 select DMA_VIRTUAL_CHANNELS
63 Platform has a PL08x DMAC device
64 which can provide DMA engine support
67 tristate "Intel I/OAT DMA support"
70 select DMA_ENGINE_RAID
73 Enable support for the Intel(R) I/OAT DMA engine present
74 in recent Intel Xeon chipsets.
76 Say Y here if you have such a chipset.
81 tristate "Intel IOP ADMA support"
82 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the Intel(R) IOP Series RAID engines.
89 tristate "Intel integrated DMA 64-bit support"
91 select DMA_VIRTUAL_CHANNELS
93 Enable DMA support for Intel Low Power Subsystem such as found on
96 source "drivers/dma/dw/Kconfig"
99 tristate "Atmel AHB DMA support"
103 Support the Atmel AHB DMA controller.
106 tristate "Atmel XDMA support"
110 Support the Atmel XDMA controller.
113 tristate "Freescale Elo series DMA support"
116 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
118 Enable support for the Freescale Elo series DMA controllers.
119 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
120 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
121 some Txxx and Bxxx parts.
124 tristate "Freescale RAID engine Support"
125 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
127 select DMA_ENGINE_RAID
129 Enable support for Freescale RAID Engine. RAID Engine is
130 available on some QorIQ SoCs (like P5020/P5040). It has
131 the capability to offload memcpy, xor and pq computation
134 source "drivers/dma/hsu/Kconfig"
137 tristate "Freescale MPC512x built-in DMA engine support"
138 depends on PPC_MPC512x || PPC_MPC831x
141 Enable support for the Freescale MPC512x built-in DMA engine.
143 source "drivers/dma/bestcomm/Kconfig"
146 bool "Marvell XOR engine support"
147 depends on PLAT_ORION
149 select DMA_ENGINE_RAID
150 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
152 Enable support for the Marvell XOR engine.
155 bool "MX3x Image Processing Unit support"
160 If you plan to use the Image Processing unit in the i.MX3x, say
161 Y here. If unsure, select Y.
164 int "Number of dynamically mapped interrupts for IPU"
169 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
170 To avoid bloating the irq_desc[] array we allocate a sufficient
171 number of IRQ slots and map them dynamically to specific sources.
174 bool "PXA DMA support"
175 depends on (ARCH_MMP || ARCH_PXA)
177 select DMA_VIRTUAL_CHANNELS
179 Support the DMA engine for PXA. It is also compatible with MMP PDMA
180 platform. The internal DMA IP of all PXA variants is supported, with
181 16 to 32 channels for peripheral to memory or memory to memory
185 tristate "Toshiba TXx9 SoC DMA support"
186 depends on MACH_TX49XX || MACH_TX39XX
189 Support the TXx9 SoC internal DMA controller. This can be
190 integrated in chips such as the Toshiba TX4927/38/39.
192 config TEGRA20_APB_DMA
193 bool "NVIDIA Tegra20 APB DMA support"
194 depends on ARCH_TEGRA
197 Support for the NVIDIA Tegra20 APB DMA controller driver. The
198 DMA controller is having multiple DMA channel which can be
199 configured for different peripherals like audio, UART, SPI,
200 I2C etc which is in APB bus.
201 This DMA controller transfers data from memory to peripheral fifo
202 or vice versa. It does not support memory to memory data transfer.
205 tristate "Samsung S3C24XX DMA support"
206 depends on ARCH_S3C24XX
208 select DMA_VIRTUAL_CHANNELS
210 Support for the Samsung S3C24XX DMA controller driver. The
211 DMA controller is having multiple DMA channels which can be
212 configured for different peripherals like audio, UART, SPI.
213 The DMA controller can transfer data from memory to peripheral,
214 periphal to memory, periphal to periphal and memory to memory.
216 source "drivers/dma/sh/Kconfig"
219 bool "ST-Ericsson COH901318 DMA support"
223 Enable support for ST-Ericsson COH 901 318 DMA.
226 bool "ST-Ericsson DMA40 support"
227 depends on ARCH_U8500
230 Support for ST-Ericsson DMA40 controller
232 config AMCC_PPC440SPE_ADMA
233 tristate "AMCC PPC440SPe ADMA support"
234 depends on 440SPe || 440SP
236 select DMA_ENGINE_RAID
237 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
238 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
240 Enable support for the AMCC PPC440SPe RAID engines.
243 tristate "Timberdale FPGA DMA support"
244 depends on MFD_TIMBERDALE
247 Enable support for the Timberdale FPGA DMA engine.
250 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
254 Enable support for the CSR SiRFprimaII DMA engine.
257 bool "TI EDMA support"
258 depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
260 select DMA_VIRTUAL_CHANNELS
264 Enable support for the TI EDMA controller. This DMA
265 engine is found on TI DaVinci and AM33xx parts.
267 config TI_DMA_CROSSBAR
270 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
274 tristate "DMA API Driver for PL330"
278 Select if your platform has one or more PL330 DMACs.
279 You need to provide platform specific settings via
280 platform_data for a dma-pl330 device.
283 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
284 depends on PCI && (X86_32 || COMPILE_TEST)
287 Enable support for Intel EG20T PCH DMA engine.
289 This driver also can be used for LAPIS Semiconductor IOH(Input/
290 Output Hub), ML7213, ML7223 and ML7831.
291 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
292 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
293 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
294 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
297 tristate "i.MX SDMA support"
301 Support the i.MX SDMA engine. This engine is integrated into
302 Freescale i.MX25/31/35/51/53/6 chips.
305 tristate "i.MX DMA support"
309 Support the i.MX DMA engine. This engine is integrated into
310 Freescale i.MX1/21/27 chips.
313 bool "MXS DMA support"
314 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
318 Support the MXS DMA engine. This engine including APBH-DMA
319 and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips.
322 bool "Cirrus Logic EP93xx DMA support"
323 depends on ARCH_EP93XX
326 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
329 tristate "SA-11x0 DMA support"
330 depends on ARCH_SA1100
332 select DMA_VIRTUAL_CHANNELS
334 Support the DMA engine found on Intel StrongARM SA-1100 and
335 SA-1110 SoCs. This DMA engine can only be used with on-chip
339 bool "MMP Two-Channel DMA support"
344 Support the MMP Two-Channel DMA engine.
345 This engine used for MMP Audio DMA and pxa910 SQU.
346 It needs sram driver under mach-mmp.
348 Say Y here if you enabled MMP ADMA, otherwise say N.
351 tristate "OMAP DMA support"
354 select DMA_VIRTUAL_CHANNELS
355 select TI_DMA_CROSSBAR if SOC_DRA7XX
358 tristate "BCM2835 DMA engine support"
359 depends on ARCH_BCM2835
361 select DMA_VIRTUAL_CHANNELS
364 tristate "AM33xx CPPI41 DMA support"
368 The Communications Port Programming Interface (CPPI) 4.1 DMA engine
369 is currently used by the USB driver on AM335x platforms.
372 bool "MMP PDMA support"
373 depends on (ARCH_MMP || ARCH_PXA)
376 Support the MMP PDMA engine for PXA and MMP platform.
379 tristate "JZ4740 DMA support"
380 depends on MACH_JZ4740
382 select DMA_VIRTUAL_CHANNELS
385 tristate "JZ4780 DMA support"
386 depends on MACH_JZ4780
388 select DMA_VIRTUAL_CHANNELS
390 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
391 If you have a board based on such a SoC and wish to use DMA for
392 devices which can use the DMA controller, say Y or M here.
395 tristate "Hisilicon K3 DMA support"
396 depends on ARCH_HI3xxx
398 select DMA_VIRTUAL_CHANNELS
400 Support the DMA engine for Hisilicon K3 platform
404 tristate "MOXART DMA support"
405 depends on ARCH_MOXART
408 select DMA_VIRTUAL_CHANNELS
410 Enable support for the MOXA ART SoC DMA controller.
413 tristate "Freescale eDMA engine support"
416 select DMA_VIRTUAL_CHANNELS
418 Support the Freescale eDMA engine with programmable channel
419 multiplexing capability for DMA request sources(slot).
420 This module can be found on Freescale Vybrid and LS-1 SoCs.
423 tristate "Xilinx AXI VDMA Engine"
424 depends on (ARCH_ZYNQ || MICROBLAZE)
427 Enable support for Xilinx AXI VDMA Soft IP.
429 This engine provides high-bandwidth direct memory access
430 between memory and AXI4-Stream video type target
431 peripherals including peripherals which support AXI4-
432 Stream Video Protocol. It has two stream interfaces/
433 channels, Memory Mapped to Stream (MM2S) and Stream to
434 Memory Mapped (S2MM) for the data transfers.
437 tristate "Allwinner A31 SoCs DMA support"
438 depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
439 depends on RESET_CONTROLLER
441 select DMA_VIRTUAL_CHANNELS
443 Support for the DMA engine first found in Allwinner A31 SoCs.
446 tristate "Renesas Type-AXI NBPF DMA support"
448 depends on ARM || COMPILE_TEST
450 Support for "Type-AXI" NBPF DMA IPs from Renesas
453 tristate "IMG MDC support"
454 depends on MIPS || COMPILE_TEST
455 depends on MFD_SYSCON
457 select DMA_VIRTUAL_CHANNELS
459 Enable support for the IMG multi-threaded DMA controller (MDC).
462 tristate "APM X-Gene DMA support"
463 depends on ARCH_XGENE || COMPILE_TEST
465 select DMA_ENGINE_RAID
466 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
468 Enable support for the APM X-Gene SoC DMA engine.
473 config DMA_VIRTUAL_CHANNELS
485 comment "DMA Clients"
486 depends on DMA_ENGINE
489 bool "Async_tx: Offload support for the async_tx api"
490 depends on DMA_ENGINE
492 This allows the async_tx api to take advantage of offload engines for
493 memcpy, memset, xor, and raid6 p+q operations. If your platform has
494 a dma engine that can perform raid operations and you have enabled
500 tristate "DMA Test client"
501 depends on DMA_ENGINE
503 Simple DMA test client. Say N unless you're debugging a
506 config DMA_ENGINE_RAID
510 tristate "QCOM BAM DMA support"
511 depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
513 select DMA_VIRTUAL_CHANNELS
515 Enable support for the QCOM BAM DMA controller. This controller
516 provides DMA capabilities for a variety of on-chip devices.