1 // SPDX-License-Identifier: GPL-2.0-only
3 * Crypto acceleration support for Rockchip RK3288
5 * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
7 * Author: Zain Wang <zain.wang@rock-chips.com>
9 * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
12 #include "rk3288_crypto.h"
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
16 #include <linux/clk.h>
17 #include <linux/crypto.h>
18 #include <linux/reset.h>
20 static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
24 err = clk_prepare_enable(dev->sclk);
26 dev_err(dev->dev, "[%s:%d], Couldn't enable clock sclk\n",
30 err = clk_prepare_enable(dev->aclk);
32 dev_err(dev->dev, "[%s:%d], Couldn't enable clock aclk\n",
36 err = clk_prepare_enable(dev->hclk);
38 dev_err(dev->dev, "[%s:%d], Couldn't enable clock hclk\n",
42 err = clk_prepare_enable(dev->dmaclk);
44 dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n",
50 clk_disable_unprepare(dev->hclk);
52 clk_disable_unprepare(dev->aclk);
54 clk_disable_unprepare(dev->sclk);
59 static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
61 clk_disable_unprepare(dev->dmaclk);
62 clk_disable_unprepare(dev->hclk);
63 clk_disable_unprepare(dev->aclk);
64 clk_disable_unprepare(dev->sclk);
67 static int check_alignment(struct scatterlist *sg_src,
68 struct scatterlist *sg_dst,
73 in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
74 IS_ALIGNED((uint32_t)sg_src->length, align_mask);
77 out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) &&
78 IS_ALIGNED((uint32_t)sg_dst->length, align_mask);
81 return (align && (sg_src->length == sg_dst->length));
84 static int rk_load_data(struct rk_crypto_info *dev,
85 struct scatterlist *sg_src,
86 struct scatterlist *sg_dst)
90 dev->aligned = dev->aligned ?
91 check_alignment(sg_src, sg_dst, dev->align_size) :
94 count = min(dev->left_bytes, sg_src->length);
95 dev->left_bytes -= count;
97 if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) {
98 dev_err(dev->dev, "[%s:%d] dma_map_sg(src) error\n",
102 dev->addr_in = sg_dma_address(sg_src);
105 if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) {
107 "[%s:%d] dma_map_sg(dst) error\n",
109 dma_unmap_sg(dev->dev, sg_src, 1,
113 dev->addr_out = sg_dma_address(sg_dst);
116 count = (dev->left_bytes > PAGE_SIZE) ?
117 PAGE_SIZE : dev->left_bytes;
119 if (!sg_pcopy_to_buffer(dev->first, dev->src_nents,
120 dev->addr_vir, count,
121 dev->total - dev->left_bytes)) {
122 dev_err(dev->dev, "[%s:%d] pcopy err\n",
126 dev->left_bytes -= count;
127 sg_init_one(&dev->sg_tmp, dev->addr_vir, count);
128 if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) {
129 dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp) error\n",
133 dev->addr_in = sg_dma_address(&dev->sg_tmp);
136 if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1,
139 "[%s:%d] dma_map_sg(sg_tmp) error\n",
141 dma_unmap_sg(dev->dev, &dev->sg_tmp, 1,
145 dev->addr_out = sg_dma_address(&dev->sg_tmp);
152 static void rk_unload_data(struct rk_crypto_info *dev)
154 struct scatterlist *sg_in, *sg_out;
156 sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp;
157 dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE);
160 sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp;
161 dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE);
165 static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
167 struct rk_crypto_info *dev = platform_get_drvdata(dev_id);
168 u32 interrupt_status;
170 spin_lock(&dev->lock);
171 interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
172 CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
174 if (interrupt_status & 0x0a) {
175 dev_warn(dev->dev, "DMA Error\n");
178 tasklet_schedule(&dev->done_task);
180 spin_unlock(&dev->lock);
184 static int rk_crypto_enqueue(struct rk_crypto_info *dev,
185 struct crypto_async_request *async_req)
190 spin_lock_irqsave(&dev->lock, flags);
191 ret = crypto_enqueue_request(&dev->queue, async_req);
193 spin_unlock_irqrestore(&dev->lock, flags);
197 spin_unlock_irqrestore(&dev->lock, flags);
198 tasklet_schedule(&dev->queue_task);
203 static void rk_crypto_queue_task_cb(unsigned long data)
205 struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
206 struct crypto_async_request *async_req, *backlog;
211 spin_lock_irqsave(&dev->lock, flags);
212 backlog = crypto_get_backlog(&dev->queue);
213 async_req = crypto_dequeue_request(&dev->queue);
217 spin_unlock_irqrestore(&dev->lock, flags);
220 spin_unlock_irqrestore(&dev->lock, flags);
223 backlog->complete(backlog, -EINPROGRESS);
227 dev->async_req = async_req;
228 err = dev->start(dev);
230 dev->complete(dev->async_req, err);
233 static void rk_crypto_done_task_cb(unsigned long data)
235 struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
238 dev->complete(dev->async_req, dev->err);
242 dev->err = dev->update(dev);
244 dev->complete(dev->async_req, dev->err);
247 static struct rk_crypto_tmp *rk_cipher_algs[] = {
252 &rk_ecb_des3_ede_alg,
253 &rk_cbc_des3_ede_alg,
259 static int rk_crypto_register(struct rk_crypto_info *crypto_info)
264 for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
265 rk_cipher_algs[i]->dev = crypto_info;
266 if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
267 err = crypto_register_skcipher(
268 &rk_cipher_algs[i]->alg.skcipher);
270 err = crypto_register_ahash(
271 &rk_cipher_algs[i]->alg.hash);
273 goto err_cipher_algs;
278 for (k = 0; k < i; k++) {
279 if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
280 crypto_unregister_skcipher(&rk_cipher_algs[k]->alg.skcipher);
282 crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
287 static void rk_crypto_unregister(void)
291 for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
292 if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
293 crypto_unregister_skcipher(&rk_cipher_algs[i]->alg.skcipher);
295 crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
299 static void rk_crypto_action(void *data)
301 struct rk_crypto_info *crypto_info = data;
303 reset_control_assert(crypto_info->rst);
306 static const struct of_device_id crypto_of_id_table[] = {
307 { .compatible = "rockchip,rk3288-crypto" },
310 MODULE_DEVICE_TABLE(of, crypto_of_id_table);
312 static int rk_crypto_probe(struct platform_device *pdev)
314 struct device *dev = &pdev->dev;
315 struct rk_crypto_info *crypto_info;
318 crypto_info = devm_kzalloc(&pdev->dev,
319 sizeof(*crypto_info), GFP_KERNEL);
325 crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
326 if (IS_ERR(crypto_info->rst)) {
327 err = PTR_ERR(crypto_info->rst);
331 reset_control_assert(crypto_info->rst);
332 usleep_range(10, 20);
333 reset_control_deassert(crypto_info->rst);
335 err = devm_add_action_or_reset(dev, rk_crypto_action, crypto_info);
339 spin_lock_init(&crypto_info->lock);
341 crypto_info->reg = devm_platform_ioremap_resource(pdev, 0);
342 if (IS_ERR(crypto_info->reg)) {
343 err = PTR_ERR(crypto_info->reg);
347 crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
348 if (IS_ERR(crypto_info->aclk)) {
349 err = PTR_ERR(crypto_info->aclk);
353 crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
354 if (IS_ERR(crypto_info->hclk)) {
355 err = PTR_ERR(crypto_info->hclk);
359 crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
360 if (IS_ERR(crypto_info->sclk)) {
361 err = PTR_ERR(crypto_info->sclk);
365 crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
366 if (IS_ERR(crypto_info->dmaclk)) {
367 err = PTR_ERR(crypto_info->dmaclk);
371 crypto_info->irq = platform_get_irq(pdev, 0);
372 if (crypto_info->irq < 0) {
373 dev_warn(crypto_info->dev,
374 "control Interrupt is not available.\n");
375 err = crypto_info->irq;
379 err = devm_request_irq(&pdev->dev, crypto_info->irq,
380 rk_crypto_irq_handle, IRQF_SHARED,
384 dev_err(crypto_info->dev, "irq request failed.\n");
388 crypto_info->dev = &pdev->dev;
389 platform_set_drvdata(pdev, crypto_info);
391 tasklet_init(&crypto_info->queue_task,
392 rk_crypto_queue_task_cb, (unsigned long)crypto_info);
393 tasklet_init(&crypto_info->done_task,
394 rk_crypto_done_task_cb, (unsigned long)crypto_info);
395 crypto_init_queue(&crypto_info->queue, 50);
397 crypto_info->enable_clk = rk_crypto_enable_clk;
398 crypto_info->disable_clk = rk_crypto_disable_clk;
399 crypto_info->load_data = rk_load_data;
400 crypto_info->unload_data = rk_unload_data;
401 crypto_info->enqueue = rk_crypto_enqueue;
402 crypto_info->busy = false;
404 err = rk_crypto_register(crypto_info);
406 dev_err(dev, "err in register alg");
407 goto err_register_alg;
410 dev_info(dev, "Crypto Accelerator successfully registered\n");
414 tasklet_kill(&crypto_info->queue_task);
415 tasklet_kill(&crypto_info->done_task);
420 static int rk_crypto_remove(struct platform_device *pdev)
422 struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
424 rk_crypto_unregister();
425 tasklet_kill(&crypto_tmp->done_task);
426 tasklet_kill(&crypto_tmp->queue_task);
430 static struct platform_driver crypto_driver = {
431 .probe = rk_crypto_probe,
432 .remove = rk_crypto_remove,
434 .name = "rk3288-crypto",
435 .of_match_table = crypto_of_id_table,
439 module_platform_driver(crypto_driver);
441 MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
442 MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
443 MODULE_LICENSE("GPL");