2 * Crypto acceleration support for Rockchip RK3288
4 * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
6 * Author: Zain Wang <zain.wang@rock-chips.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
15 #include "rk3288_crypto.h"
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <linux/crypto.h>
21 #include <linux/reset.h>
23 static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
27 err = clk_prepare_enable(dev->sclk);
29 dev_err(dev->dev, "[%s:%d], Couldn't enable clock sclk\n",
33 err = clk_prepare_enable(dev->aclk);
35 dev_err(dev->dev, "[%s:%d], Couldn't enable clock aclk\n",
39 err = clk_prepare_enable(dev->hclk);
41 dev_err(dev->dev, "[%s:%d], Couldn't enable clock hclk\n",
45 err = clk_prepare_enable(dev->dmaclk);
47 dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n",
53 clk_disable_unprepare(dev->hclk);
55 clk_disable_unprepare(dev->aclk);
57 clk_disable_unprepare(dev->sclk);
62 static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
64 clk_disable_unprepare(dev->dmaclk);
65 clk_disable_unprepare(dev->hclk);
66 clk_disable_unprepare(dev->aclk);
67 clk_disable_unprepare(dev->sclk);
70 static int check_alignment(struct scatterlist *sg_src,
71 struct scatterlist *sg_dst,
76 in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
77 IS_ALIGNED((uint32_t)sg_src->length, align_mask);
80 out = IS_ALIGNED((uint32_t)sg_dst->offset, 4) &&
81 IS_ALIGNED((uint32_t)sg_dst->length, align_mask);
84 return (align && (sg_src->length == sg_dst->length));
87 static int rk_load_data(struct rk_crypto_info *dev,
88 struct scatterlist *sg_src,
89 struct scatterlist *sg_dst)
93 dev->aligned = dev->aligned ?
94 check_alignment(sg_src, sg_dst, dev->align_size) :
97 count = min(dev->left_bytes, sg_src->length);
98 dev->left_bytes -= count;
100 if (!dma_map_sg(dev->dev, sg_src, 1, DMA_TO_DEVICE)) {
101 dev_err(dev->dev, "[%s:%d] dma_map_sg(src) error\n",
105 dev->addr_in = sg_dma_address(sg_src);
108 if (!dma_map_sg(dev->dev, sg_dst, 1, DMA_FROM_DEVICE)) {
110 "[%s:%d] dma_map_sg(dst) error\n",
112 dma_unmap_sg(dev->dev, sg_src, 1,
116 dev->addr_out = sg_dma_address(sg_dst);
119 count = (dev->left_bytes > PAGE_SIZE) ?
120 PAGE_SIZE : dev->left_bytes;
122 if (!sg_pcopy_to_buffer(dev->first, dev->nents,
123 dev->addr_vir, count,
124 dev->total - dev->left_bytes)) {
125 dev_err(dev->dev, "[%s:%d] pcopy err\n",
129 dev->left_bytes -= count;
130 sg_init_one(&dev->sg_tmp, dev->addr_vir, count);
131 if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1, DMA_TO_DEVICE)) {
132 dev_err(dev->dev, "[%s:%d] dma_map_sg(sg_tmp) error\n",
136 dev->addr_in = sg_dma_address(&dev->sg_tmp);
139 if (!dma_map_sg(dev->dev, &dev->sg_tmp, 1,
142 "[%s:%d] dma_map_sg(sg_tmp) error\n",
144 dma_unmap_sg(dev->dev, &dev->sg_tmp, 1,
148 dev->addr_out = sg_dma_address(&dev->sg_tmp);
155 static void rk_unload_data(struct rk_crypto_info *dev)
157 struct scatterlist *sg_in, *sg_out;
159 sg_in = dev->aligned ? dev->sg_src : &dev->sg_tmp;
160 dma_unmap_sg(dev->dev, sg_in, 1, DMA_TO_DEVICE);
163 sg_out = dev->aligned ? dev->sg_dst : &dev->sg_tmp;
164 dma_unmap_sg(dev->dev, sg_out, 1, DMA_FROM_DEVICE);
168 static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
170 struct rk_crypto_info *dev = platform_get_drvdata(dev_id);
171 u32 interrupt_status;
173 spin_lock(&dev->lock);
174 interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
175 CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
177 if (interrupt_status & 0x0a) {
178 dev_warn(dev->dev, "DMA Error\n");
181 tasklet_schedule(&dev->done_task);
183 spin_unlock(&dev->lock);
187 static int rk_crypto_enqueue(struct rk_crypto_info *dev,
188 struct crypto_async_request *async_req)
193 spin_lock_irqsave(&dev->lock, flags);
194 ret = crypto_enqueue_request(&dev->queue, async_req);
196 spin_unlock_irqrestore(&dev->lock, flags);
200 spin_unlock_irqrestore(&dev->lock, flags);
201 tasklet_schedule(&dev->queue_task);
206 static void rk_crypto_queue_task_cb(unsigned long data)
208 struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
209 struct crypto_async_request *async_req, *backlog;
214 spin_lock_irqsave(&dev->lock, flags);
215 backlog = crypto_get_backlog(&dev->queue);
216 async_req = crypto_dequeue_request(&dev->queue);
220 spin_unlock_irqrestore(&dev->lock, flags);
223 spin_unlock_irqrestore(&dev->lock, flags);
226 backlog->complete(backlog, -EINPROGRESS);
230 dev->async_req = async_req;
231 err = dev->start(dev);
233 dev->complete(dev->async_req, err);
236 static void rk_crypto_done_task_cb(unsigned long data)
238 struct rk_crypto_info *dev = (struct rk_crypto_info *)data;
241 dev->complete(dev->async_req, dev->err);
245 dev->err = dev->update(dev);
247 dev->complete(dev->async_req, dev->err);
250 static struct rk_crypto_tmp *rk_cipher_algs[] = {
255 &rk_ecb_des3_ede_alg,
256 &rk_cbc_des3_ede_alg,
262 static int rk_crypto_register(struct rk_crypto_info *crypto_info)
267 for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
268 rk_cipher_algs[i]->dev = crypto_info;
269 if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
270 err = crypto_register_alg(
271 &rk_cipher_algs[i]->alg.crypto);
273 err = crypto_register_ahash(
274 &rk_cipher_algs[i]->alg.hash);
276 goto err_cipher_algs;
281 for (k = 0; k < i; k++) {
282 if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
283 crypto_unregister_alg(&rk_cipher_algs[k]->alg.crypto);
285 crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
290 static void rk_crypto_unregister(void)
294 for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
295 if (rk_cipher_algs[i]->type == ALG_TYPE_CIPHER)
296 crypto_unregister_alg(&rk_cipher_algs[i]->alg.crypto);
298 crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
302 static void rk_crypto_action(void *data)
304 struct rk_crypto_info *crypto_info = data;
306 reset_control_assert(crypto_info->rst);
309 static const struct of_device_id crypto_of_id_table[] = {
310 { .compatible = "rockchip,rk3288-crypto" },
313 MODULE_DEVICE_TABLE(of, crypto_of_id_table);
315 static int rk_crypto_probe(struct platform_device *pdev)
317 struct resource *res;
318 struct device *dev = &pdev->dev;
319 struct rk_crypto_info *crypto_info;
322 crypto_info = devm_kzalloc(&pdev->dev,
323 sizeof(*crypto_info), GFP_KERNEL);
329 crypto_info->rst = devm_reset_control_get(dev, "crypto-rst");
330 if (IS_ERR(crypto_info->rst)) {
331 err = PTR_ERR(crypto_info->rst);
335 reset_control_assert(crypto_info->rst);
336 usleep_range(10, 20);
337 reset_control_deassert(crypto_info->rst);
339 err = devm_add_action_or_reset(dev, rk_crypto_action, crypto_info);
343 spin_lock_init(&crypto_info->lock);
345 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
346 crypto_info->reg = devm_ioremap_resource(&pdev->dev, res);
347 if (IS_ERR(crypto_info->reg)) {
348 err = PTR_ERR(crypto_info->reg);
352 crypto_info->aclk = devm_clk_get(&pdev->dev, "aclk");
353 if (IS_ERR(crypto_info->aclk)) {
354 err = PTR_ERR(crypto_info->aclk);
358 crypto_info->hclk = devm_clk_get(&pdev->dev, "hclk");
359 if (IS_ERR(crypto_info->hclk)) {
360 err = PTR_ERR(crypto_info->hclk);
364 crypto_info->sclk = devm_clk_get(&pdev->dev, "sclk");
365 if (IS_ERR(crypto_info->sclk)) {
366 err = PTR_ERR(crypto_info->sclk);
370 crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk");
371 if (IS_ERR(crypto_info->dmaclk)) {
372 err = PTR_ERR(crypto_info->dmaclk);
376 crypto_info->irq = platform_get_irq(pdev, 0);
377 if (crypto_info->irq < 0) {
378 dev_warn(crypto_info->dev,
379 "control Interrupt is not available.\n");
380 err = crypto_info->irq;
384 err = devm_request_irq(&pdev->dev, crypto_info->irq,
385 rk_crypto_irq_handle, IRQF_SHARED,
389 dev_err(crypto_info->dev, "irq request failed.\n");
393 crypto_info->dev = &pdev->dev;
394 platform_set_drvdata(pdev, crypto_info);
396 tasklet_init(&crypto_info->queue_task,
397 rk_crypto_queue_task_cb, (unsigned long)crypto_info);
398 tasklet_init(&crypto_info->done_task,
399 rk_crypto_done_task_cb, (unsigned long)crypto_info);
400 crypto_init_queue(&crypto_info->queue, 50);
402 crypto_info->enable_clk = rk_crypto_enable_clk;
403 crypto_info->disable_clk = rk_crypto_disable_clk;
404 crypto_info->load_data = rk_load_data;
405 crypto_info->unload_data = rk_unload_data;
406 crypto_info->enqueue = rk_crypto_enqueue;
407 crypto_info->busy = false;
409 err = rk_crypto_register(crypto_info);
411 dev_err(dev, "err in register alg");
412 goto err_register_alg;
415 dev_info(dev, "Crypto Accelerator successfully registered\n");
419 tasklet_kill(&crypto_info->queue_task);
420 tasklet_kill(&crypto_info->done_task);
425 static int rk_crypto_remove(struct platform_device *pdev)
427 struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
429 rk_crypto_unregister();
430 tasklet_kill(&crypto_tmp->done_task);
431 tasklet_kill(&crypto_tmp->queue_task);
435 static struct platform_driver crypto_driver = {
436 .probe = rk_crypto_probe,
437 .remove = rk_crypto_remove,
439 .name = "rk3288-crypto",
440 .of_match_table = crypto_of_id_table,
444 module_platform_driver(crypto_driver);
446 MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
447 MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
448 MODULE_LICENSE("GPL");