drivers/crypto/omap-des.c

   1 /*
   2  * Support for OMAP DES and Triple DES HW acceleration.
   3  *
   4  * Copyright (c) 2013 Texas Instruments Incorporated
   5  * Author: Joel Fernandes <joelf@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as published
   9  * by the Free Software Foundation.
  10  *
  11  */
  12
  13 #define pr_fmt(fmt) "%s: " fmt, __func__
  14
  15 #ifdef DEBUG
  16 #define prn(num) printk(#num "=%d\n", num)
  17 #define prx(num) printk(#num "=%x\n", num)
  18 #else
  19 #define prn(num) do { } while (0)
  20 #define prx(num)  do { } while (0)
  21 #endif
  22
  23 #include <linux/err.h>
  24 #include <linux/module.h>
  25 #include <linux/init.h>
  26 #include <linux/errno.h>
  27 #include <linux/kernel.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/scatterlist.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/dmaengine.h>
  32 #include <linux/pm_runtime.h>
  33 #include <linux/of.h>
  34 #include <linux/of_device.h>
  35 #include <linux/of_address.h>
  36 #include <linux/io.h>
  37 #include <linux/crypto.h>
  38 #include <linux/interrupt.h>
  39 #include <crypto/scatterwalk.h>
  40 #include <crypto/des.h>
  41 #include <crypto/algapi.h>
  42 #include <crypto/engine.h>
  43
  44 #include "omap-crypto.h"
  45
  46 #define DST_MAXBURST                    2
  47
  48 #define DES_BLOCK_WORDS         (DES_BLOCK_SIZE >> 2)
  49
  50 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
  51
  52 #define DES_REG_KEY(dd, x)              ((dd)->pdata->key_ofs - \
  53                                                 ((x ^ 0x01) * 0x04))
  54
  55 #define DES_REG_IV(dd, x)               ((dd)->pdata->iv_ofs + ((x) * 0x04))
  56
  57 #define DES_REG_CTRL(dd)                ((dd)->pdata->ctrl_ofs)
  58 #define DES_REG_CTRL_CBC                BIT(4)
  59 #define DES_REG_CTRL_TDES               BIT(3)
  60 #define DES_REG_CTRL_DIRECTION          BIT(2)
  61 #define DES_REG_CTRL_INPUT_READY        BIT(1)
  62 #define DES_REG_CTRL_OUTPUT_READY       BIT(0)
  63
  64 #define DES_REG_DATA_N(dd, x)           ((dd)->pdata->data_ofs + ((x) * 0x04))
  65
  66 #define DES_REG_REV(dd)                 ((dd)->pdata->rev_ofs)
  67
  68 #define DES_REG_MASK(dd)                ((dd)->pdata->mask_ofs)
  69
  70 #define DES_REG_LENGTH_N(x)             (0x24 + ((x) * 0x04))
  71
  72 #define DES_REG_IRQ_STATUS(dd)         ((dd)->pdata->irq_status_ofs)
  73 #define DES_REG_IRQ_ENABLE(dd)         ((dd)->pdata->irq_enable_ofs)
  74 #define DES_REG_IRQ_DATA_IN            BIT(1)
  75 #define DES_REG_IRQ_DATA_OUT           BIT(2)
  76
  77 #define FLAGS_MODE_MASK         0x000f
  78 #define FLAGS_ENCRYPT           BIT(0)
  79 #define FLAGS_CBC               BIT(1)
  80 #define FLAGS_INIT              BIT(4)
  81 #define FLAGS_BUSY              BIT(6)
  82
  83 #define DEFAULT_AUTOSUSPEND_DELAY       1000
  84
  85 #define FLAGS_IN_DATA_ST_SHIFT  8
  86 #define FLAGS_OUT_DATA_ST_SHIFT 10
  87
  88 struct omap_des_ctx {
  89         struct crypto_engine_ctx enginectx;
  90         struct omap_des_dev *dd;
  91
  92         int             keylen;
  93         u32             key[(3 * DES_KEY_SIZE) / sizeof(u32)];
  94         unsigned long   flags;
  95 };
  96
  97 struct omap_des_reqctx {
  98         unsigned long mode;
  99 };
 100
 101 #define OMAP_DES_QUEUE_LENGTH   1
 102 #define OMAP_DES_CACHE_SIZE     0
 103
 104 struct omap_des_algs_info {
 105         struct crypto_alg       *algs_list;
 106         unsigned int            size;
 107         unsigned int            registered;
 108 };
 109
 110 struct omap_des_pdata {
 111         struct omap_des_algs_info       *algs_info;
 112         unsigned int    algs_info_size;
 113
 114         void            (*trigger)(struct omap_des_dev *dd, int length);
 115
 116         u32             key_ofs;
 117         u32             iv_ofs;
 118         u32             ctrl_ofs;
 119         u32             data_ofs;
 120         u32             rev_ofs;
 121         u32             mask_ofs;
 122         u32             irq_enable_ofs;
 123         u32             irq_status_ofs;
 124
 125         u32             dma_enable_in;
 126         u32             dma_enable_out;
 127         u32             dma_start;
 128
 129         u32             major_mask;
 130         u32             major_shift;
 131         u32             minor_mask;
 132         u32             minor_shift;
 133 };
 134
 135 struct omap_des_dev {
 136         struct list_head        list;
 137         unsigned long           phys_base;
 138         void __iomem            *io_base;
 139         struct omap_des_ctx     *ctx;
 140         struct device           *dev;
 141         unsigned long           flags;
 142         int                     err;
 143
 144         struct tasklet_struct   done_task;
 145
 146         struct ablkcipher_request       *req;
 147         struct crypto_engine            *engine;
 148         /*
 149          * total is used by PIO mode for book keeping so introduce
 150          * variable total_save as need it to calc page_order
 151          */
 152         size_t                          total;
 153         size_t                          total_save;
 154
 155         struct scatterlist              *in_sg;
 156         struct scatterlist              *out_sg;
 157
 158         /* Buffers for copying for unaligned cases */
 159         struct scatterlist              in_sgl;
 160         struct scatterlist              out_sgl;
 161         struct scatterlist              *orig_out;
 162
 163         struct scatter_walk             in_walk;
 164         struct scatter_walk             out_walk;
 165         struct dma_chan         *dma_lch_in;
 166         struct dma_chan         *dma_lch_out;
 167         int                     in_sg_len;
 168         int                     out_sg_len;
 169         int                     pio_only;
 170         const struct omap_des_pdata     *pdata;
 171 };
 172
 173 /* keep registered devices data here */
 174 static LIST_HEAD(dev_list);
 175 static DEFINE_SPINLOCK(list_lock);
 176
 177 #ifdef DEBUG
 178 #define omap_des_read(dd, offset)                               \
 179         ({                                                              \
 180          int _read_ret;                                          \
 181          _read_ret = __raw_readl(dd->io_base + offset);          \
 182          pr_err("omap_des_read(" #offset "=%#x)= %#x\n",       \
 183                  offset, _read_ret);                            \
 184          _read_ret;                                              \
 185          })
 186 #else
 187 static inline u32 omap_des_read(struct omap_des_dev *dd, u32 offset)
 188 {
 189         return __raw_readl(dd->io_base + offset);
 190 }
 191 #endif
 192
 193 #ifdef DEBUG
 194 #define omap_des_write(dd, offset, value)                               \
 195         do {                                                            \
 196                 pr_err("omap_des_write(" #offset "=%#x) value=%#x\n", \
 197                                 offset, value);                                \
 198                 __raw_writel(value, dd->io_base + offset);              \
 199         } while (0)
 200 #else
 201 static inline void omap_des_write(struct omap_des_dev *dd, u32 offset,
 202                 u32 value)
 203 {
 204         __raw_writel(value, dd->io_base + offset);
 205 }
 206 #endif
 207
 208 static inline void omap_des_write_mask(struct omap_des_dev *dd, u32 offset,
 209                                         u32 value, u32 mask)
 210 {
 211         u32 val;
 212
 213         val = omap_des_read(dd, offset);
 214         val &= ~mask;
 215         val |= value;
 216         omap_des_write(dd, offset, val);
 217 }
 218
 219 static void omap_des_write_n(struct omap_des_dev *dd, u32 offset,
 220                                         u32 *value, int count)
 221 {
 222         for (; count--; value++, offset += 4)
 223                 omap_des_write(dd, offset, *value);
 224 }
 225
 226 static int omap_des_hw_init(struct omap_des_dev *dd)
 227 {
 228         int err;
 229
 230         /*
 231          * clocks are enabled when request starts and disabled when finished.
 232          * It may be long delays between requests.
 233          * Device might go to off mode to save power.
 234          */
 235         err = pm_runtime_get_sync(dd->dev);
 236         if (err < 0) {
 237                 pm_runtime_put_noidle(dd->dev);
 238                 dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
 239                 return err;
 240         }
 241
 242         if (!(dd->flags & FLAGS_INIT)) {
 243                 dd->flags |= FLAGS_INIT;
 244                 dd->err = 0;
 245         }
 246
 247         return 0;
 248 }
 249
 250 static int omap_des_write_ctrl(struct omap_des_dev *dd)
 251 {
 252         unsigned int key32;
 253         int i, err;
 254         u32 val = 0, mask = 0;
 255
 256         err = omap_des_hw_init(dd);
 257         if (err)
 258                 return err;
 259
 260         key32 = dd->ctx->keylen / sizeof(u32);
 261
 262         /* it seems a key should always be set even if it has not changed */
 263         for (i = 0; i < key32; i++) {
 264                 omap_des_write(dd, DES_REG_KEY(dd, i),
 265                                __le32_to_cpu(dd->ctx->key[i]));
 266         }
 267
 268         if ((dd->flags & FLAGS_CBC) && dd->req->info)
 269                 omap_des_write_n(dd, DES_REG_IV(dd, 0), dd->req->info, 2);
 270
 271         if (dd->flags & FLAGS_CBC)
 272                 val |= DES_REG_CTRL_CBC;
 273         if (dd->flags & FLAGS_ENCRYPT)
 274                 val |= DES_REG_CTRL_DIRECTION;
 275         if (key32 == 6)
 276                 val |= DES_REG_CTRL_TDES;
 277
 278         mask |= DES_REG_CTRL_CBC | DES_REG_CTRL_DIRECTION | DES_REG_CTRL_TDES;
 279
 280         omap_des_write_mask(dd, DES_REG_CTRL(dd), val, mask);
 281
 282         return 0;
 283 }
 284
 285 static void omap_des_dma_trigger_omap4(struct omap_des_dev *dd, int length)
 286 {
 287         u32 mask, val;
 288
 289         omap_des_write(dd, DES_REG_LENGTH_N(0), length);
 290
 291         val = dd->pdata->dma_start;
 292
 293         if (dd->dma_lch_out != NULL)
 294                 val |= dd->pdata->dma_enable_out;
 295         if (dd->dma_lch_in != NULL)
 296                 val |= dd->pdata->dma_enable_in;
 297
 298         mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
 299                dd->pdata->dma_start;
 300
 301         omap_des_write_mask(dd, DES_REG_MASK(dd), val, mask);
 302 }
 303
 304 static void omap_des_dma_stop(struct omap_des_dev *dd)
 305 {
 306         u32 mask;
 307
 308         mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
 309                dd->pdata->dma_start;
 310
 311         omap_des_write_mask(dd, DES_REG_MASK(dd), 0, mask);
 312 }
 313
 314 static struct omap_des_dev *omap_des_find_dev(struct omap_des_ctx *ctx)
 315 {
 316         struct omap_des_dev *dd = NULL, *tmp;
 317
 318         spin_lock_bh(&list_lock);
 319         if (!ctx->dd) {
 320                 list_for_each_entry(tmp, &dev_list, list) {
 321                         /* FIXME: take fist available des core */
 322                         dd = tmp;
 323                         break;
 324                 }
 325                 ctx->dd = dd;
 326         } else {
 327                 /* already found before */
 328                 dd = ctx->dd;
 329         }
 330         spin_unlock_bh(&list_lock);
 331
 332         return dd;
 333 }
 334
 335 static void omap_des_dma_out_callback(void *data)
 336 {
 337         struct omap_des_dev *dd = data;
 338
 339         /* dma_lch_out - completed */
 340         tasklet_schedule(&dd->done_task);
 341 }
 342
 343 static int omap_des_dma_init(struct omap_des_dev *dd)
 344 {
 345         int err;
 346
 347         dd->dma_lch_out = NULL;
 348         dd->dma_lch_in = NULL;
 349
 350         dd->dma_lch_in = dma_request_chan(dd->dev, "rx");
 351         if (IS_ERR(dd->dma_lch_in)) {
 352                 dev_err(dd->dev, "Unable to request in DMA channel\n");
 353                 return PTR_ERR(dd->dma_lch_in);
 354         }
 355
 356         dd->dma_lch_out = dma_request_chan(dd->dev, "tx");
 357         if (IS_ERR(dd->dma_lch_out)) {
 358                 dev_err(dd->dev, "Unable to request out DMA channel\n");
 359                 err = PTR_ERR(dd->dma_lch_out);
 360                 goto err_dma_out;
 361         }
 362
 363         return 0;
 364
 365 err_dma_out:
 366         dma_release_channel(dd->dma_lch_in);
 367
 368         return err;
 369 }
 370
 371 static void omap_des_dma_cleanup(struct omap_des_dev *dd)
 372 {
 373         if (dd->pio_only)
 374                 return;
 375
 376         dma_release_channel(dd->dma_lch_out);
 377         dma_release_channel(dd->dma_lch_in);
 378 }
 379
 380 static int omap_des_crypt_dma(struct crypto_tfm *tfm,
 381                 struct scatterlist *in_sg, struct scatterlist *out_sg,
 382                 int in_sg_len, int out_sg_len)
 383 {
 384         struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
 385         struct omap_des_dev *dd = ctx->dd;
 386         struct dma_async_tx_descriptor *tx_in, *tx_out;
 387         struct dma_slave_config cfg;
 388         int ret;
 389
 390         if (dd->pio_only) {
 391                 scatterwalk_start(&dd->in_walk, dd->in_sg);
 392                 scatterwalk_start(&dd->out_walk, dd->out_sg);
 393
 394                 /* Enable DATAIN interrupt and let it take
 395                    care of the rest */
 396                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
 397                 return 0;
 398         }
 399
 400         dma_sync_sg_for_device(dd->dev, dd->in_sg, in_sg_len, DMA_TO_DEVICE);
 401
 402         memset(&cfg, 0, sizeof(cfg));
 403
 404         cfg.src_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
 405         cfg.dst_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
 406         cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 407         cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 408         cfg.src_maxburst = DST_MAXBURST;
 409         cfg.dst_maxburst = DST_MAXBURST;
 410
 411         /* IN */
 412         ret = dmaengine_slave_config(dd->dma_lch_in, &cfg);
 413         if (ret) {
 414                 dev_err(dd->dev, "can't configure IN dmaengine slave: %d\n",
 415                         ret);
 416                 return ret;
 417         }
 418
 419         tx_in = dmaengine_prep_slave_sg(dd->dma_lch_in, in_sg, in_sg_len,
 420                                         DMA_MEM_TO_DEV,
 421                                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 422         if (!tx_in) {
 423                 dev_err(dd->dev, "IN prep_slave_sg() failed\n");
 424                 return -EINVAL;
 425         }
 426
 427         /* No callback necessary */
 428         tx_in->callback_param = dd;
 429
 430         /* OUT */
 431         ret = dmaengine_slave_config(dd->dma_lch_out, &cfg);
 432         if (ret) {
 433                 dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n",
 434                         ret);
 435                 return ret;
 436         }
 437
 438         tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, out_sg_len,
 439                                         DMA_DEV_TO_MEM,
 440                                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 441         if (!tx_out) {
 442                 dev_err(dd->dev, "OUT prep_slave_sg() failed\n");
 443                 return -EINVAL;
 444         }
 445
 446         tx_out->callback = omap_des_dma_out_callback;
 447         tx_out->callback_param = dd;
 448
 449         dmaengine_submit(tx_in);
 450         dmaengine_submit(tx_out);
 451
 452         dma_async_issue_pending(dd->dma_lch_in);
 453         dma_async_issue_pending(dd->dma_lch_out);
 454
 455         /* start DMA */
 456         dd->pdata->trigger(dd, dd->total);
 457
 458         return 0;
 459 }
 460
 461 static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
 462 {
 463         struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
 464                                         crypto_ablkcipher_reqtfm(dd->req));
 465         int err;
 466
 467         pr_debug("total: %d\n", dd->total);
 468
 469         if (!dd->pio_only) {
 470                 err = dma_map_sg(dd->dev, dd->in_sg, dd->in_sg_len,
 471                                  DMA_TO_DEVICE);
 472                 if (!err) {
 473                         dev_err(dd->dev, "dma_map_sg() error\n");
 474                         return -EINVAL;
 475                 }
 476
 477                 err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 478                                  DMA_FROM_DEVICE);
 479                 if (!err) {
 480                         dev_err(dd->dev, "dma_map_sg() error\n");
 481                         return -EINVAL;
 482                 }
 483         }
 484
 485         err = omap_des_crypt_dma(tfm, dd->in_sg, dd->out_sg, dd->in_sg_len,
 486                                  dd->out_sg_len);
 487         if (err && !dd->pio_only) {
 488                 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
 489                 dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 490                              DMA_FROM_DEVICE);
 491         }
 492
 493         return err;
 494 }
 495
 496 static void omap_des_finish_req(struct omap_des_dev *dd, int err)
 497 {
 498         struct ablkcipher_request *req = dd->req;
 499
 500         pr_debug("err: %d\n", err);
 501
 502         crypto_finalize_ablkcipher_request(dd->engine, req, err);
 503
 504         pm_runtime_mark_last_busy(dd->dev);
 505         pm_runtime_put_autosuspend(dd->dev);
 506 }
 507
 508 static int omap_des_crypt_dma_stop(struct omap_des_dev *dd)
 509 {
 510         pr_debug("total: %d\n", dd->total);
 511
 512         omap_des_dma_stop(dd);
 513
 514         dmaengine_terminate_all(dd->dma_lch_in);
 515         dmaengine_terminate_all(dd->dma_lch_out);
 516
 517         return 0;
 518 }
 519
 520 static int omap_des_handle_queue(struct omap_des_dev *dd,
 521                                  struct ablkcipher_request *req)
 522 {
 523         if (req)
 524                 return crypto_transfer_ablkcipher_request_to_engine(dd->engine, req);
 525
 526         return 0;
 527 }
 528
 529 static int omap_des_prepare_req(struct crypto_engine *engine,
 530                                 void *areq)
 531 {
 532         struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
 533         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
 534                         crypto_ablkcipher_reqtfm(req));
 535         struct omap_des_dev *dd = omap_des_find_dev(ctx);
 536         struct omap_des_reqctx *rctx;
 537         int ret;
 538         u16 flags;
 539
 540         if (!dd)
 541                 return -ENODEV;
 542
 543         /* assign new request to device */
 544         dd->req = req;
 545         dd->total = req->nbytes;
 546         dd->total_save = req->nbytes;
 547         dd->in_sg = req->src;
 548         dd->out_sg = req->dst;
 549         dd->orig_out = req->dst;
 550
 551         flags = OMAP_CRYPTO_COPY_DATA;
 552         if (req->src == req->dst)
 553                 flags |= OMAP_CRYPTO_FORCE_COPY;
 554
 555         ret = omap_crypto_align_sg(&dd->in_sg, dd->total, DES_BLOCK_SIZE,
 556                                    &dd->in_sgl, flags,
 557                                    FLAGS_IN_DATA_ST_SHIFT, &dd->flags);
 558         if (ret)
 559                 return ret;
 560
 561         ret = omap_crypto_align_sg(&dd->out_sg, dd->total, DES_BLOCK_SIZE,
 562                                    &dd->out_sgl, 0,
 563                                    FLAGS_OUT_DATA_ST_SHIFT, &dd->flags);
 564         if (ret)
 565                 return ret;
 566
 567         dd->in_sg_len = sg_nents_for_len(dd->in_sg, dd->total);
 568         if (dd->in_sg_len < 0)
 569                 return dd->in_sg_len;
 570
 571         dd->out_sg_len = sg_nents_for_len(dd->out_sg, dd->total);
 572         if (dd->out_sg_len < 0)
 573                 return dd->out_sg_len;
 574
 575         rctx = ablkcipher_request_ctx(req);
 576         ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
 577         rctx->mode &= FLAGS_MODE_MASK;
 578         dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
 579
 580         dd->ctx = ctx;
 581         ctx->dd = dd;
 582
 583         return omap_des_write_ctrl(dd);
 584 }
 585
 586 static int omap_des_crypt_req(struct crypto_engine *engine,
 587                               void *areq)
 588 {
 589         struct ablkcipher_request *req = container_of(areq, struct ablkcipher_request, base);
 590         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
 591                         crypto_ablkcipher_reqtfm(req));
 592         struct omap_des_dev *dd = omap_des_find_dev(ctx);
 593
 594         if (!dd)
 595                 return -ENODEV;
 596
 597         return omap_des_crypt_dma_start(dd);
 598 }
 599
 600 static void omap_des_done_task(unsigned long data)
 601 {
 602         struct omap_des_dev *dd = (struct omap_des_dev *)data;
 603
 604         pr_debug("enter done_task\n");
 605
 606         if (!dd->pio_only) {
 607                 dma_sync_sg_for_device(dd->dev, dd->out_sg, dd->out_sg_len,
 608                                        DMA_FROM_DEVICE);
 609                 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
 610                 dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
 611                              DMA_FROM_DEVICE);
 612                 omap_des_crypt_dma_stop(dd);
 613         }
 614
 615         omap_crypto_cleanup(&dd->in_sgl, NULL, 0, dd->total_save,
 616                             FLAGS_IN_DATA_ST_SHIFT, dd->flags);
 617
 618         omap_crypto_cleanup(&dd->out_sgl, dd->orig_out, 0, dd->total_save,
 619                             FLAGS_OUT_DATA_ST_SHIFT, dd->flags);
 620
 621         omap_des_finish_req(dd, 0);
 622
 623         pr_debug("exit\n");
 624 }
 625
 626 static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
 627 {
 628         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
 629                         crypto_ablkcipher_reqtfm(req));
 630         struct omap_des_reqctx *rctx = ablkcipher_request_ctx(req);
 631         struct omap_des_dev *dd;
 632
 633         pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
 634                  !!(mode & FLAGS_ENCRYPT),
 635                  !!(mode & FLAGS_CBC));
 636
 637         if (!IS_ALIGNED(req->nbytes, DES_BLOCK_SIZE)) {
 638                 pr_err("request size is not exact amount of DES blocks\n");
 639                 return -EINVAL;
 640         }
 641
 642         dd = omap_des_find_dev(ctx);
 643         if (!dd)
 644                 return -ENODEV;
 645
 646         rctx->mode = mode;
 647
 648         return omap_des_handle_queue(dd, req);
 649 }
 650
 651 /* ********************** ALG API ************************************ */
 652
 653 static int omap_des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
 654                            unsigned int keylen)
 655 {
 656         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
 657         struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
 658
 659         pr_debug("enter, keylen: %d\n", keylen);
 660
 661         /* Do we need to test against weak key? */
 662         if (tfm->crt_flags & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS) {
 663                 u32 tmp[DES_EXPKEY_WORDS];
 664                 int ret = des_ekey(tmp, key);
 665
 666                 if (!ret) {
 667                         tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
 668                         return -EINVAL;
 669                 }
 670         }
 671
 672         memcpy(ctx->key, key, keylen);
 673         ctx->keylen = keylen;
 674
 675         return 0;
 676 }
 677
 678 static int omap_des3_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
 679                            unsigned int keylen)
 680 {
 681         struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(cipher);
 682         u32 flags;
 683         int err;
 684
 685         pr_debug("enter, keylen: %d\n", keylen);
 686
 687         flags = crypto_ablkcipher_get_flags(cipher);
 688         err = __des3_verify_key(&flags, key);
 689         if (unlikely(err)) {
 690                 crypto_ablkcipher_set_flags(cipher, flags);
 691                 return err;
 692         }
 693
 694         memcpy(ctx->key, key, keylen);
 695         ctx->keylen = keylen;
 696
 697         return 0;
 698 }
 699
 700 static int omap_des_ecb_encrypt(struct ablkcipher_request *req)
 701 {
 702         return omap_des_crypt(req, FLAGS_ENCRYPT);
 703 }
 704
 705 static int omap_des_ecb_decrypt(struct ablkcipher_request *req)
 706 {
 707         return omap_des_crypt(req, 0);
 708 }
 709
 710 static int omap_des_cbc_encrypt(struct ablkcipher_request *req)
 711 {
 712         return omap_des_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
 713 }
 714
 715 static int omap_des_cbc_decrypt(struct ablkcipher_request *req)
 716 {
 717         return omap_des_crypt(req, FLAGS_CBC);
 718 }
 719
 720 static int omap_des_prepare_req(struct crypto_engine *engine,
 721                                 void *areq);
 722 static int omap_des_crypt_req(struct crypto_engine *engine,
 723                               void *areq);
 724
 725 static int omap_des_cra_init(struct crypto_tfm *tfm)
 726 {
 727         struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
 728
 729         pr_debug("enter\n");
 730
 731         tfm->crt_ablkcipher.reqsize = sizeof(struct omap_des_reqctx);
 732
 733         ctx->enginectx.op.prepare_request = omap_des_prepare_req;
 734         ctx->enginectx.op.unprepare_request = NULL;
 735         ctx->enginectx.op.do_one_request = omap_des_crypt_req;
 736
 737         return 0;
 738 }
 739
 740 static void omap_des_cra_exit(struct crypto_tfm *tfm)
 741 {
 742         pr_debug("enter\n");
 743 }
 744
 745 /* ********************** ALGS ************************************ */
 746
 747 static struct crypto_alg algs_ecb_cbc[] = {
 748 {
 749         .cra_name               = "ecb(des)",
 750         .cra_driver_name        = "ecb-des-omap",
 751         .cra_priority           = 100,
 752         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 753                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 754                                   CRYPTO_ALG_ASYNC,
 755         .cra_blocksize          = DES_BLOCK_SIZE,
 756         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 757         .cra_alignmask          = 0,
 758         .cra_type               = &crypto_ablkcipher_type,
 759         .cra_module             = THIS_MODULE,
 760         .cra_init               = omap_des_cra_init,
 761         .cra_exit               = omap_des_cra_exit,
 762         .cra_u.ablkcipher = {
 763                 .min_keysize    = DES_KEY_SIZE,
 764                 .max_keysize    = DES_KEY_SIZE,
 765                 .setkey         = omap_des_setkey,
 766                 .encrypt        = omap_des_ecb_encrypt,
 767                 .decrypt        = omap_des_ecb_decrypt,
 768         }
 769 },
 770 {
 771         .cra_name               = "cbc(des)",
 772         .cra_driver_name        = "cbc-des-omap",
 773         .cra_priority           = 100,
 774         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 775                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 776                                   CRYPTO_ALG_ASYNC,
 777         .cra_blocksize          = DES_BLOCK_SIZE,
 778         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 779         .cra_alignmask          = 0,
 780         .cra_type               = &crypto_ablkcipher_type,
 781         .cra_module             = THIS_MODULE,
 782         .cra_init               = omap_des_cra_init,
 783         .cra_exit               = omap_des_cra_exit,
 784         .cra_u.ablkcipher = {
 785                 .min_keysize    = DES_KEY_SIZE,
 786                 .max_keysize    = DES_KEY_SIZE,
 787                 .ivsize         = DES_BLOCK_SIZE,
 788                 .setkey         = omap_des_setkey,
 789                 .encrypt        = omap_des_cbc_encrypt,
 790                 .decrypt        = omap_des_cbc_decrypt,
 791         }
 792 },
 793 {
 794         .cra_name               = "ecb(des3_ede)",
 795         .cra_driver_name        = "ecb-des3-omap",
 796         .cra_priority           = 100,
 797         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 798                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 799                                   CRYPTO_ALG_ASYNC,
 800         .cra_blocksize          = DES_BLOCK_SIZE,
 801         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 802         .cra_alignmask          = 0,
 803         .cra_type               = &crypto_ablkcipher_type,
 804         .cra_module             = THIS_MODULE,
 805         .cra_init               = omap_des_cra_init,
 806         .cra_exit               = omap_des_cra_exit,
 807         .cra_u.ablkcipher = {
 808                 .min_keysize    = 3*DES_KEY_SIZE,
 809                 .max_keysize    = 3*DES_KEY_SIZE,
 810                 .setkey         = omap_des3_setkey,
 811                 .encrypt        = omap_des_ecb_encrypt,
 812                 .decrypt        = omap_des_ecb_decrypt,
 813         }
 814 },
 815 {
 816         .cra_name               = "cbc(des3_ede)",
 817         .cra_driver_name        = "cbc-des3-omap",
 818         .cra_priority           = 100,
 819         .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER |
 820                                   CRYPTO_ALG_KERN_DRIVER_ONLY |
 821                                   CRYPTO_ALG_ASYNC,
 822         .cra_blocksize          = DES_BLOCK_SIZE,
 823         .cra_ctxsize            = sizeof(struct omap_des_ctx),
 824         .cra_alignmask          = 0,
 825         .cra_type               = &crypto_ablkcipher_type,
 826         .cra_module             = THIS_MODULE,
 827         .cra_init               = omap_des_cra_init,
 828         .cra_exit               = omap_des_cra_exit,
 829         .cra_u.ablkcipher = {
 830                 .min_keysize    = 3*DES_KEY_SIZE,
 831                 .max_keysize    = 3*DES_KEY_SIZE,
 832                 .ivsize         = DES_BLOCK_SIZE,
 833                 .setkey         = omap_des3_setkey,
 834                 .encrypt        = omap_des_cbc_encrypt,
 835                 .decrypt        = omap_des_cbc_decrypt,
 836         }
 837 }
 838 };
 839
 840 static struct omap_des_algs_info omap_des_algs_info_ecb_cbc[] = {
 841         {
 842                 .algs_list      = algs_ecb_cbc,
 843                 .size           = ARRAY_SIZE(algs_ecb_cbc),
 844         },
 845 };
 846
 847 #ifdef CONFIG_OF
 848 static const struct omap_des_pdata omap_des_pdata_omap4 = {
 849         .algs_info      = omap_des_algs_info_ecb_cbc,
 850         .algs_info_size = ARRAY_SIZE(omap_des_algs_info_ecb_cbc),
 851         .trigger        = omap_des_dma_trigger_omap4,
 852         .key_ofs        = 0x14,
 853         .iv_ofs         = 0x18,
 854         .ctrl_ofs       = 0x20,
 855         .data_ofs       = 0x28,
 856         .rev_ofs        = 0x30,
 857         .mask_ofs       = 0x34,
 858         .irq_status_ofs = 0x3c,
 859         .irq_enable_ofs = 0x40,
 860         .dma_enable_in  = BIT(5),
 861         .dma_enable_out = BIT(6),
 862         .major_mask     = 0x0700,
 863         .major_shift    = 8,
 864         .minor_mask     = 0x003f,
 865         .minor_shift    = 0,
 866 };
 867
 868 static irqreturn_t omap_des_irq(int irq, void *dev_id)
 869 {
 870         struct omap_des_dev *dd = dev_id;
 871         u32 status, i;
 872         u32 *src, *dst;
 873
 874         status = omap_des_read(dd, DES_REG_IRQ_STATUS(dd));
 875         if (status & DES_REG_IRQ_DATA_IN) {
 876                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
 877
 878                 BUG_ON(!dd->in_sg);
 879
 880                 BUG_ON(_calc_walked(in) > dd->in_sg->length);
 881
 882                 src = sg_virt(dd->in_sg) + _calc_walked(in);
 883
 884                 for (i = 0; i < DES_BLOCK_WORDS; i++) {
 885                         omap_des_write(dd, DES_REG_DATA_N(dd, i), *src);
 886
 887                         scatterwalk_advance(&dd->in_walk, 4);
 888                         if (dd->in_sg->length == _calc_walked(in)) {
 889                                 dd->in_sg = sg_next(dd->in_sg);
 890                                 if (dd->in_sg) {
 891                                         scatterwalk_start(&dd->in_walk,
 892                                                           dd->in_sg);
 893                                         src = sg_virt(dd->in_sg) +
 894                                               _calc_walked(in);
 895                                 }
 896                         } else {
 897                                 src++;
 898                         }
 899                 }
 900
 901                 /* Clear IRQ status */
 902                 status &= ~DES_REG_IRQ_DATA_IN;
 903                 omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
 904
 905                 /* Enable DATA_OUT interrupt */
 906                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x4);
 907
 908         } else if (status & DES_REG_IRQ_DATA_OUT) {
 909                 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
 910
 911                 BUG_ON(!dd->out_sg);
 912
 913                 BUG_ON(_calc_walked(out) > dd->out_sg->length);
 914
 915                 dst = sg_virt(dd->out_sg) + _calc_walked(out);
 916
 917                 for (i = 0; i < DES_BLOCK_WORDS; i++) {
 918                         *dst = omap_des_read(dd, DES_REG_DATA_N(dd, i));
 919                         scatterwalk_advance(&dd->out_walk, 4);
 920                         if (dd->out_sg->length == _calc_walked(out)) {
 921                                 dd->out_sg = sg_next(dd->out_sg);
 922                                 if (dd->out_sg) {
 923                                         scatterwalk_start(&dd->out_walk,
 924                                                           dd->out_sg);
 925                                         dst = sg_virt(dd->out_sg) +
 926                                               _calc_walked(out);
 927                                 }
 928                         } else {
 929                                 dst++;
 930                         }
 931                 }
 932
 933                 BUG_ON(dd->total < DES_BLOCK_SIZE);
 934
 935                 dd->total -= DES_BLOCK_SIZE;
 936
 937                 /* Clear IRQ status */
 938                 status &= ~DES_REG_IRQ_DATA_OUT;
 939                 omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
 940
 941                 if (!dd->total)
 942                         /* All bytes read! */
 943                         tasklet_schedule(&dd->done_task);
 944                 else
 945                         /* Enable DATA_IN interrupt for next block */
 946                         omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
 947         }
 948
 949         return IRQ_HANDLED;
 950 }
 951
 952 static const struct of_device_id omap_des_of_match[] = {
 953         {
 954                 .compatible     = "ti,omap4-des",
 955                 .data           = &omap_des_pdata_omap4,
 956         },
 957         {},
 958 };
 959 MODULE_DEVICE_TABLE(of, omap_des_of_match);
 960
 961 static int omap_des_get_of(struct omap_des_dev *dd,
 962                 struct platform_device *pdev)
 963 {
 964
 965         dd->pdata = of_device_get_match_data(&pdev->dev);
 966         if (!dd->pdata) {
 967                 dev_err(&pdev->dev, "no compatible OF match\n");
 968                 return -EINVAL;
 969         }
 970
 971         return 0;
 972 }
 973 #else
 974 static int omap_des_get_of(struct omap_des_dev *dd,
 975                 struct device *dev)
 976 {
 977         return -EINVAL;
 978 }
 979 #endif
 980
 981 static int omap_des_get_pdev(struct omap_des_dev *dd,
 982                 struct platform_device *pdev)
 983 {
 984         /* non-DT devices get pdata from pdev */
 985         dd->pdata = pdev->dev.platform_data;
 986
 987         return 0;
 988 }
 989
 990 static int omap_des_probe(struct platform_device *pdev)
 991 {
 992         struct device *dev = &pdev->dev;
 993         struct omap_des_dev *dd;
 994         struct crypto_alg *algp;
 995         struct resource *res;
 996         int err = -ENOMEM, i, j, irq = -1;
 997         u32 reg;
 998
 999         dd = devm_kzalloc(dev, sizeof(struct omap_des_dev), GFP_KERNEL);
1000         if (dd == NULL) {
1001                 dev_err(dev, "unable to alloc data struct.\n");
1002                 goto err_data;
1003         }
1004         dd->dev = dev;
1005         platform_set_drvdata(pdev, dd);
1006
1007         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1008         if (!res) {
1009                 dev_err(dev, "no MEM resource info\n");
1010                 goto err_res;
1011         }
1012
1013         err = (dev->of_node) ? omap_des_get_of(dd, pdev) :
1014                                omap_des_get_pdev(dd, pdev);
1015         if (err)
1016                 goto err_res;
1017
1018         dd->io_base = devm_ioremap_resource(dev, res);
1019         if (IS_ERR(dd->io_base)) {
1020                 err = PTR_ERR(dd->io_base);
1021                 goto err_res;
1022         }
1023         dd->phys_base = res->start;
1024
1025         pm_runtime_use_autosuspend(dev);
1026         pm_runtime_set_autosuspend_delay(dev, DEFAULT_AUTOSUSPEND_DELAY);
1027
1028         pm_runtime_enable(dev);
1029         err = pm_runtime_get_sync(dev);
1030         if (err < 0) {
1031                 pm_runtime_put_noidle(dev);
1032                 dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
1033                 goto err_get;
1034         }
1035
1036         omap_des_dma_stop(dd);
1037
1038         reg = omap_des_read(dd, DES_REG_REV(dd));
1039
1040         pm_runtime_put_sync(dev);
1041
1042         dev_info(dev, "OMAP DES hw accel rev: %u.%u\n",
1043                  (reg & dd->pdata->major_mask) >> dd->pdata->major_shift,
1044                  (reg & dd->pdata->minor_mask) >> dd->pdata->minor_shift);
1045
1046         tasklet_init(&dd->done_task, omap_des_done_task, (unsigned long)dd);
1047
1048         err = omap_des_dma_init(dd);
1049         if (err == -EPROBE_DEFER) {
1050                 goto err_irq;
1051         } else if (err && DES_REG_IRQ_STATUS(dd) && DES_REG_IRQ_ENABLE(dd)) {
1052                 dd->pio_only = 1;
1053
1054                 irq = platform_get_irq(pdev, 0);
1055                 if (irq < 0) {
1056                         dev_err(dev, "can't get IRQ resource: %d\n", irq);
1057                         err = irq;
1058                         goto err_irq;
1059                 }
1060
1061                 err = devm_request_irq(dev, irq, omap_des_irq, 0,
1062                                 dev_name(dev), dd);
1063                 if (err) {
1064                         dev_err(dev, "Unable to grab omap-des IRQ\n");
1065                         goto err_irq;
1066                 }
1067         }
1068
1069
1070         INIT_LIST_HEAD(&dd->list);
1071         spin_lock(&list_lock);
1072         list_add_tail(&dd->list, &dev_list);
1073         spin_unlock(&list_lock);
1074
1075         /* Initialize des crypto engine */
1076         dd->engine = crypto_engine_alloc_init(dev, 1);
1077         if (!dd->engine) {
1078                 err = -ENOMEM;
1079                 goto err_engine;
1080         }
1081
1082         err = crypto_engine_start(dd->engine);
1083         if (err)
1084                 goto err_engine;
1085
1086         for (i = 0; i < dd->pdata->algs_info_size; i++) {
1087                 for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
1088                         algp = &dd->pdata->algs_info[i].algs_list[j];
1089
1090                         pr_debug("reg alg: %s\n", algp->cra_name);
1091
1092                         err = crypto_register_alg(algp);
1093                         if (err)
1094                                 goto err_algs;
1095
1096                         dd->pdata->algs_info[i].registered++;
1097                 }
1098         }
1099
1100         return 0;
1101
1102 err_algs:
1103         for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1104                 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1105                         crypto_unregister_alg(
1106                                         &dd->pdata->algs_info[i].algs_list[j]);
1107
1108 err_engine:
1109         if (dd->engine)
1110                 crypto_engine_exit(dd->engine);
1111
1112         omap_des_dma_cleanup(dd);
1113 err_irq:
1114         tasklet_kill(&dd->done_task);
1115 err_get:
1116         pm_runtime_disable(dev);
1117 err_res:
1118         dd = NULL;
1119 err_data:
1120         dev_err(dev, "initialization failed.\n");
1121         return err;
1122 }
1123
1124 static int omap_des_remove(struct platform_device *pdev)
1125 {
1126         struct omap_des_dev *dd = platform_get_drvdata(pdev);
1127         int i, j;
1128
1129         if (!dd)
1130                 return -ENODEV;
1131
1132         spin_lock(&list_lock);
1133         list_del(&dd->list);
1134         spin_unlock(&list_lock);
1135
1136         for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1137                 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1138                         crypto_unregister_alg(
1139                                         &dd->pdata->algs_info[i].algs_list[j]);
1140
1141         tasklet_kill(&dd->done_task);
1142         omap_des_dma_cleanup(dd);
1143         pm_runtime_disable(dd->dev);
1144         dd = NULL;
1145
1146         return 0;
1147 }
1148
1149 #ifdef CONFIG_PM_SLEEP
1150 static int omap_des_suspend(struct device *dev)
1151 {
1152         pm_runtime_put_sync(dev);
1153         return 0;
1154 }
1155
1156 static int omap_des_resume(struct device *dev)
1157 {
1158         int err;
1159
1160         err = pm_runtime_get_sync(dev);
1161         if (err < 0) {
1162                 pm_runtime_put_noidle(dev);
1163                 dev_err(dev, "%s: failed to get_sync(%d)\n", __func__, err);
1164                 return err;
1165         }
1166         return 0;
1167 }
1168 #endif
1169
1170 static SIMPLE_DEV_PM_OPS(omap_des_pm_ops, omap_des_suspend, omap_des_resume);
1171
1172 static struct platform_driver omap_des_driver = {
1173         .probe  = omap_des_probe,
1174         .remove = omap_des_remove,
1175         .driver = {
1176                 .name   = "omap-des",
1177                 .pm     = &omap_des_pm_ops,
1178                 .of_match_table = of_match_ptr(omap_des_of_match),
1179         },
1180 };
1181
1182 module_platform_driver(omap_des_driver);
1183
1184 MODULE_DESCRIPTION("OMAP DES hw acceleration support.");
1185 MODULE_LICENSE("GPL v2");
1186 MODULE_AUTHOR("Joel Fernandes <joelf@ti.com>");