Merge tag 'drm-intel-next-fixes-2020-12-18' of git://anongit.freedesktop.org/drm...
[linux-2.6-microblaze.git] / drivers / crypto / ccp / tee-dev.h
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2019 Advanced Micro Devices, Inc.
4  *
5  * Author: Rijo Thomas <Rijo-john.Thomas@amd.com>
6  * Author: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com>
7  *
8  */
9
10 /* This file describes the TEE communication interface between host and AMD
11  * Secure Processor
12  */
13
14 #ifndef __TEE_DEV_H__
15 #define __TEE_DEV_H__
16
17 #include <linux/device.h>
18 #include <linux/mutex.h>
19
20 #define TEE_DEFAULT_TIMEOUT             10
21 #define MAX_BUFFER_SIZE                 992
22
23 /**
24  * enum tee_ring_cmd_id - TEE interface commands for ring buffer configuration
25  * @TEE_RING_INIT_CMD:          Initialize ring buffer
26  * @TEE_RING_DESTROY_CMD:       Destroy ring buffer
27  * @TEE_RING_MAX_CMD:           Maximum command id
28  */
29 enum tee_ring_cmd_id {
30         TEE_RING_INIT_CMD               = 0x00010000,
31         TEE_RING_DESTROY_CMD            = 0x00020000,
32         TEE_RING_MAX_CMD                = 0x000F0000,
33 };
34
35 /**
36  * struct tee_init_ring_cmd - Command to init TEE ring buffer
37  * @low_addr:  bits [31:0] of the physical address of ring buffer
38  * @hi_addr:   bits [63:32] of the physical address of ring buffer
39  * @size:      size of ring buffer in bytes
40  */
41 struct tee_init_ring_cmd {
42         u32 low_addr;
43         u32 hi_addr;
44         u32 size;
45 };
46
47 #define MAX_RING_BUFFER_ENTRIES         32
48
49 /**
50  * struct ring_buf_manager - Helper structure to manage ring buffer.
51  * @ring_start:  starting address of ring buffer
52  * @ring_size:   size of ring buffer in bytes
53  * @ring_pa:     physical address of ring buffer
54  * @wptr:        index to the last written entry in ring buffer
55  */
56 struct ring_buf_manager {
57         struct mutex mutex;     /* synchronizes access to ring buffer */
58         void *ring_start;
59         u32 ring_size;
60         phys_addr_t ring_pa;
61         u32 wptr;
62 };
63
64 struct psp_tee_device {
65         struct device *dev;
66         struct psp_device *psp;
67         void __iomem *io_regs;
68         struct tee_vdata *vdata;
69         struct ring_buf_manager rb_mgr;
70 };
71
72 /**
73  * enum tee_cmd_state - TEE command states for the ring buffer interface
74  * @TEE_CMD_STATE_INIT:      initial state of command when sent from host
75  * @TEE_CMD_STATE_PROCESS:   command being processed by TEE environment
76  * @TEE_CMD_STATE_COMPLETED: command processing completed
77  */
78 enum tee_cmd_state {
79         TEE_CMD_STATE_INIT,
80         TEE_CMD_STATE_PROCESS,
81         TEE_CMD_STATE_COMPLETED,
82 };
83
84 /**
85  * struct tee_ring_cmd - Structure of the command buffer in TEE ring
86  * @cmd_id:      refers to &enum tee_cmd_id. Command id for the ring buffer
87  *               interface
88  * @cmd_state:   refers to &enum tee_cmd_state
89  * @status:      status of TEE command execution
90  * @res0:        reserved region
91  * @pdata:       private data (currently unused)
92  * @res1:        reserved region
93  * @buf:         TEE command specific buffer
94  */
95 struct tee_ring_cmd {
96         u32 cmd_id;
97         u32 cmd_state;
98         u32 status;
99         u32 res0[1];
100         u64 pdata;
101         u32 res1[2];
102         u8 buf[MAX_BUFFER_SIZE];
103
104         /* Total size: 1024 bytes */
105 } __packed;
106
107 int tee_dev_init(struct psp_device *psp);
108 void tee_dev_destroy(struct psp_device *psp);
109
110 #endif /* __TEE_DEV_H__ */