1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * AMD Platform Security Processor (PSP) interface driver
5 * Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
7 * Author: Brijesh Singh <brijesh.singh@amd.com>
13 #include <linux/device.h>
14 #include <linux/list.h>
15 #include <linux/bits.h>
16 #include <linux/interrupt.h>
20 #define MAX_PSP_NAME_LEN 16
22 extern struct psp_device *psp_master;
24 typedef void (*psp_irq_handler_t)(int, void *, unsigned int);
27 struct list_head entry;
29 struct psp_vdata *vdata;
30 char name[MAX_PSP_NAME_LEN];
35 void __iomem *io_regs;
37 psp_irq_handler_t sev_irq_handler;
42 void *platform_access_data;
44 unsigned int capability;
47 void psp_set_sev_irq_handler(struct psp_device *psp, psp_irq_handler_t handler,
49 void psp_clear_sev_irq_handler(struct psp_device *psp);
51 struct psp_device *psp_get_master_device(void);
53 #define PSP_CAPABILITY_SEV BIT(0)
54 #define PSP_CAPABILITY_TEE BIT(1)
55 #define PSP_CAPABILITY_PSP_SECURITY_REPORTING BIT(7)
57 #define PSP_CAPABILITY_PSP_SECURITY_OFFSET 8
59 * The PSP doesn't directly store these bits in the capability register
60 * but instead copies them from the results of query command.
62 * The offsets from the query command are below, and shifted when used.
64 #define PSP_SECURITY_FUSED_PART BIT(0)
65 #define PSP_SECURITY_DEBUG_LOCK_ON BIT(2)
66 #define PSP_SECURITY_TSME_STATUS BIT(5)
67 #define PSP_SECURITY_ANTI_ROLLBACK_STATUS BIT(7)
68 #define PSP_SECURITY_RPMC_PRODUCTION_ENABLED BIT(8)
69 #define PSP_SECURITY_RPMC_SPIROM_AVAILABLE BIT(9)
70 #define PSP_SECURITY_HSP_TPM_AVAILABLE BIT(10)
71 #define PSP_SECURITY_ROM_ARMOR_ENFORCED BIT(11)
73 #endif /* __PSP_DEV_H */