Merge tag 'x86-cleanups-2020-06-01' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-microblaze.git] / drivers / crypto / amlogic / amlogic-gxl-core.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * amlgoic-core.c - hardware cryptographic offloader for Amlogic GXL SoC
4  *
5  * Copyright (C) 2018-2019 Corentin Labbe <clabbe@baylibre.com>
6  *
7  * Core file which registers crypto algorithms supported by the hardware.
8  */
9 #include <linux/clk.h>
10 #include <linux/crypto.h>
11 #include <linux/io.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <crypto/internal/skcipher.h>
19 #include <linux/dma-mapping.h>
20
21 #include "amlogic-gxl.h"
22
23 static irqreturn_t meson_irq_handler(int irq, void *data)
24 {
25         struct meson_dev *mc = (struct meson_dev *)data;
26         int flow;
27         u32 p;
28
29         for (flow = 0; flow < MAXFLOW; flow++) {
30                 if (mc->irqs[flow] == irq) {
31                         p = readl(mc->base + ((0x04 + flow) << 2));
32                         if (p) {
33                                 writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2));
34                                 mc->chanlist[flow].status = 1;
35                                 complete(&mc->chanlist[flow].complete);
36                                 return IRQ_HANDLED;
37                         }
38                         dev_err(mc->dev, "%s %d Got irq for flow %d but ctrl is empty\n", __func__, irq, flow);
39                 }
40         }
41
42         dev_err(mc->dev, "%s %d from unknown irq\n", __func__, irq);
43         return IRQ_HANDLED;
44 }
45
46 static struct meson_alg_template mc_algs[] = {
47 {
48         .type = CRYPTO_ALG_TYPE_SKCIPHER,
49         .blockmode = MESON_OPMODE_CBC,
50         .alg.skcipher = {
51                 .base = {
52                         .cra_name = "cbc(aes)",
53                         .cra_driver_name = "cbc-aes-gxl",
54                         .cra_priority = 400,
55                         .cra_blocksize = AES_BLOCK_SIZE,
56                         .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
57                                 CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
58                         .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
59                         .cra_module = THIS_MODULE,
60                         .cra_alignmask = 0xf,
61                         .cra_init = meson_cipher_init,
62                         .cra_exit = meson_cipher_exit,
63                 },
64                 .min_keysize    = AES_MIN_KEY_SIZE,
65                 .max_keysize    = AES_MAX_KEY_SIZE,
66                 .ivsize         = AES_BLOCK_SIZE,
67                 .setkey         = meson_aes_setkey,
68                 .encrypt        = meson_skencrypt,
69                 .decrypt        = meson_skdecrypt,
70         }
71 },
72 {
73         .type = CRYPTO_ALG_TYPE_SKCIPHER,
74         .blockmode = MESON_OPMODE_ECB,
75         .alg.skcipher = {
76                 .base = {
77                         .cra_name = "ecb(aes)",
78                         .cra_driver_name = "ecb-aes-gxl",
79                         .cra_priority = 400,
80                         .cra_blocksize = AES_BLOCK_SIZE,
81                         .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
82                                 CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK,
83                         .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
84                         .cra_module = THIS_MODULE,
85                         .cra_alignmask = 0xf,
86                         .cra_init = meson_cipher_init,
87                         .cra_exit = meson_cipher_exit,
88                 },
89                 .min_keysize    = AES_MIN_KEY_SIZE,
90                 .max_keysize    = AES_MAX_KEY_SIZE,
91                 .setkey         = meson_aes_setkey,
92                 .encrypt        = meson_skencrypt,
93                 .decrypt        = meson_skdecrypt,
94         }
95 },
96 };
97
98 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
99 static int meson_dbgfs_read(struct seq_file *seq, void *v)
100 {
101         struct meson_dev *mc = seq->private;
102         int i;
103
104         for (i = 0; i < MAXFLOW; i++)
105                 seq_printf(seq, "Channel %d: nreq %lu\n", i, mc->chanlist[i].stat_req);
106
107         for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
108                 switch (mc_algs[i].type) {
109                 case CRYPTO_ALG_TYPE_SKCIPHER:
110                         seq_printf(seq, "%s %s %lu %lu\n",
111                                    mc_algs[i].alg.skcipher.base.cra_driver_name,
112                                    mc_algs[i].alg.skcipher.base.cra_name,
113                                    mc_algs[i].stat_req, mc_algs[i].stat_fb);
114                         break;
115                 }
116         }
117         return 0;
118 }
119
120 static int meson_dbgfs_open(struct inode *inode, struct file *file)
121 {
122         return single_open(file, meson_dbgfs_read, inode->i_private);
123 }
124
125 static const struct file_operations meson_debugfs_fops = {
126         .owner = THIS_MODULE,
127         .open = meson_dbgfs_open,
128         .read = seq_read,
129         .llseek = seq_lseek,
130         .release = single_release,
131 };
132 #endif
133
134 static void meson_free_chanlist(struct meson_dev *mc, int i)
135 {
136         while (i >= 0) {
137                 crypto_engine_exit(mc->chanlist[i].engine);
138                 if (mc->chanlist[i].tl)
139                         dma_free_coherent(mc->dev, sizeof(struct meson_desc) * MAXDESC,
140                                           mc->chanlist[i].tl,
141                                           mc->chanlist[i].t_phy);
142                 i--;
143         }
144 }
145
146 /*
147  * Allocate the channel list structure
148  */
149 static int meson_allocate_chanlist(struct meson_dev *mc)
150 {
151         int i, err;
152
153         mc->chanlist = devm_kcalloc(mc->dev, MAXFLOW,
154                                     sizeof(struct meson_flow), GFP_KERNEL);
155         if (!mc->chanlist)
156                 return -ENOMEM;
157
158         for (i = 0; i < MAXFLOW; i++) {
159                 init_completion(&mc->chanlist[i].complete);
160
161                 mc->chanlist[i].engine = crypto_engine_alloc_init(mc->dev, true);
162                 if (!mc->chanlist[i].engine) {
163                         dev_err(mc->dev, "Cannot allocate engine\n");
164                         i--;
165                         err = -ENOMEM;
166                         goto error_engine;
167                 }
168                 err = crypto_engine_start(mc->chanlist[i].engine);
169                 if (err) {
170                         dev_err(mc->dev, "Cannot start engine\n");
171                         goto error_engine;
172                 }
173                 mc->chanlist[i].tl = dma_alloc_coherent(mc->dev,
174                                                         sizeof(struct meson_desc) * MAXDESC,
175                                                         &mc->chanlist[i].t_phy,
176                                                         GFP_KERNEL);
177                 if (!mc->chanlist[i].tl) {
178                         err = -ENOMEM;
179                         goto error_engine;
180                 }
181         }
182         return 0;
183 error_engine:
184         meson_free_chanlist(mc, i);
185         return err;
186 }
187
188 static int meson_register_algs(struct meson_dev *mc)
189 {
190         int err, i;
191
192         for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
193                 mc_algs[i].mc = mc;
194                 switch (mc_algs[i].type) {
195                 case CRYPTO_ALG_TYPE_SKCIPHER:
196                         err = crypto_register_skcipher(&mc_algs[i].alg.skcipher);
197                         if (err) {
198                                 dev_err(mc->dev, "Fail to register %s\n",
199                                         mc_algs[i].alg.skcipher.base.cra_name);
200                                 mc_algs[i].mc = NULL;
201                                 return err;
202                         }
203                         break;
204                 }
205         }
206
207         return 0;
208 }
209
210 static void meson_unregister_algs(struct meson_dev *mc)
211 {
212         int i;
213
214         for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
215                 if (!mc_algs[i].mc)
216                         continue;
217                 switch (mc_algs[i].type) {
218                 case CRYPTO_ALG_TYPE_SKCIPHER:
219                         crypto_unregister_skcipher(&mc_algs[i].alg.skcipher);
220                         break;
221                 }
222         }
223 }
224
225 static int meson_crypto_probe(struct platform_device *pdev)
226 {
227         struct meson_dev *mc;
228         int err, i;
229
230         if (!pdev->dev.of_node)
231                 return -ENODEV;
232
233         mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
234         if (!mc)
235                 return -ENOMEM;
236
237         mc->dev = &pdev->dev;
238         platform_set_drvdata(pdev, mc);
239
240         mc->base = devm_platform_ioremap_resource(pdev, 0);
241         if (IS_ERR(mc->base)) {
242                 err = PTR_ERR(mc->base);
243                 dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err);
244                 return err;
245         }
246         mc->busclk = devm_clk_get(&pdev->dev, "blkmv");
247         if (IS_ERR(mc->busclk)) {
248                 err = PTR_ERR(mc->busclk);
249                 dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err);
250                 return err;
251         }
252
253         mc->irqs = devm_kcalloc(mc->dev, MAXFLOW, sizeof(int), GFP_KERNEL);
254         for (i = 0; i < MAXFLOW; i++) {
255                 mc->irqs[i] = platform_get_irq(pdev, i);
256                 if (mc->irqs[i] < 0)
257                         return mc->irqs[i];
258
259                 err = devm_request_irq(&pdev->dev, mc->irqs[i], meson_irq_handler, 0,
260                                        "gxl-crypto", mc);
261                 if (err < 0) {
262                         dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i);
263                         return err;
264                 }
265         }
266
267         err = clk_prepare_enable(mc->busclk);
268         if (err != 0) {
269                 dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
270                 return err;
271         }
272
273         err = meson_allocate_chanlist(mc);
274         if (err)
275                 goto error_flow;
276
277         err = meson_register_algs(mc);
278         if (err)
279                 goto error_alg;
280
281 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
282         mc->dbgfs_dir = debugfs_create_dir("gxl-crypto", NULL);
283         debugfs_create_file("stats", 0444, mc->dbgfs_dir, mc, &meson_debugfs_fops);
284 #endif
285
286         return 0;
287 error_alg:
288         meson_unregister_algs(mc);
289 error_flow:
290         meson_free_chanlist(mc, MAXFLOW - 1);
291         clk_disable_unprepare(mc->busclk);
292         return err;
293 }
294
295 static int meson_crypto_remove(struct platform_device *pdev)
296 {
297         struct meson_dev *mc = platform_get_drvdata(pdev);
298
299 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
300         debugfs_remove_recursive(mc->dbgfs_dir);
301 #endif
302
303         meson_unregister_algs(mc);
304
305         meson_free_chanlist(mc, MAXFLOW - 1);
306
307         clk_disable_unprepare(mc->busclk);
308         return 0;
309 }
310
311 static const struct of_device_id meson_crypto_of_match_table[] = {
312         { .compatible = "amlogic,gxl-crypto", },
313         {}
314 };
315 MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table);
316
317 static struct platform_driver meson_crypto_driver = {
318         .probe           = meson_crypto_probe,
319         .remove          = meson_crypto_remove,
320         .driver          = {
321                 .name              = "gxl-crypto",
322                 .of_match_table = meson_crypto_of_match_table,
323         },
324 };
325
326 module_platform_driver(meson_crypto_driver);
327
328 MODULE_DESCRIPTION("Amlogic GXL cryptographic offloader");
329 MODULE_LICENSE("GPL");
330 MODULE_AUTHOR("Corentin Labbe <clabbe@baylibre.com>");