1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Hardware crypto devices"
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
10 If you say N, all options in this submenu will be skipped and disabled.
14 source "drivers/crypto/allwinner/Kconfig"
16 config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
28 config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
34 Use VIA PadLock for AES algorithm.
36 Available in VIA C3 and newer CPUs.
38 If unsure say M. The compiled module will be
41 config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
48 Use VIA PadLock for SHA1/SHA256 algorithms.
50 Available in VIA C7 and newer processors.
52 If unsure say M. The compiled module will be
55 config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
59 select CRYPTO_SKCIPHER
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
68 tristate "Support for s390 cryptographic adapters"
72 Select this option if you want to enable support for
73 s390 cryptographic adapters like:
74 + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75 + Crypto Express 2 up to 7 Accelerator (CEXxA)
76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
79 bool "Enable debug features for s390 cryptographic adapters"
81 depends on DEBUG_KERNEL
84 Say 'Y' here to enable some additional debug features on the
85 s390 cryptographic adapters driver.
87 There will be some more sysfs attributes displayed for ap cards
88 and queues and some flags on crypto requests are interpreted as
89 debugging messages to force error injection.
91 Do not enable on production level kernel build.
95 config ZCRYPT_MULTIDEVNODES
96 bool "Support for multiple zcrypt device nodes"
101 With this option enabled the zcrypt device driver can
102 provide multiple devices nodes in /dev. Each device
103 node can get customized to limit access and narrow
104 down the use of the available crypto hardware.
107 tristate "Kernel API for protected key handling"
111 With this option enabled the pkey kernel module provides an API
112 for creation and handling of protected keys. Other parts of the
113 kernel or userspace applications may use these functions.
115 Select this option if you want to enable the kernel and userspace
116 API for proteced key handling.
118 Please note that creation of protected keys from secure keys
119 requires to have at least one CEX card in coprocessor mode
120 available at runtime.
122 config CRYPTO_PAES_S390
123 tristate "PAES cipher algorithms"
128 select CRYPTO_SKCIPHER
130 This is the s390 hardware accelerated implementation of the
131 AES cipher algorithms for use with protected key.
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
136 config CRYPTO_SHA1_S390
137 tristate "SHA1 digest algorithm"
141 This is the s390 hardware accelerated implementation of the
142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
144 It is available as of z990.
146 config CRYPTO_SHA256_S390
147 tristate "SHA256 digest algorithm"
151 This is the s390 hardware accelerated implementation of the
152 SHA256 secure hash standard (DFIPS 180-2).
154 It is available as of z9.
156 config CRYPTO_SHA512_S390
157 tristate "SHA384 and SHA512 digest algorithm"
161 This is the s390 hardware accelerated implementation of the
162 SHA512 secure hash standard.
164 It is available as of z10.
166 config CRYPTO_SHA3_256_S390
167 tristate "SHA3_224 and SHA3_256 digest algorithm"
171 This is the s390 hardware accelerated implementation of the
172 SHA3_256 secure hash standard.
174 It is available as of z14.
176 config CRYPTO_SHA3_512_S390
177 tristate "SHA3_384 and SHA3_512 digest algorithm"
181 This is the s390 hardware accelerated implementation of the
182 SHA3_512 secure hash standard.
184 It is available as of z14.
186 config CRYPTO_DES_S390
187 tristate "DES and Triple DES cipher algorithms"
190 select CRYPTO_SKCIPHER
191 select CRYPTO_LIB_DES
193 This is the s390 hardware accelerated implementation of the
194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
196 As of z990 the ECB and CBC mode are hardware accelerated.
197 As of z196 the CTR mode is hardware accelerated.
199 config CRYPTO_AES_S390
200 tristate "AES cipher algorithms"
203 select CRYPTO_SKCIPHER
205 This is the s390 hardware accelerated implementation of the
206 AES cipher algorithms (FIPS-197).
208 As of z9 the ECB and CBC modes are hardware accelerated
210 As of z10 the ECB and CBC modes are hardware accelerated
211 for all AES key sizes.
212 As of z196 the CTR mode is hardware accelerated for all AES
213 key sizes and XTS mode is hardware accelerated for 256 and
216 config CRYPTO_CHACHA_S390
217 tristate "ChaCha20 stream cipher"
219 select CRYPTO_SKCIPHER
220 select CRYPTO_LIB_CHACHA_GENERIC
221 select CRYPTO_ARCH_HAVE_LIB_CHACHA
223 This is the s390 SIMD implementation of the ChaCha20 stream
226 It is available as of z13.
229 tristate "Pseudo random number generator device driver"
233 Select this option if you want to use the s390 pseudo random number
234 generator. The PRNG is part of the cryptographic processor functions
235 and uses triple-DES to generate secure random numbers like the
236 ANSI X9.17 standard. User-space programs access the
237 pseudo-random-number device through the char device /dev/prandom.
239 It is available as of z9.
241 config CRYPTO_GHASH_S390
242 tristate "GHASH hash function"
246 This is the s390 hardware accelerated implementation of GHASH,
247 the hash function used in GCM (Galois/Counter mode).
249 It is available as of z196.
251 config CRYPTO_CRC32_S390
252 tristate "CRC-32 algorithms"
257 Select this option if you want to use hardware accelerated
258 implementations of CRC algorithms. With this option, you
259 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
260 and CRC-32C (Castagnoli).
262 It is available with IBM z13 or later.
264 config CRYPTO_DEV_NIAGARA2
265 tristate "Niagara2 Stream Processing Unit driver"
266 select CRYPTO_LIB_DES
267 select CRYPTO_SKCIPHER
274 Each core of a Niagara2 processor contains a Stream
275 Processing Unit, which itself contains several cryptographic
276 sub-units. One set provides the Modular Arithmetic Unit,
277 used for SSL offload. The other set provides the Cipher
278 Group, which can perform encryption, decryption, hashing,
279 checksumming, and raw copies.
281 config CRYPTO_DEV_SL3516
282 tristate "Storlink SL3516 crypto offloader"
283 depends on ARCH_GEMINI || COMPILE_TEST
284 depends on HAS_IOMEM && PM
285 select CRYPTO_SKCIPHER
291 This option allows you to have support for SL3516 crypto offloader.
293 config CRYPTO_DEV_SL3516_DEBUG
294 bool "Enable SL3516 stats"
295 depends on CRYPTO_DEV_SL3516
298 Say y to enable SL3516 debug stats.
299 This will create /sys/kernel/debug/sl3516/stats for displaying
300 the number of requests per algorithm and other internal stats.
302 config CRYPTO_DEV_HIFN_795X
303 tristate "Driver HIFN 795x crypto accelerator chips"
304 select CRYPTO_LIB_DES
305 select CRYPTO_SKCIPHER
306 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
308 depends on !ARCH_DMA_ADDR_T_64BIT
310 This option allows you to have support for HIFN 795x crypto adapters.
312 config CRYPTO_DEV_HIFN_795X_RNG
313 bool "HIFN 795x random number generator"
314 depends on CRYPTO_DEV_HIFN_795X
316 Select this option if you want to enable the random number generator
317 on the HIFN 795x crypto adapters.
319 source "drivers/crypto/caam/Kconfig"
321 config CRYPTO_DEV_TALITOS
322 tristate "Talitos Freescale Security Engine (SEC)"
324 select CRYPTO_AUTHENC
325 select CRYPTO_SKCIPHER
327 select CRYPTO_LIB_DES
331 Say 'Y' here to use the Freescale Security Engine (SEC)
332 to offload cryptographic algorithm computation.
334 The Freescale SEC is present on PowerQUICC 'E' processors, such
335 as the MPC8349E and MPC8548E.
337 To compile this driver as a module, choose M here: the module
338 will be called talitos.
340 config CRYPTO_DEV_TALITOS1
341 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
342 depends on CRYPTO_DEV_TALITOS
343 depends on PPC_8xx || PPC_82xx
346 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
347 found on MPC82xx or the Freescale Security Engine (SEC Lite)
348 version 1.2 found on MPC8xx
350 config CRYPTO_DEV_TALITOS2
351 bool "SEC2+ (SEC version 2.0 or upper)"
352 depends on CRYPTO_DEV_TALITOS
353 default y if !PPC_8xx
355 Say 'Y' here to use the Freescale Security Engine (SEC)
356 version 2 and following as found on MPC83xx, MPC85xx, etc ...
358 config CRYPTO_DEV_IXP4XX
359 tristate "Driver for IXP4xx crypto hardware acceleration"
360 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
366 select CRYPTO_LIB_DES
368 select CRYPTO_AUTHENC
369 select CRYPTO_SKCIPHER
371 Driver for the IXP4xx NPE crypto engine.
373 config CRYPTO_DEV_PPC4XX
374 tristate "Driver AMCC PPC4xx crypto accelerator"
375 depends on PPC && 4xx
379 select CRYPTO_LIB_AES
383 select CRYPTO_SKCIPHER
385 This option allows you to have support for AMCC crypto acceleration.
387 config HW_RANDOM_PPC4XX
388 bool "PowerPC 4xx generic true random number generator support"
389 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
392 This option provides the kernel-side support for the TRNG hardware
393 found in the security function of some PowerPC 4xx SoCs.
395 config CRYPTO_DEV_OMAP
396 tristate "Support for OMAP crypto HW accelerators"
397 depends on ARCH_OMAP2PLUS
399 OMAP processors have various crypto HW accelerators. Select this if
400 you want to use the OMAP modules for any of the crypto algorithms.
404 config CRYPTO_DEV_OMAP_SHAM
405 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
406 depends on ARCH_OMAP2PLUS
414 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
415 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
417 config CRYPTO_DEV_OMAP_AES
418 tristate "Support for OMAP AES hw engine"
419 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
421 select CRYPTO_SKCIPHER
428 OMAP processors have AES module accelerator. Select this if you
429 want to use the OMAP module for AES algorithms.
431 config CRYPTO_DEV_OMAP_DES
432 tristate "Support for OMAP DES/3DES hw engine"
433 depends on ARCH_OMAP2PLUS
434 select CRYPTO_LIB_DES
435 select CRYPTO_SKCIPHER
438 OMAP processors have DES/3DES module accelerator. Select this if you
439 want to use the OMAP module for DES and 3DES algorithms. Currently
440 the ECB and CBC modes of operation are supported by the driver. Also
441 accesses made on unaligned boundaries are supported.
443 endif # CRYPTO_DEV_OMAP
445 config CRYPTO_DEV_SAHARA
446 tristate "Support for SAHARA crypto accelerator"
447 depends on ARCH_MXC && OF
448 select CRYPTO_SKCIPHER
452 This option enables support for the SAHARA HW crypto accelerator
453 found in some Freescale i.MX chips.
455 config CRYPTO_DEV_EXYNOS_RNG
456 tristate "Exynos HW pseudo random number generator support"
457 depends on ARCH_EXYNOS || COMPILE_TEST
461 This driver provides kernel-side support through the
462 cryptographic API for the pseudo random number generator hardware
463 found on Exynos SoCs.
465 To compile this driver as a module, choose M here: the
466 module will be called exynos-rng.
470 config CRYPTO_DEV_S5P
471 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
472 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
475 select CRYPTO_SKCIPHER
477 This option allows you to have support for S5P crypto acceleration.
478 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
479 algorithms execution.
481 config CRYPTO_DEV_EXYNOS_HASH
482 bool "Support for Samsung Exynos HASH accelerator"
483 depends on CRYPTO_DEV_S5P
484 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
489 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
490 This will select software SHA1, MD5 and SHA256 as they are
491 needed for small and zero-size messages.
492 HASH algorithms will be disabled if EXYNOS_RNG
493 is enabled due to hw conflict.
496 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
499 This enables support for the NX hardware cryptographic accelerator
500 coprocessor that is in IBM PowerPC P7+ or later processors. This
501 does not actually enable any drivers, it only allows you to select
502 which acceleration type (encryption and/or compression) to enable.
505 source "drivers/crypto/nx/Kconfig"
508 config CRYPTO_DEV_UX500
509 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
510 depends on ARCH_U8500
512 Driver for ST-Ericsson UX500 crypto engine.
515 source "drivers/crypto/ux500/Kconfig"
516 endif # if CRYPTO_DEV_UX500
518 config CRYPTO_DEV_ATMEL_AUTHENC
519 bool "Support for Atmel IPSEC/SSL hw accelerator"
520 depends on ARCH_AT91 || COMPILE_TEST
521 depends on CRYPTO_DEV_ATMEL_AES
523 Some Atmel processors can combine the AES and SHA hw accelerators
524 to enhance support of IPSEC/SSL.
525 Select this if you want to use the Atmel modules for
526 authenc(hmac(shaX),Y(cbc)) algorithms.
528 config CRYPTO_DEV_ATMEL_AES
529 tristate "Support for Atmel AES hw accelerator"
530 depends on ARCH_AT91 || COMPILE_TEST
533 select CRYPTO_SKCIPHER
534 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
535 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
537 Some Atmel processors have AES hw accelerator.
538 Select this if you want to use the Atmel module for
541 To compile this driver as a module, choose M here: the module
542 will be called atmel-aes.
544 config CRYPTO_DEV_ATMEL_TDES
545 tristate "Support for Atmel DES/TDES hw accelerator"
546 depends on ARCH_AT91 || COMPILE_TEST
547 select CRYPTO_LIB_DES
548 select CRYPTO_SKCIPHER
550 Some Atmel processors have DES/TDES hw accelerator.
551 Select this if you want to use the Atmel module for
554 To compile this driver as a module, choose M here: the module
555 will be called atmel-tdes.
557 config CRYPTO_DEV_ATMEL_SHA
558 tristate "Support for Atmel SHA hw accelerator"
559 depends on ARCH_AT91 || COMPILE_TEST
562 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
564 Select this if you want to use the Atmel module for
565 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
567 To compile this driver as a module, choose M here: the module
568 will be called atmel-sha.
570 config CRYPTO_DEV_ATMEL_I2C
574 config CRYPTO_DEV_ATMEL_ECC
575 tristate "Support for Microchip / Atmel ECC hw accelerator"
577 select CRYPTO_DEV_ATMEL_I2C
581 Microhip / Atmel ECC hw accelerator.
582 Select this if you want to use the Microchip / Atmel module for
585 To compile this driver as a module, choose M here: the module
586 will be called atmel-ecc.
588 config CRYPTO_DEV_ATMEL_SHA204A
589 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
591 select CRYPTO_DEV_ATMEL_I2C
595 Microhip / Atmel SHA accelerator and RNG.
596 Select this if you want to use the Microchip / Atmel SHA204A
597 module as a random number generator. (Other functions of the
598 chip are currently not exposed by this driver)
600 To compile this driver as a module, choose M here: the module
601 will be called atmel-sha204a.
603 config CRYPTO_DEV_CCP
604 bool "Support for AMD Secure Processor"
605 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
607 The AMD Secure Processor provides support for the Cryptographic Coprocessor
608 (CCP) and the Platform Security Processor (PSP) devices.
611 source "drivers/crypto/ccp/Kconfig"
614 config CRYPTO_DEV_MXS_DCP
615 tristate "Support for Freescale MXS DCP"
616 depends on (ARCH_MXS || ARCH_MXC)
621 select CRYPTO_SKCIPHER
624 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
625 co-processor on the die.
627 To compile this driver as a module, choose M here: the module
628 will be called mxs-dcp.
630 source "drivers/crypto/qat/Kconfig"
631 source "drivers/crypto/cavium/cpt/Kconfig"
632 source "drivers/crypto/cavium/nitrox/Kconfig"
633 source "drivers/crypto/marvell/Kconfig"
635 config CRYPTO_DEV_CAVIUM_ZIP
636 tristate "Cavium ZIP driver"
637 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
639 Select this option if you want to enable compression/decompression
640 acceleration on Cavium's ARM based SoCs
642 config CRYPTO_DEV_QCE
643 tristate "Qualcomm crypto engine accelerator"
644 depends on ARCH_QCOM || COMPILE_TEST
647 This driver supports Qualcomm crypto engine accelerator
648 hardware. To compile this driver as a module, choose M here. The
649 module will be called qcrypto.
651 config CRYPTO_DEV_QCE_SKCIPHER
653 depends on CRYPTO_DEV_QCE
655 select CRYPTO_LIB_DES
660 select CRYPTO_SKCIPHER
662 config CRYPTO_DEV_QCE_SHA
664 depends on CRYPTO_DEV_QCE
668 config CRYPTO_DEV_QCE_AEAD
670 depends on CRYPTO_DEV_QCE
671 select CRYPTO_AUTHENC
672 select CRYPTO_LIB_DES
675 prompt "Algorithms enabled for QCE acceleration"
676 default CRYPTO_DEV_QCE_ENABLE_ALL
677 depends on CRYPTO_DEV_QCE
679 This option allows to choose whether to build support for all algorithms
680 (default), hashes-only, or skciphers-only.
682 The QCE engine does not appear to scale as well as the CPU to handle
683 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
684 QCE handles only 2 requests in parallel.
686 Ipsec throughput seems to improve when disabling either family of
687 algorithms, sharing the load with the CPU. Enabling skciphers-only
688 appears to work best.
690 config CRYPTO_DEV_QCE_ENABLE_ALL
691 bool "All supported algorithms"
692 select CRYPTO_DEV_QCE_SKCIPHER
693 select CRYPTO_DEV_QCE_SHA
694 select CRYPTO_DEV_QCE_AEAD
696 Enable all supported algorithms:
697 - AES (CBC, CTR, ECB, XTS)
701 - SHA256, HMAC-SHA256
703 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
704 bool "Symmetric-key ciphers only"
705 select CRYPTO_DEV_QCE_SKCIPHER
707 Enable symmetric-key ciphers only:
708 - AES (CBC, CTR, ECB, XTS)
712 config CRYPTO_DEV_QCE_ENABLE_SHA
713 bool "Hash/HMAC only"
714 select CRYPTO_DEV_QCE_SHA
716 Enable hashes/HMAC algorithms only:
718 - SHA256, HMAC-SHA256
720 config CRYPTO_DEV_QCE_ENABLE_AEAD
721 bool "AEAD algorithms only"
722 select CRYPTO_DEV_QCE_AEAD
724 Enable AEAD algorithms only:
730 config CRYPTO_DEV_QCE_SW_MAX_LEN
731 int "Default maximum request size to use software for AES"
732 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
735 This sets the default maximum request size to perform AES requests
736 using software instead of the crypto engine. It can be changed by
737 setting the aes_sw_max_len parameter.
739 Small blocks are processed faster in software than hardware.
740 Considering the 256-bit ciphers, software is 2-3 times faster than
741 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
742 With 128-bit keys, the break-even point would be around 1024-bytes.
744 The default is set a little lower, to 512 bytes, to balance the
745 cost in CPU usage. The minimum recommended setting is 16-bytes
746 (1 AES block), since AES-GCM will fail if you set it lower.
747 Setting this to zero will send all requests to the hardware.
749 Note that 192-bit keys are not supported by the hardware and are
750 always processed by the software fallback, and all DES requests
751 are done by the hardware.
753 config CRYPTO_DEV_QCOM_RNG
754 tristate "Qualcomm Random Number Generator Driver"
755 depends on ARCH_QCOM || COMPILE_TEST
758 This driver provides support for the Random Number
759 Generator hardware found on Qualcomm SoCs.
761 To compile this driver as a module, choose M here. The
762 module will be called qcom-rng. If unsure, say N.
764 config CRYPTO_DEV_VMX
765 bool "Support for VMX cryptographic acceleration instructions"
766 depends on PPC64 && VSX
768 Support for VMX cryptographic acceleration instructions.
770 source "drivers/crypto/vmx/Kconfig"
772 config CRYPTO_DEV_IMGTEC_HASH
773 tristate "Imagination Technologies hardware hash accelerator"
774 depends on MIPS || COMPILE_TEST
780 This driver interfaces with the Imagination Technologies
781 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
784 config CRYPTO_DEV_ROCKCHIP
785 tristate "Rockchip's Cryptographic Engine driver"
786 depends on OF && ARCH_ROCKCHIP
788 select CRYPTO_LIB_DES
793 select CRYPTO_SKCIPHER
796 This driver interfaces with the hardware crypto accelerator.
797 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
799 config CRYPTO_DEV_ZYNQMP_AES
800 tristate "Support for Xilinx ZynqMP AES hw accelerator"
801 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
806 Xilinx ZynqMP has AES-GCM engine used for symmetric key
807 encryption and decryption. This driver interfaces with AES hw
808 accelerator. Select this if you want to use the ZynqMP module
811 config CRYPTO_DEV_ZYNQMP_SHA3
812 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
813 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
816 Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
817 This driver interfaces with SHA3 hardware engine.
818 Select this if you want to use the ZynqMP module
819 for SHA3 hash computation.
821 source "drivers/crypto/chelsio/Kconfig"
823 source "drivers/crypto/virtio/Kconfig"
825 config CRYPTO_DEV_BCM_SPU
826 tristate "Broadcom symmetric crypto/hash acceleration support"
827 depends on ARCH_BCM_IPROC
830 select CRYPTO_AUTHENC
831 select CRYPTO_LIB_DES
837 This driver provides support for Broadcom crypto acceleration using the
838 Secure Processing Unit (SPU). The SPU driver registers skcipher,
839 ahash, and aead algorithms with the kernel cryptographic API.
841 source "drivers/crypto/stm32/Kconfig"
843 config CRYPTO_DEV_SAFEXCEL
844 tristate "Inside Secure's SafeXcel cryptographic engine driver"
845 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
846 select CRYPTO_LIB_AES
847 select CRYPTO_AUTHENC
848 select CRYPTO_SKCIPHER
849 select CRYPTO_LIB_DES
856 select CRYPTO_CHACHA20POLY1305
859 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
860 engines designed by Inside Secure. It currently accelerates DES, 3DES and
861 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
862 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
863 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
865 config CRYPTO_DEV_ARTPEC6
866 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
867 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
872 select CRYPTO_SKCIPHER
879 Enables the driver for the on-chip crypto accelerator
882 To compile this driver as a module, choose M here.
884 config CRYPTO_DEV_CCREE
885 tristate "Support for ARM TrustZone CryptoCell family of security processors"
886 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
889 select CRYPTO_SKCIPHER
890 select CRYPTO_LIB_DES
892 select CRYPTO_AUTHENC
906 Say 'Y' to enable a driver for the REE interface of the Arm
907 TrustZone CryptoCell family of processors. Currently the
908 CryptoCell 713, 703, 712, 710 and 630 are supported.
909 Choose this if you wish to use hardware acceleration of
910 cryptographic operations on the system REE.
913 source "drivers/crypto/hisilicon/Kconfig"
915 source "drivers/crypto/amlogic/Kconfig"
917 config CRYPTO_DEV_SA2UL
918 tristate "Support for TI security accelerator"
919 depends on ARCH_K3 || COMPILE_TEST
922 select CRYPTO_AES_ARM64
924 select CRYPTO_AUTHENC
931 K3 devices include a security accelerator engine that may be
932 used for crypto offload. Select this if you want to use hardware
933 acceleration for cryptographic algorithms on these devices.
935 source "drivers/crypto/keembay/Kconfig"