1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Hardware crypto devices"
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
10 If you say N, all options in this submenu will be skipped and disabled.
14 source "drivers/crypto/allwinner/Kconfig"
16 config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
28 config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
34 Use VIA PadLock for AES algorithm.
36 Available in VIA C3 and newer CPUs.
38 If unsure say M. The compiled module will be
41 config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
48 Use VIA PadLock for SHA1/SHA256 algorithms.
50 Available in VIA C7 and newer processors.
52 If unsure say M. The compiled module will be
55 config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
59 select CRYPTO_SKCIPHER
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
68 tristate "Support for s390 cryptographic adapters"
72 Select this option if you want to enable support for
73 s390 cryptographic adapters like:
74 + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75 + Crypto Express 2 up to 7 Accelerator (CEXxA)
76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
79 bool "Enable debug features for s390 cryptographic adapters"
81 depends on DEBUG_KERNEL
84 Say 'Y' here to enable some additional debug features on the
85 s390 cryptographic adapters driver.
87 There will be some more sysfs attributes displayed for ap cards
88 and queues and some flags on crypto requests are interpreted as
89 debugging messages to force error injection.
91 Do not enable on production level kernel build.
95 config ZCRYPT_MULTIDEVNODES
96 bool "Support for multiple zcrypt device nodes"
101 With this option enabled the zcrypt device driver can
102 provide multiple devices nodes in /dev. Each device
103 node can get customized to limit access and narrow
104 down the use of the available crypto hardware.
107 tristate "Kernel API for protected key handling"
111 With this option enabled the pkey kernel module provides an API
112 for creation and handling of protected keys. Other parts of the
113 kernel or userspace applications may use these functions.
115 Select this option if you want to enable the kernel and userspace
116 API for proteced key handling.
118 Please note that creation of protected keys from secure keys
119 requires to have at least one CEX card in coprocessor mode
120 available at runtime.
122 config CRYPTO_PAES_S390
123 tristate "PAES cipher algorithms"
128 select CRYPTO_SKCIPHER
130 This is the s390 hardware accelerated implementation of the
131 AES cipher algorithms for use with protected key.
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
136 config CRYPTO_SHA1_S390
137 tristate "SHA1 digest algorithm"
141 This is the s390 hardware accelerated implementation of the
142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
144 It is available as of z990.
146 config CRYPTO_SHA256_S390
147 tristate "SHA256 digest algorithm"
151 This is the s390 hardware accelerated implementation of the
152 SHA256 secure hash standard (DFIPS 180-2).
154 It is available as of z9.
156 config CRYPTO_SHA512_S390
157 tristate "SHA384 and SHA512 digest algorithm"
161 This is the s390 hardware accelerated implementation of the
162 SHA512 secure hash standard.
164 It is available as of z10.
166 config CRYPTO_SHA3_256_S390
167 tristate "SHA3_224 and SHA3_256 digest algorithm"
171 This is the s390 hardware accelerated implementation of the
172 SHA3_256 secure hash standard.
174 It is available as of z14.
176 config CRYPTO_SHA3_512_S390
177 tristate "SHA3_384 and SHA3_512 digest algorithm"
181 This is the s390 hardware accelerated implementation of the
182 SHA3_512 secure hash standard.
184 It is available as of z14.
186 config CRYPTO_DES_S390
187 tristate "DES and Triple DES cipher algorithms"
190 select CRYPTO_SKCIPHER
191 select CRYPTO_LIB_DES
193 This is the s390 hardware accelerated implementation of the
194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
196 As of z990 the ECB and CBC mode are hardware accelerated.
197 As of z196 the CTR mode is hardware accelerated.
199 config CRYPTO_AES_S390
200 tristate "AES cipher algorithms"
203 select CRYPTO_SKCIPHER
205 This is the s390 hardware accelerated implementation of the
206 AES cipher algorithms (FIPS-197).
208 As of z9 the ECB and CBC modes are hardware accelerated
210 As of z10 the ECB and CBC modes are hardware accelerated
211 for all AES key sizes.
212 As of z196 the CTR mode is hardware accelerated for all AES
213 key sizes and XTS mode is hardware accelerated for 256 and
217 tristate "Pseudo random number generator device driver"
221 Select this option if you want to use the s390 pseudo random number
222 generator. The PRNG is part of the cryptographic processor functions
223 and uses triple-DES to generate secure random numbers like the
224 ANSI X9.17 standard. User-space programs access the
225 pseudo-random-number device through the char device /dev/prandom.
227 It is available as of z9.
229 config CRYPTO_GHASH_S390
230 tristate "GHASH hash function"
234 This is the s390 hardware accelerated implementation of GHASH,
235 the hash function used in GCM (Galois/Counter mode).
237 It is available as of z196.
239 config CRYPTO_CRC32_S390
240 tristate "CRC-32 algorithms"
245 Select this option if you want to use hardware accelerated
246 implementations of CRC algorithms. With this option, you
247 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
248 and CRC-32C (Castagnoli).
250 It is available with IBM z13 or later.
252 config CRYPTO_DEV_NIAGARA2
253 tristate "Niagara2 Stream Processing Unit driver"
254 select CRYPTO_LIB_DES
255 select CRYPTO_SKCIPHER
262 Each core of a Niagara2 processor contains a Stream
263 Processing Unit, which itself contains several cryptographic
264 sub-units. One set provides the Modular Arithmetic Unit,
265 used for SSL offload. The other set provides the Cipher
266 Group, which can perform encryption, decryption, hashing,
267 checksumming, and raw copies.
269 config CRYPTO_DEV_HIFN_795X
270 tristate "Driver HIFN 795x crypto accelerator chips"
271 select CRYPTO_LIB_DES
272 select CRYPTO_SKCIPHER
273 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
275 depends on !ARCH_DMA_ADDR_T_64BIT
277 This option allows you to have support for HIFN 795x crypto adapters.
279 config CRYPTO_DEV_HIFN_795X_RNG
280 bool "HIFN 795x random number generator"
281 depends on CRYPTO_DEV_HIFN_795X
283 Select this option if you want to enable the random number generator
284 on the HIFN 795x crypto adapters.
286 source "drivers/crypto/caam/Kconfig"
288 config CRYPTO_DEV_TALITOS
289 tristate "Talitos Freescale Security Engine (SEC)"
291 select CRYPTO_AUTHENC
292 select CRYPTO_SKCIPHER
294 select CRYPTO_LIB_DES
298 Say 'Y' here to use the Freescale Security Engine (SEC)
299 to offload cryptographic algorithm computation.
301 The Freescale SEC is present on PowerQUICC 'E' processors, such
302 as the MPC8349E and MPC8548E.
304 To compile this driver as a module, choose M here: the module
305 will be called talitos.
307 config CRYPTO_DEV_TALITOS1
308 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
309 depends on CRYPTO_DEV_TALITOS
310 depends on PPC_8xx || PPC_82xx
313 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
314 found on MPC82xx or the Freescale Security Engine (SEC Lite)
315 version 1.2 found on MPC8xx
317 config CRYPTO_DEV_TALITOS2
318 bool "SEC2+ (SEC version 2.0 or upper)"
319 depends on CRYPTO_DEV_TALITOS
320 default y if !PPC_8xx
322 Say 'Y' here to use the Freescale Security Engine (SEC)
323 version 2 and following as found on MPC83xx, MPC85xx, etc ...
325 config CRYPTO_DEV_IXP4XX
326 tristate "Driver for IXP4xx crypto hardware acceleration"
327 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
328 select CRYPTO_LIB_DES
330 select CRYPTO_AUTHENC
331 select CRYPTO_SKCIPHER
333 Driver for the IXP4xx NPE crypto engine.
335 config CRYPTO_DEV_PPC4XX
336 tristate "Driver AMCC PPC4xx crypto accelerator"
337 depends on PPC && 4xx
341 select CRYPTO_LIB_AES
345 select CRYPTO_SKCIPHER
347 This option allows you to have support for AMCC crypto acceleration.
349 config HW_RANDOM_PPC4XX
350 bool "PowerPC 4xx generic true random number generator support"
351 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
354 This option provides the kernel-side support for the TRNG hardware
355 found in the security function of some PowerPC 4xx SoCs.
357 config CRYPTO_DEV_OMAP
358 tristate "Support for OMAP crypto HW accelerators"
359 depends on ARCH_OMAP2PLUS
361 OMAP processors have various crypto HW accelerators. Select this if
362 you want to use the OMAP modules for any of the crypto algorithms.
366 config CRYPTO_DEV_OMAP_SHAM
367 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
368 depends on ARCH_OMAP2PLUS
375 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
376 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
378 config CRYPTO_DEV_OMAP_AES
379 tristate "Support for OMAP AES hw engine"
380 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
382 select CRYPTO_SKCIPHER
389 OMAP processors have AES module accelerator. Select this if you
390 want to use the OMAP module for AES algorithms.
392 config CRYPTO_DEV_OMAP_DES
393 tristate "Support for OMAP DES/3DES hw engine"
394 depends on ARCH_OMAP2PLUS
395 select CRYPTO_LIB_DES
396 select CRYPTO_SKCIPHER
399 OMAP processors have DES/3DES module accelerator. Select this if you
400 want to use the OMAP module for DES and 3DES algorithms. Currently
401 the ECB and CBC modes of operation are supported by the driver. Also
402 accesses made on unaligned boundaries are supported.
404 endif # CRYPTO_DEV_OMAP
406 config CRYPTO_DEV_PICOXCELL
407 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
408 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
411 select CRYPTO_AUTHENC
412 select CRYPTO_SKCIPHER
413 select CRYPTO_LIB_DES
418 This option enables support for the hardware offload engines in the
419 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
420 and for 3gpp Layer 2 ciphering support.
422 Saying m here will build a module named picoxcell_crypto.
424 config CRYPTO_DEV_SAHARA
425 tristate "Support for SAHARA crypto accelerator"
426 depends on ARCH_MXC && OF
427 select CRYPTO_SKCIPHER
431 This option enables support for the SAHARA HW crypto accelerator
432 found in some Freescale i.MX chips.
434 config CRYPTO_DEV_EXYNOS_RNG
435 tristate "Exynos HW pseudo random number generator support"
436 depends on ARCH_EXYNOS || COMPILE_TEST
440 This driver provides kernel-side support through the
441 cryptographic API for the pseudo random number generator hardware
442 found on Exynos SoCs.
444 To compile this driver as a module, choose M here: the
445 module will be called exynos-rng.
449 config CRYPTO_DEV_S5P
450 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
451 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
454 select CRYPTO_SKCIPHER
456 This option allows you to have support for S5P crypto acceleration.
457 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
458 algorithms execution.
460 config CRYPTO_DEV_EXYNOS_HASH
461 bool "Support for Samsung Exynos HASH accelerator"
462 depends on CRYPTO_DEV_S5P
463 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
468 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
469 This will select software SHA1, MD5 and SHA256 as they are
470 needed for small and zero-size messages.
471 HASH algorithms will be disabled if EXYNOS_RNG
472 is enabled due to hw conflict.
475 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
478 This enables support for the NX hardware cryptographic accelerator
479 coprocessor that is in IBM PowerPC P7+ or later processors. This
480 does not actually enable any drivers, it only allows you to select
481 which acceleration type (encryption and/or compression) to enable.
484 source "drivers/crypto/nx/Kconfig"
487 config CRYPTO_DEV_UX500
488 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
489 depends on ARCH_U8500
491 Driver for ST-Ericsson UX500 crypto engine.
494 source "drivers/crypto/ux500/Kconfig"
495 endif # if CRYPTO_DEV_UX500
497 config CRYPTO_DEV_ATMEL_AUTHENC
498 bool "Support for Atmel IPSEC/SSL hw accelerator"
499 depends on ARCH_AT91 || COMPILE_TEST
500 depends on CRYPTO_DEV_ATMEL_AES
502 Some Atmel processors can combine the AES and SHA hw accelerators
503 to enhance support of IPSEC/SSL.
504 Select this if you want to use the Atmel modules for
505 authenc(hmac(shaX),Y(cbc)) algorithms.
507 config CRYPTO_DEV_ATMEL_AES
508 tristate "Support for Atmel AES hw accelerator"
509 depends on ARCH_AT91 || COMPILE_TEST
512 select CRYPTO_SKCIPHER
513 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
514 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
516 Some Atmel processors have AES hw accelerator.
517 Select this if you want to use the Atmel module for
520 To compile this driver as a module, choose M here: the module
521 will be called atmel-aes.
523 config CRYPTO_DEV_ATMEL_TDES
524 tristate "Support for Atmel DES/TDES hw accelerator"
525 depends on ARCH_AT91 || COMPILE_TEST
526 select CRYPTO_LIB_DES
527 select CRYPTO_SKCIPHER
529 Some Atmel processors have DES/TDES hw accelerator.
530 Select this if you want to use the Atmel module for
533 To compile this driver as a module, choose M here: the module
534 will be called atmel-tdes.
536 config CRYPTO_DEV_ATMEL_SHA
537 tristate "Support for Atmel SHA hw accelerator"
538 depends on ARCH_AT91 || COMPILE_TEST
541 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
543 Select this if you want to use the Atmel module for
544 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
546 To compile this driver as a module, choose M here: the module
547 will be called atmel-sha.
549 config CRYPTO_DEV_ATMEL_I2C
552 config CRYPTO_DEV_ATMEL_ECC
553 tristate "Support for Microchip / Atmel ECC hw accelerator"
555 select CRYPTO_DEV_ATMEL_I2C
559 Microhip / Atmel ECC hw accelerator.
560 Select this if you want to use the Microchip / Atmel module for
563 To compile this driver as a module, choose M here: the module
564 will be called atmel-ecc.
566 config CRYPTO_DEV_ATMEL_SHA204A
567 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
569 select CRYPTO_DEV_ATMEL_I2C
573 Microhip / Atmel SHA accelerator and RNG.
574 Select this if you want to use the Microchip / Atmel SHA204A
575 module as a random number generator. (Other functions of the
576 chip are currently not exposed by this driver)
578 To compile this driver as a module, choose M here: the module
579 will be called atmel-sha204a.
581 config CRYPTO_DEV_CCP
582 bool "Support for AMD Secure Processor"
583 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
585 The AMD Secure Processor provides support for the Cryptographic Coprocessor
586 (CCP) and the Platform Security Processor (PSP) devices.
589 source "drivers/crypto/ccp/Kconfig"
592 config CRYPTO_DEV_MXS_DCP
593 tristate "Support for Freescale MXS DCP"
594 depends on (ARCH_MXS || ARCH_MXC)
599 select CRYPTO_SKCIPHER
602 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
603 co-processor on the die.
605 To compile this driver as a module, choose M here: the module
606 will be called mxs-dcp.
608 source "drivers/crypto/qat/Kconfig"
609 source "drivers/crypto/cavium/cpt/Kconfig"
610 source "drivers/crypto/cavium/nitrox/Kconfig"
611 source "drivers/crypto/marvell/Kconfig"
613 config CRYPTO_DEV_CAVIUM_ZIP
614 tristate "Cavium ZIP driver"
615 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
617 Select this option if you want to enable compression/decompression
618 acceleration on Cavium's ARM based SoCs
620 config CRYPTO_DEV_QCE
621 tristate "Qualcomm crypto engine accelerator"
622 depends on ARCH_QCOM || COMPILE_TEST
625 This driver supports Qualcomm crypto engine accelerator
626 hardware. To compile this driver as a module, choose M here. The
627 module will be called qcrypto.
629 config CRYPTO_DEV_QCE_SKCIPHER
631 depends on CRYPTO_DEV_QCE
633 select CRYPTO_LIB_DES
638 select CRYPTO_SKCIPHER
640 config CRYPTO_DEV_QCE_SHA
642 depends on CRYPTO_DEV_QCE
647 prompt "Algorithms enabled for QCE acceleration"
648 default CRYPTO_DEV_QCE_ENABLE_ALL
649 depends on CRYPTO_DEV_QCE
651 This option allows to choose whether to build support for all algorihtms
652 (default), hashes-only, or skciphers-only.
654 The QCE engine does not appear to scale as well as the CPU to handle
655 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
656 QCE handles only 2 requests in parallel.
658 Ipsec throughput seems to improve when disabling either family of
659 algorithms, sharing the load with the CPU. Enabling skciphers-only
660 appears to work best.
662 config CRYPTO_DEV_QCE_ENABLE_ALL
663 bool "All supported algorithms"
664 select CRYPTO_DEV_QCE_SKCIPHER
665 select CRYPTO_DEV_QCE_SHA
667 Enable all supported algorithms:
668 - AES (CBC, CTR, ECB, XTS)
672 - SHA256, HMAC-SHA256
674 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
675 bool "Symmetric-key ciphers only"
676 select CRYPTO_DEV_QCE_SKCIPHER
678 Enable symmetric-key ciphers only:
679 - AES (CBC, CTR, ECB, XTS)
683 config CRYPTO_DEV_QCE_ENABLE_SHA
684 bool "Hash/HMAC only"
685 select CRYPTO_DEV_QCE_SHA
687 Enable hashes/HMAC algorithms only:
689 - SHA256, HMAC-SHA256
693 config CRYPTO_DEV_QCE_SW_MAX_LEN
694 int "Default maximum request size to use software for AES"
695 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
698 This sets the default maximum request size to perform AES requests
699 using software instead of the crypto engine. It can be changed by
700 setting the aes_sw_max_len parameter.
702 Small blocks are processed faster in software than hardware.
703 Considering the 256-bit ciphers, software is 2-3 times faster than
704 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
705 With 128-bit keys, the break-even point would be around 1024-bytes.
707 The default is set a little lower, to 512 bytes, to balance the
708 cost in CPU usage. The minimum recommended setting is 16-bytes
709 (1 AES block), since AES-GCM will fail if you set it lower.
710 Setting this to zero will send all requests to the hardware.
712 Note that 192-bit keys are not supported by the hardware and are
713 always processed by the software fallback, and all DES requests
714 are done by the hardware.
716 config CRYPTO_DEV_QCOM_RNG
717 tristate "Qualcomm Random Number Generator Driver"
718 depends on ARCH_QCOM || COMPILE_TEST
721 This driver provides support for the Random Number
722 Generator hardware found on Qualcomm SoCs.
724 To compile this driver as a module, choose M here. The
725 module will be called qcom-rng. If unsure, say N.
727 config CRYPTO_DEV_VMX
728 bool "Support for VMX cryptographic acceleration instructions"
729 depends on PPC64 && VSX
731 Support for VMX cryptographic acceleration instructions.
733 source "drivers/crypto/vmx/Kconfig"
735 config CRYPTO_DEV_IMGTEC_HASH
736 tristate "Imagination Technologies hardware hash accelerator"
737 depends on MIPS || COMPILE_TEST
743 This driver interfaces with the Imagination Technologies
744 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
747 config CRYPTO_DEV_ROCKCHIP
748 tristate "Rockchip's Cryptographic Engine driver"
749 depends on OF && ARCH_ROCKCHIP
751 select CRYPTO_LIB_DES
756 select CRYPTO_SKCIPHER
759 This driver interfaces with the hardware crypto accelerator.
760 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
762 config CRYPTO_DEV_ZYNQMP_AES
763 tristate "Support for Xilinx ZynqMP AES hw accelerator"
764 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
769 Xilinx ZynqMP has AES-GCM engine used for symmetric key
770 encryption and decryption. This driver interfaces with AES hw
771 accelerator. Select this if you want to use the ZynqMP module
774 config CRYPTO_DEV_MEDIATEK
775 tristate "MediaTek's EIP97 Cryptographic Engine driver"
776 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
777 select CRYPTO_LIB_AES
779 select CRYPTO_SKCIPHER
785 This driver allows you to utilize the hardware crypto accelerator
786 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
787 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
789 source "drivers/crypto/chelsio/Kconfig"
791 source "drivers/crypto/virtio/Kconfig"
793 config CRYPTO_DEV_BCM_SPU
794 tristate "Broadcom symmetric crypto/hash acceleration support"
795 depends on ARCH_BCM_IPROC
798 select CRYPTO_AUTHENC
799 select CRYPTO_LIB_DES
805 This driver provides support for Broadcom crypto acceleration using the
806 Secure Processing Unit (SPU). The SPU driver registers skcipher,
807 ahash, and aead algorithms with the kernel cryptographic API.
809 source "drivers/crypto/stm32/Kconfig"
811 config CRYPTO_DEV_SAFEXCEL
812 tristate "Inside Secure's SafeXcel cryptographic engine driver"
813 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
814 select CRYPTO_LIB_AES
815 select CRYPTO_AUTHENC
816 select CRYPTO_SKCIPHER
817 select CRYPTO_LIB_DES
824 select CRYPTO_CHACHA20POLY1305
827 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
828 engines designed by Inside Secure. It currently accelerates DES, 3DES and
829 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
830 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
831 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
833 config CRYPTO_DEV_ARTPEC6
834 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
835 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
840 select CRYPTO_SKCIPHER
847 Enables the driver for the on-chip crypto accelerator
850 To compile this driver as a module, choose M here.
852 config CRYPTO_DEV_CCREE
853 tristate "Support for ARM TrustZone CryptoCell family of security processors"
854 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
857 select CRYPTO_SKCIPHER
858 select CRYPTO_LIB_DES
860 select CRYPTO_AUTHENC
874 Say 'Y' to enable a driver for the REE interface of the Arm
875 TrustZone CryptoCell family of processors. Currently the
876 CryptoCell 713, 703, 712, 710 and 630 are supported.
877 Choose this if you wish to use hardware acceleration of
878 cryptographic operations on the system REE.
881 source "drivers/crypto/hisilicon/Kconfig"
883 source "drivers/crypto/amlogic/Kconfig"
885 config CRYPTO_DEV_SA2UL
886 tristate "Support for TI security accelerator"
887 depends on ARCH_K3 || COMPILE_TEST
890 select CRYPTO_AES_ARM64
892 select CRYPTO_AUTHENC
899 K3 devices include a security accelerator engine that may be
900 used for crypto offload. Select this if you want to use hardware
901 acceleration for cryptographic algorithms on these devices.