drivers/cpufreq/mediatek-cpufreq.c

   1 /*
   2  * Copyright (c) 2015 Linaro Ltd.
   3  * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/cpu.h>
  17 #include <linux/cpufreq.h>
  18 #include <linux/cpumask.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/pm_opp.h>
  23 #include <linux/regulator/consumer.h>
  24 #include <linux/slab.h>
  25 #include <linux/thermal.h>
  26
  27 #define MIN_VOLT_SHIFT          (100000)
  28 #define MAX_VOLT_SHIFT          (200000)
  29 #define MAX_VOLT_LIMIT          (1150000)
  30 #define VOLT_TOL                (10000)
  31
  32 /*
  33  * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
  34  * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
  35  * Mediatek SoCs has two voltage inputs, Vproc and Vsram. In some cases the two
  36  * voltage inputs need to be controlled under a hardware limitation:
  37  * 100mV < Vsram - Vproc < 200mV
  38  *
  39  * When scaling the clock frequency of a CPU clock domain, the clock source
  40  * needs to be switched to another stable PLL clock temporarily until
  41  * the original PLL becomes stable at target frequency.
  42  */
  43 struct mtk_cpu_dvfs_info {
  44         struct cpumask cpus;
  45         struct device *cpu_dev;
  46         struct regulator *proc_reg;
  47         struct regulator *sram_reg;
  48         struct clk *cpu_clk;
  49         struct clk *inter_clk;
  50         struct list_head list_head;
  51         int intermediate_voltage;
  52         bool need_voltage_tracking;
  53 };
  54
  55 static LIST_HEAD(dvfs_info_list);
  56
  57 static struct mtk_cpu_dvfs_info *mtk_cpu_dvfs_info_lookup(int cpu)
  58 {
  59         struct mtk_cpu_dvfs_info *info;
  60
  61         list_for_each_entry(info, &dvfs_info_list, list_head) {
  62                 if (cpumask_test_cpu(cpu, &info->cpus))
  63                         return info;
  64         }
  65
  66         return NULL;
  67 }
  68
  69 static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info,
  70                                         int new_vproc)
  71 {
  72         struct regulator *proc_reg = info->proc_reg;
  73         struct regulator *sram_reg = info->sram_reg;
  74         int old_vproc, old_vsram, new_vsram, vsram, vproc, ret;
  75
  76         old_vproc = regulator_get_voltage(proc_reg);
  77         if (old_vproc < 0) {
  78                 pr_err("%s: invalid Vproc value: %d\n", __func__, old_vproc);
  79                 return old_vproc;
  80         }
  81         /* Vsram should not exceed the maximum allowed voltage of SoC. */
  82         new_vsram = min(new_vproc + MIN_VOLT_SHIFT, MAX_VOLT_LIMIT);
  83
  84         if (old_vproc < new_vproc) {
  85                 /*
  86                  * When scaling up voltages, Vsram and Vproc scale up step
  87                  * by step. At each step, set Vsram to (Vproc + 200mV) first,
  88                  * then set Vproc to (Vsram - 100mV).
  89                  * Keep doing it until Vsram and Vproc hit target voltages.
  90                  */
  91                 do {
  92                         old_vsram = regulator_get_voltage(sram_reg);
  93                         if (old_vsram < 0) {
  94                                 pr_err("%s: invalid Vsram value: %d\n",
  95                                        __func__, old_vsram);
  96                                 return old_vsram;
  97                         }
  98                         old_vproc = regulator_get_voltage(proc_reg);
  99                         if (old_vproc < 0) {
 100                                 pr_err("%s: invalid Vproc value: %d\n",
 101                                        __func__, old_vproc);
 102                                 return old_vproc;
 103                         }
 104
 105                         vsram = min(new_vsram, old_vproc + MAX_VOLT_SHIFT);
 106
 107                         if (vsram + VOLT_TOL >= MAX_VOLT_LIMIT) {
 108                                 vsram = MAX_VOLT_LIMIT;
 109
 110                                 /*
 111                                  * If the target Vsram hits the maximum voltage,
 112                                  * try to set the exact voltage value first.
 113                                  */
 114                                 ret = regulator_set_voltage(sram_reg, vsram,
 115                                                             vsram);
 116                                 if (ret)
 117                                         ret = regulator_set_voltage(sram_reg,
 118                                                         vsram - VOLT_TOL,
 119                                                         vsram);
 120
 121                                 vproc = new_vproc;
 122                         } else {
 123                                 ret = regulator_set_voltage(sram_reg, vsram,
 124                                                             vsram + VOLT_TOL);
 125
 126                                 vproc = vsram - MIN_VOLT_SHIFT;
 127                         }
 128                         if (ret)
 129                                 return ret;
 130
 131                         ret = regulator_set_voltage(proc_reg, vproc,
 132                                                     vproc + VOLT_TOL);
 133                         if (ret) {
 134                                 regulator_set_voltage(sram_reg, old_vsram,
 135                                                       old_vsram);
 136                                 return ret;
 137                         }
 138                 } while (vproc < new_vproc || vsram < new_vsram);
 139         } else if (old_vproc > new_vproc) {
 140                 /*
 141                  * When scaling down voltages, Vsram and Vproc scale down step
 142                  * by step. At each step, set Vproc to (Vsram - 200mV) first,
 143                  * then set Vproc to (Vproc + 100mV).
 144                  * Keep doing it until Vsram and Vproc hit target voltages.
 145                  */
 146                 do {
 147                         old_vproc = regulator_get_voltage(proc_reg);
 148                         if (old_vproc < 0) {
 149                                 pr_err("%s: invalid Vproc value: %d\n",
 150                                        __func__, old_vproc);
 151                                 return old_vproc;
 152                         }
 153                         old_vsram = regulator_get_voltage(sram_reg);
 154                         if (old_vsram < 0) {
 155                                 pr_err("%s: invalid Vsram value: %d\n",
 156                                        __func__, old_vsram);
 157                                 return old_vsram;
 158                         }
 159
 160                         vproc = max(new_vproc, old_vsram - MAX_VOLT_SHIFT);
 161                         ret = regulator_set_voltage(proc_reg, vproc,
 162                                                     vproc + VOLT_TOL);
 163                         if (ret)
 164                                 return ret;
 165
 166                         if (vproc == new_vproc)
 167                                 vsram = new_vsram;
 168                         else
 169                                 vsram = max(new_vsram, vproc + MIN_VOLT_SHIFT);
 170
 171                         if (vsram + VOLT_TOL >= MAX_VOLT_LIMIT) {
 172                                 vsram = MAX_VOLT_LIMIT;
 173
 174                                 /*
 175                                  * If the target Vsram hits the maximum voltage,
 176                                  * try to set the exact voltage value first.
 177                                  */
 178                                 ret = regulator_set_voltage(sram_reg, vsram,
 179                                                             vsram);
 180                                 if (ret)
 181                                         ret = regulator_set_voltage(sram_reg,
 182                                                         vsram - VOLT_TOL,
 183                                                         vsram);
 184                         } else {
 185                                 ret = regulator_set_voltage(sram_reg, vsram,
 186                                                             vsram + VOLT_TOL);
 187                         }
 188
 189                         if (ret) {
 190                                 regulator_set_voltage(proc_reg, old_vproc,
 191                                                       old_vproc);
 192                                 return ret;
 193                         }
 194                 } while (vproc > new_vproc + VOLT_TOL ||
 195                          vsram > new_vsram + VOLT_TOL);
 196         }
 197
 198         return 0;
 199 }
 200
 201 static int mtk_cpufreq_set_voltage(struct mtk_cpu_dvfs_info *info, int vproc)
 202 {
 203         if (info->need_voltage_tracking)
 204                 return mtk_cpufreq_voltage_tracking(info, vproc);
 205         else
 206                 return regulator_set_voltage(info->proc_reg, vproc,
 207                                              vproc + VOLT_TOL);
 208 }
 209
 210 static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
 211                                   unsigned int index)
 212 {
 213         struct cpufreq_frequency_table *freq_table = policy->freq_table;
 214         struct clk *cpu_clk = policy->clk;
 215         struct clk *armpll = clk_get_parent(cpu_clk);
 216         struct mtk_cpu_dvfs_info *info = policy->driver_data;
 217         struct device *cpu_dev = info->cpu_dev;
 218         struct dev_pm_opp *opp;
 219         long freq_hz, old_freq_hz;
 220         int vproc, old_vproc, inter_vproc, target_vproc, ret;
 221
 222         inter_vproc = info->intermediate_voltage;
 223
 224         old_freq_hz = clk_get_rate(cpu_clk);
 225         old_vproc = regulator_get_voltage(info->proc_reg);
 226         if (old_vproc < 0) {
 227                 pr_err("%s: invalid Vproc value: %d\n", __func__, old_vproc);
 228                 return old_vproc;
 229         }
 230
 231         freq_hz = freq_table[index].frequency * 1000;
 232
 233         opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_hz);
 234         if (IS_ERR(opp)) {
 235                 pr_err("cpu%d: failed to find OPP for %ld\n",
 236                        policy->cpu, freq_hz);
 237                 return PTR_ERR(opp);
 238         }
 239         vproc = dev_pm_opp_get_voltage(opp);
 240         dev_pm_opp_put(opp);
 241
 242         /*
 243          * If the new voltage or the intermediate voltage is higher than the
 244          * current voltage, scale up voltage first.
 245          */
 246         target_vproc = (inter_vproc > vproc) ? inter_vproc : vproc;
 247         if (old_vproc < target_vproc) {
 248                 ret = mtk_cpufreq_set_voltage(info, target_vproc);
 249                 if (ret) {
 250                         pr_err("cpu%d: failed to scale up voltage!\n",
 251                                policy->cpu);
 252                         mtk_cpufreq_set_voltage(info, old_vproc);
 253                         return ret;
 254                 }
 255         }
 256
 257         /* Reparent the CPU clock to intermediate clock. */
 258         ret = clk_set_parent(cpu_clk, info->inter_clk);
 259         if (ret) {
 260                 pr_err("cpu%d: failed to re-parent cpu clock!\n",
 261                        policy->cpu);
 262                 mtk_cpufreq_set_voltage(info, old_vproc);
 263                 WARN_ON(1);
 264                 return ret;
 265         }
 266
 267         /* Set the original PLL to target rate. */
 268         ret = clk_set_rate(armpll, freq_hz);
 269         if (ret) {
 270                 pr_err("cpu%d: failed to scale cpu clock rate!\n",
 271                        policy->cpu);
 272                 clk_set_parent(cpu_clk, armpll);
 273                 mtk_cpufreq_set_voltage(info, old_vproc);
 274                 return ret;
 275         }
 276
 277         /* Set parent of CPU clock back to the original PLL. */
 278         ret = clk_set_parent(cpu_clk, armpll);
 279         if (ret) {
 280                 pr_err("cpu%d: failed to re-parent cpu clock!\n",
 281                        policy->cpu);
 282                 mtk_cpufreq_set_voltage(info, inter_vproc);
 283                 WARN_ON(1);
 284                 return ret;
 285         }
 286
 287         /*
 288          * If the new voltage is lower than the intermediate voltage or the
 289          * original voltage, scale down to the new voltage.
 290          */
 291         if (vproc < inter_vproc || vproc < old_vproc) {
 292                 ret = mtk_cpufreq_set_voltage(info, vproc);
 293                 if (ret) {
 294                         pr_err("cpu%d: failed to scale down voltage!\n",
 295                                policy->cpu);
 296                         clk_set_parent(cpu_clk, info->inter_clk);
 297                         clk_set_rate(armpll, old_freq_hz);
 298                         clk_set_parent(cpu_clk, armpll);
 299                         return ret;
 300                 }
 301         }
 302
 303         return 0;
 304 }
 305
 306 #define DYNAMIC_POWER "dynamic-power-coefficient"
 307
 308 static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
 309 {
 310         struct device *cpu_dev;
 311         struct regulator *proc_reg = ERR_PTR(-ENODEV);
 312         struct regulator *sram_reg = ERR_PTR(-ENODEV);
 313         struct clk *cpu_clk = ERR_PTR(-ENODEV);
 314         struct clk *inter_clk = ERR_PTR(-ENODEV);
 315         struct dev_pm_opp *opp;
 316         unsigned long rate;
 317         int ret;
 318
 319         cpu_dev = get_cpu_device(cpu);
 320         if (!cpu_dev) {
 321                 pr_err("failed to get cpu%d device\n", cpu);
 322                 return -ENODEV;
 323         }
 324
 325         cpu_clk = clk_get(cpu_dev, "cpu");
 326         if (IS_ERR(cpu_clk)) {
 327                 if (PTR_ERR(cpu_clk) == -EPROBE_DEFER)
 328                         pr_warn("cpu clk for cpu%d not ready, retry.\n", cpu);
 329                 else
 330                         pr_err("failed to get cpu clk for cpu%d\n", cpu);
 331
 332                 ret = PTR_ERR(cpu_clk);
 333                 return ret;
 334         }
 335
 336         inter_clk = clk_get(cpu_dev, "intermediate");
 337         if (IS_ERR(inter_clk)) {
 338                 if (PTR_ERR(inter_clk) == -EPROBE_DEFER)
 339                         pr_warn("intermediate clk for cpu%d not ready, retry.\n",
 340                                 cpu);
 341                 else
 342                         pr_err("failed to get intermediate clk for cpu%d\n",
 343                                cpu);
 344
 345                 ret = PTR_ERR(inter_clk);
 346                 goto out_free_resources;
 347         }
 348
 349         proc_reg = regulator_get_exclusive(cpu_dev, "proc");
 350         if (IS_ERR(proc_reg)) {
 351                 if (PTR_ERR(proc_reg) == -EPROBE_DEFER)
 352                         pr_warn("proc regulator for cpu%d not ready, retry.\n",
 353                                 cpu);
 354                 else
 355                         pr_err("failed to get proc regulator for cpu%d\n",
 356                                cpu);
 357
 358                 ret = PTR_ERR(proc_reg);
 359                 goto out_free_resources;
 360         }
 361
 362         /* Both presence and absence of sram regulator are valid cases. */
 363         sram_reg = regulator_get_exclusive(cpu_dev, "sram");
 364
 365         /* Get OPP-sharing information from "operating-points-v2" bindings */
 366         ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus);
 367         if (ret) {
 368                 pr_err("failed to get OPP-sharing information for cpu%d\n",
 369                        cpu);
 370                 goto out_free_resources;
 371         }
 372
 373         ret = dev_pm_opp_of_cpumask_add_table(&info->cpus);
 374         if (ret) {
 375                 pr_warn("no OPP table for cpu%d\n", cpu);
 376                 goto out_free_resources;
 377         }
 378
 379         /* Search a safe voltage for intermediate frequency. */
 380         rate = clk_get_rate(inter_clk);
 381         opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
 382         if (IS_ERR(opp)) {
 383                 pr_err("failed to get intermediate opp for cpu%d\n", cpu);
 384                 ret = PTR_ERR(opp);
 385                 goto out_free_opp_table;
 386         }
 387         info->intermediate_voltage = dev_pm_opp_get_voltage(opp);
 388         dev_pm_opp_put(opp);
 389
 390         info->cpu_dev = cpu_dev;
 391         info->proc_reg = proc_reg;
 392         info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg;
 393         info->cpu_clk = cpu_clk;
 394         info->inter_clk = inter_clk;
 395
 396         /*
 397          * If SRAM regulator is present, software "voltage tracking" is needed
 398          * for this CPU power domain.
 399          */
 400         info->need_voltage_tracking = !IS_ERR(sram_reg);
 401
 402         return 0;
 403
 404 out_free_opp_table:
 405         dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 406
 407 out_free_resources:
 408         if (!IS_ERR(proc_reg))
 409                 regulator_put(proc_reg);
 410         if (!IS_ERR(sram_reg))
 411                 regulator_put(sram_reg);
 412         if (!IS_ERR(cpu_clk))
 413                 clk_put(cpu_clk);
 414         if (!IS_ERR(inter_clk))
 415                 clk_put(inter_clk);
 416
 417         return ret;
 418 }
 419
 420 static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
 421 {
 422         if (!IS_ERR(info->proc_reg))
 423                 regulator_put(info->proc_reg);
 424         if (!IS_ERR(info->sram_reg))
 425                 regulator_put(info->sram_reg);
 426         if (!IS_ERR(info->cpu_clk))
 427                 clk_put(info->cpu_clk);
 428         if (!IS_ERR(info->inter_clk))
 429                 clk_put(info->inter_clk);
 430
 431         dev_pm_opp_of_cpumask_remove_table(&info->cpus);
 432 }
 433
 434 static int mtk_cpufreq_init(struct cpufreq_policy *policy)
 435 {
 436         struct mtk_cpu_dvfs_info *info;
 437         struct cpufreq_frequency_table *freq_table;
 438         int ret;
 439
 440         info = mtk_cpu_dvfs_info_lookup(policy->cpu);
 441         if (!info) {
 442                 pr_err("dvfs info for cpu%d is not initialized.\n",
 443                        policy->cpu);
 444                 return -EINVAL;
 445         }
 446
 447         ret = dev_pm_opp_init_cpufreq_table(info->cpu_dev, &freq_table);
 448         if (ret) {
 449                 pr_err("failed to init cpufreq table for cpu%d: %d\n",
 450                        policy->cpu, ret);
 451                 return ret;
 452         }
 453
 454         cpumask_copy(policy->cpus, &info->cpus);
 455         policy->freq_table = freq_table;
 456         policy->driver_data = info;
 457         policy->clk = info->cpu_clk;
 458
 459         dev_pm_opp_of_register_em(policy->cpus);
 460
 461         return 0;
 462 }
 463
 464 static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
 465 {
 466         struct mtk_cpu_dvfs_info *info = policy->driver_data;
 467
 468         dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table);
 469
 470         return 0;
 471 }
 472
 473 static struct cpufreq_driver mtk_cpufreq_driver = {
 474         .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
 475                  CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
 476                  CPUFREQ_IS_COOLING_DEV,
 477         .verify = cpufreq_generic_frequency_table_verify,
 478         .target_index = mtk_cpufreq_set_target,
 479         .get = cpufreq_generic_get,
 480         .init = mtk_cpufreq_init,
 481         .exit = mtk_cpufreq_exit,
 482         .name = "mtk-cpufreq",
 483         .attr = cpufreq_generic_attr,
 484 };
 485
 486 static int mtk_cpufreq_probe(struct platform_device *pdev)
 487 {
 488         struct mtk_cpu_dvfs_info *info, *tmp;
 489         int cpu, ret;
 490
 491         for_each_possible_cpu(cpu) {
 492                 info = mtk_cpu_dvfs_info_lookup(cpu);
 493                 if (info)
 494                         continue;
 495
 496                 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
 497                 if (!info) {
 498                         ret = -ENOMEM;
 499                         goto release_dvfs_info_list;
 500                 }
 501
 502                 ret = mtk_cpu_dvfs_info_init(info, cpu);
 503                 if (ret) {
 504                         dev_err(&pdev->dev,
 505                                 "failed to initialize dvfs info for cpu%d\n",
 506                                 cpu);
 507                         goto release_dvfs_info_list;
 508                 }
 509
 510                 list_add(&info->list_head, &dvfs_info_list);
 511         }
 512
 513         ret = cpufreq_register_driver(&mtk_cpufreq_driver);
 514         if (ret) {
 515                 dev_err(&pdev->dev, "failed to register mtk cpufreq driver\n");
 516                 goto release_dvfs_info_list;
 517         }
 518
 519         return 0;
 520
 521 release_dvfs_info_list:
 522         list_for_each_entry_safe(info, tmp, &dvfs_info_list, list_head) {
 523                 mtk_cpu_dvfs_info_release(info);
 524                 list_del(&info->list_head);
 525         }
 526
 527         return ret;
 528 }
 529
 530 static struct platform_driver mtk_cpufreq_platdrv = {
 531         .driver = {
 532                 .name   = "mtk-cpufreq",
 533         },
 534         .probe          = mtk_cpufreq_probe,
 535 };
 536
 537 /* List of machines supported by this driver */
 538 static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
 539         { .compatible = "mediatek,mt2701", },
 540         { .compatible = "mediatek,mt2712", },
 541         { .compatible = "mediatek,mt7622", },
 542         { .compatible = "mediatek,mt7623", },
 543         { .compatible = "mediatek,mt817x", },
 544         { .compatible = "mediatek,mt8173", },
 545         { .compatible = "mediatek,mt8176", },
 546
 547         { }
 548 };
 549
 550 static int __init mtk_cpufreq_driver_init(void)
 551 {
 552         struct device_node *np;
 553         const struct of_device_id *match;
 554         struct platform_device *pdev;
 555         int err;
 556
 557         np = of_find_node_by_path("/");
 558         if (!np)
 559                 return -ENODEV;
 560
 561         match = of_match_node(mtk_cpufreq_machines, np);
 562         of_node_put(np);
 563         if (!match) {
 564                 pr_debug("Machine is not compatible with mtk-cpufreq\n");
 565                 return -ENODEV;
 566         }
 567
 568         err = platform_driver_register(&mtk_cpufreq_platdrv);
 569         if (err)
 570                 return err;
 571
 572         /*
 573          * Since there's no place to hold device registration code and no
 574          * device tree based way to match cpufreq driver yet, both the driver
 575          * and the device registration codes are put here to handle defer
 576          * probing.
 577          */
 578         pdev = platform_device_register_simple("mtk-cpufreq", -1, NULL, 0);
 579         if (IS_ERR(pdev)) {
 580                 pr_err("failed to register mtk-cpufreq platform device\n");
 581                 return PTR_ERR(pdev);
 582         }
 583
 584         return 0;
 585 }
 586 device_initcall(mtk_cpufreq_driver_init);
 587
 588 MODULE_DESCRIPTION("MediaTek CPUFreq driver");
 589 MODULE_AUTHOR("Pi-Cheng Chen <pi-cheng.chen@linaro.org>");
 590 MODULE_LICENSE("GPL v2");