1 // SPDX-License-Identifier: GPL-2.0
3 * comedi/drivers/pcl812.c
5 * Author: Michal Dobes <dobes@tesnet.cz>
7 * hardware driver for Advantech cards
8 * card: PCL-812, PCL-812PG, PCL-813, PCL-813B
9 * driver: pcl812, pcl812pg, pcl813, pcl813b
10 * and for ADlink cards
11 * card: ACL-8112DG, ACL-8112HG, ACL-8112PG, ACL-8113, ACL-8216
12 * driver: acl8112dg, acl8112hg, acl8112pg, acl8113, acl8216
13 * and for ICP DAS cards
14 * card: ISO-813, A-821PGH, A-821PGL, A-821PGL-NDA, A-822PGH, A-822PGL,
15 * driver: iso813, a821pgh, a-821pgl, a-821pglnda, a822pgh, a822pgl,
16 * card: A-823PGH, A-823PGL, A-826PG
17 * driver: a823pgh, a823pgl, a826pg
22 * Description: Advantech PCL-812/PG, PCL-813/B,
23 * ADLink ACL-8112DG/HG/PG, ACL-8113, ACL-8216,
24 * ICP DAS A-821PGH/PGL/PGL-NDA, A-822PGH/PGL, A-823PGH/PGL, A-826PG,
26 * Author: Michal Dobes <dobes@tesnet.cz>
27 * Devices: [Advantech] PCL-812 (pcl812), PCL-812PG (pcl812pg),
28 * PCL-813 (pcl813), PCL-813B (pcl813b), [ADLink] ACL-8112DG (acl8112dg),
29 * ACL-8112HG (acl8112hg), ACL-8113 (acl-8113), ACL-8216 (acl8216),
30 * [ICP] ISO-813 (iso813), A-821PGH (a821pgh), A-821PGL (a821pgl),
31 * A-821PGL-NDA (a821pclnda), A-822PGH (a822pgh), A-822PGL (a822pgl),
32 * A-823PGH (a823pgh), A-823PGL (a823pgl), A-826PG (a826pg)
33 * Updated: Mon, 06 Aug 2007 12:03:15 +0100
34 * Status: works (I hope. My board fire up under my hands
35 * and I cann't test all features.)
37 * This driver supports insn and cmd interfaces. Some boards support only insn
38 * because their hardware don't allow more (PCL-813/B, ACL-8113, ISO-813).
39 * Data transfer over DMA is supported only when you measure only one
40 * channel, this is too hardware limitation of these boards.
42 * Options for PCL-812:
44 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
45 * [2] - DMA (0=disable, 1, 3)
46 * [3] - 0=trigger source is internal 8253 with 2MHz clock
47 * 1=trigger source is external
48 * [4] - 0=A/D input range is +/-10V
49 * 1=A/D input range is +/-5V
50 * 2=A/D input range is +/-2.5V
51 * 3=A/D input range is +/-1.25V
52 * 4=A/D input range is +/-0.625V
53 * 5=A/D input range is +/-0.3125V
54 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
55 * 1=D/A outputs 0-10V (internal reference -10V)
56 * 2=D/A outputs unknown (external reference)
58 * Options for PCL-812PG, ACL-8112PG:
60 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
61 * [2] - DMA (0=disable, 1, 3)
62 * [3] - 0=trigger source is internal 8253 with 2MHz clock
63 * 1=trigger source is external
64 * [4] - 0=A/D have max +/-5V input
65 * 1=A/D have max +/-10V input
66 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
67 * 1=D/A outputs 0-10V (internal reference -10V)
68 * 2=D/A outputs unknown (external reference)
70 * Options for ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH, ACL-8216, A-826PG:
72 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
73 * [2] - DMA (0=disable, 1, 3)
74 * [3] - 0=trigger source is internal 8253 with 2MHz clock
75 * 1=trigger source is external
76 * [4] - 0=A/D channels are S.E.
77 * 1=A/D channels are DIFF
78 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
79 * 1=D/A outputs 0-10V (internal reference -10V)
80 * 2=D/A outputs unknown (external reference)
82 * Options for A-821PGL/PGH:
84 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
85 * [2] - 0=A/D channels are S.E.
86 * 1=A/D channels are DIFF
87 * [3] - 0=D/A output 0-5V (internal reference -5V)
88 * 1=D/A output 0-10V (internal reference -10V)
90 * Options for A-821PGL-NDA:
92 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
93 * [2] - 0=A/D channels are S.E.
94 * 1=A/D channels are DIFF
96 * Options for PCL-813:
99 * Options for PCL-813B:
101 * [1] - 0= bipolar inputs
104 * Options for ACL-8113, ISO-813:
106 * [1] - 0= 10V bipolar inputs
107 * 1= 10V unipolar inputs
108 * 2= 20V bipolar inputs
109 * 3= 20V unipolar inputs
112 #include <linux/module.h>
113 #include <linux/interrupt.h>
114 #include <linux/gfp.h>
115 #include <linux/delay.h>
116 #include <linux/io.h>
118 #include "../comedidev.h"
120 #include "comedi_isadma.h"
121 #include "comedi_8254.h"
126 #define PCL812_TIMER_BASE 0x00
127 #define PCL812_AI_LSB_REG 0x04
128 #define PCL812_AI_MSB_REG 0x05
129 #define PCL812_AI_MSB_DRDY BIT(4)
130 #define PCL812_AO_LSB_REG(x) (0x04 + ((x) * 2))
131 #define PCL812_AO_MSB_REG(x) (0x05 + ((x) * 2))
132 #define PCL812_DI_LSB_REG 0x06
133 #define PCL812_DI_MSB_REG 0x07
134 #define PCL812_STATUS_REG 0x08
135 #define PCL812_STATUS_DRDY BIT(5)
136 #define PCL812_RANGE_REG 0x09
137 #define PCL812_MUX_REG 0x0a
138 #define PCL812_MUX_CHAN(x) ((x) << 0)
139 #define PCL812_MUX_CS0 BIT(4)
140 #define PCL812_MUX_CS1 BIT(5)
141 #define PCL812_CTRL_REG 0x0b
142 #define PCL812_CTRL_TRIG(x) (((x) & 0x7) << 0)
143 #define PCL812_CTRL_DISABLE_TRIG PCL812_CTRL_TRIG(0)
144 #define PCL812_CTRL_SOFT_TRIG PCL812_CTRL_TRIG(1)
145 #define PCL812_CTRL_PACER_DMA_TRIG PCL812_CTRL_TRIG(2)
146 #define PCL812_CTRL_PACER_EOC_TRIG PCL812_CTRL_TRIG(6)
147 #define PCL812_SOFTTRIG_REG 0x0c
148 #define PCL812_DO_LSB_REG 0x0d
149 #define PCL812_DO_MSB_REG 0x0e
151 #define MAX_CHANLIST_LEN 256 /* length of scan list */
153 static const struct comedi_lrange range_pcl812pg_ai = {
163 static const struct comedi_lrange range_pcl812pg2_ai = {
173 static const struct comedi_lrange range812_bipolar1_25 = {
179 static const struct comedi_lrange range812_bipolar0_625 = {
185 static const struct comedi_lrange range812_bipolar0_3125 = {
191 static const struct comedi_lrange range_pcl813b_ai = {
200 static const struct comedi_lrange range_pcl813b2_ai = {
209 static const struct comedi_lrange range_iso813_1_ai = {
219 static const struct comedi_lrange range_iso813_1_2_ai = {
229 static const struct comedi_lrange range_iso813_2_ai = {
238 static const struct comedi_lrange range_iso813_2_2_ai = {
247 static const struct comedi_lrange range_acl8113_1_ai = {
256 static const struct comedi_lrange range_acl8113_1_2_ai = {
265 static const struct comedi_lrange range_acl8113_2_ai = {
273 static const struct comedi_lrange range_acl8113_2_2_ai = {
281 static const struct comedi_lrange range_acl8112dg_ai = {
295 static const struct comedi_lrange range_acl8112hg_ai = {
312 static const struct comedi_lrange range_a821pgh_ai = {
321 enum pcl812_boardtype {
322 BOARD_PCL812PG = 0, /* and ACL-8112PG */
328 BOARD_ACL8112 = 7, /* ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH */
329 BOARD_ACL8216 = 8, /* and ICP DAS A-826PG */
330 BOARD_A821 = 9, /* PGH, PGL, PGL/NDA versions */
333 struct pcl812_board {
335 enum pcl812_boardtype board_type;
338 unsigned int ai_ns_min;
339 const struct comedi_lrange *rangelist_ai;
340 unsigned int irq_bits;
341 unsigned int has_dma:1;
342 unsigned int has_16bit_ai:1;
343 unsigned int has_mpc508_mux:1;
344 unsigned int has_dio:1;
347 static const struct pcl812_board boardtypes[] = {
350 .board_type = BOARD_PCL812,
354 .rangelist_ai = &range_bipolar10,
360 .board_type = BOARD_PCL812PG,
364 .rangelist_ai = &range_pcl812pg_ai,
370 .board_type = BOARD_PCL812PG,
374 .rangelist_ai = &range_pcl812pg_ai,
380 .board_type = BOARD_ACL8112,
381 .n_aichan = 16, /* 8 differential */
384 .rangelist_ai = &range_acl8112dg_ai,
391 .board_type = BOARD_ACL8112,
392 .n_aichan = 16, /* 8 differential */
395 .rangelist_ai = &range_acl8112hg_ai,
402 .board_type = BOARD_A821,
403 .n_aichan = 16, /* 8 differential */
406 .rangelist_ai = &range_pcl813b_ai,
410 .name = "a821pglnda",
411 .board_type = BOARD_A821,
412 .n_aichan = 16, /* 8 differential */
414 .rangelist_ai = &range_pcl813b_ai,
418 .board_type = BOARD_A821,
419 .n_aichan = 16, /* 8 differential */
422 .rangelist_ai = &range_a821pgh_ai,
427 .board_type = BOARD_ACL8112,
428 .n_aichan = 16, /* 8 differential */
431 .rangelist_ai = &range_acl8112dg_ai,
437 .board_type = BOARD_ACL8112,
438 .n_aichan = 16, /* 8 differential */
441 .rangelist_ai = &range_acl8112hg_ai,
447 .board_type = BOARD_ACL8112,
448 .n_aichan = 16, /* 8 differential */
451 .rangelist_ai = &range_acl8112dg_ai,
457 .board_type = BOARD_ACL8112,
458 .n_aichan = 16, /* 8 differential */
461 .rangelist_ai = &range_acl8112hg_ai,
467 .board_type = BOARD_PCL813,
469 .rangelist_ai = &range_pcl813b_ai,
472 .board_type = BOARD_PCL813B,
474 .rangelist_ai = &range_pcl813b_ai,
477 .board_type = BOARD_ACL8113,
479 .rangelist_ai = &range_acl8113_1_ai,
482 .board_type = BOARD_ISO813,
484 .rangelist_ai = &range_iso813_1_ai,
487 .board_type = BOARD_ACL8216,
488 .n_aichan = 16, /* 8 differential */
491 .rangelist_ai = &range_pcl813b2_ai,
499 .board_type = BOARD_ACL8216,
500 .n_aichan = 16, /* 8 differential */
503 .rangelist_ai = &range_pcl813b2_ai,
511 struct pcl812_private {
512 struct comedi_isadma *dma;
513 unsigned char range_correction; /* =1 we must add 1 to range number */
514 unsigned int last_ai_chanspec;
515 unsigned char mode_reg_int; /* stored INT number for some cards */
516 unsigned int ai_poll_ptr; /* how many samples transfer poll */
517 unsigned int max_812_ai_mode0_rangewait; /* settling time for gain */
518 unsigned int use_diff:1;
519 unsigned int use_mpc508:1;
520 unsigned int use_ext_trg:1;
521 unsigned int ai_dma:1;
522 unsigned int ai_eos:1;
525 static void pcl812_ai_setup_dma(struct comedi_device *dev,
526 struct comedi_subdevice *s,
527 unsigned int unread_samples)
529 struct pcl812_private *devpriv = dev->private;
530 struct comedi_isadma *dma = devpriv->dma;
531 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
533 unsigned int max_samples;
534 unsigned int nsamples;
536 comedi_isadma_disable(dma->chan);
538 /* if using EOS, adapt DMA buffer to one scan */
539 bytes = devpriv->ai_eos ? comedi_bytes_per_scan(s) : desc->maxsize;
540 max_samples = comedi_bytes_to_samples(s, bytes);
543 * Determine dma size based on the buffer size plus the number of
544 * unread samples and the number of samples remaining in the command.
546 nsamples = comedi_nsamples_left(s, max_samples + unread_samples);
547 if (nsamples > unread_samples) {
548 nsamples -= unread_samples;
549 desc->size = comedi_samples_to_bytes(s, nsamples);
550 comedi_isadma_program(desc);
554 static void pcl812_ai_set_chan_range(struct comedi_device *dev,
555 unsigned int chanspec, char wait)
557 struct pcl812_private *devpriv = dev->private;
558 unsigned int chan = CR_CHAN(chanspec);
559 unsigned int range = CR_RANGE(chanspec);
560 unsigned int mux = 0;
562 if (chanspec == devpriv->last_ai_chanspec)
565 devpriv->last_ai_chanspec = chanspec;
567 if (devpriv->use_mpc508) {
568 if (devpriv->use_diff) {
569 mux |= PCL812_MUX_CS0 | PCL812_MUX_CS1;
572 mux |= PCL812_MUX_CS0;
574 mux |= PCL812_MUX_CS1;
578 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG);
579 outb(range + devpriv->range_correction, dev->iobase + PCL812_RANGE_REG);
583 * XXX this depends on selected range and can be very long for
584 * some high gain ranges!
586 udelay(devpriv->max_812_ai_mode0_rangewait);
589 static void pcl812_ai_clear_eoc(struct comedi_device *dev)
591 /* writing any value clears the interrupt request */
592 outb(0, dev->iobase + PCL812_STATUS_REG);
595 static void pcl812_ai_soft_trig(struct comedi_device *dev)
597 /* writing any value triggers a software conversion */
598 outb(255, dev->iobase + PCL812_SOFTTRIG_REG);
601 static unsigned int pcl812_ai_get_sample(struct comedi_device *dev,
602 struct comedi_subdevice *s)
606 val = inb(dev->iobase + PCL812_AI_MSB_REG) << 8;
607 val |= inb(dev->iobase + PCL812_AI_LSB_REG);
609 return val & s->maxdata;
612 static int pcl812_ai_eoc(struct comedi_device *dev,
613 struct comedi_subdevice *s,
614 struct comedi_insn *insn,
615 unsigned long context)
619 if (s->maxdata > 0x0fff) {
620 status = inb(dev->iobase + PCL812_STATUS_REG);
621 if ((status & PCL812_STATUS_DRDY) == 0)
624 status = inb(dev->iobase + PCL812_AI_MSB_REG);
625 if ((status & PCL812_AI_MSB_DRDY) == 0)
631 static int pcl812_ai_cmdtest(struct comedi_device *dev,
632 struct comedi_subdevice *s, struct comedi_cmd *cmd)
634 const struct pcl812_board *board = dev->board_ptr;
635 struct pcl812_private *devpriv = dev->private;
639 /* Step 1 : check if triggers are trivially valid */
641 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
642 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
644 if (devpriv->use_ext_trg)
648 err |= comedi_check_trigger_src(&cmd->convert_src, flags);
650 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
651 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
656 /* Step 2a : make sure trigger sources are unique */
658 err |= comedi_check_trigger_is_unique(cmd->stop_src);
660 /* Step 2b : and mutually compatible */
665 /* Step 3: check if arguments are trivially valid */
667 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
668 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
670 if (cmd->convert_src == TRIG_TIMER) {
671 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
673 } else { /* TRIG_EXT */
674 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
677 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
678 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
681 if (cmd->stop_src == TRIG_COUNT)
682 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
684 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
689 /* step 4: fix up any arguments */
691 if (cmd->convert_src == TRIG_TIMER) {
692 unsigned int arg = cmd->convert_arg;
694 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
695 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
704 static int pcl812_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
706 struct pcl812_private *devpriv = dev->private;
707 struct comedi_isadma *dma = devpriv->dma;
708 struct comedi_cmd *cmd = &s->async->cmd;
709 unsigned int ctrl = 0;
712 pcl812_ai_set_chan_range(dev, cmd->chanlist[0], 1);
714 if (dma) { /* check if we can use DMA transfer */
716 for (i = 1; i < cmd->chanlist_len; i++)
717 if (cmd->chanlist[0] != cmd->chanlist[i]) {
718 /* we cann't use DMA :-( */
726 devpriv->ai_poll_ptr = 0;
728 /* don't we want wake up every scan? */
729 if (cmd->flags & CMDF_WAKE_EOS) {
732 /* DMA is useless for this situation */
733 if (cmd->chanlist_len == 1)
737 if (devpriv->ai_dma) {
738 /* setup and enable dma for the first buffer */
740 pcl812_ai_setup_dma(dev, s, 0);
743 switch (cmd->convert_src) {
745 comedi_8254_update_divisors(dev->pacer);
746 comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
751 ctrl |= PCL812_CTRL_PACER_DMA_TRIG;
753 ctrl |= PCL812_CTRL_PACER_EOC_TRIG;
754 outb(devpriv->mode_reg_int | ctrl, dev->iobase + PCL812_CTRL_REG);
759 static bool pcl812_ai_next_chan(struct comedi_device *dev,
760 struct comedi_subdevice *s)
762 struct comedi_cmd *cmd = &s->async->cmd;
764 if (cmd->stop_src == TRIG_COUNT &&
765 s->async->scans_done >= cmd->stop_arg) {
766 s->async->events |= COMEDI_CB_EOA;
773 static void pcl812_handle_eoc(struct comedi_device *dev,
774 struct comedi_subdevice *s)
776 struct comedi_cmd *cmd = &s->async->cmd;
777 unsigned int chan = s->async->cur_chan;
778 unsigned int next_chan;
781 if (pcl812_ai_eoc(dev, s, NULL, 0)) {
782 dev_dbg(dev->class_dev, "A/D cmd IRQ without DRDY!\n");
783 s->async->events |= COMEDI_CB_ERROR;
787 val = pcl812_ai_get_sample(dev, s);
788 comedi_buf_write_samples(s, &val, 1);
790 /* Set up next channel. Added by abbotti 2010-01-20, but untested. */
791 next_chan = s->async->cur_chan;
792 if (cmd->chanlist[chan] != cmd->chanlist[next_chan])
793 pcl812_ai_set_chan_range(dev, cmd->chanlist[next_chan], 0);
795 pcl812_ai_next_chan(dev, s);
798 static void transfer_from_dma_buf(struct comedi_device *dev,
799 struct comedi_subdevice *s,
801 unsigned int bufptr, unsigned int len)
806 for (i = len; i; i--) {
808 comedi_buf_write_samples(s, &val, 1);
810 if (!pcl812_ai_next_chan(dev, s))
815 static void pcl812_handle_dma(struct comedi_device *dev,
816 struct comedi_subdevice *s)
818 struct pcl812_private *devpriv = dev->private;
819 struct comedi_isadma *dma = devpriv->dma;
820 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
821 unsigned int nsamples;
824 nsamples = comedi_bytes_to_samples(s, desc->size) -
825 devpriv->ai_poll_ptr;
826 bufptr = devpriv->ai_poll_ptr;
827 devpriv->ai_poll_ptr = 0;
829 /* restart dma with the next buffer */
830 dma->cur_dma = 1 - dma->cur_dma;
831 pcl812_ai_setup_dma(dev, s, nsamples);
833 transfer_from_dma_buf(dev, s, desc->virt_addr, bufptr, nsamples);
836 static irqreturn_t pcl812_interrupt(int irq, void *d)
838 struct comedi_device *dev = d;
839 struct comedi_subdevice *s = dev->read_subdev;
840 struct pcl812_private *devpriv = dev->private;
842 if (!dev->attached) {
843 pcl812_ai_clear_eoc(dev);
848 pcl812_handle_dma(dev, s);
850 pcl812_handle_eoc(dev, s);
852 pcl812_ai_clear_eoc(dev);
854 comedi_handle_events(dev, s);
858 static int pcl812_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
860 struct pcl812_private *devpriv = dev->private;
861 struct comedi_isadma *dma = devpriv->dma;
862 struct comedi_isadma_desc *desc;
867 /* poll is valid only for DMA transfer */
868 if (!devpriv->ai_dma)
871 spin_lock_irqsave(&dev->spinlock, flags);
873 poll = comedi_isadma_poll(dma);
874 poll = comedi_bytes_to_samples(s, poll);
875 if (poll > devpriv->ai_poll_ptr) {
876 desc = &dma->desc[dma->cur_dma];
877 transfer_from_dma_buf(dev, s, desc->virt_addr,
878 devpriv->ai_poll_ptr,
879 poll - devpriv->ai_poll_ptr);
880 /* new buffer position */
881 devpriv->ai_poll_ptr = poll;
883 ret = comedi_buf_n_bytes_ready(s);
889 spin_unlock_irqrestore(&dev->spinlock, flags);
894 static int pcl812_ai_cancel(struct comedi_device *dev,
895 struct comedi_subdevice *s)
897 struct pcl812_private *devpriv = dev->private;
900 comedi_isadma_disable(devpriv->dma->chan);
902 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
903 dev->iobase + PCL812_CTRL_REG);
904 comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
905 pcl812_ai_clear_eoc(dev);
909 static int pcl812_ai_insn_read(struct comedi_device *dev,
910 struct comedi_subdevice *s,
911 struct comedi_insn *insn,
914 struct pcl812_private *devpriv = dev->private;
918 outb(devpriv->mode_reg_int | PCL812_CTRL_SOFT_TRIG,
919 dev->iobase + PCL812_CTRL_REG);
921 pcl812_ai_set_chan_range(dev, insn->chanspec, 1);
923 for (i = 0; i < insn->n; i++) {
924 pcl812_ai_clear_eoc(dev);
925 pcl812_ai_soft_trig(dev);
927 ret = comedi_timeout(dev, s, insn, pcl812_ai_eoc, 0);
931 data[i] = pcl812_ai_get_sample(dev, s);
933 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
934 dev->iobase + PCL812_CTRL_REG);
935 pcl812_ai_clear_eoc(dev);
937 return ret ? ret : insn->n;
940 static int pcl812_ao_insn_write(struct comedi_device *dev,
941 struct comedi_subdevice *s,
942 struct comedi_insn *insn,
945 unsigned int chan = CR_CHAN(insn->chanspec);
946 unsigned int val = s->readback[chan];
949 for (i = 0; i < insn->n; i++) {
951 outb(val & 0xff, dev->iobase + PCL812_AO_LSB_REG(chan));
952 outb((val >> 8) & 0x0f, dev->iobase + PCL812_AO_MSB_REG(chan));
954 s->readback[chan] = val;
959 static int pcl812_di_insn_bits(struct comedi_device *dev,
960 struct comedi_subdevice *s,
961 struct comedi_insn *insn,
964 data[1] = inb(dev->iobase + PCL812_DI_LSB_REG) |
965 (inb(dev->iobase + PCL812_DI_MSB_REG) << 8);
970 static int pcl812_do_insn_bits(struct comedi_device *dev,
971 struct comedi_subdevice *s,
972 struct comedi_insn *insn,
975 if (comedi_dio_update_state(s, data)) {
976 outb(s->state & 0xff, dev->iobase + PCL812_DO_LSB_REG);
977 outb((s->state >> 8), dev->iobase + PCL812_DO_MSB_REG);
985 static void pcl812_reset(struct comedi_device *dev)
987 const struct pcl812_board *board = dev->board_ptr;
988 struct pcl812_private *devpriv = dev->private;
991 /* disable analog input trigger */
992 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
993 dev->iobase + PCL812_CTRL_REG);
994 pcl812_ai_clear_eoc(dev);
997 * Invalidate last_ai_chanspec then set analog input to
998 * known channel/range.
1000 devpriv->last_ai_chanspec = CR_PACK(16, 0, 0);
1001 pcl812_ai_set_chan_range(dev, CR_PACK(0, 0, 0), 0);
1003 /* set analog output channels to 0V */
1004 for (chan = 0; chan < board->n_aochan; chan++) {
1005 outb(0, dev->iobase + PCL812_AO_LSB_REG(chan));
1006 outb(0, dev->iobase + PCL812_AO_MSB_REG(chan));
1009 /* set all digital outputs low */
1010 if (board->has_dio) {
1011 outb(0, dev->iobase + PCL812_DO_MSB_REG);
1012 outb(0, dev->iobase + PCL812_DO_LSB_REG);
1016 static void pcl812_set_ai_range_table(struct comedi_device *dev,
1017 struct comedi_subdevice *s,
1018 struct comedi_devconfig *it)
1020 const struct pcl812_board *board = dev->board_ptr;
1021 struct pcl812_private *devpriv = dev->private;
1023 switch (board->board_type) {
1024 case BOARD_PCL812PG:
1025 if (it->options[4] == 1)
1026 s->range_table = &range_pcl812pg2_ai;
1028 s->range_table = board->rangelist_ai;
1031 switch (it->options[4]) {
1033 s->range_table = &range_bipolar10;
1036 s->range_table = &range_bipolar5;
1039 s->range_table = &range_bipolar2_5;
1042 s->range_table = &range812_bipolar1_25;
1045 s->range_table = &range812_bipolar0_625;
1048 s->range_table = &range812_bipolar0_3125;
1051 s->range_table = &range_bipolar10;
1056 if (it->options[1] == 1)
1057 s->range_table = &range_pcl813b2_ai;
1059 s->range_table = board->rangelist_ai;
1062 switch (it->options[1]) {
1064 s->range_table = &range_iso813_1_ai;
1067 s->range_table = &range_iso813_1_2_ai;
1070 s->range_table = &range_iso813_2_ai;
1071 devpriv->range_correction = 1;
1074 s->range_table = &range_iso813_2_2_ai;
1075 devpriv->range_correction = 1;
1078 s->range_table = &range_iso813_1_ai;
1083 switch (it->options[1]) {
1085 s->range_table = &range_acl8113_1_ai;
1088 s->range_table = &range_acl8113_1_2_ai;
1091 s->range_table = &range_acl8113_2_ai;
1092 devpriv->range_correction = 1;
1095 s->range_table = &range_acl8113_2_2_ai;
1096 devpriv->range_correction = 1;
1099 s->range_table = &range_acl8113_1_ai;
1104 s->range_table = board->rangelist_ai;
1109 static void pcl812_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
1111 struct pcl812_private *devpriv = dev->private;
1113 /* only DMA channels 3 and 1 are valid */
1114 if (!(dma_chan == 3 || dma_chan == 1))
1117 /* DMA uses two 8K buffers */
1118 devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
1119 PAGE_SIZE * 2, COMEDI_ISADMA_READ);
1122 static void pcl812_free_dma(struct comedi_device *dev)
1124 struct pcl812_private *devpriv = dev->private;
1127 comedi_isadma_free(devpriv->dma);
1130 static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1132 const struct pcl812_board *board = dev->board_ptr;
1133 struct pcl812_private *devpriv;
1134 struct comedi_subdevice *s;
1139 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1143 ret = comedi_request_region(dev, it->options[0], 0x10);
1147 if (board->irq_bits) {
1148 dev->pacer = comedi_8254_init(dev->iobase + PCL812_TIMER_BASE,
1149 I8254_OSC_BASE_2MHZ,
1154 if ((1 << it->options[1]) & board->irq_bits) {
1155 ret = request_irq(it->options[1], pcl812_interrupt, 0,
1156 dev->board_name, dev);
1158 dev->irq = it->options[1];
1162 /* we need an IRQ to do DMA on channel 3 or 1 */
1163 if (dev->irq && board->has_dma)
1164 pcl812_alloc_dma(dev, it->options[2]);
1166 /* differential analog inputs? */
1167 switch (board->board_type) {
1169 if (it->options[2] == 1)
1170 devpriv->use_diff = 1;
1174 if (it->options[4] == 1)
1175 devpriv->use_diff = 1;
1181 n_subdevices = 1; /* all boardtypes have analog inputs */
1182 if (board->n_aochan > 0)
1187 ret = comedi_alloc_subdevices(dev, n_subdevices);
1193 /* Analog Input subdevice */
1194 s = &dev->subdevices[subdev];
1195 s->type = COMEDI_SUBD_AI;
1196 s->subdev_flags = SDF_READABLE;
1197 if (devpriv->use_diff) {
1198 s->subdev_flags |= SDF_DIFF;
1199 s->n_chan = board->n_aichan / 2;
1201 s->subdev_flags |= SDF_GROUND;
1202 s->n_chan = board->n_aichan;
1204 s->maxdata = board->has_16bit_ai ? 0xffff : 0x0fff;
1206 pcl812_set_ai_range_table(dev, s, it);
1208 s->insn_read = pcl812_ai_insn_read;
1211 dev->read_subdev = s;
1212 s->subdev_flags |= SDF_CMD_READ;
1213 s->len_chanlist = MAX_CHANLIST_LEN;
1214 s->do_cmdtest = pcl812_ai_cmdtest;
1215 s->do_cmd = pcl812_ai_cmd;
1216 s->poll = pcl812_ai_poll;
1217 s->cancel = pcl812_ai_cancel;
1220 devpriv->use_mpc508 = board->has_mpc508_mux;
1225 if (board->n_aochan > 0) {
1226 s = &dev->subdevices[subdev];
1227 s->type = COMEDI_SUBD_AO;
1228 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
1229 s->n_chan = board->n_aochan;
1231 switch (board->board_type) {
1233 if (it->options[3] == 1)
1234 s->range_table = &range_unipolar10;
1236 s->range_table = &range_unipolar5;
1240 case BOARD_PCL812PG:
1242 switch (it->options[5]) {
1244 s->range_table = &range_unipolar10;
1247 s->range_table = &range_unknown;
1250 s->range_table = &range_unipolar5;
1255 s->range_table = &range_unipolar5;
1258 s->insn_write = pcl812_ao_insn_write;
1260 ret = comedi_alloc_subdev_readback(s);
1267 if (board->has_dio) {
1268 /* Digital Input subdevice */
1269 s = &dev->subdevices[subdev];
1270 s->type = COMEDI_SUBD_DI;
1271 s->subdev_flags = SDF_READABLE;
1274 s->range_table = &range_digital;
1275 s->insn_bits = pcl812_di_insn_bits;
1278 /* Digital Output subdevice */
1279 s = &dev->subdevices[subdev];
1280 s->type = COMEDI_SUBD_DO;
1281 s->subdev_flags = SDF_WRITABLE;
1284 s->range_table = &range_digital;
1285 s->insn_bits = pcl812_do_insn_bits;
1289 switch (board->board_type) {
1291 case BOARD_PCL812PG:
1294 devpriv->max_812_ai_mode0_rangewait = 1;
1295 if (it->options[3] > 0)
1296 /* we use external trigger */
1297 devpriv->use_ext_trg = 1;
1300 devpriv->max_812_ai_mode0_rangewait = 1;
1301 devpriv->mode_reg_int = (dev->irq << 4) & 0xf0;
1307 /* maybe there must by greatest timeout */
1308 devpriv->max_812_ai_mode0_rangewait = 5;
1317 static void pcl812_detach(struct comedi_device *dev)
1319 pcl812_free_dma(dev);
1320 comedi_legacy_detach(dev);
1323 static struct comedi_driver pcl812_driver = {
1324 .driver_name = "pcl812",
1325 .module = THIS_MODULE,
1326 .attach = pcl812_attach,
1327 .detach = pcl812_detach,
1328 .board_name = &boardtypes[0].name,
1329 .num_names = ARRAY_SIZE(boardtypes),
1330 .offset = sizeof(struct pcl812_board),
1332 module_comedi_driver(pcl812_driver);
1334 MODULE_AUTHOR("Comedi https://www.comedi.org");
1335 MODULE_DESCRIPTION("Comedi low-level driver");
1336 MODULE_LICENSE("GPL");