1 // SPDX-License-Identifier: GPL-2.0+
3 * comedi/drivers/ni_labpc_common.c
5 * Common support code for "ni_labpc", "ni_labpc_pci" and "ni_labpc_cs".
7 * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
10 #include <linux/module.h>
11 #include <linux/interrupt.h>
13 #include <linux/delay.h>
14 #include <linux/slab.h>
16 #include "../comedidev.h"
18 #include "comedi_8254.h"
21 #include "ni_labpc_regs.h"
22 #include "ni_labpc_isadma.h"
26 MODE_SINGLE_CHAN_INTERVAL,
31 static const struct comedi_lrange range_labpc_plus_ai = {
52 static const struct comedi_lrange range_labpc_1200_ai = {
71 static const struct comedi_lrange range_labpc_ao = {
79 * functions that do inb/outb and readb/writeb so we can use
80 * function pointers to decide which to use
82 static unsigned int labpc_inb(struct comedi_device *dev, unsigned long reg)
84 return inb(dev->iobase + reg);
87 static void labpc_outb(struct comedi_device *dev,
88 unsigned int byte, unsigned long reg)
90 outb(byte, dev->iobase + reg);
93 static unsigned int labpc_readb(struct comedi_device *dev, unsigned long reg)
95 return readb(dev->mmio + reg);
98 static void labpc_writeb(struct comedi_device *dev,
99 unsigned int byte, unsigned long reg)
101 writeb(byte, dev->mmio + reg);
104 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
106 struct labpc_private *devpriv = dev->private;
109 spin_lock_irqsave(&dev->spinlock, flags);
110 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
111 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
112 spin_unlock_irqrestore(&dev->spinlock, flags);
115 devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
120 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
126 const struct labpc_boardinfo *board = dev->board_ptr;
127 struct labpc_private *devpriv = dev->private;
129 if (board->is_labpc1200) {
131 * The LabPC-1200 boards do not have a gain
132 * of '0x10'. Skip the range values that would
133 * result in this gain.
135 range += (range > 0) + (range > 7);
138 /* munge channel bits for differential/scan disabled mode */
139 if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
142 devpriv->cmd1 = CMD1_MA(chan);
143 devpriv->cmd1 |= CMD1_GAIN(range);
145 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
148 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
149 struct comedi_subdevice *s,
151 enum transfer_type xfer,
156 const struct labpc_boardinfo *board = dev->board_ptr;
157 struct labpc_private *devpriv = dev->private;
159 if (!board->is_labpc1200)
162 /* reference inputs to ground or common? */
163 if (aref != AREF_GROUND)
164 devpriv->cmd6 |= CMD6_NRSE;
166 devpriv->cmd6 &= ~CMD6_NRSE;
168 /* bipolar or unipolar range? */
169 if (comedi_range_is_unipolar(s, range))
170 devpriv->cmd6 |= CMD6_ADCUNI;
172 devpriv->cmd6 &= ~CMD6_ADCUNI;
174 /* interrupt on fifo half full? */
175 if (xfer == fifo_half_full_transfer)
176 devpriv->cmd6 |= CMD6_HFINTEN;
178 devpriv->cmd6 &= ~CMD6_HFINTEN;
180 /* enable interrupt on counter a1 terminal count? */
182 devpriv->cmd6 |= CMD6_DQINTEN;
184 devpriv->cmd6 &= ~CMD6_DQINTEN;
186 /* are we scanning up or down through channels? */
187 if (mode == MODE_MULT_CHAN_UP)
188 devpriv->cmd6 |= CMD6_SCANUP;
190 devpriv->cmd6 &= ~CMD6_SCANUP;
192 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
195 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
197 struct labpc_private *devpriv = dev->private;
198 unsigned int lsb = devpriv->read_byte(dev, ADC_FIFO_REG);
199 unsigned int msb = devpriv->read_byte(dev, ADC_FIFO_REG);
201 return (msb << 8) | lsb;
204 static void labpc_clear_adc_fifo(struct comedi_device *dev)
206 struct labpc_private *devpriv = dev->private;
208 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
209 labpc_read_adc_fifo(dev);
212 static int labpc_ai_eoc(struct comedi_device *dev,
213 struct comedi_subdevice *s,
214 struct comedi_insn *insn,
215 unsigned long context)
217 struct labpc_private *devpriv = dev->private;
219 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
220 if (devpriv->stat1 & STAT1_DAVAIL)
225 static int labpc_ai_insn_read(struct comedi_device *dev,
226 struct comedi_subdevice *s,
227 struct comedi_insn *insn,
230 struct labpc_private *devpriv = dev->private;
231 unsigned int chan = CR_CHAN(insn->chanspec);
232 unsigned int range = CR_RANGE(insn->chanspec);
233 unsigned int aref = CR_AREF(insn->chanspec);
237 /* disable timed conversions, interrupt generation and dma */
238 labpc_cancel(dev, s);
240 labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
242 labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
245 /* setup cmd4 register */
247 devpriv->cmd4 |= CMD4_ECLKRCV;
248 /* single-ended/differential */
249 if (aref == AREF_DIFF)
250 devpriv->cmd4 |= CMD4_SEDIFF;
251 devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
253 /* initialize pacer counter to prevent any problems */
254 comedi_8254_set_mode(devpriv->counter, 0, I8254_MODE2 | I8254_BINARY);
256 labpc_clear_adc_fifo(dev);
258 for (i = 0; i < insn->n; i++) {
259 /* trigger conversion */
260 devpriv->write_byte(dev, 0x1, ADC_START_CONVERT_REG);
262 ret = comedi_timeout(dev, s, insn, labpc_ai_eoc, 0);
266 data[i] = labpc_read_adc_fifo(dev);
272 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
275 if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
281 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
284 if (cmd->convert_src != TRIG_TIMER)
287 if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
288 return cmd->scan_begin_arg;
290 return cmd->convert_arg;
293 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
294 enum scan_mode mode, unsigned int ns)
296 if (cmd->convert_src != TRIG_TIMER)
299 if (mode == MODE_SINGLE_CHAN &&
300 cmd->scan_begin_src == TRIG_TIMER) {
301 cmd->scan_begin_arg = ns;
302 if (cmd->convert_arg > cmd->scan_begin_arg)
303 cmd->convert_arg = cmd->scan_begin_arg;
305 cmd->convert_arg = ns;
309 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
312 if (cmd->scan_begin_src != TRIG_TIMER)
315 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
318 return cmd->scan_begin_arg;
321 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
322 enum scan_mode mode, unsigned int ns)
324 if (cmd->scan_begin_src != TRIG_TIMER)
327 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
330 cmd->scan_begin_arg = ns;
333 /* figures out what counter values to use based on command */
334 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
337 struct comedi_8254 *pacer = dev->pacer;
338 unsigned int convert_period = labpc_ai_convert_period(cmd, mode);
339 unsigned int scan_period = labpc_ai_scan_period(cmd, mode);
340 unsigned int base_period;
343 * If both convert and scan triggers are TRIG_TIMER, then they
344 * both rely on counter b0. If only one TRIG_TIMER is used, we
345 * can use the generic cascaded timing functions.
347 if (convert_period && scan_period) {
349 * pick the lowest divisor value we can (for maximum input
350 * clock speed on convert and scan counters)
352 pacer->next_div1 = (scan_period - 1) /
353 (pacer->osc_base * I8254_MAX_COUNT) + 1;
355 comedi_check_trigger_arg_min(&pacer->next_div1, 2);
356 comedi_check_trigger_arg_max(&pacer->next_div1,
359 base_period = pacer->osc_base * pacer->next_div1;
361 /* set a0 for conversion frequency and b1 for scan frequency */
362 switch (cmd->flags & CMDF_ROUND_MASK) {
364 case CMDF_ROUND_NEAREST:
365 pacer->next_div = DIV_ROUND_CLOSEST(convert_period,
367 pacer->next_div2 = DIV_ROUND_CLOSEST(scan_period,
371 pacer->next_div = DIV_ROUND_UP(convert_period,
373 pacer->next_div2 = DIV_ROUND_UP(scan_period,
376 case CMDF_ROUND_DOWN:
377 pacer->next_div = convert_period / base_period;
378 pacer->next_div2 = scan_period / base_period;
381 /* make sure a0 and b1 values are acceptable */
382 comedi_check_trigger_arg_min(&pacer->next_div, 2);
383 comedi_check_trigger_arg_max(&pacer->next_div, I8254_MAX_COUNT);
384 comedi_check_trigger_arg_min(&pacer->next_div2, 2);
385 comedi_check_trigger_arg_max(&pacer->next_div2,
388 /* write corrected timings to command */
389 labpc_set_ai_convert_period(cmd, mode,
390 base_period * pacer->next_div);
391 labpc_set_ai_scan_period(cmd, mode,
392 base_period * pacer->next_div2);
393 } else if (scan_period) {
395 * calculate cascaded counter values
396 * that give desired scan timing
397 * (pacer->next_div2 / pacer->next_div1)
399 comedi_8254_cascade_ns_to_timer(pacer, &scan_period,
401 labpc_set_ai_scan_period(cmd, mode, scan_period);
402 } else if (convert_period) {
404 * calculate cascaded counter values
405 * that give desired conversion timing
406 * (pacer->next_div / pacer->next_div1)
408 comedi_8254_cascade_ns_to_timer(pacer, &convert_period,
410 /* transfer div2 value so correct timer gets updated */
411 pacer->next_div = pacer->next_div2;
412 labpc_set_ai_convert_period(cmd, mode, convert_period);
416 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
421 if (cmd->chanlist_len == 1)
422 return MODE_SINGLE_CHAN;
424 /* chanlist may be NULL during cmdtest */
426 return MODE_MULT_CHAN_UP;
428 chan0 = CR_CHAN(cmd->chanlist[0]);
429 chan1 = CR_CHAN(cmd->chanlist[1]);
432 return MODE_MULT_CHAN_UP;
435 return MODE_MULT_CHAN_DOWN;
437 return MODE_SINGLE_CHAN_INTERVAL;
440 static int labpc_ai_check_chanlist(struct comedi_device *dev,
441 struct comedi_subdevice *s,
442 struct comedi_cmd *cmd)
444 enum scan_mode mode = labpc_ai_scan_mode(cmd);
445 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
446 unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
447 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
450 for (i = 0; i < cmd->chanlist_len; i++) {
451 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
452 unsigned int range = CR_RANGE(cmd->chanlist[i]);
453 unsigned int aref = CR_AREF(cmd->chanlist[i]);
456 case MODE_SINGLE_CHAN:
458 case MODE_SINGLE_CHAN_INTERVAL:
460 dev_dbg(dev->class_dev,
461 "channel scanning order specified in chanlist is not supported by hardware\n");
465 case MODE_MULT_CHAN_UP:
467 dev_dbg(dev->class_dev,
468 "channel scanning order specified in chanlist is not supported by hardware\n");
472 case MODE_MULT_CHAN_DOWN:
473 if (chan != (cmd->chanlist_len - i - 1)) {
474 dev_dbg(dev->class_dev,
475 "channel scanning order specified in chanlist is not supported by hardware\n");
481 if (range != range0) {
482 dev_dbg(dev->class_dev,
483 "entries in chanlist must all have the same range\n");
488 dev_dbg(dev->class_dev,
489 "entries in chanlist must all have the same reference\n");
497 static int labpc_ai_cmdtest(struct comedi_device *dev,
498 struct comedi_subdevice *s, struct comedi_cmd *cmd)
500 const struct labpc_boardinfo *board = dev->board_ptr;
503 unsigned int stop_mask;
506 /* Step 1 : check if triggers are trivially valid */
508 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
509 err |= comedi_check_trigger_src(&cmd->scan_begin_src,
510 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
511 err |= comedi_check_trigger_src(&cmd->convert_src,
512 TRIG_TIMER | TRIG_EXT);
513 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
515 stop_mask = TRIG_COUNT | TRIG_NONE;
516 if (board->is_labpc1200)
517 stop_mask |= TRIG_EXT;
518 err |= comedi_check_trigger_src(&cmd->stop_src, stop_mask);
523 /* Step 2a : make sure trigger sources are unique */
525 err |= comedi_check_trigger_is_unique(cmd->start_src);
526 err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
527 err |= comedi_check_trigger_is_unique(cmd->convert_src);
528 err |= comedi_check_trigger_is_unique(cmd->stop_src);
530 /* Step 2b : and mutually compatible */
532 /* can't have external stop and start triggers at once */
533 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
539 /* Step 3: check if arguments are trivially valid */
541 switch (cmd->start_src) {
543 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
546 /* start_arg value is ignored */
550 if (!cmd->chanlist_len)
552 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
555 if (cmd->convert_src == TRIG_TIMER) {
556 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
560 /* make sure scan timing is not too fast */
561 if (cmd->scan_begin_src == TRIG_TIMER) {
562 if (cmd->convert_src == TRIG_TIMER) {
563 err |= comedi_check_trigger_arg_min(
564 &cmd->scan_begin_arg,
565 cmd->convert_arg * cmd->chanlist_len);
567 err |= comedi_check_trigger_arg_min(
568 &cmd->scan_begin_arg,
569 board->ai_speed * cmd->chanlist_len);
572 switch (cmd->stop_src) {
574 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
577 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
580 * TRIG_EXT doesn't care since it doesn't
581 * trigger off a numbered channel
590 /* step 4: fix up any arguments */
592 tmp = cmd->convert_arg;
593 tmp2 = cmd->scan_begin_arg;
594 mode = labpc_ai_scan_mode(cmd);
595 labpc_adc_timing(dev, cmd, mode);
596 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
602 /* Step 5: check channel list if it exists */
603 if (cmd->chanlist && cmd->chanlist_len > 0)
604 err |= labpc_ai_check_chanlist(dev, s, cmd);
612 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
614 const struct labpc_boardinfo *board = dev->board_ptr;
615 struct labpc_private *devpriv = dev->private;
616 struct comedi_async *async = s->async;
617 struct comedi_cmd *cmd = &async->cmd;
618 enum scan_mode mode = labpc_ai_scan_mode(cmd);
619 unsigned int chanspec = (mode == MODE_MULT_CHAN_UP) ?
620 cmd->chanlist[cmd->chanlist_len - 1] :
622 unsigned int chan = CR_CHAN(chanspec);
623 unsigned int range = CR_RANGE(chanspec);
624 unsigned int aref = CR_AREF(chanspec);
625 enum transfer_type xfer;
628 /* make sure board is disabled before setting up acquisition */
629 labpc_cancel(dev, s);
631 /* initialize software conversion count */
632 if (cmd->stop_src == TRIG_COUNT)
633 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
635 /* setup hardware conversion counter */
636 if (cmd->stop_src == TRIG_EXT) {
638 * load counter a1 with count of 3
639 * (pc+ manual says this is minimum allowed) using mode 0
641 comedi_8254_load(devpriv->counter, 1,
642 3, I8254_MODE0 | I8254_BINARY);
644 /* just put counter a1 in mode 0 to set its output low */
645 comedi_8254_set_mode(devpriv->counter, 1,
646 I8254_MODE0 | I8254_BINARY);
649 /* figure out what method we will use to transfer data */
651 (cmd->flags & (CMDF_WAKE_EOS | CMDF_PRIORITY)) == 0) {
653 * dma unsafe at RT priority,
654 * and too much setup time for CMDF_WAKE_EOS
656 xfer = isa_dma_transfer;
657 } else if (board->is_labpc1200 &&
658 (cmd->flags & CMDF_WAKE_EOS) == 0 &&
659 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
661 * pc-plus has no fifo-half full interrupt
662 * wake-end-of-scan should interrupt on fifo not empty
663 * make sure we are taking more than just a few points
665 xfer = fifo_half_full_transfer;
667 xfer = fifo_not_empty_transfer;
669 devpriv->current_transfer = xfer;
671 labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
673 labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
674 (cmd->stop_src == TRIG_EXT));
676 /* manual says to set scan enable bit on second pass */
677 if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
678 devpriv->cmd1 |= CMD1_SCANEN;
680 * Need a brief delay before enabling scan, or scan
681 * list will get screwed when you switch between
682 * scan up to scan down mode - dunno why.
685 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
688 devpriv->write_byte(dev, cmd->chanlist_len, INTERVAL_COUNT_REG);
690 devpriv->write_byte(dev, 0x1, INTERVAL_STROBE_REG);
692 if (cmd->convert_src == TRIG_TIMER ||
693 cmd->scan_begin_src == TRIG_TIMER) {
694 struct comedi_8254 *pacer = dev->pacer;
695 struct comedi_8254 *counter = devpriv->counter;
697 comedi_8254_update_divisors(pacer);
700 comedi_8254_load(pacer, 0, pacer->divisor1,
701 I8254_MODE3 | I8254_BINARY);
703 /* set up conversion pacing */
704 comedi_8254_set_mode(counter, 0, I8254_MODE2 | I8254_BINARY);
705 if (labpc_ai_convert_period(cmd, mode))
706 comedi_8254_write(counter, 0, pacer->divisor);
708 /* set up scan pacing */
709 if (labpc_ai_scan_period(cmd, mode))
710 comedi_8254_load(pacer, 1, pacer->divisor2,
711 I8254_MODE2 | I8254_BINARY);
714 labpc_clear_adc_fifo(dev);
716 if (xfer == isa_dma_transfer)
717 labpc_setup_dma(dev, s);
719 /* enable error interrupts */
720 devpriv->cmd3 |= CMD3_ERRINTEN;
721 /* enable fifo not empty interrupt? */
722 if (xfer == fifo_not_empty_transfer)
723 devpriv->cmd3 |= CMD3_FIFOINTEN;
724 devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
726 /* setup any external triggering/pacing (cmd4 register) */
728 if (cmd->convert_src != TRIG_EXT)
729 devpriv->cmd4 |= CMD4_ECLKRCV;
731 * XXX should discard first scan when using interval scanning
732 * since manual says it is not synced with scan clock.
734 if (!labpc_use_continuous_mode(cmd, mode)) {
735 devpriv->cmd4 |= CMD4_INTSCAN;
736 if (cmd->scan_begin_src == TRIG_EXT)
737 devpriv->cmd4 |= CMD4_EOIRCV;
739 /* single-ended/differential */
740 if (aref == AREF_DIFF)
741 devpriv->cmd4 |= CMD4_SEDIFF;
742 devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
744 /* startup acquisition */
746 spin_lock_irqsave(&dev->spinlock, flags);
748 /* use 2 cascaded counters for pacing */
749 devpriv->cmd2 |= CMD2_TBSEL;
751 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
752 if (cmd->start_src == TRIG_EXT)
753 devpriv->cmd2 |= CMD2_HWTRIG;
755 devpriv->cmd2 |= CMD2_SWTRIG;
756 if (cmd->stop_src == TRIG_EXT)
757 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
759 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
761 spin_unlock_irqrestore(&dev->spinlock, flags);
766 /* read all available samples from ai fifo */
767 static int labpc_drain_fifo(struct comedi_device *dev)
769 struct labpc_private *devpriv = dev->private;
770 struct comedi_async *async = dev->read_subdev->async;
771 struct comedi_cmd *cmd = &async->cmd;
773 const int timeout = 10000;
776 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
778 for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
780 /* quit if we have all the data we want */
781 if (cmd->stop_src == TRIG_COUNT) {
782 if (devpriv->count == 0)
786 data = labpc_read_adc_fifo(dev);
787 comedi_buf_write_samples(dev->read_subdev, &data, 1);
788 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
791 dev_err(dev->class_dev, "ai timeout, fifo never empties\n");
792 async->events |= COMEDI_CB_ERROR;
800 * Makes sure all data acquired by board is transferred to comedi (used
801 * when acquisition is terminated by stop_src == TRIG_EXT).
803 static void labpc_drain_dregs(struct comedi_device *dev)
805 struct labpc_private *devpriv = dev->private;
807 if (devpriv->current_transfer == isa_dma_transfer)
808 labpc_drain_dma(dev);
810 labpc_drain_fifo(dev);
813 /* interrupt service routine */
814 static irqreturn_t labpc_interrupt(int irq, void *d)
816 struct comedi_device *dev = d;
817 const struct labpc_boardinfo *board = dev->board_ptr;
818 struct labpc_private *devpriv = dev->private;
819 struct comedi_subdevice *s = dev->read_subdev;
820 struct comedi_async *async;
821 struct comedi_cmd *cmd;
823 if (!dev->attached) {
824 dev_err(dev->class_dev, "premature interrupt\n");
831 /* read board status */
832 devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG);
833 if (board->is_labpc1200)
834 devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG);
836 if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
837 STAT1_OVERRUN | STAT1_DAVAIL)) == 0 &&
838 (devpriv->stat2 & STAT2_OUTA1) == 0 &&
839 (devpriv->stat2 & STAT2_FIFONHF)) {
843 if (devpriv->stat1 & STAT1_OVERRUN) {
844 /* clear error interrupt */
845 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
846 async->events |= COMEDI_CB_ERROR;
847 comedi_handle_events(dev, s);
848 dev_err(dev->class_dev, "overrun\n");
852 if (devpriv->current_transfer == isa_dma_transfer)
853 labpc_handle_dma_status(dev);
855 labpc_drain_fifo(dev);
857 if (devpriv->stat1 & STAT1_CNTINT) {
858 dev_err(dev->class_dev, "handled timer interrupt?\n");
860 devpriv->write_byte(dev, 0x1, TIMER_CLEAR_REG);
863 if (devpriv->stat1 & STAT1_OVERFLOW) {
864 /* clear error interrupt */
865 devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG);
866 async->events |= COMEDI_CB_ERROR;
867 comedi_handle_events(dev, s);
868 dev_err(dev->class_dev, "overflow\n");
871 /* handle external stop trigger */
872 if (cmd->stop_src == TRIG_EXT) {
873 if (devpriv->stat2 & STAT2_OUTA1) {
874 labpc_drain_dregs(dev);
875 async->events |= COMEDI_CB_EOA;
879 /* TRIG_COUNT end of acquisition */
880 if (cmd->stop_src == TRIG_COUNT) {
881 if (devpriv->count == 0)
882 async->events |= COMEDI_CB_EOA;
885 comedi_handle_events(dev, s);
889 static void labpc_ao_write(struct comedi_device *dev,
890 struct comedi_subdevice *s,
891 unsigned int chan, unsigned int val)
893 struct labpc_private *devpriv = dev->private;
895 devpriv->write_byte(dev, val & 0xff, DAC_LSB_REG(chan));
896 devpriv->write_byte(dev, (val >> 8) & 0xff, DAC_MSB_REG(chan));
898 s->readback[chan] = val;
901 static int labpc_ao_insn_write(struct comedi_device *dev,
902 struct comedi_subdevice *s,
903 struct comedi_insn *insn,
906 const struct labpc_boardinfo *board = dev->board_ptr;
907 struct labpc_private *devpriv = dev->private;
908 unsigned int channel;
913 channel = CR_CHAN(insn->chanspec);
916 * Turn off pacing of analog output channel.
917 * NOTE: hardware bug in daqcard-1200 means pacing cannot
918 * be independently enabled/disabled for its the two channels.
920 spin_lock_irqsave(&dev->spinlock, flags);
921 devpriv->cmd2 &= ~CMD2_LDAC(channel);
922 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
923 spin_unlock_irqrestore(&dev->spinlock, flags);
926 if (board->is_labpc1200) {
927 range = CR_RANGE(insn->chanspec);
928 if (comedi_range_is_unipolar(s, range))
929 devpriv->cmd6 |= CMD6_DACUNI(channel);
931 devpriv->cmd6 &= ~CMD6_DACUNI(channel);
932 /* write to register */
933 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
936 for (i = 0; i < insn->n; i++)
937 labpc_ao_write(dev, s, channel, data[i]);
942 /* lowlevel write to eeprom/dac */
943 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
944 unsigned int value_width)
946 struct labpc_private *devpriv = dev->private;
949 for (i = 1; i <= value_width; i++) {
950 /* clear serial clock */
951 devpriv->cmd5 &= ~CMD5_SCLK;
952 /* send bits most significant bit first */
953 if (value & (1 << (value_width - i)))
954 devpriv->cmd5 |= CMD5_SDATA;
956 devpriv->cmd5 &= ~CMD5_SDATA;
958 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
959 /* set clock to load bit */
960 devpriv->cmd5 |= CMD5_SCLK;
962 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
966 /* lowlevel read from eeprom */
967 static unsigned int labpc_serial_in(struct comedi_device *dev)
969 struct labpc_private *devpriv = dev->private;
970 unsigned int value = 0;
972 const int value_width = 8; /* number of bits wide values are */
974 for (i = 1; i <= value_width; i++) {
975 /* set serial clock */
976 devpriv->cmd5 |= CMD5_SCLK;
978 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
979 /* clear clock bit */
980 devpriv->cmd5 &= ~CMD5_SCLK;
982 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
983 /* read bits most significant bit first */
985 devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG);
986 if (devpriv->stat2 & STAT2_PROMOUT)
987 value |= 1 << (value_width - i);
993 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
994 unsigned int address)
996 struct labpc_private *devpriv = dev->private;
998 /* bits to tell eeprom to expect a read */
999 const int read_instruction = 0x3;
1000 /* 8 bit write lengths to eeprom */
1001 const int write_length = 8;
1003 /* enable read/write to eeprom */
1004 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1006 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1007 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1009 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1011 /* send read instruction */
1012 labpc_serial_out(dev, read_instruction, write_length);
1013 /* send 8 bit address to read from */
1014 labpc_serial_out(dev, address, write_length);
1016 value = labpc_serial_in(dev);
1018 /* disable read/write to eeprom */
1019 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1021 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1026 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1028 struct labpc_private *devpriv = dev->private;
1030 const int read_status_instruction = 0x5;
1031 const int write_length = 8; /* 8 bit write lengths to eeprom */
1033 /* enable read/write to eeprom */
1034 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1036 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1037 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1039 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1041 /* send read status instruction */
1042 labpc_serial_out(dev, read_status_instruction, write_length);
1044 value = labpc_serial_in(dev);
1046 /* disable read/write to eeprom */
1047 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1049 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1054 static void labpc_eeprom_write(struct comedi_device *dev,
1055 unsigned int address, unsigned int value)
1057 struct labpc_private *devpriv = dev->private;
1058 const int write_enable_instruction = 0x6;
1059 const int write_instruction = 0x2;
1060 const int write_length = 8; /* 8 bit write lengths to eeprom */
1062 /* enable read/write to eeprom */
1063 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1065 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1066 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1068 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1070 /* send write_enable instruction */
1071 labpc_serial_out(dev, write_enable_instruction, write_length);
1072 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1074 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1076 /* send write instruction */
1077 devpriv->cmd5 |= CMD5_EEPROMCS;
1079 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1080 labpc_serial_out(dev, write_instruction, write_length);
1081 /* send 8 bit address to write to */
1082 labpc_serial_out(dev, address, write_length);
1084 labpc_serial_out(dev, value, write_length);
1085 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1087 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1089 /* disable read/write to eeprom */
1090 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1092 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1095 /* writes to 8 bit calibration dacs */
1096 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1099 struct labpc_private *devpriv = dev->private;
1101 /* clear caldac load bit and make sure we don't write to eeprom */
1102 devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1104 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1106 /* write 4 bit channel */
1107 labpc_serial_out(dev, channel, 4);
1108 /* write 8 bit caldac value */
1109 labpc_serial_out(dev, value, 8);
1111 /* set and clear caldac bit to load caldac value */
1112 devpriv->cmd5 |= CMD5_CALDACLD;
1114 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1115 devpriv->cmd5 &= ~CMD5_CALDACLD;
1117 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1120 static int labpc_calib_insn_write(struct comedi_device *dev,
1121 struct comedi_subdevice *s,
1122 struct comedi_insn *insn,
1125 unsigned int chan = CR_CHAN(insn->chanspec);
1128 * Only write the last data value to the caldac. Preceding
1129 * data would be overwritten anyway.
1132 unsigned int val = data[insn->n - 1];
1134 if (s->readback[chan] != val) {
1135 write_caldac(dev, chan, val);
1136 s->readback[chan] = val;
1143 static int labpc_eeprom_ready(struct comedi_device *dev,
1144 struct comedi_subdevice *s,
1145 struct comedi_insn *insn,
1146 unsigned long context)
1148 unsigned int status;
1150 /* make sure there isn't already a write in progress */
1151 status = labpc_eeprom_read_status(dev);
1152 if ((status & 0x1) == 0)
1157 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1158 struct comedi_subdevice *s,
1159 struct comedi_insn *insn,
1162 unsigned int chan = CR_CHAN(insn->chanspec);
1165 /* only allow writes to user area of eeprom */
1166 if (chan < 16 || chan > 127)
1170 * Only write the last data value to the eeprom. Preceding
1171 * data would be overwritten anyway.
1174 unsigned int val = data[insn->n - 1];
1176 ret = comedi_timeout(dev, s, insn, labpc_eeprom_ready, 0);
1180 labpc_eeprom_write(dev, chan, val);
1181 s->readback[chan] = val;
1187 int labpc_common_attach(struct comedi_device *dev,
1188 unsigned int irq, unsigned long isr_flags)
1190 const struct labpc_boardinfo *board = dev->board_ptr;
1191 struct labpc_private *devpriv;
1192 struct comedi_subdevice *s;
1196 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1201 devpriv->read_byte = labpc_readb;
1202 devpriv->write_byte = labpc_writeb;
1204 devpriv->read_byte = labpc_inb;
1205 devpriv->write_byte = labpc_outb;
1208 /* initialize board's command registers */
1209 devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG);
1210 devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG);
1211 devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG);
1212 devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
1213 if (board->is_labpc1200) {
1214 devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG);
1215 devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG);
1219 ret = request_irq(irq, labpc_interrupt, isr_flags,
1220 dev->board_name, dev);
1226 dev->pacer = comedi_8254_mm_init(dev->mmio + COUNTER_B_BASE_REG,
1227 I8254_OSC_BASE_2MHZ,
1229 devpriv->counter = comedi_8254_mm_init(dev->mmio +
1231 I8254_OSC_BASE_2MHZ,
1234 dev->pacer = comedi_8254_init(dev->iobase + COUNTER_B_BASE_REG,
1235 I8254_OSC_BASE_2MHZ,
1237 devpriv->counter = comedi_8254_init(dev->iobase +
1239 I8254_OSC_BASE_2MHZ,
1242 if (!dev->pacer || !devpriv->counter)
1245 ret = comedi_alloc_subdevices(dev, 5);
1249 /* analog input subdevice */
1250 s = &dev->subdevices[0];
1251 s->type = COMEDI_SUBD_AI;
1252 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1254 s->len_chanlist = 8;
1255 s->maxdata = 0x0fff;
1256 s->range_table = board->is_labpc1200 ?
1257 &range_labpc_1200_ai : &range_labpc_plus_ai;
1258 s->insn_read = labpc_ai_insn_read;
1260 dev->read_subdev = s;
1261 s->subdev_flags |= SDF_CMD_READ;
1262 s->do_cmd = labpc_ai_cmd;
1263 s->do_cmdtest = labpc_ai_cmdtest;
1264 s->cancel = labpc_cancel;
1268 s = &dev->subdevices[1];
1269 if (board->has_ao) {
1270 s->type = COMEDI_SUBD_AO;
1271 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1273 s->maxdata = 0x0fff;
1274 s->range_table = &range_labpc_ao;
1275 s->insn_write = labpc_ao_insn_write;
1277 ret = comedi_alloc_subdev_readback(s);
1281 /* initialize analog outputs to a known value */
1282 for (i = 0; i < s->n_chan; i++)
1283 labpc_ao_write(dev, s, i, s->maxdata / 2);
1285 s->type = COMEDI_SUBD_UNUSED;
1289 s = &dev->subdevices[2];
1291 ret = subdev_8255_mm_init(dev, s, NULL, DIO_BASE_REG);
1293 ret = subdev_8255_init(dev, s, NULL, DIO_BASE_REG);
1297 /* calibration subdevices for boards that have one */
1298 s = &dev->subdevices[3];
1299 if (board->is_labpc1200) {
1300 s->type = COMEDI_SUBD_CALIB;
1301 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1304 s->insn_write = labpc_calib_insn_write;
1306 ret = comedi_alloc_subdev_readback(s);
1310 for (i = 0; i < s->n_chan; i++) {
1311 write_caldac(dev, i, s->maxdata / 2);
1312 s->readback[i] = s->maxdata / 2;
1315 s->type = COMEDI_SUBD_UNUSED;
1318 /* EEPROM (256 bytes) */
1319 s = &dev->subdevices[4];
1320 if (board->is_labpc1200) {
1321 s->type = COMEDI_SUBD_MEMORY;
1322 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1325 s->insn_write = labpc_eeprom_insn_write;
1327 ret = comedi_alloc_subdev_readback(s);
1331 for (i = 0; i < s->n_chan; i++)
1332 s->readback[i] = labpc_eeprom_read(dev, i);
1334 s->type = COMEDI_SUBD_UNUSED;
1339 EXPORT_SYMBOL_GPL(labpc_common_attach);
1341 void labpc_common_detach(struct comedi_device *dev)
1343 struct labpc_private *devpriv = dev->private;
1346 kfree(devpriv->counter);
1348 EXPORT_SYMBOL_GPL(labpc_common_detach);
1350 static int __init labpc_common_init(void)
1354 module_init(labpc_common_init);
1356 static void __exit labpc_common_exit(void)
1359 module_exit(labpc_common_exit);
1361 MODULE_AUTHOR("Comedi https://www.comedi.org");
1362 MODULE_DESCRIPTION("Comedi helper for ni_labpc, ni_labpc_pci, ni_labpc_cs");
1363 MODULE_LICENSE("GPL");