1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for NI AT-AO-6/10 boards
6 * COMEDI - Linux Control and Measurement Device Interface
7 * Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org>
12 * Description: National Instruments AT-AO-6/10
13 * Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
15 * Author: David A. Schleef <ds@schleef.org>
16 * Updated: Sun Dec 26 12:26:28 EST 2004
18 * Configuration options:
19 * [0] - I/O port base address
22 * [3] - analog output range, set by jumpers on hardware
23 * 0 for -10 to 10V bipolar
24 * 1 for 0V to 10V unipolar
27 #include <linux/module.h>
29 #include "../comedidev.h"
31 #include "comedi_8254.h"
36 * Register-level programming information can be found in NI
37 * document 320379.pdf.
39 #define ATAO_DIO_REG 0x00
40 #define ATAO_CFG2_REG 0x02
41 #define ATAO_CFG2_CALLD_NOP (0 << 14)
42 #define ATAO_CFG2_CALLD(x) ((((x) >> 3) + 1) << 14)
43 #define ATAO_CFG2_FFRTEN BIT(13)
44 #define ATAO_CFG2_DACS(x) (1 << (((x) / 2) + 8))
45 #define ATAO_CFG2_LDAC(x) (1 << (((x) / 2) + 3))
46 #define ATAO_CFG2_PROMEN BIT(2)
47 #define ATAO_CFG2_SCLK BIT(1)
48 #define ATAO_CFG2_SDATA BIT(0)
49 #define ATAO_CFG3_REG 0x04
50 #define ATAO_CFG3_DMAMODE BIT(6)
51 #define ATAO_CFG3_CLKOUT BIT(5)
52 #define ATAO_CFG3_RCLKEN BIT(4)
53 #define ATAO_CFG3_DOUTEN2 BIT(3)
54 #define ATAO_CFG3_DOUTEN1 BIT(2)
55 #define ATAO_CFG3_EN2_5V BIT(1)
56 #define ATAO_CFG3_SCANEN BIT(0)
57 #define ATAO_82C53_BASE 0x06
58 #define ATAO_CFG1_REG 0x0a
59 #define ATAO_CFG1_EXTINT2EN BIT(15)
60 #define ATAO_CFG1_EXTINT1EN BIT(14)
61 #define ATAO_CFG1_CNTINT2EN BIT(13)
62 #define ATAO_CFG1_CNTINT1EN BIT(12)
63 #define ATAO_CFG1_TCINTEN BIT(11)
64 #define ATAO_CFG1_CNT1SRC BIT(10)
65 #define ATAO_CFG1_CNT2SRC BIT(9)
66 #define ATAO_CFG1_FIFOEN BIT(8)
67 #define ATAO_CFG1_GRP2WR BIT(7)
68 #define ATAO_CFG1_EXTUPDEN BIT(6)
69 #define ATAO_CFG1_DMARQ BIT(5)
70 #define ATAO_CFG1_DMAEN BIT(4)
71 #define ATAO_CFG1_CH(x) (((x) & 0xf) << 0)
72 #define ATAO_STATUS_REG 0x0a
73 #define ATAO_STATUS_FH BIT(6)
74 #define ATAO_STATUS_FE BIT(5)
75 #define ATAO_STATUS_FF BIT(4)
76 #define ATAO_STATUS_INT2 BIT(3)
77 #define ATAO_STATUS_INT1 BIT(2)
78 #define ATAO_STATUS_TCINT BIT(1)
79 #define ATAO_STATUS_PROMOUT BIT(0)
80 #define ATAO_FIFO_WRITE_REG 0x0c
81 #define ATAO_FIFO_CLEAR_REG 0x0c
82 #define ATAO_AO_REG(x) (0x0c + ((x) * 2))
84 /* registers with _2_ are accessed when GRP2WR is set in CFG1 */
85 #define ATAO_2_DMATCCLR_REG 0x00
86 #define ATAO_2_INT1CLR_REG 0x02
87 #define ATAO_2_INT2CLR_REG 0x04
88 #define ATAO_2_RTSISHFT_REG 0x06
89 #define ATAO_2_RTSISHFT_RSI BIT(0)
90 #define ATAO_2_RTSISTRB_REG 0x07
97 static const struct atao_board atao_boards[] = {
107 struct atao_private {
111 /* Used for caldac readback */
112 unsigned char caldac[21];
115 static void atao_select_reg_group(struct comedi_device *dev, int group)
117 struct atao_private *devpriv = dev->private;
120 devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
122 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
123 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
126 static int atao_ao_insn_write(struct comedi_device *dev,
127 struct comedi_subdevice *s,
128 struct comedi_insn *insn,
131 unsigned int chan = CR_CHAN(insn->chanspec);
132 unsigned int val = s->readback[chan];
136 atao_select_reg_group(dev, 1);
138 for (i = 0; i < insn->n; i++) {
141 /* the hardware expects two's complement values */
142 outw(comedi_offset_munge(s, val),
143 dev->iobase + ATAO_AO_REG(chan));
145 s->readback[chan] = val;
148 atao_select_reg_group(dev, 0);
153 static int atao_dio_insn_bits(struct comedi_device *dev,
154 struct comedi_subdevice *s,
155 struct comedi_insn *insn,
158 if (comedi_dio_update_state(s, data))
159 outw(s->state, dev->iobase + ATAO_DIO_REG);
161 data[1] = inw(dev->iobase + ATAO_DIO_REG);
166 static int atao_dio_insn_config(struct comedi_device *dev,
167 struct comedi_subdevice *s,
168 struct comedi_insn *insn,
171 struct atao_private *devpriv = dev->private;
172 unsigned int chan = CR_CHAN(insn->chanspec);
181 ret = comedi_dio_insn_config(dev, s, insn, data, mask);
185 if (s->io_bits & 0x0f)
186 devpriv->cfg3 |= ATAO_CFG3_DOUTEN1;
188 devpriv->cfg3 &= ~ATAO_CFG3_DOUTEN1;
189 if (s->io_bits & 0xf0)
190 devpriv->cfg3 |= ATAO_CFG3_DOUTEN2;
192 devpriv->cfg3 &= ~ATAO_CFG3_DOUTEN2;
194 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG);
200 * There are three DAC8800 TrimDACs on the board. These are 8-channel,
201 * 8-bit DACs that are used to calibrate the Analog Output channels.
202 * The factory default calibration values are stored in the EEPROM.
203 * The TrimDACs, and EEPROM addresses, are mapped as:
205 * Channel EEPROM Description
206 * ----------------- ------ -----------------------------------
207 * 0 - DAC0 Chan 0 0x30 AO Channel 0 Offset
208 * 1 - DAC0 Chan 1 0x31 AO Channel 0 Gain
209 * 2 - DAC0 Chan 2 0x32 AO Channel 1 Offset
210 * 3 - DAC0 Chan 3 0x33 AO Channel 1 Gain
211 * 4 - DAC0 Chan 4 0x34 AO Channel 2 Offset
212 * 5 - DAC0 Chan 5 0x35 AO Channel 2 Gain
213 * 6 - DAC0 Chan 6 0x36 AO Channel 3 Offset
214 * 7 - DAC0 Chan 7 0x37 AO Channel 3 Gain
215 * 8 - DAC1 Chan 0 0x38 AO Channel 4 Offset
216 * 9 - DAC1 Chan 1 0x39 AO Channel 4 Gain
217 * 10 - DAC1 Chan 2 0x3a AO Channel 5 Offset
218 * 11 - DAC1 Chan 3 0x3b AO Channel 5 Gain
219 * 12 - DAC1 Chan 4 0x3c 2.5V Offset
220 * 13 - DAC1 Chan 5 0x3d AO Channel 6 Offset (at-ao-10 only)
221 * 14 - DAC1 Chan 6 0x3e AO Channel 6 Gain (at-ao-10 only)
222 * 15 - DAC1 Chan 7 0x3f AO Channel 7 Offset (at-ao-10 only)
223 * 16 - DAC2 Chan 0 0x40 AO Channel 7 Gain (at-ao-10 only)
224 * 17 - DAC2 Chan 1 0x41 AO Channel 8 Offset (at-ao-10 only)
225 * 18 - DAC2 Chan 2 0x42 AO Channel 8 Gain (at-ao-10 only)
226 * 19 - DAC2 Chan 3 0x43 AO Channel 9 Offset (at-ao-10 only)
227 * 20 - DAC2 Chan 4 0x44 AO Channel 9 Gain (at-ao-10 only)
228 * DAC2 Chan 5 0x45 Reserved
229 * DAC2 Chan 6 0x46 Reserved
230 * DAC2 Chan 7 0x47 Reserved
232 static int atao_calib_insn_write(struct comedi_device *dev,
233 struct comedi_subdevice *s,
234 struct comedi_insn *insn,
237 unsigned int chan = CR_CHAN(insn->chanspec);
240 unsigned int val = data[insn->n - 1];
241 unsigned int bitstring = ((chan & 0x7) << 8) | val;
245 /* write the channel and last data value to the caldac */
246 /* clock the bitstring to the caldac; MSB -> LSB */
247 for (bit = BIT(10); bit; bit >>= 1) {
248 bits = (bit & bitstring) ? ATAO_CFG2_SDATA : 0;
250 outw(bits, dev->iobase + ATAO_CFG2_REG);
251 outw(bits | ATAO_CFG2_SCLK,
252 dev->iobase + ATAO_CFG2_REG);
255 /* strobe the caldac to load the value */
256 outw(ATAO_CFG2_CALLD(chan), dev->iobase + ATAO_CFG2_REG);
257 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG);
259 s->readback[chan] = val;
265 static void atao_reset(struct comedi_device *dev)
267 struct atao_private *devpriv = dev->private;
269 /* This is the reset sequence described in the manual */
272 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
274 /* Put outputs of counter 1 and counter 2 in a high state */
275 comedi_8254_set_mode(dev->pacer, 0, I8254_MODE4 | I8254_BINARY);
276 comedi_8254_set_mode(dev->pacer, 1, I8254_MODE4 | I8254_BINARY);
277 comedi_8254_write(dev->pacer, 0, 0x0003);
279 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG);
282 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG);
284 inw(dev->iobase + ATAO_FIFO_CLEAR_REG);
286 atao_select_reg_group(dev, 1);
287 outw(0, dev->iobase + ATAO_2_INT1CLR_REG);
288 outw(0, dev->iobase + ATAO_2_INT2CLR_REG);
289 outw(0, dev->iobase + ATAO_2_DMATCCLR_REG);
290 atao_select_reg_group(dev, 0);
293 static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
295 const struct atao_board *board = dev->board_ptr;
296 struct atao_private *devpriv;
297 struct comedi_subdevice *s;
300 ret = comedi_request_region(dev, it->options[0], 0x20);
304 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
308 dev->pacer = comedi_8254_init(dev->iobase + ATAO_82C53_BASE,
313 ret = comedi_alloc_subdevices(dev, 4);
317 /* Analog Output subdevice */
318 s = &dev->subdevices[0];
319 s->type = COMEDI_SUBD_AO;
320 s->subdev_flags = SDF_WRITABLE;
321 s->n_chan = board->n_ao_chans;
323 s->range_table = it->options[3] ? &range_unipolar10 : &range_bipolar10;
324 s->insn_write = atao_ao_insn_write;
326 ret = comedi_alloc_subdev_readback(s);
330 /* Digital I/O subdevice */
331 s = &dev->subdevices[1];
332 s->type = COMEDI_SUBD_DIO;
333 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
336 s->range_table = &range_digital;
337 s->insn_bits = atao_dio_insn_bits;
338 s->insn_config = atao_dio_insn_config;
340 /* caldac subdevice */
341 s = &dev->subdevices[2];
342 s->type = COMEDI_SUBD_CALIB;
343 s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
344 s->n_chan = (board->n_ao_chans * 2) + 1;
346 s->insn_write = atao_calib_insn_write;
348 ret = comedi_alloc_subdev_readback(s);
352 /* EEPROM subdevice */
353 s = &dev->subdevices[3];
354 s->type = COMEDI_SUBD_UNUSED;
361 static struct comedi_driver ni_at_ao_driver = {
362 .driver_name = "ni_at_ao",
363 .module = THIS_MODULE,
364 .attach = atao_attach,
365 .detach = comedi_legacy_detach,
366 .board_name = &atao_boards[0].name,
367 .offset = sizeof(struct atao_board),
368 .num_names = ARRAY_SIZE(atao_boards),
370 module_comedi_driver(ni_at_ao_driver);
372 MODULE_AUTHOR("Comedi https://www.comedi.org");
373 MODULE_DESCRIPTION("Comedi driver for NI AT-AO-6/10 boards");
374 MODULE_LICENSE("GPL");