2 * linux/drivers/clocksource/timer-sp.c
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/clk.h>
22 #include <linux/clocksource.h>
23 #include <linux/clockchips.h>
24 #include <linux/err.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
29 #include <linux/of_address.h>
30 #include <linux/of_clk.h>
31 #include <linux/of_irq.h>
32 #include <linux/sched_clock.h>
34 #include <clocksource/timer-sp804.h>
38 static long __init sp804_get_clock_rate(struct clk *clk)
43 err = clk_prepare(clk);
45 pr_err("sp804: clock failed to prepare: %d\n", err);
50 err = clk_enable(clk);
52 pr_err("sp804: clock failed to enable: %d\n", err);
58 rate = clk_get_rate(clk);
60 pr_err("sp804: clock failed to get rate: %ld\n", rate);
69 static void __iomem *sched_clock_base;
71 static u64 notrace sp804_read(void)
73 return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
76 void __init sp804_timer_disable(void __iomem *base)
78 writel(0, base + TIMER_CTRL);
81 int __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
89 clk = clk_get_sys("sp804", name);
91 pr_err("sp804: clock not found: %d\n",
97 rate = sp804_get_clock_rate(clk);
101 /* setup timer 0 as free-running clocksource */
102 writel(0, base + TIMER_CTRL);
103 writel(0xffffffff, base + TIMER_LOAD);
104 writel(0xffffffff, base + TIMER_VALUE);
105 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
108 clocksource_mmio_init(base + TIMER_VALUE, name,
109 rate, 200, 32, clocksource_mmio_readl_down);
111 if (use_sched_clock) {
112 sched_clock_base = base;
113 sched_clock_register(sp804_read, 32, rate);
120 static void __iomem *clkevt_base;
121 static unsigned long clkevt_reload;
124 * IRQ handler for the timer
126 static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id)
128 struct clock_event_device *evt = dev_id;
130 /* clear the interrupt */
131 writel(1, clkevt_base + TIMER_INTCLR);
133 evt->event_handler(evt);
138 static inline void timer_shutdown(struct clock_event_device *evt)
140 writel(0, clkevt_base + TIMER_CTRL);
143 static int sp804_shutdown(struct clock_event_device *evt)
149 static int sp804_set_periodic(struct clock_event_device *evt)
151 unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE |
152 TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
155 writel(clkevt_reload, clkevt_base + TIMER_LOAD);
156 writel(ctrl, clkevt_base + TIMER_CTRL);
160 static int sp804_set_next_event(unsigned long next,
161 struct clock_event_device *evt)
163 unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE |
164 TIMER_CTRL_ONESHOT | TIMER_CTRL_ENABLE;
166 writel(next, clkevt_base + TIMER_LOAD);
167 writel(ctrl, clkevt_base + TIMER_CTRL);
172 static struct clock_event_device sp804_clockevent = {
173 .features = CLOCK_EVT_FEAT_PERIODIC |
174 CLOCK_EVT_FEAT_ONESHOT |
175 CLOCK_EVT_FEAT_DYNIRQ,
176 .set_state_shutdown = sp804_shutdown,
177 .set_state_periodic = sp804_set_periodic,
178 .set_state_oneshot = sp804_shutdown,
179 .tick_resume = sp804_shutdown,
180 .set_next_event = sp804_set_next_event,
184 static struct irqaction sp804_timer_irq = {
186 .flags = IRQF_TIMER | IRQF_IRQPOLL,
187 .handler = sp804_timer_interrupt,
188 .dev_id = &sp804_clockevent,
191 int __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struct clk *clk, const char *name)
193 struct clock_event_device *evt = &sp804_clockevent;
197 clk = clk_get_sys("sp804", name);
199 pr_err("sp804: %s clock not found: %d\n", name,
204 rate = sp804_get_clock_rate(clk);
209 clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
212 evt->cpumask = cpu_possible_mask;
214 writel(0, base + TIMER_CTRL);
216 setup_irq(irq, &sp804_timer_irq);
217 clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
222 static int __init sp804_of_init(struct device_node *np)
224 static bool initialized = false;
226 int irq, ret = -EINVAL;
228 struct clk *clk1, *clk2;
229 const char *name = of_get_property(np, "compatible", NULL);
231 base = of_iomap(np, 0);
235 /* Ensure timers are disabled */
236 writel(0, base + TIMER_CTRL);
237 writel(0, base + TIMER_2_BASE + TIMER_CTRL);
239 if (initialized || !of_device_is_available(np)) {
244 clk1 = of_clk_get(np, 0);
248 /* Get the 2nd clock if the timer has 3 timer clocks */
249 if (of_clk_get_parent_count(np) == 3) {
250 clk2 = of_clk_get(np, 1);
252 pr_err("sp804: %pOFn clock not found: %d\n", np,
259 irq = irq_of_parse_and_map(np, 0);
263 of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
266 ret = __sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
270 ret = __sp804_clocksource_and_sched_clock_init(base, name, clk1, 1);
275 ret = __sp804_clockevents_init(base, irq, clk1 , name);
279 ret =__sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
291 TIMER_OF_DECLARE(sp804, "arm,sp804", sp804_of_init);
293 static int __init integrator_cp_of_init(struct device_node *np)
295 static int init_count = 0;
297 int irq, ret = -EINVAL;
298 const char *name = of_get_property(np, "compatible", NULL);
301 base = of_iomap(np, 0);
303 pr_err("Failed to iomap\n");
307 clk = of_clk_get(np, 0);
309 pr_err("Failed to get clock\n");
313 /* Ensure timer is disabled */
314 writel(0, base + TIMER_CTRL);
316 if (init_count == 2 || !of_device_is_available(np))
320 ret = __sp804_clocksource_and_sched_clock_init(base, name, clk, 0);
324 irq = irq_of_parse_and_map(np, 0);
328 ret = __sp804_clockevents_init(base, irq, clk, name);
339 TIMER_OF_DECLARE(intcp, "arm,integrator-cp-timer", integrator_cp_of_init);