drivers/clk/sunxi/clk-sun6i-apb0-gates.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2014 Free Electrons
   4  *
   5  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
   6  *
   7  * Allwinner A31 APB0 clock gates driver
   8  */
   9
  10 #include <linux/clk-provider.h>
  11 #include <linux/init.h>
  12 #include <linux/of.h>
  13 #include <linux/of_device.h>
  14 #include <linux/platform_device.h>
  15
  16 #define SUN6I_APB0_GATES_MAX_SIZE       32
  17
  18 struct gates_data {
  19         DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE);
  20 };
  21
  22 static const struct gates_data sun6i_a31_apb0_gates __initconst = {
  23         .mask = {0x7F},
  24 };
  25
  26 static const struct gates_data sun8i_a23_apb0_gates __initconst = {
  27         .mask = {0x5D},
  28 };
  29
  30 static const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
  31         { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
  32         { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
  33         { /* sentinel */ }
  34 };
  35
  36 static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
  37 {
  38         struct device_node *np = pdev->dev.of_node;
  39         struct clk_onecell_data *clk_data;
  40         const struct gates_data *data;
  41         const char *clk_parent;
  42         const char *clk_name;
  43         struct resource *r;
  44         void __iomem *reg;
  45         int ngates;
  46         int i;
  47         int j = 0;
  48
  49         if (!np)
  50                 return -ENODEV;
  51
  52         data = of_device_get_match_data(&pdev->dev);
  53         if (!data)
  54                 return -ENODEV;
  55
  56         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  57         reg = devm_ioremap_resource(&pdev->dev, r);
  58         if (IS_ERR(reg))
  59                 return PTR_ERR(reg);
  60
  61         clk_parent = of_clk_get_parent_name(np, 0);
  62         if (!clk_parent)
  63                 return -EINVAL;
  64
  65         clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
  66                                 GFP_KERNEL);
  67         if (!clk_data)
  68                 return -ENOMEM;
  69
  70         /* Worst-case size approximation and memory allocation */
  71         ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
  72         clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
  73                                       sizeof(struct clk *), GFP_KERNEL);
  74         if (!clk_data->clks)
  75                 return -ENOMEM;
  76
  77         for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
  78                 of_property_read_string_index(np, "clock-output-names",
  79                                               j, &clk_name);
  80
  81                 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
  82                                                       clk_parent, 0, reg, i,
  83                                                       0, NULL);
  84                 WARN_ON(IS_ERR(clk_data->clks[i]));
  85
  86                 j++;
  87         }
  88
  89         clk_data->clk_num = ngates + 1;
  90
  91         return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
  92 }
  93
  94 static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
  95         .driver = {
  96                 .name = "sun6i-a31-apb0-gates-clk",
  97                 .of_match_table = sun6i_a31_apb0_gates_clk_dt_ids,
  98         },
  99         .probe = sun6i_a31_apb0_gates_clk_probe,
 100 };
 101 builtin_platform_driver(sun6i_a31_apb0_gates_clk_driver);