1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
4 * Copyright (c) 2013 Linaro Ltd.
5 * Author: Thomas Abraham <thomas.ab@samsung.com>
7 * This file includes utility functions to register clocks to common
8 * clock framework for Samsung platforms.
11 #include <linux/slab.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
16 #include <linux/of_address.h>
17 #include <linux/syscore_ops.h>
21 static LIST_HEAD(clock_reg_cache_list);
23 void samsung_clk_save(void __iomem *base,
24 struct samsung_clk_reg_dump *rd,
25 unsigned int num_regs)
27 for (; num_regs > 0; --num_regs, ++rd)
28 rd->value = readl(base + rd->offset);
31 void samsung_clk_restore(void __iomem *base,
32 const struct samsung_clk_reg_dump *rd,
33 unsigned int num_regs)
35 for (; num_regs > 0; --num_regs, ++rd)
36 writel(rd->value, base + rd->offset);
39 struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
40 const unsigned long *rdump,
41 unsigned long nr_rdump)
43 struct samsung_clk_reg_dump *rd;
46 rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
50 for (i = 0; i < nr_rdump; ++i)
51 rd[i].offset = rdump[i];
56 /* setup the essentials required to support clock lookup using ccf */
57 struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
58 void __iomem *base, unsigned long nr_clks)
60 struct samsung_clk_provider *ctx;
63 ctx = kzalloc(sizeof(struct samsung_clk_provider) +
64 sizeof(*ctx->clk_data.hws) * nr_clks, GFP_KERNEL);
66 panic("could not allocate clock provider context.\n");
68 for (i = 0; i < nr_clks; ++i)
69 ctx->clk_data.hws[i] = ERR_PTR(-ENOENT);
72 ctx->clk_data.num = nr_clks;
73 spin_lock_init(&ctx->lock);
78 void __init samsung_clk_of_add_provider(struct device_node *np,
79 struct samsung_clk_provider *ctx)
82 if (of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
84 panic("could not register clk provider\n");
88 /* add a clock instance to the clock lookup table used for dt based lookup */
89 void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
90 struct clk_hw *clk_hw, unsigned int id)
93 ctx->clk_data.hws[id] = clk_hw;
96 /* register a list of aliases */
97 void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
98 const struct samsung_clock_alias *list,
101 struct clk_hw *clk_hw;
102 unsigned int idx, ret;
104 for (idx = 0; idx < nr_clk; idx++, list++) {
106 pr_err("%s: clock id missing for index %d\n", __func__,
111 clk_hw = ctx->clk_data.hws[list->id];
113 pr_err("%s: failed to find clock %d\n", __func__,
118 ret = clk_hw_register_clkdev(clk_hw, list->alias,
121 pr_err("%s: failed to register lookup %s\n",
122 __func__, list->alias);
126 /* register a list of fixed clocks */
127 void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
128 const struct samsung_fixed_rate_clock *list,
131 struct clk_hw *clk_hw;
132 unsigned int idx, ret;
134 for (idx = 0; idx < nr_clk; idx++, list++) {
135 clk_hw = clk_hw_register_fixed_rate(ctx->dev, list->name,
136 list->parent_name, list->flags, list->fixed_rate);
137 if (IS_ERR(clk_hw)) {
138 pr_err("%s: failed to register clock %s\n", __func__,
143 samsung_clk_add_lookup(ctx, clk_hw, list->id);
146 * Unconditionally add a clock lookup for the fixed rate clocks.
147 * There are not many of these on any of Samsung platforms.
149 ret = clk_hw_register_clkdev(clk_hw, list->name, NULL);
151 pr_err("%s: failed to register clock lookup for %s",
152 __func__, list->name);
156 /* register a list of fixed factor clocks */
157 void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
158 const struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
160 struct clk_hw *clk_hw;
163 for (idx = 0; idx < nr_clk; idx++, list++) {
164 clk_hw = clk_hw_register_fixed_factor(ctx->dev, list->name,
165 list->parent_name, list->flags, list->mult, list->div);
166 if (IS_ERR(clk_hw)) {
167 pr_err("%s: failed to register clock %s\n", __func__,
172 samsung_clk_add_lookup(ctx, clk_hw, list->id);
176 /* register a list of mux clocks */
177 void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
178 const struct samsung_mux_clock *list,
181 struct clk_hw *clk_hw;
184 for (idx = 0; idx < nr_clk; idx++, list++) {
185 clk_hw = clk_hw_register_mux(ctx->dev, list->name,
186 list->parent_names, list->num_parents, list->flags,
187 ctx->reg_base + list->offset,
188 list->shift, list->width, list->mux_flags, &ctx->lock);
189 if (IS_ERR(clk_hw)) {
190 pr_err("%s: failed to register clock %s\n", __func__,
195 samsung_clk_add_lookup(ctx, clk_hw, list->id);
199 /* register a list of div clocks */
200 void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
201 const struct samsung_div_clock *list,
204 struct clk_hw *clk_hw;
207 for (idx = 0; idx < nr_clk; idx++, list++) {
209 clk_hw = clk_hw_register_divider_table(ctx->dev,
210 list->name, list->parent_name, list->flags,
211 ctx->reg_base + list->offset,
212 list->shift, list->width, list->div_flags,
213 list->table, &ctx->lock);
215 clk_hw = clk_hw_register_divider(ctx->dev, list->name,
216 list->parent_name, list->flags,
217 ctx->reg_base + list->offset, list->shift,
218 list->width, list->div_flags, &ctx->lock);
219 if (IS_ERR(clk_hw)) {
220 pr_err("%s: failed to register clock %s\n", __func__,
225 samsung_clk_add_lookup(ctx, clk_hw, list->id);
229 /* register a list of gate clocks */
230 void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
231 const struct samsung_gate_clock *list,
234 struct clk_hw *clk_hw;
237 for (idx = 0; idx < nr_clk; idx++, list++) {
238 clk_hw = clk_hw_register_gate(ctx->dev, list->name, list->parent_name,
239 list->flags, ctx->reg_base + list->offset,
240 list->bit_idx, list->gate_flags, &ctx->lock);
241 if (IS_ERR(clk_hw)) {
242 pr_err("%s: failed to register clock %s\n", __func__,
247 samsung_clk_add_lookup(ctx, clk_hw, list->id);
252 * obtain the clock speed of all external fixed clock sources from device
253 * tree and register it
255 void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
256 struct samsung_fixed_rate_clock *fixed_rate_clk,
257 unsigned int nr_fixed_rate_clk,
258 const struct of_device_id *clk_matches)
260 const struct of_device_id *match;
261 struct device_node *clk_np;
264 for_each_matching_node_and_match(clk_np, clk_matches, &match) {
265 if (of_property_read_u32(clk_np, "clock-frequency", &freq))
267 fixed_rate_clk[(unsigned long)match->data].fixed_rate = freq;
269 samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
272 /* utility function to get the rate of a specified clock */
273 unsigned long _get_rate(const char *clk_name)
277 clk = __clk_lookup(clk_name);
279 pr_err("%s: could not find clock %s\n", __func__, clk_name);
283 return clk_get_rate(clk);
286 #ifdef CONFIG_PM_SLEEP
287 static int samsung_clk_suspend(void)
289 struct samsung_clock_reg_cache *reg_cache;
291 list_for_each_entry(reg_cache, &clock_reg_cache_list, node) {
292 samsung_clk_save(reg_cache->reg_base, reg_cache->rdump,
294 samsung_clk_restore(reg_cache->reg_base, reg_cache->rsuspend,
295 reg_cache->rsuspend_num);
300 static void samsung_clk_resume(void)
302 struct samsung_clock_reg_cache *reg_cache;
304 list_for_each_entry(reg_cache, &clock_reg_cache_list, node)
305 samsung_clk_restore(reg_cache->reg_base, reg_cache->rdump,
309 static struct syscore_ops samsung_clk_syscore_ops = {
310 .suspend = samsung_clk_suspend,
311 .resume = samsung_clk_resume,
314 void samsung_clk_extended_sleep_init(void __iomem *reg_base,
315 const unsigned long *rdump,
316 unsigned long nr_rdump,
317 const struct samsung_clk_reg_dump *rsuspend,
318 unsigned long nr_rsuspend)
320 struct samsung_clock_reg_cache *reg_cache;
322 reg_cache = kzalloc(sizeof(struct samsung_clock_reg_cache),
325 panic("could not allocate register reg_cache.\n");
326 reg_cache->rdump = samsung_clk_alloc_reg_dump(rdump, nr_rdump);
328 if (!reg_cache->rdump)
329 panic("could not allocate register dump storage.\n");
331 if (list_empty(&clock_reg_cache_list))
332 register_syscore_ops(&samsung_clk_syscore_ops);
334 reg_cache->reg_base = reg_base;
335 reg_cache->rd_num = nr_rdump;
336 reg_cache->rsuspend = rsuspend;
337 reg_cache->rsuspend_num = nr_rsuspend;
338 list_add_tail(®_cache->node, &clock_reg_cache_list);
343 * Common function which registers plls, muxes, dividers and gates
344 * for each CMU. It also add CMU register list to register cache.
346 struct samsung_clk_provider * __init samsung_cmu_register_one(
347 struct device_node *np,
348 const struct samsung_cmu_info *cmu)
350 void __iomem *reg_base;
351 struct samsung_clk_provider *ctx;
353 reg_base = of_iomap(np, 0);
355 panic("%s: failed to map registers\n", __func__);
359 ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids);
361 panic("%s: unable to allocate ctx\n", __func__);
366 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
369 samsung_clk_register_mux(ctx, cmu->mux_clks,
372 samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks);
374 samsung_clk_register_gate(ctx, cmu->gate_clks,
377 samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks,
379 if (cmu->fixed_factor_clks)
380 samsung_clk_register_fixed_factor(ctx, cmu->fixed_factor_clks,
381 cmu->nr_fixed_factor_clks);
383 samsung_clk_extended_sleep_init(reg_base,
384 cmu->clk_regs, cmu->nr_clk_regs,
385 cmu->suspend_regs, cmu->nr_suspend_regs);
387 samsung_clk_of_add_provider(np, ctx);