1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018 BayLibre, SAS.
3 // Author: Jerome Brunet <jbrunet@baylibre.com>
5 #include "clk-regmap.h"
7 static int clk_regmap_gate_endisable(struct clk_hw *hw, int enable)
9 struct clk_regmap *clk = to_clk_regmap(hw);
10 struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);
11 int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
15 return regmap_update_bits(clk->map, gate->offset, BIT(gate->bit_idx),
16 set ? BIT(gate->bit_idx) : 0);
19 static int clk_regmap_gate_enable(struct clk_hw *hw)
21 return clk_regmap_gate_endisable(hw, 1);
24 static void clk_regmap_gate_disable(struct clk_hw *hw)
26 clk_regmap_gate_endisable(hw, 0);
29 static int clk_regmap_gate_is_enabled(struct clk_hw *hw)
31 struct clk_regmap *clk = to_clk_regmap(hw);
32 struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);
35 regmap_read(clk->map, gate->offset, &val);
36 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
37 val ^= BIT(gate->bit_idx);
39 val &= BIT(gate->bit_idx);
44 const struct clk_ops clk_regmap_gate_ops = {
45 .enable = clk_regmap_gate_enable,
46 .disable = clk_regmap_gate_disable,
47 .is_enabled = clk_regmap_gate_is_enabled,
49 EXPORT_SYMBOL_GPL(clk_regmap_gate_ops);
51 static unsigned long clk_regmap_div_recalc_rate(struct clk_hw *hw,
54 struct clk_regmap *clk = to_clk_regmap(hw);
55 struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
59 ret = regmap_read(clk->map, div->offset, &val);
61 /* Gives a hint that something is wrong */
65 val &= clk_div_mask(div->width);
66 return divider_recalc_rate(hw, prate, val, div->table, div->flags,
70 static long clk_regmap_div_round_rate(struct clk_hw *hw, unsigned long rate,
73 struct clk_regmap *clk = to_clk_regmap(hw);
74 struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
78 /* if read only, just return current value */
79 if (div->flags & CLK_DIVIDER_READ_ONLY) {
80 ret = regmap_read(clk->map, div->offset, &val);
82 /* Gives a hint that something is wrong */
86 val &= clk_div_mask(div->width);
88 return divider_ro_round_rate(hw, rate, prate, div->table,
89 div->width, div->flags, val);
92 return divider_round_rate(hw, rate, prate, div->table, div->width,
96 static int clk_regmap_div_set_rate(struct clk_hw *hw, unsigned long rate,
97 unsigned long parent_rate)
99 struct clk_regmap *clk = to_clk_regmap(hw);
100 struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
104 ret = divider_get_val(rate, parent_rate, div->table, div->width,
109 val = (unsigned int)ret << div->shift;
110 return regmap_update_bits(clk->map, div->offset,
111 clk_div_mask(div->width) << div->shift, val);
114 /* Would prefer clk_regmap_div_ro_ops but clashes with qcom */
116 const struct clk_ops clk_regmap_divider_ops = {
117 .recalc_rate = clk_regmap_div_recalc_rate,
118 .round_rate = clk_regmap_div_round_rate,
119 .set_rate = clk_regmap_div_set_rate,
121 EXPORT_SYMBOL_GPL(clk_regmap_divider_ops);
123 const struct clk_ops clk_regmap_divider_ro_ops = {
124 .recalc_rate = clk_regmap_div_recalc_rate,
125 .round_rate = clk_regmap_div_round_rate,
127 EXPORT_SYMBOL_GPL(clk_regmap_divider_ro_ops);
129 static u8 clk_regmap_mux_get_parent(struct clk_hw *hw)
131 struct clk_regmap *clk = to_clk_regmap(hw);
132 struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);
136 ret = regmap_read(clk->map, mux->offset, &val);
142 return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
145 static int clk_regmap_mux_set_parent(struct clk_hw *hw, u8 index)
147 struct clk_regmap *clk = to_clk_regmap(hw);
148 struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);
149 unsigned int val = clk_mux_index_to_val(mux->table, mux->flags, index);
151 return regmap_update_bits(clk->map, mux->offset,
152 mux->mask << mux->shift,
156 const struct clk_ops clk_regmap_mux_ops = {
157 .get_parent = clk_regmap_mux_get_parent,
158 .set_parent = clk_regmap_mux_set_parent,
159 .determine_rate = __clk_mux_determine_rate,
161 EXPORT_SYMBOL_GPL(clk_regmap_mux_ops);
163 const struct clk_ops clk_regmap_mux_ro_ops = {
164 .get_parent = clk_regmap_mux_get_parent,
166 EXPORT_SYMBOL_GPL(clk_regmap_mux_ro_ops);