Merge tag '9p-for-5.3' of git://github.com/martinetd/linux
[linux-2.6-microblaze.git] / drivers / clk / mediatek / clk-mt8183-venc.c
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2018 MediaTek Inc.
4 // Author: Weiyi Lu <weiyi.lu@mediatek.com>
5
6 #include <linux/clk-provider.h>
7 #include <linux/platform_device.h>
8
9 #include "clk-mtk.h"
10 #include "clk-gate.h"
11
12 #include <dt-bindings/clock/mt8183-clk.h>
13
14 static const struct mtk_gate_regs venc_cg_regs = {
15         .set_ofs = 0x4,
16         .clr_ofs = 0x8,
17         .sta_ofs = 0x0,
18 };
19
20 #define GATE_VENC_I(_id, _name, _parent, _shift)                \
21         GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift,    \
22                 &mtk_clk_gate_ops_setclr_inv)
23
24 static const struct mtk_gate venc_clks[] = {
25         GATE_VENC_I(CLK_VENC_LARB, "venc_larb",
26                 "mm_sel", 0),
27         GATE_VENC_I(CLK_VENC_VENC, "venc_venc",
28                 "mm_sel", 4),
29         GATE_VENC_I(CLK_VENC_JPGENC, "venc_jpgenc",
30                 "mm_sel", 8),
31 };
32
33 static int clk_mt8183_venc_probe(struct platform_device *pdev)
34 {
35         struct clk_onecell_data *clk_data;
36         struct device_node *node = pdev->dev.of_node;
37
38         clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
39
40         mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
41                         clk_data);
42
43         return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
44 }
45
46 static const struct of_device_id of_match_clk_mt8183_venc[] = {
47         { .compatible = "mediatek,mt8183-vencsys", },
48         {}
49 };
50
51 static struct platform_driver clk_mt8183_venc_drv = {
52         .probe = clk_mt8183_venc_probe,
53         .driver = {
54                 .name = "clk-mt8183-venc",
55                 .of_match_table = of_match_clk_mt8183_venc,
56         },
57 };
58
59 builtin_platform_driver(clk_mt8183_venc_drv);