Merge tag 'tag-chrome-platform-for-v5.2' of ssh://gitolite.kernel.org/pub/scm/linux...
[linux-2.6-microblaze.git] / drivers / clk / mediatek / clk-mt6797-img.c
1 /* Copyright (c) 2017 MediaTek Inc.
2  * Author: Kevin Chen <kevin-cw.chen@mediatek.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13
14 #include <linux/clk-provider.h>
15 #include <linux/platform_device.h>
16 #include <dt-bindings/clock/mt6797-clk.h>
17
18 #include "clk-mtk.h"
19 #include "clk-gate.h"
20
21 static const struct mtk_gate_regs img_cg_regs = {
22         .set_ofs = 0x0004,
23         .clr_ofs = 0x0008,
24         .sta_ofs = 0x0000,
25 };
26
27 #define GATE_IMG(_id, _name, _parent, _shift) {         \
28                 .id = _id,                              \
29                 .name = _name,                          \
30                 .parent_name = _parent,                 \
31                 .regs = &img_cg_regs,                   \
32                 .shift = _shift,                        \
33                 .ops = &mtk_clk_gate_ops_setclr,        \
34         }
35
36 static const struct mtk_gate img_clks[] = {
37         GATE_IMG(CLK_IMG_FDVT, "img_fdvt", "mm_sel", 11),
38         GATE_IMG(CLK_IMG_DPE, "img_dpe", "mm_sel", 10),
39         GATE_IMG(CLK_IMG_DIP, "img_dip", "mm_sel", 6),
40         GATE_IMG(CLK_IMG_LARB6, "img_larb6", "mm_sel", 0),
41 };
42
43 static const struct of_device_id of_match_clk_mt6797_img[] = {
44         { .compatible = "mediatek,mt6797-imgsys", },
45         {}
46 };
47
48 static int clk_mt6797_img_probe(struct platform_device *pdev)
49 {
50         struct clk_onecell_data *clk_data;
51         int r;
52         struct device_node *node = pdev->dev.of_node;
53
54         clk_data = mtk_alloc_clk_data(CLK_IMG_NR);
55
56         mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
57                                clk_data);
58
59         r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
60         if (r)
61                 dev_err(&pdev->dev,
62                         "could not register clock provider: %s: %d\n",
63                         pdev->name, r);
64
65         return r;
66 }
67
68 static struct platform_driver clk_mt6797_img_drv = {
69         .probe = clk_mt6797_img_probe,
70         .driver = {
71                 .name = "clk-mt6797-img",
72                 .of_match_table = of_match_clk_mt6797_img,
73         },
74 };
75
76 builtin_platform_driver(clk_mt6797_img_drv);