Merge drm/drm-next into drm-intel-next-queued
[linux-2.6-microblaze.git] / drivers / clk / mediatek / clk-mt6779-aud.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2019 MediaTek Inc.
4  * Author: Wendell Lin <wendell.lin@mediatek.com>
5  */
6
7 #include <linux/clk-provider.h>
8 #include <linux/of.h>
9 #include <linux/of_address.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12
13 #include "clk-mtk.h"
14 #include "clk-gate.h"
15
16 #include <dt-bindings/clock/mt6779-clk.h>
17
18 static const struct mtk_gate_regs audio0_cg_regs = {
19         .set_ofs = 0x0,
20         .clr_ofs = 0x0,
21         .sta_ofs = 0x0,
22 };
23
24 static const struct mtk_gate_regs audio1_cg_regs = {
25         .set_ofs = 0x4,
26         .clr_ofs = 0x4,
27         .sta_ofs = 0x4,
28 };
29
30 #define GATE_AUDIO0(_id, _name, _parent, _shift)                \
31         GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift,  \
32                 &mtk_clk_gate_ops_no_setclr)
33 #define GATE_AUDIO1(_id, _name, _parent, _shift)                \
34         GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift,  \
35                 &mtk_clk_gate_ops_no_setclr)
36
37 static const struct mtk_gate audio_clks[] = {
38         /* AUDIO0 */
39         GATE_AUDIO0(CLK_AUD_AFE, "aud_afe", "audio_sel", 2),
40         GATE_AUDIO0(CLK_AUD_22M, "aud_22m", "aud_eng1_sel", 8),
41         GATE_AUDIO0(CLK_AUD_24M, "aud_24m", "aud_eng2_sel", 9),
42         GATE_AUDIO0(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner",
43                     "aud_eng2_sel", 18),
44         GATE_AUDIO0(CLK_AUD_APLL_TUNER, "aud_apll_tuner",
45                     "aud_eng1_sel", 19),
46         GATE_AUDIO0(CLK_AUD_TDM, "aud_tdm", "aud_eng1_sel", 20),
47         GATE_AUDIO0(CLK_AUD_ADC, "aud_adc", "audio_sel", 24),
48         GATE_AUDIO0(CLK_AUD_DAC, "aud_dac", "audio_sel", 25),
49         GATE_AUDIO0(CLK_AUD_DAC_PREDIS, "aud_dac_predis",
50                     "audio_sel", 26),
51         GATE_AUDIO0(CLK_AUD_TML, "aud_tml", "audio_sel", 27),
52         GATE_AUDIO0(CLK_AUD_NLE, "aud_nle", "audio_sel", 28),
53         /* AUDIO1 */
54         GATE_AUDIO1(CLK_AUD_I2S1_BCLK_SW, "aud_i2s1_bclk",
55                     "audio_sel", 4),
56         GATE_AUDIO1(CLK_AUD_I2S2_BCLK_SW, "aud_i2s2_bclk",
57                     "audio_sel", 5),
58         GATE_AUDIO1(CLK_AUD_I2S3_BCLK_SW, "aud_i2s3_bclk",
59                     "audio_sel", 6),
60         GATE_AUDIO1(CLK_AUD_I2S4_BCLK_SW, "aud_i2s4_bclk",
61                     "audio_sel", 7),
62         GATE_AUDIO1(CLK_AUD_I2S5_BCLK_SW, "aud_i2s5_bclk",
63                     "audio_sel", 8),
64         GATE_AUDIO1(CLK_AUD_CONN_I2S_ASRC, "aud_conn_i2s",
65                     "audio_sel", 12),
66         GATE_AUDIO1(CLK_AUD_GENERAL1_ASRC, "aud_general1",
67                     "audio_sel", 13),
68         GATE_AUDIO1(CLK_AUD_GENERAL2_ASRC, "aud_general2",
69                     "audio_sel", 14),
70         GATE_AUDIO1(CLK_AUD_DAC_HIRES, "aud_dac_hires",
71                     "audio_h_sel", 15),
72         GATE_AUDIO1(CLK_AUD_ADC_HIRES, "aud_adc_hires",
73                     "audio_h_sel", 16),
74         GATE_AUDIO1(CLK_AUD_ADC_HIRES_TML, "aud_adc_hires_tml",
75                     "audio_h_sel", 17),
76         GATE_AUDIO1(CLK_AUD_PDN_ADDA6_ADC, "aud_pdn_adda6_adc",
77                     "audio_sel", 20),
78         GATE_AUDIO1(CLK_AUD_ADDA6_ADC_HIRES, "aud_adda6_adc_hires",
79                     "audio_h_sel",
80                     21),
81         GATE_AUDIO1(CLK_AUD_3RD_DAC, "aud_3rd_dac", "audio_sel",
82                     28),
83         GATE_AUDIO1(CLK_AUD_3RD_DAC_PREDIS, "aud_3rd_dac_predis",
84                     "audio_sel", 29),
85         GATE_AUDIO1(CLK_AUD_3RD_DAC_TML, "aud_3rd_dac_tml",
86                     "audio_sel", 30),
87         GATE_AUDIO1(CLK_AUD_3RD_DAC_HIRES, "aud_3rd_dac_hires",
88                     "audio_h_sel", 31),
89 };
90
91 static const struct of_device_id of_match_clk_mt6779_aud[] = {
92         { .compatible = "mediatek,mt6779-audio", },
93         {}
94 };
95
96 static int clk_mt6779_aud_probe(struct platform_device *pdev)
97 {
98         struct clk_onecell_data *clk_data;
99         struct device_node *node = pdev->dev.of_node;
100
101         clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK);
102
103         mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
104                                clk_data);
105
106         return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
107 }
108
109 static struct platform_driver clk_mt6779_aud_drv = {
110         .probe = clk_mt6779_aud_probe,
111         .driver = {
112                 .name = "clk-mt6779-aud",
113                 .of_match_table = of_match_clk_mt6779_aud,
114         },
115 };
116
117 builtin_platform_driver(clk_mt6779_aud_drv);