2 * Hisilicon clock driver
4 * Copyright (c) 2012-2013 Hisilicon Limited.
5 * Copyright (c) 2012-2013 Linaro Limited.
7 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
8 * Xin Li <li.xin@linaro.org>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26 #include <linux/kernel.h>
27 #include <linux/clkdev.h>
28 #include <linux/clk-provider.h>
29 #include <linux/delay.h>
32 #include <linux/of_address.h>
33 #include <linux/of_device.h>
34 #include <linux/slab.h>
38 static DEFINE_SPINLOCK(hisi_clk_lock);
40 struct hisi_clock_data *hisi_clk_alloc(struct platform_device *pdev,
43 struct hisi_clock_data *clk_data;
45 struct clk **clk_table;
47 clk_data = devm_kmalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);
51 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
54 clk_data->base = devm_ioremap(&pdev->dev,
55 res->start, resource_size(res));
59 clk_table = devm_kmalloc_array(&pdev->dev, nr_clks,
65 clk_data->clk_data.clks = clk_table;
66 clk_data->clk_data.clk_num = nr_clks;
70 EXPORT_SYMBOL_GPL(hisi_clk_alloc);
72 struct hisi_clock_data *hisi_clk_init(struct device_node *np,
75 struct hisi_clock_data *clk_data;
76 struct clk **clk_table;
79 base = of_iomap(np, 0);
81 pr_err("%s: failed to map clock registers\n", __func__);
85 clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
89 clk_data->base = base;
90 clk_table = kcalloc(nr_clks, sizeof(*clk_table), GFP_KERNEL);
94 clk_data->clk_data.clks = clk_table;
95 clk_data->clk_data.clk_num = nr_clks;
96 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data->clk_data);
103 EXPORT_SYMBOL_GPL(hisi_clk_init);
105 int hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock *clks,
106 int nums, struct hisi_clock_data *data)
111 for (i = 0; i < nums; i++) {
112 clk = clk_register_fixed_rate(NULL, clks[i].name,
117 pr_err("%s: failed to register clock %s\n",
118 __func__, clks[i].name);
121 data->clk_data.clks[clks[i].id] = clk;
128 clk_unregister_fixed_rate(data->clk_data.clks[clks[i].id]);
132 EXPORT_SYMBOL_GPL(hisi_clk_register_fixed_rate);
134 int hisi_clk_register_fixed_factor(const struct hisi_fixed_factor_clock *clks,
136 struct hisi_clock_data *data)
141 for (i = 0; i < nums; i++) {
142 clk = clk_register_fixed_factor(NULL, clks[i].name,
144 clks[i].flags, clks[i].mult,
147 pr_err("%s: failed to register clock %s\n",
148 __func__, clks[i].name);
151 data->clk_data.clks[clks[i].id] = clk;
158 clk_unregister_fixed_factor(data->clk_data.clks[clks[i].id]);
162 EXPORT_SYMBOL_GPL(hisi_clk_register_fixed_factor);
164 int hisi_clk_register_mux(const struct hisi_mux_clock *clks,
165 int nums, struct hisi_clock_data *data)
168 void __iomem *base = data->base;
171 for (i = 0; i < nums; i++) {
172 u32 mask = BIT(clks[i].width) - 1;
174 clk = clk_register_mux_table(NULL, clks[i].name,
175 clks[i].parent_names,
176 clks[i].num_parents, clks[i].flags,
177 base + clks[i].offset, clks[i].shift,
178 mask, clks[i].mux_flags,
179 clks[i].table, &hisi_clk_lock);
181 pr_err("%s: failed to register clock %s\n",
182 __func__, clks[i].name);
187 clk_register_clkdev(clk, clks[i].alias, NULL);
189 data->clk_data.clks[clks[i].id] = clk;
196 clk_unregister_mux(data->clk_data.clks[clks[i].id]);
200 EXPORT_SYMBOL_GPL(hisi_clk_register_mux);
202 int hisi_clk_register_phase(struct device *dev,
203 const struct hisi_phase_clock *clks,
204 int nums, struct hisi_clock_data *data)
206 void __iomem *base = data->base;
210 for (i = 0; i < nums; i++) {
211 clk = clk_register_hisi_phase(dev, &clks[i], base,
214 pr_err("%s: failed to register clock %s\n", __func__,
219 data->clk_data.clks[clks[i].id] = clk;
224 EXPORT_SYMBOL_GPL(hisi_clk_register_phase);
226 int hisi_clk_register_divider(const struct hisi_divider_clock *clks,
227 int nums, struct hisi_clock_data *data)
230 void __iomem *base = data->base;
233 for (i = 0; i < nums; i++) {
234 clk = clk_register_divider_table(NULL, clks[i].name,
237 base + clks[i].offset,
238 clks[i].shift, clks[i].width,
243 pr_err("%s: failed to register clock %s\n",
244 __func__, clks[i].name);
249 clk_register_clkdev(clk, clks[i].alias, NULL);
251 data->clk_data.clks[clks[i].id] = clk;
258 clk_unregister_divider(data->clk_data.clks[clks[i].id]);
262 EXPORT_SYMBOL_GPL(hisi_clk_register_divider);
264 int hisi_clk_register_gate(const struct hisi_gate_clock *clks,
265 int nums, struct hisi_clock_data *data)
268 void __iomem *base = data->base;
271 for (i = 0; i < nums; i++) {
272 clk = clk_register_gate(NULL, clks[i].name,
275 base + clks[i].offset,
280 pr_err("%s: failed to register clock %s\n",
281 __func__, clks[i].name);
286 clk_register_clkdev(clk, clks[i].alias, NULL);
288 data->clk_data.clks[clks[i].id] = clk;
295 clk_unregister_gate(data->clk_data.clks[clks[i].id]);
299 EXPORT_SYMBOL_GPL(hisi_clk_register_gate);
301 void hisi_clk_register_gate_sep(const struct hisi_gate_clock *clks,
302 int nums, struct hisi_clock_data *data)
305 void __iomem *base = data->base;
308 for (i = 0; i < nums; i++) {
309 clk = hisi_register_clkgate_sep(NULL, clks[i].name,
312 base + clks[i].offset,
317 pr_err("%s: failed to register clock %s\n",
318 __func__, clks[i].name);
323 clk_register_clkdev(clk, clks[i].alias, NULL);
325 data->clk_data.clks[clks[i].id] = clk;
328 EXPORT_SYMBOL_GPL(hisi_clk_register_gate_sep);
330 void __init hi6220_clk_register_divider(const struct hi6220_divider_clock *clks,
331 int nums, struct hisi_clock_data *data)
334 void __iomem *base = data->base;
337 for (i = 0; i < nums; i++) {
338 clk = hi6220_register_clkdiv(NULL, clks[i].name,
341 base + clks[i].offset,
347 pr_err("%s: failed to register clock %s\n",
348 __func__, clks[i].name);
353 clk_register_clkdev(clk, clks[i].alias, NULL);
355 data->clk_data.clks[clks[i].id] = clk;