1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 #include <linux/module.h>
6 #include <linux/clk-provider.h>
7 #include <linux/slab.h>
10 #include <linux/platform_device.h>
13 * DOC: basic fixed multiplier and divider clock that cannot gate
15 * Traits of this clock:
16 * prepare - clk_prepare only ensures that parents are prepared
17 * enable - clk_enable only ensures that parents are enabled
18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
19 * parent - fixed parent. No clk_set_parent support
22 static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
23 unsigned long parent_rate)
25 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
26 unsigned long long int rate;
28 rate = (unsigned long long int)parent_rate * fix->mult;
29 do_div(rate, fix->div);
30 return (unsigned long)rate;
33 static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
36 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
38 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
39 unsigned long best_parent;
41 best_parent = (rate / fix->mult) * fix->div;
42 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
45 return (*prate / fix->div) * fix->mult;
48 static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
49 unsigned long parent_rate)
52 * We must report success but we can do so unconditionally because
53 * clk_factor_round_rate returns values that ensure this call is a
60 const struct clk_ops clk_fixed_factor_ops = {
61 .round_rate = clk_factor_round_rate,
62 .set_rate = clk_factor_set_rate,
63 .recalc_rate = clk_factor_recalc_rate,
65 EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
67 struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
68 const char *name, const char *parent_name, unsigned long flags,
69 unsigned int mult, unsigned int div)
71 struct clk_fixed_factor *fix;
72 struct clk_init_data init;
76 fix = kmalloc(sizeof(*fix), GFP_KERNEL);
78 return ERR_PTR(-ENOMEM);
80 /* struct clk_fixed_factor assignments */
86 init.ops = &clk_fixed_factor_ops;
87 init.flags = flags | CLK_IS_BASIC;
88 init.parent_names = &parent_name;
92 ret = clk_hw_register(dev, hw);
100 EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
102 struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
103 const char *parent_name, unsigned long flags,
104 unsigned int mult, unsigned int div)
108 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
114 EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
116 void clk_unregister_fixed_factor(struct clk *clk)
120 hw = __clk_get_hw(clk);
125 kfree(to_clk_fixed_factor(hw));
127 EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
129 void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
131 struct clk_fixed_factor *fix;
133 fix = to_clk_fixed_factor(hw);
135 clk_hw_unregister(hw);
138 EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
141 static const struct of_device_id set_rate_parent_matches[] = {
142 { .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
146 static struct clk *_of_fixed_factor_clk_setup(struct device_node *node)
149 const char *clk_name = node->name;
150 const char *parent_name;
151 unsigned long flags = 0;
155 if (of_property_read_u32(node, "clock-div", &div)) {
156 pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
158 return ERR_PTR(-EIO);
161 if (of_property_read_u32(node, "clock-mult", &mult)) {
162 pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
164 return ERR_PTR(-EIO);
167 of_property_read_string(node, "clock-output-names", &clk_name);
168 parent_name = of_clk_get_parent_name(node, 0);
170 if (of_match_node(set_rate_parent_matches, node))
171 flags |= CLK_SET_RATE_PARENT;
173 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
177 * If parent clock is not registered, registration would fail.
178 * Clear OF_POPULATED flag so that clock registration can be
179 * attempted again from probe function.
181 of_node_clear_flag(node, OF_POPULATED);
185 ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
195 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
197 void __init of_fixed_factor_clk_setup(struct device_node *node)
199 _of_fixed_factor_clk_setup(node);
201 CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
202 of_fixed_factor_clk_setup);
204 static int of_fixed_factor_clk_remove(struct platform_device *pdev)
206 struct clk *clk = platform_get_drvdata(pdev);
208 of_clk_del_provider(pdev->dev.of_node);
209 clk_unregister_fixed_factor(clk);
214 static int of_fixed_factor_clk_probe(struct platform_device *pdev)
219 * This function is not executed when of_fixed_factor_clk_setup
222 clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
226 platform_set_drvdata(pdev, clk);
231 static const struct of_device_id of_fixed_factor_clk_ids[] = {
232 { .compatible = "fixed-factor-clock" },
235 MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
237 static struct platform_driver of_fixed_factor_clk_driver = {
239 .name = "of_fixed_factor_clk",
240 .of_match_table = of_fixed_factor_clk_ids,
242 .probe = of_fixed_factor_clk_probe,
243 .remove = of_fixed_factor_clk_remove,
245 builtin_platform_driver(of_fixed_factor_clk_driver);