drivers/clk/clk-conf.c

   1 /*
   2  * Copyright (C) 2014 Samsung Electronics Co., Ltd.
   3  * Sylwester Nawrocki <s.nawrocki@samsung.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/clk-provider.h>
  12 #include <linux/clk/clk-conf.h>
  13 #include <linux/device.h>
  14 #include <linux/of.h>
  15 #include <linux/printk.h>
  16
  17 static int __set_clk_parents(struct device_node *node, bool clk_supplier)
  18 {
  19         struct of_phandle_args clkspec;
  20         int index, rc, num_parents;
  21         struct clk *clk, *pclk;
  22
  23         num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
  24                                                  "#clock-cells");
  25         if (num_parents == -EINVAL)
  26                 pr_err("clk: invalid value of clock-parents property at %pOF\n",
  27                        node);
  28
  29         for (index = 0; index < num_parents; index++) {
  30                 rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
  31                                         "#clock-cells", index, &clkspec);
  32                 if (rc < 0) {
  33                         /* skip empty (null) phandles */
  34                         if (rc == -ENOENT)
  35                                 continue;
  36                         else
  37                                 return rc;
  38                 }
  39                 if (clkspec.np == node && !clk_supplier)
  40                         return 0;
  41                 pclk = of_clk_get_from_provider(&clkspec);
  42                 if (IS_ERR(pclk)) {
  43                         if (PTR_ERR(pclk) != -EPROBE_DEFER)
  44                                 pr_warn("clk: couldn't get parent clock %d for %pOF\n",
  45                                         index, node);
  46                         return PTR_ERR(pclk);
  47                 }
  48
  49                 rc = of_parse_phandle_with_args(node, "assigned-clocks",
  50                                         "#clock-cells", index, &clkspec);
  51                 if (rc < 0)
  52                         goto err;
  53                 if (clkspec.np == node && !clk_supplier) {
  54                         rc = 0;
  55                         goto err;
  56                 }
  57                 clk = of_clk_get_from_provider(&clkspec);
  58                 if (IS_ERR(clk)) {
  59                         if (PTR_ERR(clk) != -EPROBE_DEFER)
  60                                 pr_warn("clk: couldn't get assigned clock %d for %pOF\n",
  61                                         index, node);
  62                         rc = PTR_ERR(clk);
  63                         goto err;
  64                 }
  65
  66                 rc = clk_set_parent(clk, pclk);
  67                 if (rc < 0)
  68                         pr_err("clk: failed to reparent %s to %s: %d\n",
  69                                __clk_get_name(clk), __clk_get_name(pclk), rc);
  70                 clk_put(clk);
  71                 clk_put(pclk);
  72         }
  73         return 0;
  74 err:
  75         clk_put(pclk);
  76         return rc;
  77 }
  78
  79 static int __set_clk_rates(struct device_node *node, bool clk_supplier)
  80 {
  81         struct of_phandle_args clkspec;
  82         struct property *prop;
  83         const __be32 *cur;
  84         int rc, index = 0;
  85         struct clk *clk;
  86         u32 rate;
  87
  88         of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
  89                 if (rate) {
  90                         rc = of_parse_phandle_with_args(node, "assigned-clocks",
  91                                         "#clock-cells", index, &clkspec);
  92                         if (rc < 0) {
  93                                 /* skip empty (null) phandles */
  94                                 if (rc == -ENOENT)
  95                                         continue;
  96                                 else
  97                                         return rc;
  98                         }
  99                         if (clkspec.np == node && !clk_supplier)
 100                                 return 0;
 101
 102                         clk = of_clk_get_from_provider(&clkspec);
 103                         if (IS_ERR(clk)) {
 104                                 if (PTR_ERR(clk) != -EPROBE_DEFER)
 105                                         pr_warn("clk: couldn't get clock %d for %pOF\n",
 106                                                 index, node);
 107                                 return PTR_ERR(clk);
 108                         }
 109
 110                         rc = clk_set_rate(clk, rate);
 111                         if (rc < 0)
 112                                 pr_err("clk: couldn't set %s clk rate to %u (%d), current rate: %lu\n",
 113                                        __clk_get_name(clk), rate, rc,
 114                                        clk_get_rate(clk));
 115                         clk_put(clk);
 116                 }
 117                 index++;
 118         }
 119         return 0;
 120 }
 121
 122 /**
 123  * of_clk_set_defaults() - parse and set assigned clocks configuration
 124  * @node: device node to apply clock settings for
 125  * @clk_supplier: true if clocks supplied by @node should also be considered
 126  *
 127  * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
 128  * and sets any specified clock parents and rates. The @clk_supplier argument
 129  * should be set to true if @node may be also a clock supplier of any clock
 130  * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
 131  * If @clk_supplier is false the function exits returning 0 as soon as it
 132  * determines the @node is also a supplier of any of the clocks.
 133  */
 134 int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
 135 {
 136         int rc;
 137
 138         if (!node)
 139                 return 0;
 140
 141         rc = __set_clk_parents(node, clk_supplier);
 142         if (rc < 0)
 143                 return rc;
 144
 145         return __set_clk_rates(node, clk_supplier);
 146 }
 147 EXPORT_SYMBOL_GPL(of_clk_set_defaults);