1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
6 #include <linux/clk-provider.h>
7 #include <linux/device.h>
9 #include <linux/slab.h>
11 static u8 clk_composite_get_parent(struct clk_hw *hw)
13 struct clk_composite *composite = to_clk_composite(hw);
14 const struct clk_ops *mux_ops = composite->mux_ops;
15 struct clk_hw *mux_hw = composite->mux_hw;
17 __clk_hw_set_clk(mux_hw, hw);
19 return mux_ops->get_parent(mux_hw);
22 static int clk_composite_set_parent(struct clk_hw *hw, u8 index)
24 struct clk_composite *composite = to_clk_composite(hw);
25 const struct clk_ops *mux_ops = composite->mux_ops;
26 struct clk_hw *mux_hw = composite->mux_hw;
28 __clk_hw_set_clk(mux_hw, hw);
30 return mux_ops->set_parent(mux_hw, index);
33 static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
34 unsigned long parent_rate)
36 struct clk_composite *composite = to_clk_composite(hw);
37 const struct clk_ops *rate_ops = composite->rate_ops;
38 struct clk_hw *rate_hw = composite->rate_hw;
40 __clk_hw_set_clk(rate_hw, hw);
42 return rate_ops->recalc_rate(rate_hw, parent_rate);
45 static int clk_composite_determine_rate_for_parent(struct clk_hw *rate_hw,
46 struct clk_rate_request *req,
47 struct clk_hw *parent_hw,
48 const struct clk_ops *rate_ops)
52 req->best_parent_hw = parent_hw;
53 req->best_parent_rate = clk_hw_get_rate(parent_hw);
55 if (rate_ops->determine_rate)
56 return rate_ops->determine_rate(rate_hw, req);
58 rate = rate_ops->round_rate(rate_hw, req->rate,
59 &req->best_parent_rate);
68 static int clk_composite_determine_rate(struct clk_hw *hw,
69 struct clk_rate_request *req)
71 struct clk_composite *composite = to_clk_composite(hw);
72 const struct clk_ops *rate_ops = composite->rate_ops;
73 const struct clk_ops *mux_ops = composite->mux_ops;
74 struct clk_hw *rate_hw = composite->rate_hw;
75 struct clk_hw *mux_hw = composite->mux_hw;
76 struct clk_hw *parent;
77 unsigned long rate_diff;
78 unsigned long best_rate_diff = ULONG_MAX;
79 unsigned long best_rate = 0;
82 if (rate_hw && rate_ops &&
83 (rate_ops->determine_rate || rate_ops->round_rate) &&
84 mux_hw && mux_ops && mux_ops->set_parent) {
85 req->best_parent_hw = NULL;
87 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
88 struct clk_rate_request tmp_req = *req;
90 parent = clk_hw_get_parent(mux_hw);
92 ret = clk_composite_determine_rate_for_parent(rate_hw,
99 req->rate = tmp_req.rate;
100 req->best_parent_rate = tmp_req.best_parent_rate;
105 for (i = 0; i < clk_hw_get_num_parents(mux_hw); i++) {
106 struct clk_rate_request tmp_req = *req;
108 parent = clk_hw_get_parent_by_index(mux_hw, i);
112 ret = clk_composite_determine_rate_for_parent(rate_hw,
119 rate_diff = abs(req->rate - tmp_req.rate);
121 if (!rate_diff || !req->best_parent_hw
122 || best_rate_diff > rate_diff) {
123 req->best_parent_hw = parent;
124 req->best_parent_rate = tmp_req.best_parent_rate;
125 best_rate_diff = rate_diff;
126 best_rate = tmp_req.rate;
133 req->rate = best_rate;
135 } else if (rate_hw && rate_ops && rate_ops->determine_rate) {
136 __clk_hw_set_clk(rate_hw, hw);
137 return rate_ops->determine_rate(rate_hw, req);
138 } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
139 __clk_hw_set_clk(mux_hw, hw);
140 return mux_ops->determine_rate(mux_hw, req);
142 pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
147 static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
148 unsigned long *prate)
150 struct clk_composite *composite = to_clk_composite(hw);
151 const struct clk_ops *rate_ops = composite->rate_ops;
152 struct clk_hw *rate_hw = composite->rate_hw;
154 __clk_hw_set_clk(rate_hw, hw);
156 return rate_ops->round_rate(rate_hw, rate, prate);
159 static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
160 unsigned long parent_rate)
162 struct clk_composite *composite = to_clk_composite(hw);
163 const struct clk_ops *rate_ops = composite->rate_ops;
164 struct clk_hw *rate_hw = composite->rate_hw;
166 __clk_hw_set_clk(rate_hw, hw);
168 return rate_ops->set_rate(rate_hw, rate, parent_rate);
171 static int clk_composite_set_rate_and_parent(struct clk_hw *hw,
173 unsigned long parent_rate,
176 struct clk_composite *composite = to_clk_composite(hw);
177 const struct clk_ops *rate_ops = composite->rate_ops;
178 const struct clk_ops *mux_ops = composite->mux_ops;
179 struct clk_hw *rate_hw = composite->rate_hw;
180 struct clk_hw *mux_hw = composite->mux_hw;
181 unsigned long temp_rate;
183 __clk_hw_set_clk(rate_hw, hw);
184 __clk_hw_set_clk(mux_hw, hw);
186 temp_rate = rate_ops->recalc_rate(rate_hw, parent_rate);
187 if (temp_rate > rate) {
188 rate_ops->set_rate(rate_hw, rate, parent_rate);
189 mux_ops->set_parent(mux_hw, index);
191 mux_ops->set_parent(mux_hw, index);
192 rate_ops->set_rate(rate_hw, rate, parent_rate);
198 static int clk_composite_is_enabled(struct clk_hw *hw)
200 struct clk_composite *composite = to_clk_composite(hw);
201 const struct clk_ops *gate_ops = composite->gate_ops;
202 struct clk_hw *gate_hw = composite->gate_hw;
204 __clk_hw_set_clk(gate_hw, hw);
206 return gate_ops->is_enabled(gate_hw);
209 static int clk_composite_enable(struct clk_hw *hw)
211 struct clk_composite *composite = to_clk_composite(hw);
212 const struct clk_ops *gate_ops = composite->gate_ops;
213 struct clk_hw *gate_hw = composite->gate_hw;
215 __clk_hw_set_clk(gate_hw, hw);
217 return gate_ops->enable(gate_hw);
220 static void clk_composite_disable(struct clk_hw *hw)
222 struct clk_composite *composite = to_clk_composite(hw);
223 const struct clk_ops *gate_ops = composite->gate_ops;
224 struct clk_hw *gate_hw = composite->gate_hw;
226 __clk_hw_set_clk(gate_hw, hw);
228 gate_ops->disable(gate_hw);
231 static struct clk_hw *__clk_hw_register_composite(struct device *dev,
232 const char *name, const char * const *parent_names,
233 const struct clk_parent_data *pdata, int num_parents,
234 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
235 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
236 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
240 struct clk_init_data init = {};
241 struct clk_composite *composite;
242 struct clk_ops *clk_composite_ops;
245 composite = kzalloc(sizeof(*composite), GFP_KERNEL);
247 return ERR_PTR(-ENOMEM);
252 init.parent_names = parent_names;
254 init.parent_data = pdata;
255 init.num_parents = num_parents;
258 clk_composite_ops = &composite->ops;
260 if (mux_hw && mux_ops) {
261 if (!mux_ops->get_parent) {
262 hw = ERR_PTR(-EINVAL);
266 composite->mux_hw = mux_hw;
267 composite->mux_ops = mux_ops;
268 clk_composite_ops->get_parent = clk_composite_get_parent;
269 if (mux_ops->set_parent)
270 clk_composite_ops->set_parent = clk_composite_set_parent;
271 if (mux_ops->determine_rate)
272 clk_composite_ops->determine_rate = clk_composite_determine_rate;
275 if (rate_hw && rate_ops) {
276 if (!rate_ops->recalc_rate) {
277 hw = ERR_PTR(-EINVAL);
280 clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
282 if (rate_ops->determine_rate)
283 clk_composite_ops->determine_rate =
284 clk_composite_determine_rate;
285 else if (rate_ops->round_rate)
286 clk_composite_ops->round_rate =
287 clk_composite_round_rate;
289 /* .set_rate requires either .round_rate or .determine_rate */
290 if (rate_ops->set_rate) {
291 if (rate_ops->determine_rate || rate_ops->round_rate)
292 clk_composite_ops->set_rate =
293 clk_composite_set_rate;
295 WARN(1, "%s: missing round_rate op is required\n",
299 composite->rate_hw = rate_hw;
300 composite->rate_ops = rate_ops;
303 if (mux_hw && mux_ops && rate_hw && rate_ops) {
304 if (mux_ops->set_parent && rate_ops->set_rate)
305 clk_composite_ops->set_rate_and_parent =
306 clk_composite_set_rate_and_parent;
309 if (gate_hw && gate_ops) {
310 if (!gate_ops->is_enabled || !gate_ops->enable ||
311 !gate_ops->disable) {
312 hw = ERR_PTR(-EINVAL);
316 composite->gate_hw = gate_hw;
317 composite->gate_ops = gate_ops;
318 clk_composite_ops->is_enabled = clk_composite_is_enabled;
319 clk_composite_ops->enable = clk_composite_enable;
320 clk_composite_ops->disable = clk_composite_disable;
323 init.ops = clk_composite_ops;
324 composite->hw.init = &init;
326 ret = clk_hw_register(dev, hw);
332 if (composite->mux_hw)
333 composite->mux_hw->clk = hw->clk;
335 if (composite->rate_hw)
336 composite->rate_hw->clk = hw->clk;
338 if (composite->gate_hw)
339 composite->gate_hw->clk = hw->clk;
348 struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name,
349 const char * const *parent_names, int num_parents,
350 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
351 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
352 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
355 return __clk_hw_register_composite(dev, name, parent_names, NULL,
356 num_parents, mux_hw, mux_ops,
357 rate_hw, rate_ops, gate_hw,
360 EXPORT_SYMBOL_GPL(clk_hw_register_composite);
362 struct clk_hw *clk_hw_register_composite_pdata(struct device *dev,
364 const struct clk_parent_data *parent_data,
366 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
367 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
368 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
371 return __clk_hw_register_composite(dev, name, NULL, parent_data,
372 num_parents, mux_hw, mux_ops,
373 rate_hw, rate_ops, gate_hw,
377 struct clk *clk_register_composite(struct device *dev, const char *name,
378 const char * const *parent_names, int num_parents,
379 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
380 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
381 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
386 hw = clk_hw_register_composite(dev, name, parent_names, num_parents,
387 mux_hw, mux_ops, rate_hw, rate_ops, gate_hw, gate_ops,
393 EXPORT_SYMBOL_GPL(clk_register_composite);
395 struct clk *clk_register_composite_pdata(struct device *dev, const char *name,
396 const struct clk_parent_data *parent_data,
398 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
399 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
400 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
405 hw = clk_hw_register_composite_pdata(dev, name, parent_data,
406 num_parents, mux_hw, mux_ops, rate_hw, rate_ops,
407 gate_hw, gate_ops, flags);
413 void clk_unregister_composite(struct clk *clk)
415 struct clk_composite *composite;
418 hw = __clk_get_hw(clk);
422 composite = to_clk_composite(hw);
428 void clk_hw_unregister_composite(struct clk_hw *hw)
430 struct clk_composite *composite;
432 composite = to_clk_composite(hw);
434 clk_hw_unregister(hw);
437 EXPORT_SYMBOL_GPL(clk_hw_unregister_composite);
439 static void devm_clk_hw_release_composite(struct device *dev, void *res)
441 clk_hw_unregister_composite(*(struct clk_hw **)res);
444 static struct clk_hw *__devm_clk_hw_register_composite(struct device *dev,
445 const char *name, const char * const *parent_names,
446 const struct clk_parent_data *pdata, int num_parents,
447 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
448 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
449 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
452 struct clk_hw **ptr, *hw;
454 ptr = devres_alloc(devm_clk_hw_release_composite, sizeof(*ptr),
457 return ERR_PTR(-ENOMEM);
459 hw = __clk_hw_register_composite(dev, name, parent_names, pdata,
460 num_parents, mux_hw, mux_ops, rate_hw,
461 rate_ops, gate_hw, gate_ops, flags);
465 devres_add(dev, ptr);
473 struct clk_hw *devm_clk_hw_register_composite_pdata(struct device *dev,
475 const struct clk_parent_data *parent_data,
477 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
478 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
479 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
482 return __devm_clk_hw_register_composite(dev, name, NULL, parent_data,
483 num_parents, mux_hw, mux_ops,
484 rate_hw, rate_ops, gate_hw,