1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
3 #include <linux/clk/at91_pmc.h>
5 #include <linux/mfd/syscon.h>
6 #include <linux/regmap.h>
7 #include <linux/slab.h>
11 #define MASTER_SOURCE_MAX 4
13 #define PERIPHERAL_AT91RM9200 0
14 #define PERIPHERAL_AT91SAM9X5 1
16 #define PERIPHERAL_MAX 64
18 #define PERIPHERAL_ID_MIN 2
20 #define PROG_SOURCE_MAX 5
23 #define SYSTEM_MAX_ID 31
25 #define GCK_INDEX_DT_AUDIO_PLL 5
27 static DEFINE_SPINLOCK(mck_lock);
29 #ifdef CONFIG_HAVE_AT91_AUDIO_PLL
30 static void __init of_sama5d2_clk_audio_pll_frac_setup(struct device_node *np)
33 const char *name = np->name;
34 const char *parent_name;
35 struct regmap *regmap;
36 struct device_node *parent_np;
38 parent_np = of_get_parent(np);
39 regmap = syscon_node_to_regmap(parent_np);
40 of_node_put(parent_np);
44 parent_name = of_clk_get_parent_name(np, 0);
46 hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name);
50 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
52 CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_frac_setup,
53 "atmel,sama5d2-clk-audio-pll-frac",
54 of_sama5d2_clk_audio_pll_frac_setup);
56 static void __init of_sama5d2_clk_audio_pll_pad_setup(struct device_node *np)
59 const char *name = np->name;
60 const char *parent_name;
61 struct regmap *regmap;
62 struct device_node *parent_np;
64 parent_np = of_get_parent(np);
65 regmap = syscon_node_to_regmap(parent_np);
66 of_node_put(parent_np);
70 parent_name = of_clk_get_parent_name(np, 0);
72 hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name);
76 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
78 CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_pad_setup,
79 "atmel,sama5d2-clk-audio-pll-pad",
80 of_sama5d2_clk_audio_pll_pad_setup);
82 static void __init of_sama5d2_clk_audio_pll_pmc_setup(struct device_node *np)
85 const char *name = np->name;
86 const char *parent_name;
87 struct regmap *regmap;
88 struct device_node *parent_np;
90 parent_np = of_get_parent(np);
91 regmap = syscon_node_to_regmap(parent_np);
92 of_node_put(parent_np);
96 parent_name = of_clk_get_parent_name(np, 0);
98 hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name);
102 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
104 CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_pmc_setup,
105 "atmel,sama5d2-clk-audio-pll-pmc",
106 of_sama5d2_clk_audio_pll_pmc_setup);
107 #endif /* CONFIG_HAVE_AT91_AUDIO_PLL */
109 static const struct clk_pcr_layout dt_pcr_layout = {
112 .pid_mask = GENMASK(5, 0),
113 .div_mask = GENMASK(17, 16),
114 .gckcss_mask = GENMASK(10, 8),
117 #ifdef CONFIG_HAVE_AT91_GENERATED_CLK
118 #define GENERATED_SOURCE_MAX 6
120 #define GCK_ID_I2S0 54
121 #define GCK_ID_I2S1 55
122 #define GCK_ID_CLASSD 59
124 static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
130 unsigned int num_parents;
131 const char *parent_names[GENERATED_SOURCE_MAX];
132 struct device_node *gcknp, *parent_np;
133 struct clk_range range = CLK_RANGE(0, 0);
134 struct regmap *regmap;
136 num_parents = of_clk_get_parent_count(np);
137 if (num_parents == 0 || num_parents > GENERATED_SOURCE_MAX)
140 of_clk_parent_fill(np, parent_names, num_parents);
142 num = of_get_child_count(np);
143 if (!num || num > PERIPHERAL_MAX)
146 parent_np = of_get_parent(np);
147 regmap = syscon_node_to_regmap(parent_np);
148 of_node_put(parent_np);
152 for_each_child_of_node(np, gcknp) {
153 int chg_pid = INT_MIN;
155 if (of_property_read_u32(gcknp, "reg", &id))
158 if (id < PERIPHERAL_ID_MIN || id >= PERIPHERAL_MAX)
161 if (of_property_read_string(np, "clock-output-names", &name))
164 of_at91_get_clk_range(gcknp, "atmel,clk-output-range",
167 if (of_device_is_compatible(np, "atmel,sama5d2-clk-generated") &&
168 (id == GCK_ID_I2S0 || id == GCK_ID_I2S1 ||
169 id == GCK_ID_CLASSD))
170 chg_pid = GCK_INDEX_DT_AUDIO_PLL;
172 hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
173 &dt_pcr_layout, name,
174 parent_names, NULL, NULL,
175 num_parents, id, &range,
180 of_clk_add_hw_provider(gcknp, of_clk_hw_simple_get, hw);
183 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",
184 of_sama5d2_clk_generated_setup);
185 #endif /* CONFIG_HAVE_AT91_GENERATED_CLK */
187 #ifdef CONFIG_HAVE_AT91_H32MX
188 static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
191 const char *name = np->name;
192 const char *parent_name;
193 struct regmap *regmap;
194 struct device_node *parent_np;
196 parent_np = of_get_parent(np);
197 regmap = syscon_node_to_regmap(parent_np);
198 of_node_put(parent_np);
202 parent_name = of_clk_get_parent_name(np, 0);
204 hw = at91_clk_register_h32mx(regmap, name, parent_name);
208 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
210 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
211 of_sama5d4_clk_h32mx_setup);
212 #endif /* CONFIG_HAVE_AT91_H32MX */
214 #ifdef CONFIG_HAVE_AT91_I2S_MUX_CLK
217 static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
219 struct regmap *regmap_sfr;
221 const char *parent_names[2];
222 struct device_node *i2s_mux_np;
226 regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
227 if (IS_ERR(regmap_sfr))
230 for_each_child_of_node(np, i2s_mux_np) {
231 if (of_property_read_u8(i2s_mux_np, "reg", &bus_id))
234 if (bus_id > I2S_BUS_NR)
237 ret = of_clk_parent_fill(i2s_mux_np, parent_names, 2);
241 hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,
242 parent_names, 2, bus_id);
246 of_clk_add_hw_provider(i2s_mux_np, of_clk_hw_simple_get, hw);
249 CLK_OF_DECLARE(sama5d2_clk_i2s_mux, "atmel,sama5d2-clk-i2s-mux",
250 of_sama5d2_clk_i2s_mux_setup);
251 #endif /* CONFIG_HAVE_AT91_I2S_MUX_CLK */
253 static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
256 const char *name = np->name;
257 const char *parent_name;
258 struct regmap *regmap;
260 struct device_node *parent_np;
262 of_property_read_string(np, "clock-output-names", &name);
263 bypass = of_property_read_bool(np, "atmel,osc-bypass");
264 parent_name = of_clk_get_parent_name(np, 0);
266 parent_np = of_get_parent(np);
267 regmap = syscon_node_to_regmap(parent_np);
268 of_node_put(parent_np);
272 hw = at91_clk_register_main_osc(regmap, name, parent_name, NULL, bypass);
276 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
278 CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
279 of_at91rm9200_clk_main_osc_setup);
281 static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np)
286 const char *name = np->name;
287 struct regmap *regmap;
288 struct device_node *parent_np;
290 of_property_read_string(np, "clock-output-names", &name);
291 of_property_read_u32(np, "clock-frequency", &frequency);
292 of_property_read_u32(np, "clock-accuracy", &accuracy);
294 parent_np = of_get_parent(np);
295 regmap = syscon_node_to_regmap(parent_np);
296 of_node_put(parent_np);
300 hw = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);
304 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
306 CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
307 of_at91sam9x5_clk_main_rc_osc_setup);
309 static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
312 const char *parent_name;
313 const char *name = np->name;
314 struct regmap *regmap;
315 struct device_node *parent_np;
317 parent_name = of_clk_get_parent_name(np, 0);
318 of_property_read_string(np, "clock-output-names", &name);
320 parent_np = of_get_parent(np);
321 regmap = syscon_node_to_regmap(parent_np);
322 of_node_put(parent_np);
326 hw = at91_clk_register_rm9200_main(regmap, name, parent_name, NULL);
330 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
332 CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
333 of_at91rm9200_clk_main_setup);
335 static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
338 const char *parent_names[2];
339 unsigned int num_parents;
340 const char *name = np->name;
341 struct regmap *regmap;
342 struct device_node *parent_np;
344 num_parents = of_clk_get_parent_count(np);
345 if (num_parents == 0 || num_parents > 2)
348 of_clk_parent_fill(np, parent_names, num_parents);
349 parent_np = of_get_parent(np);
350 regmap = syscon_node_to_regmap(parent_np);
351 of_node_put(parent_np);
355 of_property_read_string(np, "clock-output-names", &name);
357 hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, NULL,
362 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
364 CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
365 of_at91sam9x5_clk_main_setup);
367 static struct clk_master_characteristics * __init
368 of_at91_clk_master_get_characteristics(struct device_node *np)
370 struct clk_master_characteristics *characteristics;
372 characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL);
373 if (!characteristics)
376 if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output))
377 goto out_free_characteristics;
379 of_property_read_u32_array(np, "atmel,clk-divisors",
380 characteristics->divisors, 4);
382 characteristics->have_div3_pres =
383 of_property_read_bool(np, "atmel,master-clk-have-div3-pres");
385 return characteristics;
387 out_free_characteristics:
388 kfree(characteristics);
393 of_at91_clk_master_setup(struct device_node *np,
394 const struct clk_master_layout *layout)
397 unsigned int num_parents;
398 const char *parent_names[MASTER_SOURCE_MAX];
399 const char *name = np->name;
400 struct clk_master_characteristics *characteristics;
401 struct regmap *regmap;
402 struct device_node *parent_np;
404 num_parents = of_clk_get_parent_count(np);
405 if (num_parents == 0 || num_parents > MASTER_SOURCE_MAX)
408 of_clk_parent_fill(np, parent_names, num_parents);
410 of_property_read_string(np, "clock-output-names", &name);
412 characteristics = of_at91_clk_master_get_characteristics(np);
413 if (!characteristics)
416 parent_np = of_get_parent(np);
417 regmap = syscon_node_to_regmap(parent_np);
418 of_node_put(parent_np);
422 hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents,
423 parent_names, NULL, layout,
424 characteristics, &mck_lock);
426 goto out_free_characteristics;
428 hw = at91_clk_register_master_div(regmap, name, "masterck_pres", NULL,
429 layout, characteristics,
430 &mck_lock, CLK_SET_RATE_GATE, 0);
432 goto out_free_characteristics;
434 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
437 out_free_characteristics:
438 kfree(characteristics);
441 static void __init of_at91rm9200_clk_master_setup(struct device_node *np)
443 of_at91_clk_master_setup(np, &at91rm9200_master_layout);
445 CLK_OF_DECLARE(at91rm9200_clk_master, "atmel,at91rm9200-clk-master",
446 of_at91rm9200_clk_master_setup);
448 static void __init of_at91sam9x5_clk_master_setup(struct device_node *np)
450 of_at91_clk_master_setup(np, &at91sam9x5_master_layout);
452 CLK_OF_DECLARE(at91sam9x5_clk_master, "atmel,at91sam9x5-clk-master",
453 of_at91sam9x5_clk_master_setup);
456 of_at91_clk_periph_setup(struct device_node *np, u8 type)
461 const char *parent_name;
463 struct device_node *periphclknp;
464 struct regmap *regmap;
465 struct device_node *parent_np;
467 parent_name = of_clk_get_parent_name(np, 0);
471 num = of_get_child_count(np);
472 if (!num || num > PERIPHERAL_MAX)
475 parent_np = of_get_parent(np);
476 regmap = syscon_node_to_regmap(parent_np);
477 of_node_put(parent_np);
481 for_each_child_of_node(np, periphclknp) {
482 if (of_property_read_u32(periphclknp, "reg", &id))
485 if (id >= PERIPHERAL_MAX)
488 if (of_property_read_string(np, "clock-output-names", &name))
489 name = periphclknp->name;
491 if (type == PERIPHERAL_AT91RM9200) {
492 hw = at91_clk_register_peripheral(regmap, name,
493 parent_name, NULL, id);
495 struct clk_range range = CLK_RANGE(0, 0);
496 unsigned long flags = 0;
498 of_at91_get_clk_range(periphclknp,
499 "atmel,clk-output-range",
503 * mpddr_clk feed DDR controller and is enabled by
504 * bootloader thus we need to keep it enabled in case
505 * there is no Linux consumer for it.
507 if (!strcmp(periphclknp->name, "mpddr_clk"))
508 flags = CLK_IS_CRITICAL;
510 hw = at91_clk_register_sam9x5_peripheral(regmap,
524 of_clk_add_hw_provider(periphclknp, of_clk_hw_simple_get, hw);
528 static void __init of_at91rm9200_clk_periph_setup(struct device_node *np)
530 of_at91_clk_periph_setup(np, PERIPHERAL_AT91RM9200);
532 CLK_OF_DECLARE(at91rm9200_clk_periph, "atmel,at91rm9200-clk-peripheral",
533 of_at91rm9200_clk_periph_setup);
535 static void __init of_at91sam9x5_clk_periph_setup(struct device_node *np)
537 of_at91_clk_periph_setup(np, PERIPHERAL_AT91SAM9X5);
539 CLK_OF_DECLARE(at91sam9x5_clk_periph, "atmel,at91sam9x5-clk-peripheral",
540 of_at91sam9x5_clk_periph_setup);
542 static struct clk_pll_characteristics * __init
543 of_at91_clk_pll_get_characteristics(struct device_node *np)
550 struct clk_range input;
551 struct clk_range *output;
554 struct clk_pll_characteristics *characteristics;
556 if (of_at91_get_clk_range(np, "atmel,clk-input-range", &input))
559 if (of_property_read_u32(np, "#atmel,pll-clk-output-range-cells",
563 if (num_cells < 2 || num_cells > 4)
566 if (!of_get_property(np, "atmel,pll-clk-output-ranges", &tmp))
568 num_output = tmp / (sizeof(u32) * num_cells);
570 characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL);
571 if (!characteristics)
574 output = kcalloc(num_output, sizeof(*output), GFP_KERNEL);
576 goto out_free_characteristics;
579 out = kcalloc(num_output, sizeof(*out), GFP_KERNEL);
581 goto out_free_output;
585 icpll = kcalloc(num_output, sizeof(*icpll), GFP_KERNEL);
587 goto out_free_output;
590 for (i = 0; i < num_output; i++) {
591 offset = i * num_cells;
592 if (of_property_read_u32_index(np,
593 "atmel,pll-clk-output-ranges",
595 goto out_free_output;
597 if (of_property_read_u32_index(np,
598 "atmel,pll-clk-output-ranges",
600 goto out_free_output;
606 if (of_property_read_u32_index(np,
607 "atmel,pll-clk-output-ranges",
609 goto out_free_output;
615 if (of_property_read_u32_index(np,
616 "atmel,pll-clk-output-ranges",
618 goto out_free_output;
622 characteristics->input = input;
623 characteristics->num_output = num_output;
624 characteristics->output = output;
625 characteristics->out = out;
626 characteristics->icpll = icpll;
627 return characteristics;
633 out_free_characteristics:
634 kfree(characteristics);
639 of_at91_clk_pll_setup(struct device_node *np,
640 const struct clk_pll_layout *layout)
644 struct regmap *regmap;
645 const char *parent_name;
646 const char *name = np->name;
647 struct device_node *parent_np;
648 struct clk_pll_characteristics *characteristics;
650 if (of_property_read_u32(np, "reg", &id))
653 parent_name = of_clk_get_parent_name(np, 0);
655 of_property_read_string(np, "clock-output-names", &name);
657 parent_np = of_get_parent(np);
658 regmap = syscon_node_to_regmap(parent_np);
659 of_node_put(parent_np);
663 characteristics = of_at91_clk_pll_get_characteristics(np);
664 if (!characteristics)
667 hw = at91_clk_register_pll(regmap, name, parent_name, id, layout,
670 goto out_free_characteristics;
672 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
675 out_free_characteristics:
676 kfree(characteristics);
679 static void __init of_at91rm9200_clk_pll_setup(struct device_node *np)
681 of_at91_clk_pll_setup(np, &at91rm9200_pll_layout);
683 CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll",
684 of_at91rm9200_clk_pll_setup);
686 static void __init of_at91sam9g45_clk_pll_setup(struct device_node *np)
688 of_at91_clk_pll_setup(np, &at91sam9g45_pll_layout);
690 CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll",
691 of_at91sam9g45_clk_pll_setup);
693 static void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np)
695 of_at91_clk_pll_setup(np, &at91sam9g20_pllb_layout);
697 CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb",
698 of_at91sam9g20_clk_pllb_setup);
700 static void __init of_sama5d3_clk_pll_setup(struct device_node *np)
702 of_at91_clk_pll_setup(np, &sama5d3_pll_layout);
704 CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll",
705 of_sama5d3_clk_pll_setup);
708 of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
711 const char *parent_name;
712 const char *name = np->name;
713 struct regmap *regmap;
714 struct device_node *parent_np;
716 parent_name = of_clk_get_parent_name(np, 0);
718 of_property_read_string(np, "clock-output-names", &name);
720 parent_np = of_get_parent(np);
721 regmap = syscon_node_to_regmap(parent_np);
722 of_node_put(parent_np);
726 hw = at91_clk_register_plldiv(regmap, name, parent_name);
730 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
732 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
733 of_at91sam9x5_clk_plldiv_setup);
736 of_at91_clk_prog_setup(struct device_node *np,
737 const struct clk_programmable_layout *layout,
743 unsigned int num_parents;
744 const char *parent_names[PROG_SOURCE_MAX];
746 struct device_node *progclknp, *parent_np;
747 struct regmap *regmap;
749 num_parents = of_clk_get_parent_count(np);
750 if (num_parents == 0 || num_parents > PROG_SOURCE_MAX)
753 of_clk_parent_fill(np, parent_names, num_parents);
755 num = of_get_child_count(np);
756 if (!num || num > (PROG_ID_MAX + 1))
759 parent_np = of_get_parent(np);
760 regmap = syscon_node_to_regmap(parent_np);
761 of_node_put(parent_np);
765 for_each_child_of_node(np, progclknp) {
766 if (of_property_read_u32(progclknp, "reg", &id))
769 if (of_property_read_string(np, "clock-output-names", &name))
770 name = progclknp->name;
772 hw = at91_clk_register_programmable(regmap, name,
773 parent_names, NULL, num_parents,
774 id, layout, mux_table);
778 of_clk_add_hw_provider(progclknp, of_clk_hw_simple_get, hw);
782 static void __init of_at91rm9200_clk_prog_setup(struct device_node *np)
784 of_at91_clk_prog_setup(np, &at91rm9200_programmable_layout, NULL);
786 CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable",
787 of_at91rm9200_clk_prog_setup);
789 static void __init of_at91sam9g45_clk_prog_setup(struct device_node *np)
791 of_at91_clk_prog_setup(np, &at91sam9g45_programmable_layout, NULL);
793 CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable",
794 of_at91sam9g45_clk_prog_setup);
796 static void __init of_at91sam9x5_clk_prog_setup(struct device_node *np)
798 of_at91_clk_prog_setup(np, &at91sam9x5_programmable_layout, NULL);
800 CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable",
801 of_at91sam9x5_clk_prog_setup);
803 static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
806 const char *parent_names[2];
807 unsigned int num_parents;
808 const char *name = np->name;
809 struct regmap *regmap;
810 struct device_node *parent_np;
812 num_parents = of_clk_get_parent_count(np);
813 if (num_parents != 2)
816 of_clk_parent_fill(np, parent_names, num_parents);
817 parent_np = of_get_parent(np);
818 regmap = syscon_node_to_regmap(parent_np);
819 of_node_put(parent_np);
823 of_property_read_string(np, "clock-output-names", &name);
825 hw = at91_clk_register_sam9260_slow(regmap, name, parent_names,
830 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
832 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
833 of_at91sam9260_clk_slow_setup);
835 #ifdef CONFIG_HAVE_AT91_SMD
836 #define SMD_SOURCE_MAX 2
838 static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
841 unsigned int num_parents;
842 const char *parent_names[SMD_SOURCE_MAX];
843 const char *name = np->name;
844 struct regmap *regmap;
845 struct device_node *parent_np;
847 num_parents = of_clk_get_parent_count(np);
848 if (num_parents == 0 || num_parents > SMD_SOURCE_MAX)
851 of_clk_parent_fill(np, parent_names, num_parents);
853 of_property_read_string(np, "clock-output-names", &name);
855 parent_np = of_get_parent(np);
856 regmap = syscon_node_to_regmap(parent_np);
857 of_node_put(parent_np);
861 hw = at91sam9x5_clk_register_smd(regmap, name, parent_names,
866 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
868 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
869 of_at91sam9x5_clk_smd_setup);
870 #endif /* CONFIG_HAVE_AT91_SMD */
872 static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
878 struct device_node *sysclknp, *parent_np;
879 const char *parent_name;
880 struct regmap *regmap;
882 num = of_get_child_count(np);
883 if (num > (SYSTEM_MAX_ID + 1))
886 parent_np = of_get_parent(np);
887 regmap = syscon_node_to_regmap(parent_np);
888 of_node_put(parent_np);
892 for_each_child_of_node(np, sysclknp) {
893 unsigned long flags = 0;
895 if (of_property_read_u32(sysclknp, "reg", &id))
898 if (of_property_read_string(np, "clock-output-names", &name))
899 name = sysclknp->name;
901 parent_name = of_clk_get_parent_name(sysclknp, 0);
904 * ddrck feeds DDR controller and is enabled by bootloader thus
905 * we need to keep it enabled in case there is no Linux consumer
908 if (!strcmp(sysclknp->name, "ddrck"))
909 flags = CLK_IS_CRITICAL;
911 hw = at91_clk_register_system(regmap, name, parent_name, NULL,
916 of_clk_add_hw_provider(sysclknp, of_clk_hw_simple_get, hw);
919 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",
920 of_at91rm9200_clk_sys_setup);
922 #ifdef CONFIG_HAVE_AT91_USB_CLK
923 #define USB_SOURCE_MAX 2
925 static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
928 unsigned int num_parents;
929 const char *parent_names[USB_SOURCE_MAX];
930 const char *name = np->name;
931 struct regmap *regmap;
932 struct device_node *parent_np;
934 num_parents = of_clk_get_parent_count(np);
935 if (num_parents == 0 || num_parents > USB_SOURCE_MAX)
938 of_clk_parent_fill(np, parent_names, num_parents);
940 of_property_read_string(np, "clock-output-names", &name);
942 parent_np = of_get_parent(np);
943 regmap = syscon_node_to_regmap(parent_np);
944 of_node_put(parent_np);
948 hw = at91sam9x5_clk_register_usb(regmap, name, parent_names,
953 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
955 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
956 of_at91sam9x5_clk_usb_setup);
958 static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
961 const char *parent_name;
962 const char *name = np->name;
963 struct regmap *regmap;
964 struct device_node *parent_np;
966 parent_name = of_clk_get_parent_name(np, 0);
970 of_property_read_string(np, "clock-output-names", &name);
972 parent_np = of_get_parent(np);
973 regmap = syscon_node_to_regmap(parent_np);
974 of_node_put(parent_np);
978 hw = at91sam9n12_clk_register_usb(regmap, name, parent_name);
982 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
984 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
985 of_at91sam9n12_clk_usb_setup);
987 static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
990 const char *parent_name;
991 const char *name = np->name;
992 u32 divisors[4] = {0, 0, 0, 0};
993 struct regmap *regmap;
994 struct device_node *parent_np;
996 parent_name = of_clk_get_parent_name(np, 0);
1000 of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);
1004 of_property_read_string(np, "clock-output-names", &name);
1006 parent_np = of_get_parent(np);
1007 regmap = syscon_node_to_regmap(parent_np);
1008 of_node_put(parent_np);
1011 hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
1015 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
1017 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
1018 of_at91rm9200_clk_usb_setup);
1019 #endif /* CONFIG_HAVE_AT91_USB_CLK */
1021 #ifdef CONFIG_HAVE_AT91_UTMI
1022 static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
1025 const char *parent_name;
1026 const char *name = np->name;
1027 struct regmap *regmap_pmc, *regmap_sfr;
1028 struct device_node *parent_np;
1030 parent_name = of_clk_get_parent_name(np, 0);
1032 of_property_read_string(np, "clock-output-names", &name);
1034 parent_np = of_get_parent(np);
1035 regmap_pmc = syscon_node_to_regmap(parent_np);
1036 of_node_put(parent_np);
1037 if (IS_ERR(regmap_pmc))
1041 * If the device supports different mainck rates, this value has to be
1042 * set in the UTMI Clock Trimming register.
1043 * - 9x5: mainck supports several rates but it is indicated that a
1044 * 12 MHz is needed in case of USB.
1045 * - sama5d3 and sama5d2: mainck supports several rates. Configuring
1046 * the FREQ field of the UTMI Clock Trimming register is mandatory.
1047 * - sama5d4: mainck is at 12 MHz.
1049 * We only need to retrieve sama5d3 or sama5d2 sfr regmap.
1051 regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d3-sfr");
1052 if (IS_ERR(regmap_sfr)) {
1053 regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr");
1054 if (IS_ERR(regmap_sfr))
1058 hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name, NULL);
1062 of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
1064 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",
1065 of_at91sam9x5_clk_utmi_setup);
1066 #endif /* CONFIG_HAVE_AT91_UTMI */