1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
28 #include "tpm_tis_core.h"
30 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
32 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
33 bool check_cancel, bool *canceled)
35 u8 status = chip->ops->status(chip);
38 if ((status & mask) == mask)
40 if (check_cancel && chip->ops->req_canceled(chip, status)) {
47 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
48 unsigned long timeout, wait_queue_head_t *queue,
54 bool canceled = false;
56 /* check current status */
57 status = chip->ops->status(chip);
58 if ((status & mask) == mask)
61 stop = jiffies + timeout;
63 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
65 timeout = stop - jiffies;
66 if ((long)timeout <= 0)
68 rc = wait_event_interruptible_timeout(*queue,
69 wait_for_tpm_stat_cond(chip, mask, check_cancel,
77 if (rc == -ERESTARTSYS && freezing(current)) {
78 clear_thread_flag(TIF_SIGPENDING);
83 usleep_range(TPM_TIMEOUT_USECS_MIN,
84 TPM_TIMEOUT_USECS_MAX);
85 status = chip->ops->status(chip);
86 if ((status & mask) == mask)
88 } while (time_before(jiffies, stop));
93 /* Before we attempt to access the TPM we must see that the valid bit is set.
94 * The specification says that this bit is 0 at reset and remains 0 until the
95 * 'TPM has gone through its self test and initialization and has established
96 * correct values in the other bits.'
98 static int wait_startup(struct tpm_chip *chip, int l)
100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
101 unsigned long stop = jiffies + chip->timeout_a;
107 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
111 if (access & TPM_ACCESS_VALID)
113 tpm_msleep(TPM_TIMEOUT);
114 } while (time_before(jiffies, stop));
118 static bool check_locality(struct tpm_chip *chip, int l)
120 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
124 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
128 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
129 | TPM_ACCESS_REQUEST_USE)) ==
130 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
138 static int release_locality(struct tpm_chip *chip, int l)
140 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
142 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
147 static int request_locality(struct tpm_chip *chip, int l)
149 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
150 unsigned long stop, timeout;
153 if (check_locality(chip, l))
156 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
160 stop = jiffies + chip->timeout_a;
162 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
164 timeout = stop - jiffies;
165 if ((long)timeout <= 0)
167 rc = wait_event_interruptible_timeout(priv->int_queue,
173 if (rc == -ERESTARTSYS && freezing(current)) {
174 clear_thread_flag(TIF_SIGPENDING);
178 /* wait for burstcount */
180 if (check_locality(chip, l))
182 tpm_msleep(TPM_TIMEOUT);
183 } while (time_before(jiffies, stop));
188 static u8 tpm_tis_status(struct tpm_chip *chip)
190 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
194 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
198 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) {
200 * If this trips, the chances are the read is
201 * returning 0xff because the locality hasn't been
202 * acquired. Usually because tpm_try_get_ops() hasn't
203 * been called before doing a TPM operation.
205 WARN_ONCE(1, "TPM returned invalid status\n");
212 static void tpm_tis_ready(struct tpm_chip *chip)
214 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
216 /* this causes the current command to be aborted */
217 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
220 static int get_burstcount(struct tpm_chip *chip)
222 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
227 /* wait for burstcount */
228 if (chip->flags & TPM_CHIP_FLAG_TPM2)
229 stop = jiffies + chip->timeout_a;
231 stop = jiffies + chip->timeout_d;
233 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
237 burstcnt = (value >> 8) & 0xFFFF;
240 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
241 } while (time_before(jiffies, stop));
245 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
248 int size = 0, burstcnt, rc;
250 while (size < count) {
251 rc = wait_for_tpm_stat(chip,
252 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
254 &priv->read_queue, true);
257 burstcnt = get_burstcount(chip);
259 dev_err(&chip->dev, "Unable to read burstcount\n");
262 burstcnt = min_t(int, burstcnt, count - size);
264 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
265 burstcnt, buf + size);
274 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
276 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
281 if (count < TPM_HEADER_SIZE) {
286 size = recv_data(chip, buf, TPM_HEADER_SIZE);
287 /* read first 10 bytes, including tag, paramsize, and result */
288 if (size < TPM_HEADER_SIZE) {
289 dev_err(&chip->dev, "Unable to read header\n");
293 expected = be32_to_cpu(*(__be32 *) (buf + 2));
294 if (expected > count || expected < TPM_HEADER_SIZE) {
299 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
300 expected - TPM_HEADER_SIZE);
301 if (size < expected) {
302 dev_err(&chip->dev, "Unable to read remainder of result\n");
307 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
308 &priv->int_queue, false) < 0) {
312 status = tpm_tis_status(chip);
313 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
314 dev_err(&chip->dev, "Error left over data\n");
325 * If interrupts are used (signaled by an irq set in the vendor structure)
326 * tpm.c can skip polling for the data to be available as the interrupt is
329 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
331 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
332 int rc, status, burstcnt;
334 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
336 status = tpm_tis_status(chip);
337 if ((status & TPM_STS_COMMAND_READY) == 0) {
339 if (wait_for_tpm_stat
340 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
341 &priv->int_queue, false) < 0) {
347 while (count < len - 1) {
348 burstcnt = get_burstcount(chip);
350 dev_err(&chip->dev, "Unable to read burstcount\n");
354 burstcnt = min_t(int, burstcnt, len - count - 1);
355 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
356 burstcnt, buf + count);
362 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
363 &priv->int_queue, false) < 0) {
367 status = tpm_tis_status(chip);
368 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
374 /* write last byte */
375 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
379 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
380 &priv->int_queue, false) < 0) {
384 status = tpm_tis_status(chip);
385 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
397 static void disable_interrupts(struct tpm_chip *chip)
399 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
406 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
410 intmask &= ~TPM_GLOBAL_INT_ENABLE;
411 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
413 devm_free_irq(chip->dev.parent, priv->irq, chip);
415 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
419 * If interrupts are used (signaled by an irq set in the vendor structure)
420 * tpm.c can skip polling for the data to be available as the interrupt is
423 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
425 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
430 rc = tpm_tis_send_data(chip, buf, len);
435 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
439 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
440 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
442 dur = tpm_calc_ordinal_duration(chip, ordinal);
443 if (wait_for_tpm_stat
444 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
445 &priv->read_queue, false) < 0) {
456 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
459 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
461 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
462 return tpm_tis_send_main(chip, buf, len);
464 /* Verify receipt of the expected IRQ */
467 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
468 rc = tpm_tis_send_main(chip, buf, len);
470 chip->flags |= TPM_CHIP_FLAG_IRQ;
471 if (!priv->irq_tested)
473 if (!priv->irq_tested)
474 disable_interrupts(chip);
475 priv->irq_tested = true;
479 struct tis_vendor_durations_override {
481 struct tpm1_version version;
482 unsigned long durations[3];
485 static const struct tis_vendor_durations_override vendor_dur_overrides[] = {
486 /* STMicroelectronics 0x104a */
489 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } },
492 static void tpm_tis_update_durations(struct tpm_chip *chip,
493 unsigned long *duration_cap)
495 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
496 struct tpm1_version *version;
501 chip->duration_adjusted = false;
503 if (chip->ops->clk_enable != NULL)
504 chip->ops->clk_enable(chip, true);
506 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
508 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n",
513 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */
514 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap,
515 "attempting to determine the 1.2 version",
516 sizeof(cap.version2));
518 version = &cap.version2.version;
520 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap,
521 "attempting to determine the 1.1 version",
522 sizeof(cap.version1));
527 version = &cap.version1;
530 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) {
531 if (vendor_dur_overrides[i].did_vid != did_vid)
534 if ((version->major ==
535 vendor_dur_overrides[i].version.major) &&
537 vendor_dur_overrides[i].version.minor) &&
538 (version->rev_major ==
539 vendor_dur_overrides[i].version.rev_major) &&
540 (version->rev_minor ==
541 vendor_dur_overrides[i].version.rev_minor)) {
544 vendor_dur_overrides[i].durations,
545 sizeof(vendor_dur_overrides[i].durations));
547 chip->duration_adjusted = true;
553 if (chip->ops->clk_enable != NULL)
554 chip->ops->clk_enable(chip, false);
557 struct tis_vendor_timeout_override {
559 unsigned long timeout_us[4];
562 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
564 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
565 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
568 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
569 unsigned long *timeout_cap)
571 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
575 chip->timeout_adjusted = false;
577 if (chip->ops->clk_enable != NULL)
578 chip->ops->clk_enable(chip, true);
580 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
582 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
587 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
588 if (vendor_timeout_overrides[i].did_vid != did_vid)
590 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
591 sizeof(vendor_timeout_overrides[i].timeout_us));
592 chip->timeout_adjusted = true;
596 if (chip->ops->clk_enable != NULL)
597 chip->ops->clk_enable(chip, false);
603 * Early probing for iTPM with STS_DATA_EXPECT flaw.
604 * Try sending command without itpm flag set and if that
605 * fails, repeat with itpm flag set.
607 static int probe_itpm(struct tpm_chip *chip)
609 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
611 static const u8 cmd_getticks[] = {
612 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
613 0x00, 0x00, 0x00, 0xf1
615 size_t len = sizeof(cmd_getticks);
618 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
621 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
625 /* probe only iTPMS */
626 if (vendor != TPM_VID_INTEL)
629 if (request_locality(chip, 0) != 0)
632 rc = tpm_tis_send_data(chip, cmd_getticks, len);
638 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
640 rc = tpm_tis_send_data(chip, cmd_getticks, len);
642 dev_info(&chip->dev, "Detected an iTPM.\n");
644 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
650 release_locality(chip, priv->locality);
655 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
657 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
659 switch (priv->manufacturer_id) {
660 case TPM_VID_WINBOND:
661 return ((status == TPM_STS_VALID) ||
662 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
664 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
666 return (status == TPM_STS_COMMAND_READY);
670 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
672 struct tpm_chip *chip = dev_id;
673 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
677 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
684 priv->irq_tested = true;
685 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
686 wake_up_interruptible(&priv->read_queue);
687 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
688 for (i = 0; i < 5; i++)
689 if (check_locality(chip, i))
692 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
693 TPM_INTF_CMD_READY_INT))
694 wake_up_interruptible(&priv->int_queue);
696 /* Clear interrupts handled with TPM_EOI */
697 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
701 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
705 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
707 const char *desc = "attempting to generate an interrupt";
713 if (chip->flags & TPM_CHIP_FLAG_TPM2)
714 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
717 ret = request_locality(chip, 0);
721 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0);
723 release_locality(chip, 0);
728 /* Register the IRQ and issue a command that will cause an interrupt. If an
729 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
730 * everything and leave in polling mode. Returns 0 on success.
732 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
735 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
740 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
741 dev_name(&chip->dev), chip) != 0) {
742 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
748 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
753 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
757 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
761 /* Clear all existing */
762 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
767 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
768 intmask | TPM_GLOBAL_INT_ENABLE);
772 priv->irq_tested = false;
774 /* Generate an interrupt by having the core call through to
777 rc = tpm_tis_gen_interrupt(chip);
781 /* tpm_tis_send will either confirm the interrupt is working or it
782 * will call disable_irq which undoes all of the above.
784 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
785 rc = tpm_tis_write8(priv, original_int_vec,
786 TPM_INT_VECTOR(priv->locality));
796 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
797 * do not have ACPI/etc. We typically expect the interrupt to be declared if
800 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
802 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
806 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
811 if (!original_int_vec) {
812 if (IS_ENABLED(CONFIG_X86))
813 for (i = 3; i <= 15; i++)
814 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
817 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
822 void tpm_tis_remove(struct tpm_chip *chip)
824 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
825 u32 reg = TPM_INT_ENABLE(priv->locality);
829 tpm_tis_clkrun_enable(chip, true);
831 rc = tpm_tis_read32(priv, reg, &interrupt);
835 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
837 tpm_tis_clkrun_enable(chip, false);
839 if (priv->ilb_base_addr)
840 iounmap(priv->ilb_base_addr);
842 EXPORT_SYMBOL_GPL(tpm_tis_remove);
845 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
846 * of a single TPM command
847 * @chip: TPM chip to use
848 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
849 * 0 - Enable CLKRUN protocol
850 * Call this function directly in tpm_tis_remove() in error or driver removal
851 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
853 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
855 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
858 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
859 !data->ilb_base_addr)
863 data->clkrun_enabled++;
864 if (data->clkrun_enabled > 1)
866 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
868 /* Disable LPC CLKRUN# */
869 clkrun_val &= ~LPC_CLKRUN_EN;
870 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
873 * Write any random value on port 0x80 which is on LPC, to make
874 * sure LPC clock is running before sending any TPM command.
878 data->clkrun_enabled--;
879 if (data->clkrun_enabled)
882 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
884 /* Enable LPC CLKRUN# */
885 clkrun_val |= LPC_CLKRUN_EN;
886 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
889 * Write any random value on port 0x80 which is on LPC, to make
890 * sure LPC clock is running before sending any TPM command.
896 static const struct tpm_class_ops tpm_tis = {
897 .flags = TPM_OPS_AUTO_STARTUP,
898 .status = tpm_tis_status,
899 .recv = tpm_tis_recv,
900 .send = tpm_tis_send,
901 .cancel = tpm_tis_ready,
902 .update_timeouts = tpm_tis_update_timeouts,
903 .update_durations = tpm_tis_update_durations,
904 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
905 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
906 .req_canceled = tpm_tis_req_canceled,
907 .request_locality = request_locality,
908 .relinquish_locality = release_locality,
909 .clk_enable = tpm_tis_clkrun_enable,
912 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
913 const struct tpm_tis_phy_ops *phy_ops,
914 acpi_handle acpi_dev_handle)
922 struct tpm_chip *chip;
924 chip = tpmm_chip_alloc(dev, &tpm_tis);
926 return PTR_ERR(chip);
929 chip->acpi_dev_handle = acpi_dev_handle;
932 chip->hwrng.quality = priv->rng_quality;
934 /* Maximum timeouts */
935 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
936 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
937 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
938 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
939 priv->phy_ops = phy_ops;
940 dev_set_drvdata(&chip->dev, priv);
943 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
945 if (!priv->ilb_base_addr)
948 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
949 /* Check if CLKRUN# is already not enabled in the LPC bus */
950 if (!(clkrun_val & LPC_CLKRUN_EN)) {
951 iounmap(priv->ilb_base_addr);
952 priv->ilb_base_addr = NULL;
956 if (chip->ops->clk_enable != NULL)
957 chip->ops->clk_enable(chip, true);
959 if (wait_startup(chip, 0) != 0) {
964 /* Take control of the TPM's interrupt hardware and shut it off */
965 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
969 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
970 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
971 intmask &= ~TPM_GLOBAL_INT_ENABLE;
972 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
974 rc = tpm_chip_start(chip);
977 rc = tpm2_probe(chip);
982 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
986 priv->manufacturer_id = vendor;
988 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
992 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
993 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
996 probe = probe_itpm(chip);
1002 /* Figure out the capabilities */
1003 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
1007 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
1009 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
1010 dev_dbg(dev, "\tBurst Count Static\n");
1011 if (intfcaps & TPM_INTF_CMD_READY_INT)
1012 dev_dbg(dev, "\tCommand Ready Int Support\n");
1013 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
1014 dev_dbg(dev, "\tInterrupt Edge Falling\n");
1015 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
1016 dev_dbg(dev, "\tInterrupt Edge Rising\n");
1017 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
1018 dev_dbg(dev, "\tInterrupt Level Low\n");
1019 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
1020 dev_dbg(dev, "\tInterrupt Level High\n");
1021 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
1022 dev_dbg(dev, "\tLocality Change Int Support\n");
1023 if (intfcaps & TPM_INTF_STS_VALID_INT)
1024 dev_dbg(dev, "\tSts Valid Int Support\n");
1025 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
1026 dev_dbg(dev, "\tData Avail Int Support\n");
1028 /* INTERRUPT Setup */
1029 init_waitqueue_head(&priv->read_queue);
1030 init_waitqueue_head(&priv->int_queue);
1033 * Before doing irq testing issue a command to the TPM in polling mode
1034 * to make sure it works. May as well use that command to set the
1035 * proper timeouts for the driver.
1038 rc = request_locality(chip, 0);
1042 rc = tpm_get_timeouts(chip);
1044 release_locality(chip, 0);
1047 dev_err(dev, "Could not get TPM timeouts and durations\n");
1053 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
1055 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
1056 dev_err(&chip->dev, FW_BUG
1057 "TPM interrupt not working, polling instead\n");
1059 disable_interrupts(chip);
1062 tpm_tis_probe_irq(chip, intmask);
1066 rc = tpm_chip_register(chip);
1070 if (chip->ops->clk_enable != NULL)
1071 chip->ops->clk_enable(chip, false);
1075 if (chip->ops->clk_enable != NULL)
1076 chip->ops->clk_enable(chip, false);
1078 tpm_tis_remove(chip);
1082 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1084 #ifdef CONFIG_PM_SLEEP
1085 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1087 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1091 if (chip->ops->clk_enable != NULL)
1092 chip->ops->clk_enable(chip, true);
1094 /* reenable interrupts that device may have lost or
1095 * BIOS/firmware may have disabled
1097 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1101 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1105 intmask |= TPM_INTF_CMD_READY_INT
1106 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
1107 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1109 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1112 if (chip->ops->clk_enable != NULL)
1113 chip->ops->clk_enable(chip, false);
1118 int tpm_tis_resume(struct device *dev)
1120 struct tpm_chip *chip = dev_get_drvdata(dev);
1123 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1124 tpm_tis_reenable_interrupts(chip);
1126 ret = tpm_pm_resume(dev);
1130 /* TPM 1.2 requires self-test on resume. This function actually returns
1131 * an error code but for unknown reason it isn't handled.
1133 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1134 tpm1_do_selftest(chip);
1138 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1141 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1142 MODULE_DESCRIPTION("TPM Driver");
1143 MODULE_VERSION("2.0");
1144 MODULE_LICENSE("GPL");