1 /* n2-drv.c: Niagara-2 RNG driver.
3 * Copyright (C) 2008, 2011 David S. Miller <davem@davemloft.net>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/workqueue.h>
12 #include <linux/preempt.h>
13 #include <linux/hw_random.h>
16 #include <linux/of_device.h>
18 #include <asm/hypervisor.h>
22 #define DRV_MODULE_NAME "n2rng"
23 #define PFX DRV_MODULE_NAME ": "
24 #define DRV_MODULE_VERSION "0.3"
25 #define DRV_MODULE_RELDATE "Jan 7, 2017"
27 static char version[] =
28 DRV_MODULE_NAME " v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
30 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
31 MODULE_DESCRIPTION("Niagara2 RNG driver");
32 MODULE_LICENSE("GPL");
33 MODULE_VERSION(DRV_MODULE_VERSION);
35 /* The Niagara2 RNG provides a 64-bit read-only random number
36 * register, plus a control register. Access to the RNG is
37 * virtualized through the hypervisor so that both guests and control
38 * nodes can access the device.
40 * The entropy source consists of raw entropy sources, each
41 * constructed from a voltage controlled oscillator whose phase is
42 * jittered by thermal noise sources.
44 * The oscillator in each of the three raw entropy sources run at
45 * different frequencies. Normally, all three generator outputs are
46 * gathered, xored together, and fed into a CRC circuit, the output of
47 * which is the 64-bit read-only register.
49 * Some time is necessary for all the necessary entropy to build up
50 * such that a full 64-bits of entropy are available in the register.
51 * In normal operating mode (RNG_CTL_LFSR is set), the chip implements
52 * an interlock which blocks register reads until sufficient entropy
55 * A control register is provided for adjusting various aspects of RNG
56 * operation, and to enable diagnostic modes. Each of the three raw
57 * entropy sources has an enable bit (RNG_CTL_ES{1,2,3}). Also
58 * provided are fields for controlling the minimum time in cycles
59 * between read accesses to the register (RNG_CTL_WAIT, this controls
60 * the interlock described in the previous paragraph).
62 * The standard setting is to have the mode bit (RNG_CTL_LFSR) set,
63 * all three entropy sources enabled, and the interlock time set
66 * The CRC polynomial used by the chip is:
68 * P(X) = x64 + x61 + x57 + x56 + x52 + x51 + x50 + x48 + x47 + x46 +
69 * x43 + x42 + x41 + x39 + x38 + x37 + x35 + x32 + x28 + x25 +
70 * x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
72 * The RNG_CTL_VCO value of each noise cell must be programmed
73 * separately. This is why 4 control register values must be provided
74 * to the hypervisor. During a write, the hypervisor writes them all,
75 * one at a time, to the actual RNG_CTL register. The first three
76 * values are used to setup the desired RNG_CTL_VCO for each entropy
77 * source, for example:
79 * control 0: (1 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES1
80 * control 1: (2 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES2
81 * control 2: (3 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES3
83 * And then the fourth value sets the final chip state and enables
87 static int n2rng_hv_err_trans(unsigned long hv_err)
108 static unsigned long n2rng_generic_read_control_v2(unsigned long ra,
111 unsigned long hv_err, state, ticks, watchdog_delta, watchdog_status;
112 int block = 0, busy = 0;
115 hv_err = sun4v_rng_ctl_read_v2(ra, unit, &state,
119 if (hv_err == HV_EOK)
122 if (hv_err == HV_EBUSY) {
123 if (++busy >= N2RNG_BUSY_LIMIT)
127 } else if (hv_err == HV_EWOULDBLOCK) {
128 if (++block >= N2RNG_BLOCK_LIMIT)
139 /* In multi-socket situations, the hypervisor might need to
140 * queue up the RNG control register write if it's for a unit
141 * that is on a cpu socket other than the one we are executing on.
143 * We poll here waiting for a successful read of that control
144 * register to make sure the write has been actually performed.
146 static unsigned long n2rng_control_settle_v2(struct n2rng *np, int unit)
148 unsigned long ra = __pa(&np->scratch_control[0]);
150 return n2rng_generic_read_control_v2(ra, unit);
153 static unsigned long n2rng_write_ctl_one(struct n2rng *np, int unit,
155 unsigned long control_ra,
156 unsigned long watchdog_timeout,
157 unsigned long *ticks)
159 unsigned long hv_err;
161 if (np->hvapi_major == 1) {
162 hv_err = sun4v_rng_ctl_write_v1(control_ra, state,
163 watchdog_timeout, ticks);
165 hv_err = sun4v_rng_ctl_write_v2(control_ra, state,
166 watchdog_timeout, unit);
167 if (hv_err == HV_EOK)
168 hv_err = n2rng_control_settle_v2(np, unit);
169 *ticks = N2RNG_ACCUM_CYCLES_DEFAULT;
175 static int n2rng_generic_read_data(unsigned long data_ra)
177 unsigned long ticks, hv_err;
178 int block = 0, hcheck = 0;
181 hv_err = sun4v_rng_data_read(data_ra, &ticks);
182 if (hv_err == HV_EOK)
185 if (hv_err == HV_EWOULDBLOCK) {
186 if (++block >= N2RNG_BLOCK_LIMIT)
189 } else if (hv_err == HV_ENOACCESS) {
191 } else if (hv_err == HV_EIO) {
192 if (++hcheck >= N2RNG_HCHECK_LIMIT)
200 static unsigned long n2rng_read_diag_data_one(struct n2rng *np,
202 unsigned long data_ra,
203 unsigned long data_len,
204 unsigned long *ticks)
206 unsigned long hv_err;
208 if (np->hvapi_major == 1) {
209 hv_err = sun4v_rng_data_read_diag_v1(data_ra, data_len, ticks);
211 hv_err = sun4v_rng_data_read_diag_v2(data_ra, data_len,
214 *ticks = N2RNG_ACCUM_CYCLES_DEFAULT;
219 static int n2rng_generic_read_diag_data(struct n2rng *np,
221 unsigned long data_ra,
222 unsigned long data_len)
224 unsigned long ticks, hv_err;
228 hv_err = n2rng_read_diag_data_one(np, unit,
231 if (hv_err == HV_EOK)
234 if (hv_err == HV_EWOULDBLOCK) {
235 if (++block >= N2RNG_BLOCK_LIMIT)
238 } else if (hv_err == HV_ENOACCESS) {
240 } else if (hv_err == HV_EIO) {
248 static int n2rng_generic_write_control(struct n2rng *np,
249 unsigned long control_ra,
253 unsigned long hv_err, ticks;
254 int block = 0, busy = 0;
257 hv_err = n2rng_write_ctl_one(np, unit, state, control_ra,
258 np->wd_timeo, &ticks);
259 if (hv_err == HV_EOK)
262 if (hv_err == HV_EWOULDBLOCK) {
263 if (++block >= N2RNG_BLOCK_LIMIT)
266 } else if (hv_err == HV_EBUSY) {
267 if (++busy >= N2RNG_BUSY_LIMIT)
275 /* Just try to see if we can successfully access the control register
276 * of the RNG on the domain on which we are currently executing.
278 static int n2rng_try_read_ctl(struct n2rng *np)
280 unsigned long hv_err;
283 if (np->hvapi_major == 1) {
284 hv_err = sun4v_rng_get_diag_ctl();
286 /* We purposefully give invalid arguments, HV_NOACCESS
287 * is higher priority than the errors we'd get from
288 * these other cases, and that's the error we are
289 * truly interested in.
291 hv_err = sun4v_rng_ctl_read_v2(0UL, ~0UL, &x, &x, &x, &x);
302 return n2rng_hv_err_trans(hv_err);
305 static u64 n2rng_control_default(struct n2rng *np, int ctl)
309 if (np->data->chip_version == 1) {
310 val = ((2 << RNG_v1_CTL_ASEL_SHIFT) |
311 (N2RNG_ACCUM_CYCLES_DEFAULT << RNG_v1_CTL_WAIT_SHIFT) |
316 val |= (1 << RNG_v1_CTL_VCO_SHIFT) | RNG_CTL_ES1;
319 val |= (2 << RNG_v1_CTL_VCO_SHIFT) | RNG_CTL_ES2;
322 val |= (3 << RNG_v1_CTL_VCO_SHIFT) | RNG_CTL_ES3;
325 val |= RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3;
332 val = ((2 << RNG_v2_CTL_ASEL_SHIFT) |
333 (N2RNG_ACCUM_CYCLES_DEFAULT << RNG_v2_CTL_WAIT_SHIFT) |
338 val |= (1 << RNG_v2_CTL_VCO_SHIFT) | RNG_CTL_ES1;
341 val |= (2 << RNG_v2_CTL_VCO_SHIFT) | RNG_CTL_ES2;
344 val |= (3 << RNG_v2_CTL_VCO_SHIFT) | RNG_CTL_ES3;
347 val |= RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3;
357 static void n2rng_control_swstate_init(struct n2rng *np)
361 np->flags |= N2RNG_FLAG_CONTROL;
363 np->health_check_sec = N2RNG_HEALTH_CHECK_SEC_DEFAULT;
364 np->accum_cycles = N2RNG_ACCUM_CYCLES_DEFAULT;
365 np->wd_timeo = N2RNG_WD_TIMEO_DEFAULT;
367 for (i = 0; i < np->num_units; i++) {
368 struct n2rng_unit *up = &np->units[i];
370 up->control[0] = n2rng_control_default(np, 0);
371 up->control[1] = n2rng_control_default(np, 1);
372 up->control[2] = n2rng_control_default(np, 2);
373 up->control[3] = n2rng_control_default(np, 3);
376 np->hv_state = HV_RNG_STATE_UNCONFIGURED;
379 static int n2rng_grab_diag_control(struct n2rng *np)
381 int i, busy_count, err = -ENODEV;
384 for (i = 0; i < 100; i++) {
385 err = n2rng_try_read_ctl(np);
389 if (++busy_count > 100) {
390 dev_err(&np->op->dev,
391 "Grab diag control timeout.\n");
401 static int n2rng_init_control(struct n2rng *np)
403 int err = n2rng_grab_diag_control(np);
405 /* Not in the control domain, that's OK we are only a consumer
406 * of the RNG data, we don't setup and program it.
413 n2rng_control_swstate_init(np);
418 static int n2rng_data_read(struct hwrng *rng, u32 *data)
420 struct n2rng *np = (struct n2rng *) rng->priv;
421 unsigned long ra = __pa(&np->test_data);
424 if (!(np->flags & N2RNG_FLAG_READY)) {
426 } else if (np->flags & N2RNG_FLAG_BUFFER_VALID) {
427 np->flags &= ~N2RNG_FLAG_BUFFER_VALID;
431 int err = n2rng_generic_read_data(ra);
433 np->flags |= N2RNG_FLAG_BUFFER_VALID;
434 np->buffer = np->test_data >> 32;
435 *data = np->test_data & 0xffffffff;
438 dev_err(&np->op->dev, "RNG error, retesting\n");
439 np->flags &= ~N2RNG_FLAG_READY;
440 if (!(np->flags & N2RNG_FLAG_SHUTDOWN))
441 schedule_delayed_work(&np->work, 0);
449 /* On a guest node, just make sure we can read random data properly.
450 * If a control node reboots or reloads it's n2rng driver, this won't
451 * work during that time. So we have to keep probing until the device
454 static int n2rng_guest_check(struct n2rng *np)
456 unsigned long ra = __pa(&np->test_data);
458 return n2rng_generic_read_data(ra);
461 static int n2rng_entropy_diag_read(struct n2rng *np, unsigned long unit,
462 u64 *pre_control, u64 pre_state,
463 u64 *buffer, unsigned long buf_len,
464 u64 *post_control, u64 post_state)
466 unsigned long post_ctl_ra = __pa(post_control);
467 unsigned long pre_ctl_ra = __pa(pre_control);
468 unsigned long buffer_ra = __pa(buffer);
471 err = n2rng_generic_write_control(np, pre_ctl_ra, unit, pre_state);
475 err = n2rng_generic_read_diag_data(np, unit,
478 (void) n2rng_generic_write_control(np, post_ctl_ra, unit,
484 static u64 advance_polynomial(u64 poly, u64 val, int count)
488 for (i = 0; i < count; i++) {
489 int highbit_set = ((s64)val < 0);
499 static int n2rng_test_buffer_find(struct n2rng *np, u64 val)
503 /* Purposefully skip over the first word. */
504 for (i = 1; i < SELFTEST_BUFFER_WORDS; i++) {
505 if (np->test_buffer[i] == val)
511 static void n2rng_dump_test_buffer(struct n2rng *np)
515 for (i = 0; i < SELFTEST_BUFFER_WORDS; i++)
516 dev_err(&np->op->dev, "Test buffer slot %d [0x%016llx]\n",
517 i, np->test_buffer[i]);
520 static int n2rng_check_selftest_buffer(struct n2rng *np, unsigned long unit)
523 int err, matches, limit;
525 switch (np->data->id) {
529 case N2_m4_rng: /* yes, m4 uses the old value */
530 val = RNG_v1_SELFTEST_VAL;
533 val = RNG_v2_SELFTEST_VAL;
538 for (limit = 0; limit < SELFTEST_LOOPS_MAX; limit++) {
539 matches += n2rng_test_buffer_find(np, val);
540 if (matches >= SELFTEST_MATCH_GOAL)
542 val = advance_polynomial(SELFTEST_POLY, val, 1);
546 if (limit >= SELFTEST_LOOPS_MAX) {
548 dev_err(&np->op->dev, "Selftest failed on unit %lu\n", unit);
549 n2rng_dump_test_buffer(np);
551 dev_info(&np->op->dev, "Selftest passed on unit %lu\n", unit);
556 static int n2rng_control_selftest(struct n2rng *np, unsigned long unit)
561 switch (np->data->id) {
565 base = RNG_v1_CTL_ASEL_NOOUT << RNG_v1_CTL_ASEL_SHIFT;
566 base3 = base | RNG_CTL_LFSR |
567 ((RNG_v1_SELFTEST_TICKS - 2) << RNG_v1_CTL_WAIT_SHIFT);
570 base = RNG_v2_CTL_ASEL_NOOUT << RNG_v2_CTL_ASEL_SHIFT;
571 base3 = base | RNG_CTL_LFSR |
572 ((RNG_v1_SELFTEST_TICKS - 2) << RNG_v2_CTL_WAIT_SHIFT);
575 base = RNG_v2_CTL_ASEL_NOOUT << RNG_v2_CTL_ASEL_SHIFT;
576 base3 = base | RNG_CTL_LFSR |
577 (RNG_v2_SELFTEST_TICKS << RNG_v2_CTL_WAIT_SHIFT);
581 np->test_control[0] = base;
582 np->test_control[1] = base;
583 np->test_control[2] = base;
584 np->test_control[3] = base3;
586 err = n2rng_entropy_diag_read(np, unit, np->test_control,
587 HV_RNG_STATE_HEALTHCHECK,
589 sizeof(np->test_buffer),
590 &np->units[unit].control[0],
595 return n2rng_check_selftest_buffer(np, unit);
598 static int n2rng_control_check(struct n2rng *np)
602 for (i = 0; i < np->num_units; i++) {
603 int err = n2rng_control_selftest(np, i);
610 /* The sanity checks passed, install the final configuration into the
611 * chip, it's ready to use.
613 static int n2rng_control_configure_units(struct n2rng *np)
618 for (unit = 0; unit < np->num_units; unit++) {
619 struct n2rng_unit *up = &np->units[unit];
620 unsigned long ctl_ra = __pa(&up->control[0]);
624 if (np->data->chip_version == 1) {
625 base = ((np->accum_cycles << RNG_v1_CTL_WAIT_SHIFT) |
626 (RNG_v1_CTL_ASEL_NOOUT << RNG_v1_CTL_ASEL_SHIFT) |
628 shift = RNG_v1_CTL_VCO_SHIFT;
630 base = ((np->accum_cycles << RNG_v2_CTL_WAIT_SHIFT) |
631 (RNG_v2_CTL_ASEL_NOOUT << RNG_v2_CTL_ASEL_SHIFT) |
633 shift = RNG_v2_CTL_VCO_SHIFT;
636 /* XXX This isn't the best. We should fetch a bunch
637 * XXX of words using each entropy source combined XXX
638 * with each VCO setting, and see which combinations
639 * XXX give the best random data.
641 for (esrc = 0; esrc < 3; esrc++)
642 up->control[esrc] = base |
644 (RNG_CTL_ES1 << esrc);
646 up->control[3] = base |
647 (RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3);
649 err = n2rng_generic_write_control(np, ctl_ra, unit,
650 HV_RNG_STATE_CONFIGURED);
658 static void n2rng_work(struct work_struct *work)
660 struct n2rng *np = container_of(work, struct n2rng, work.work);
662 static int retries = 4;
664 if (!(np->flags & N2RNG_FLAG_CONTROL)) {
665 err = n2rng_guest_check(np);
668 err = n2rng_control_check(np);
672 err = n2rng_control_configure_units(np);
676 np->flags |= N2RNG_FLAG_READY;
677 dev_info(&np->op->dev, "RNG ready\n");
681 dev_err(&np->op->dev, "Self-test retries failed, RNG not ready\n");
682 else if (err && !(np->flags & N2RNG_FLAG_SHUTDOWN))
683 schedule_delayed_work(&np->work, HZ * 2);
686 static void n2rng_driver_version(void)
688 static int n2rng_version_printed;
690 if (n2rng_version_printed++ == 0)
691 pr_info("%s", version);
694 static const struct of_device_id n2rng_match[];
695 static int n2rng_probe(struct platform_device *op)
697 const struct of_device_id *match;
701 match = of_match_device(n2rng_match, &op->dev);
705 n2rng_driver_version();
706 np = devm_kzalloc(&op->dev, sizeof(*np), GFP_KERNEL);
710 np->data = (struct n2rng_template *)match->data;
712 INIT_DELAYED_WORK(&np->work, n2rng_work);
714 if (np->data->multi_capable)
715 np->flags |= N2RNG_FLAG_MULTI;
719 if (sun4v_hvapi_register(HV_GRP_RNG,
723 if (sun4v_hvapi_register(HV_GRP_RNG,
726 dev_err(&op->dev, "Cannot register suitable "
732 if (np->flags & N2RNG_FLAG_MULTI) {
733 if (np->hvapi_major < 2) {
734 dev_err(&op->dev, "multi-unit-capable RNG requires "
735 "HVAPI major version 2 or later, got %lu\n",
737 goto out_hvapi_unregister;
739 np->num_units = of_getintprop_default(op->dev.of_node,
741 if (!np->num_units) {
742 dev_err(&op->dev, "VF RNG lacks rng-#units property\n");
743 goto out_hvapi_unregister;
749 dev_info(&op->dev, "Registered RNG HVAPI major %lu minor %lu\n",
750 np->hvapi_major, np->hvapi_minor);
751 np->units = devm_kcalloc(&op->dev, np->num_units, sizeof(*np->units),
755 goto out_hvapi_unregister;
757 err = n2rng_init_control(np);
759 goto out_hvapi_unregister;
761 dev_info(&op->dev, "Found %s RNG, units: %d\n",
762 ((np->flags & N2RNG_FLAG_MULTI) ?
763 "multi-unit-capable" : "single-unit"),
766 np->hwrng.name = DRV_MODULE_NAME;
767 np->hwrng.data_read = n2rng_data_read;
768 np->hwrng.priv = (unsigned long) np;
770 err = hwrng_register(&np->hwrng);
772 goto out_hvapi_unregister;
774 platform_set_drvdata(op, np);
776 schedule_delayed_work(&np->work, 0);
780 out_hvapi_unregister:
781 sun4v_hvapi_unregister(HV_GRP_RNG);
787 static int n2rng_remove(struct platform_device *op)
789 struct n2rng *np = platform_get_drvdata(op);
791 np->flags |= N2RNG_FLAG_SHUTDOWN;
793 cancel_delayed_work_sync(&np->work);
795 hwrng_unregister(&np->hwrng);
797 sun4v_hvapi_unregister(HV_GRP_RNG);
802 static struct n2rng_template n2_template = {
808 static struct n2rng_template vf_template = {
814 static struct n2rng_template kt_template = {
820 static struct n2rng_template m4_template = {
826 static struct n2rng_template m7_template = {
832 static const struct of_device_id n2rng_match[] = {
834 .name = "random-number-generator",
835 .compatible = "SUNW,n2-rng",
836 .data = &n2_template,
839 .name = "random-number-generator",
840 .compatible = "SUNW,vf-rng",
841 .data = &vf_template,
844 .name = "random-number-generator",
845 .compatible = "SUNW,kt-rng",
846 .data = &kt_template,
849 .name = "random-number-generator",
850 .compatible = "ORCL,m4-rng",
851 .data = &m4_template,
854 .name = "random-number-generator",
855 .compatible = "ORCL,m7-rng",
856 .data = &m7_template,
860 MODULE_DEVICE_TABLE(of, n2rng_match);
862 static struct platform_driver n2rng_driver = {
865 .of_match_table = n2rng_match,
867 .probe = n2rng_probe,
868 .remove = n2rng_remove,
871 module_platform_driver(n2rng_driver);