2 * Register cache access API
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/slab.h>
14 #include <linux/export.h>
15 #include <linux/device.h>
16 #include <trace/events/regmap.h>
17 #include <linux/bsearch.h>
18 #include <linux/sort.h>
22 static const struct regcache_ops *cache_types[] = {
27 static int regcache_hw_init(struct regmap *map)
35 if (!map->num_reg_defaults_raw)
38 if (!map->reg_defaults_raw) {
39 u32 cache_bypass = map->cache_bypass;
40 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
42 /* Bypass the cache access till data read from HW*/
43 map->cache_bypass = 1;
44 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
47 ret = regmap_bulk_read(map, 0, tmp_buf,
48 map->num_reg_defaults_raw);
49 map->cache_bypass = cache_bypass;
54 map->reg_defaults_raw = tmp_buf;
58 /* calculate the size of reg_defaults */
59 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
60 val = regcache_get_val(map->reg_defaults_raw,
61 i, map->cache_word_size);
62 if (regmap_volatile(map, i * map->reg_stride))
67 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
69 if (!map->reg_defaults) {
74 /* fill the reg_defaults */
75 map->num_reg_defaults = count;
76 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
77 val = regcache_get_val(map->reg_defaults_raw,
78 i, map->cache_word_size);
79 if (regmap_volatile(map, i * map->reg_stride))
81 map->reg_defaults[j].reg = i * map->reg_stride;
82 map->reg_defaults[j].def = val;
90 kfree(map->reg_defaults_raw);
95 int regcache_init(struct regmap *map, const struct regmap_config *config)
101 for (i = 0; i < config->num_reg_defaults; i++)
102 if (config->reg_defaults[i].reg % map->reg_stride)
105 if (map->cache_type == REGCACHE_NONE) {
106 map->cache_bypass = true;
110 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
111 if (cache_types[i]->type == map->cache_type)
114 if (i == ARRAY_SIZE(cache_types)) {
115 dev_err(map->dev, "Could not match compress type: %d\n",
120 map->num_reg_defaults = config->num_reg_defaults;
121 map->num_reg_defaults_raw = config->num_reg_defaults_raw;
122 map->reg_defaults_raw = config->reg_defaults_raw;
123 map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
124 map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
127 map->cache_ops = cache_types[i];
129 if (!map->cache_ops->read ||
130 !map->cache_ops->write ||
131 !map->cache_ops->name)
134 /* We still need to ensure that the reg_defaults
135 * won't vanish from under us. We'll need to make
138 if (config->reg_defaults) {
139 if (!map->num_reg_defaults)
141 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
142 sizeof(struct reg_default), GFP_KERNEL);
145 map->reg_defaults = tmp_buf;
146 } else if (map->num_reg_defaults_raw) {
147 /* Some devices such as PMICs don't have cache defaults,
148 * we cope with this by reading back the HW registers and
149 * crafting the cache defaults by hand.
151 ret = regcache_hw_init(map);
156 if (!map->max_register)
157 map->max_register = map->num_reg_defaults_raw;
159 if (map->cache_ops->init) {
160 dev_dbg(map->dev, "Initializing %s cache\n",
161 map->cache_ops->name);
162 ret = map->cache_ops->init(map);
169 kfree(map->reg_defaults);
171 kfree(map->reg_defaults_raw);
176 void regcache_exit(struct regmap *map)
178 if (map->cache_type == REGCACHE_NONE)
181 BUG_ON(!map->cache_ops);
183 kfree(map->reg_defaults);
185 kfree(map->reg_defaults_raw);
187 if (map->cache_ops->exit) {
188 dev_dbg(map->dev, "Destroying %s cache\n",
189 map->cache_ops->name);
190 map->cache_ops->exit(map);
195 * regcache_read: Fetch the value of a given register from the cache.
197 * @map: map to configure.
198 * @reg: The register index.
199 * @value: The value to be returned.
201 * Return a negative value on failure, 0 on success.
203 int regcache_read(struct regmap *map,
204 unsigned int reg, unsigned int *value)
208 if (map->cache_type == REGCACHE_NONE)
211 BUG_ON(!map->cache_ops);
213 if (!regmap_volatile(map, reg)) {
214 ret = map->cache_ops->read(map, reg, value);
217 trace_regmap_reg_read_cache(map->dev, reg, *value);
226 * regcache_write: Set the value of a given register in the cache.
228 * @map: map to configure.
229 * @reg: The register index.
230 * @value: The new register value.
232 * Return a negative value on failure, 0 on success.
234 int regcache_write(struct regmap *map,
235 unsigned int reg, unsigned int value)
237 if (map->cache_type == REGCACHE_NONE)
240 BUG_ON(!map->cache_ops);
242 if (!regmap_writeable(map, reg))
245 if (!regmap_volatile(map, reg))
246 return map->cache_ops->write(map, reg, value);
252 * regcache_sync: Sync the register cache with the hardware.
254 * @map: map to configure.
256 * Any registers that should not be synced should be marked as
257 * volatile. In general drivers can choose not to use the provided
258 * syncing functionality if they so require.
260 * Return a negative value on failure, 0 on success.
262 int regcache_sync(struct regmap *map)
269 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
272 /* Remember the initial bypass state */
273 bypass = map->cache_bypass;
274 dev_dbg(map->dev, "Syncing %s cache\n",
275 map->cache_ops->name);
276 name = map->cache_ops->name;
277 trace_regcache_sync(map->dev, name, "start");
279 if (!map->cache_dirty)
282 /* Apply any patch first */
283 map->cache_bypass = 1;
284 for (i = 0; i < map->patch_regs; i++) {
285 if (map->patch[i].reg % map->reg_stride) {
289 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
291 dev_err(map->dev, "Failed to write %x = %x: %d\n",
292 map->patch[i].reg, map->patch[i].def, ret);
296 map->cache_bypass = 0;
298 ret = map->cache_ops->sync(map, 0, map->max_register);
301 map->cache_dirty = false;
304 trace_regcache_sync(map->dev, name, "stop");
305 /* Restore the bypass state */
306 map->cache_bypass = bypass;
311 EXPORT_SYMBOL_GPL(regcache_sync);
314 * regcache_sync_region: Sync part of the register cache with the hardware.
317 * @min: first register to sync
318 * @max: last register to sync
320 * Write all non-default register values in the specified region to
323 * Return a negative value on failure, 0 on success.
325 int regcache_sync_region(struct regmap *map, unsigned int min,
332 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
336 /* Remember the initial bypass state */
337 bypass = map->cache_bypass;
339 name = map->cache_ops->name;
340 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
342 trace_regcache_sync(map->dev, name, "start region");
344 if (!map->cache_dirty)
347 ret = map->cache_ops->sync(map, min, max);
350 trace_regcache_sync(map->dev, name, "stop region");
351 /* Restore the bypass state */
352 map->cache_bypass = bypass;
357 EXPORT_SYMBOL_GPL(regcache_sync_region);
360 * regcache_cache_only: Put a register map into cache only mode
362 * @map: map to configure
363 * @cache_only: flag if changes should be written to the hardware
365 * When a register map is marked as cache only writes to the register
366 * map API will only update the register cache, they will not cause
367 * any hardware changes. This is useful for allowing portions of
368 * drivers to act as though the device were functioning as normal when
369 * it is disabled for power saving reasons.
371 void regcache_cache_only(struct regmap *map, bool enable)
374 WARN_ON(map->cache_bypass && enable);
375 map->cache_only = enable;
376 trace_regmap_cache_only(map->dev, enable);
379 EXPORT_SYMBOL_GPL(regcache_cache_only);
382 * regcache_mark_dirty: Mark the register cache as dirty
386 * Mark the register cache as dirty, for example due to the device
387 * having been powered down for suspend. If the cache is not marked
388 * as dirty then the cache sync will be suppressed.
390 void regcache_mark_dirty(struct regmap *map)
393 map->cache_dirty = true;
396 EXPORT_SYMBOL_GPL(regcache_mark_dirty);
399 * regcache_cache_bypass: Put a register map into cache bypass mode
401 * @map: map to configure
402 * @cache_bypass: flag if changes should not be written to the hardware
404 * When a register map is marked with the cache bypass option, writes
405 * to the register map API will only update the hardware and not the
406 * the cache directly. This is useful when syncing the cache back to
409 void regcache_cache_bypass(struct regmap *map, bool enable)
412 WARN_ON(map->cache_only && enable);
413 map->cache_bypass = enable;
414 trace_regmap_cache_bypass(map->dev, enable);
417 EXPORT_SYMBOL_GPL(regcache_cache_bypass);
419 bool regcache_set_val(void *base, unsigned int idx,
420 unsigned int val, unsigned int word_size)
425 if (cache[idx] == val)
432 if (cache[idx] == val)
439 if (cache[idx] == val)
450 unsigned int regcache_get_val(const void *base, unsigned int idx,
451 unsigned int word_size)
458 const u8 *cache = base;
462 const u16 *cache = base;
466 const u32 *cache = base;
476 static int regcache_default_cmp(const void *a, const void *b)
478 const struct reg_default *_a = a;
479 const struct reg_default *_b = b;
481 return _a->reg - _b->reg;
484 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
486 struct reg_default key;
487 struct reg_default *r;
492 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
493 sizeof(struct reg_default), regcache_default_cmp);
496 return r - map->reg_defaults;