1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
9 #define pr_fmt(fmt) "ACPI: " fmt
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/types.h>
15 #include <linux/mutex.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/pci.h>
19 #include <linux/pci-acpi.h>
20 #include <linux/dmar.h>
21 #include <linux/acpi.h>
22 #include <linux/slab.h>
23 #include <linux/dmi.h>
24 #include <linux/platform_data/x86/apple.h>
27 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
28 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
29 static int acpi_pci_root_add(struct acpi_device *device,
30 const struct acpi_device_id *not_used);
31 static void acpi_pci_root_remove(struct acpi_device *device);
33 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
35 acpiphp_check_host_bridge(adev);
39 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
40 | OSC_PCI_ASPM_SUPPORT \
41 | OSC_PCI_CLOCK_PM_SUPPORT \
42 | OSC_PCI_MSI_SUPPORT)
44 static const struct acpi_device_id root_device_ids[] = {
49 static struct acpi_scan_handler pci_root_handler = {
50 .ids = root_device_ids,
51 .attach = acpi_pci_root_add,
52 .detach = acpi_pci_root_remove,
55 .scan_dependent = acpi_pci_root_scan_dependent,
60 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
61 * @handle: the ACPI CA node in question.
63 * Note: we could make this API take a struct acpi_device * instead, but
64 * for now, it's more convenient to operate on an acpi_handle.
66 int acpi_is_root_bridge(acpi_handle handle)
68 struct acpi_device *device = acpi_fetch_acpi_dev(handle);
74 ret = acpi_match_device_ids(device, root_device_ids);
80 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
83 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
85 struct resource *res = data;
86 struct acpi_resource_address64 address;
89 status = acpi_resource_to_address64(resource, &address);
90 if (ACPI_FAILURE(status))
93 if ((address.address.address_length > 0) &&
94 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
95 res->start = address.address.minimum;
96 res->end = address.address.minimum + address.address.address_length - 1;
102 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
103 struct resource *res)
109 acpi_walk_resources(handle, METHOD_NAME__CRS,
110 get_root_bridge_busnr_callback, res);
111 if (ACPI_FAILURE(status))
113 if (res->start == -1)
118 struct pci_osc_bit_struct {
123 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
124 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
125 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
126 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
127 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
128 { OSC_PCI_MSI_SUPPORT, "MSI" },
129 { OSC_PCI_EDR_SUPPORT, "EDR" },
130 { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
133 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
134 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
135 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
136 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
137 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
138 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
139 { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
140 { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
143 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
144 struct pci_osc_bit_struct *table, int size)
148 struct pci_osc_bit_struct *entry;
151 for (i = 0, entry = table; i < size; i++, entry++)
152 if (word & entry->bit)
153 len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
154 len ? " " : "", entry->desc);
156 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
159 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
161 decode_osc_bits(root, msg, word, pci_osc_support_bit,
162 ARRAY_SIZE(pci_osc_support_bit));
165 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
167 decode_osc_bits(root, msg, word, pci_osc_control_bit,
168 ARRAY_SIZE(pci_osc_control_bit));
171 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
173 static acpi_status acpi_pci_run_osc(acpi_handle handle,
174 const u32 *capbuf, u32 *retval)
176 struct acpi_osc_context context = {
177 .uuid_str = pci_osc_uuid_str,
180 .cap.pointer = (void *)capbuf,
184 status = acpi_run_osc(handle, &context);
185 if (ACPI_SUCCESS(status)) {
186 *retval = *((u32 *)(context.ret.pointer + 8));
187 kfree(context.ret.pointer);
192 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
197 u32 result, capbuf[3];
199 support |= root->osc_support_set;
201 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
202 capbuf[OSC_SUPPORT_DWORD] = support;
203 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
205 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
206 if (ACPI_SUCCESS(status)) {
207 root->osc_support_set = support;
213 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
215 struct acpi_device *device = acpi_fetch_acpi_dev(handle);
216 struct acpi_pci_root *root;
218 if (!device || acpi_match_device_ids(device, root_device_ids))
221 root = acpi_driver_data(device);
225 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
227 struct acpi_handle_node {
228 struct list_head node;
233 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
234 * @handle: the handle in question
236 * Given an ACPI CA handle, the desired PCI device is located in the
237 * list of PCI devices.
239 * If the device is found, its reference count is increased and this
240 * function returns a pointer to its data structure. The caller must
241 * decrement the reference count by calling pci_dev_put().
242 * If no device is found, %NULL is returned.
244 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
247 unsigned long long adr;
250 struct pci_bus *pbus;
251 struct pci_dev *pdev = NULL;
252 struct acpi_handle_node *node, *tmp;
253 struct acpi_pci_root *root;
254 LIST_HEAD(device_list);
257 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
260 while (!acpi_is_root_bridge(phandle)) {
261 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
265 INIT_LIST_HEAD(&node->node);
266 node->handle = phandle;
267 list_add(&node->node, &device_list);
269 status = acpi_get_parent(phandle, &phandle);
270 if (ACPI_FAILURE(status))
274 root = acpi_pci_find_root(phandle);
281 * Now, walk back down the PCI device tree until we return to our
282 * original handle. Assumes that everything between the PCI root
283 * bridge and the device we're looking for must be a P2P bridge.
285 list_for_each_entry(node, &device_list, node) {
286 acpi_handle hnd = node->handle;
287 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
288 if (ACPI_FAILURE(status))
290 dev = (adr >> 16) & 0xffff;
293 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
294 if (!pdev || hnd == handle)
297 pbus = pdev->subordinate;
301 * This function may be called for a non-PCI device that has a
302 * PCI parent (eg. a disk under a PCI SATA controller). In that
303 * case pdev->subordinate will be NULL for the parent.
306 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
312 list_for_each_entry_safe(node, tmp, &device_list, node)
317 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
320 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
321 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
322 * @mask: Mask of _OSC bits to request control of, place to store control mask.
323 * @support: _OSC supported capability.
325 * Run _OSC query for @mask and if that is successful, compare the returned
326 * mask of control bits with @req. If all of the @req bits are set in the
327 * returned mask, run _OSC request for it.
329 * The variable at the @mask address may be modified regardless of whether or
330 * not the function returns success. On success it will contain the mask of
331 * _OSC bits the BIOS has granted control of, but its contents are meaningless
334 static acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 support)
336 u32 req = OSC_PCI_EXPRESS_CAPABILITY_CONTROL;
337 struct acpi_pci_root *root;
342 return AE_BAD_PARAMETER;
344 root = acpi_pci_find_root(handle);
349 *mask |= root->osc_control_set;
351 /* Need to check the available controls bits before requesting them. */
353 status = acpi_pci_query_osc(root, support, mask);
354 if (ACPI_FAILURE(status))
358 decode_osc_control(root, "platform does not support",
363 /* No need to request _OSC if the control was already granted. */
364 if ((root->osc_control_set & ctrl) == ctrl)
367 if ((ctrl & req) != req) {
368 decode_osc_control(root, "not requesting control; platform does not support",
373 capbuf[OSC_QUERY_DWORD] = 0;
374 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
375 capbuf[OSC_CONTROL_DWORD] = ctrl;
376 status = acpi_pci_run_osc(handle, capbuf, mask);
377 if (ACPI_FAILURE(status))
380 root->osc_control_set = *mask;
384 static u32 calculate_support(void)
389 * All supported architectures that use ACPI have support for
390 * PCI domains, so we indicate this in _OSC support capabilities.
392 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
393 support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
394 if (pci_ext_cfg_avail())
395 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
396 if (pcie_aspm_support_enabled())
397 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
398 if (pci_msi_enabled())
399 support |= OSC_PCI_MSI_SUPPORT;
400 if (IS_ENABLED(CONFIG_PCIE_EDR))
401 support |= OSC_PCI_EDR_SUPPORT;
406 static u32 calculate_control(void)
410 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
411 | OSC_PCI_EXPRESS_PME_CONTROL;
413 if (IS_ENABLED(CONFIG_PCIEASPM))
414 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
416 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
417 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
419 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
420 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
422 if (pci_aer_available())
423 control |= OSC_PCI_EXPRESS_AER_CONTROL;
426 * Per the Downstream Port Containment Related Enhancements ECN to
427 * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
428 * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
431 if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
432 control |= OSC_PCI_EXPRESS_DPC_CONTROL;
437 static bool os_control_query_checks(struct acpi_pci_root *root, u32 support)
439 struct acpi_device *device = root->device;
441 if (pcie_ports_disabled) {
442 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
446 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
447 decode_osc_support(root, "not requesting OS control; OS requires",
448 ACPI_PCIE_REQ_SUPPORT);
455 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
458 u32 support, control = 0, requested = 0;
460 struct acpi_device *device = root->device;
461 acpi_handle handle = device->handle;
464 * Apple always return failure on _OSC calls when _OSI("Darwin") has
465 * been called successfully. We know the feature set supported by the
466 * platform, so avoid calling _OSC at all
468 if (x86_apple_machine) {
469 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
470 decode_osc_control(root, "OS assumes control of",
471 root->osc_control_set);
475 support = calculate_support();
477 decode_osc_support(root, "OS supports", support);
479 if (os_control_query_checks(root, support))
480 requested = control = calculate_control();
482 status = acpi_pci_osc_control_set(handle, &control, support);
483 if (ACPI_SUCCESS(status)) {
485 decode_osc_control(root, "OS now controls", control);
487 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
489 * We have ASPM control, but the FADT indicates that
490 * it's unsupported. Leave existing configuration
491 * intact and prevent the OS from touching it.
493 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
498 * We want to disable ASPM here, but aspm_disabled
499 * needs to remain in its state from boot so that we
500 * properly handle PCIe 1.1 devices. So we set this
501 * flag here, to defer the action until after the ACPI
506 /* _OSC is optional for PCI host bridges */
507 if ((status == AE_NOT_FOUND) && !is_pcie)
511 decode_osc_control(root, "OS requested", requested);
512 decode_osc_control(root, "platform willing to grant", control);
515 dev_info(&device->dev, "_OSC: platform retains control of PCIe features (%s)\n",
516 acpi_format_exception(status));
520 static int acpi_pci_root_add(struct acpi_device *device,
521 const struct acpi_device_id *not_used)
523 unsigned long long segment, bus;
526 struct acpi_pci_root *root;
527 acpi_handle handle = device->handle;
529 bool hotadd = system_state == SYSTEM_RUNNING;
532 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
537 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
539 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
540 dev_err(&device->dev, "can't evaluate _SEG\n");
545 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
546 root->secondary.flags = IORESOURCE_BUS;
547 status = try_get_root_bridge_busnr(handle, &root->secondary);
548 if (ACPI_FAILURE(status)) {
550 * We need both the start and end of the downstream bus range
551 * to interpret _CBA (MMCONFIG base address), so it really is
552 * supposed to be in _CRS. If we don't find it there, all we
553 * can do is assume [_BBN-0xFF] or [0-0xFF].
555 root->secondary.end = 0xFF;
556 dev_warn(&device->dev,
557 FW_BUG "no secondary bus range in _CRS\n");
558 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
560 if (ACPI_SUCCESS(status))
561 root->secondary.start = bus;
562 else if (status == AE_NOT_FOUND)
563 root->secondary.start = 0;
565 dev_err(&device->dev, "can't evaluate _BBN\n");
571 root->device = device;
572 root->segment = segment & 0xFFFF;
573 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
574 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
575 device->driver_data = root;
577 if (hotadd && dmar_device_add(handle)) {
582 pr_info("%s [%s] (domain %04x %pR)\n",
583 acpi_device_name(device), acpi_device_bid(device),
584 root->segment, &root->secondary);
586 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
588 is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
589 negotiate_os_control(root, &no_aspm, is_pcie);
592 * TBD: Need PCI interface for enumeration/configuration of roots.
596 * Scan the Root Bridge
597 * --------------------
598 * Must do this prior to any attempt to bind the root device, as the
599 * PCI namespace does not get created until this call is made (and
600 * thus the root bridge's pci_dev does not exist).
602 root->bus = pci_acpi_scan_root(root);
604 dev_err(&device->dev,
605 "Bus %04x:%02x not present in PCI namespace\n",
606 root->segment, (unsigned int)root->secondary.start);
607 device->driver_data = NULL;
615 pci_acpi_add_bus_pm_notifier(device);
616 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
619 pcibios_resource_survey_bus(root->bus);
620 pci_assign_unassigned_root_bus_resources(root->bus);
622 * This is only called for the hotadd case. For the boot-time
623 * case, we need to wait until after PCI initialization in
624 * order to deal with IOAPICs mapped in on a PCI BAR.
626 * This is currently x86-specific, because acpi_ioapic_add()
627 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
628 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
629 * (see drivers/acpi/Kconfig).
631 acpi_ioapic_add(root->device->handle);
634 pci_lock_rescan_remove();
635 pci_bus_add_devices(root->bus);
636 pci_unlock_rescan_remove();
641 dmar_device_remove(handle);
647 static void acpi_pci_root_remove(struct acpi_device *device)
649 struct acpi_pci_root *root = acpi_driver_data(device);
651 pci_lock_rescan_remove();
653 pci_stop_root_bus(root->bus);
655 pci_ioapic_remove(root);
656 device_set_wakeup_capable(root->bus->bridge, false);
657 pci_acpi_remove_bus_pm_notifier(device);
659 pci_remove_root_bus(root->bus);
660 WARN_ON(acpi_ioapic_remove(root));
662 dmar_device_remove(device->handle);
664 pci_unlock_rescan_remove();
670 * Following code to support acpi_pci_root_create() is copied from
671 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
674 static void acpi_pci_root_validate_resources(struct device *dev,
675 struct list_head *resources,
679 struct resource *res1, *res2, *root = NULL;
680 struct resource_entry *tmp, *entry, *entry2;
682 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
683 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
685 list_splice_init(resources, &list);
686 resource_list_for_each_entry_safe(entry, tmp, &list) {
691 if (!(res1->flags & type))
694 /* Exclude non-addressable range or non-addressable portion */
695 end = min(res1->end, root->end);
696 if (end <= res1->start) {
697 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
701 } else if (res1->end != end) {
702 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
703 res1, (unsigned long long)end + 1,
704 (unsigned long long)res1->end);
708 resource_list_for_each_entry(entry2, resources) {
710 if (!(res2->flags & type))
714 * I don't like throwing away windows because then
715 * our resources no longer match the ACPI _CRS, but
716 * the kernel resource tree doesn't allow overlaps.
718 if (resource_union(res1, res2, res2)) {
719 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
727 resource_list_del(entry);
729 resource_list_free_entry(entry);
731 resource_list_add_tail(entry, resources);
735 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
736 struct resource_entry *entry)
739 struct resource *res = entry->res;
740 resource_size_t cpu_addr = res->start;
741 resource_size_t pci_addr = cpu_addr - entry->offset;
742 resource_size_t length = resource_size(res);
745 if (pci_register_io_range(fwnode, cpu_addr, length))
748 port = pci_address_to_pio(cpu_addr);
749 if (port == (unsigned long)-1)
753 res->end = port + length - 1;
754 entry->offset = port - pci_addr;
756 if (pci_remap_iospace(res, cpu_addr) < 0)
759 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
762 res->flags |= IORESOURCE_DISABLED;
766 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
769 struct list_head *list = &info->resources;
770 struct acpi_device *device = info->bridge;
771 struct resource_entry *entry, *tmp;
774 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
775 ret = acpi_dev_get_resources(device, list,
776 acpi_dev_filter_resource_type_cb,
779 dev_warn(&device->dev,
780 "failed to parse _CRS method, error code %d\n", ret);
782 dev_dbg(&device->dev,
783 "no IO and memory resources present in _CRS\n");
785 resource_list_for_each_entry_safe(entry, tmp, list) {
786 if (entry->res->flags & IORESOURCE_IO)
787 acpi_pci_root_remap_iospace(&device->fwnode,
790 if (entry->res->flags & IORESOURCE_DISABLED)
791 resource_list_destroy_entry(entry);
793 entry->res->name = info->name;
795 acpi_pci_root_validate_resources(&device->dev, list,
797 acpi_pci_root_validate_resources(&device->dev, list,
804 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
806 struct resource_entry *entry, *tmp;
807 struct resource *res, *conflict, *root = NULL;
809 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
811 if (res->flags & IORESOURCE_MEM)
812 root = &iomem_resource;
813 else if (res->flags & IORESOURCE_IO)
814 root = &ioport_resource;
819 * Some legacy x86 host bridge drivers use iomem_resource and
820 * ioport_resource as default resource pool, skip it.
825 conflict = insert_resource_conflict(root, res);
827 dev_info(&info->bridge->dev,
828 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
829 res, conflict->name, conflict);
830 resource_list_destroy_entry(entry);
835 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
837 struct resource *res;
838 struct resource_entry *entry, *tmp;
843 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
846 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
847 release_resource(res);
848 resource_list_destroy_entry(entry);
851 info->ops->release_info(info);
854 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
856 struct resource *res;
857 struct resource_entry *entry;
859 resource_list_for_each_entry(entry, &bridge->windows) {
861 if (res->flags & IORESOURCE_IO)
862 pci_unmap_iospace(res);
864 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
865 release_resource(res);
867 __acpi_pci_root_release_info(bridge->release_data);
870 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
871 struct acpi_pci_root_ops *ops,
872 struct acpi_pci_root_info *info,
875 int ret, busnum = root->secondary.start;
876 struct acpi_device *device = root->device;
877 int node = acpi_get_node(device->handle);
879 struct pci_host_bridge *host_bridge;
880 union acpi_object *obj;
883 info->bridge = device;
885 INIT_LIST_HEAD(&info->resources);
886 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
887 root->segment, busnum);
889 if (ops->init_info && ops->init_info(info))
890 goto out_release_info;
891 if (ops->prepare_resources)
892 ret = ops->prepare_resources(info);
894 ret = acpi_pci_probe_root_resources(info);
896 goto out_release_info;
898 pci_acpi_root_add_resources(info);
899 pci_add_resource(&info->resources, &root->secondary);
900 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
901 sysdata, &info->resources);
903 goto out_release_info;
905 host_bridge = to_pci_host_bridge(bus->bridge);
906 if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
907 host_bridge->native_pcie_hotplug = 0;
908 if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
909 host_bridge->native_shpc_hotplug = 0;
910 if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
911 host_bridge->native_aer = 0;
912 if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
913 host_bridge->native_pme = 0;
914 if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
915 host_bridge->native_ltr = 0;
916 if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
917 host_bridge->native_dpc = 0;
920 * Evaluate the "PCI Boot Configuration" _DSM Function. If it
921 * exists and returns 0, we must preserve any PCI resource
922 * assignments made by firmware for this host bridge.
924 obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
925 DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
926 if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
927 host_bridge->preserve_config = 1;
930 pci_scan_child_bus(bus);
931 pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
933 if (node != NUMA_NO_NODE)
934 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
938 __acpi_pci_root_release_info(info);
942 void __init acpi_pci_root_init(void)
944 if (acpi_pci_disabled)
947 pci_acpi_crs_quirks();
948 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");