drivers/acpi/pci_root.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
   4  *
   5  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   6  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   7  */
   8
   9 #include <linux/kernel.h>
  10 #include <linux/module.h>
  11 #include <linux/init.h>
  12 #include <linux/types.h>
  13 #include <linux/mutex.h>
  14 #include <linux/pm.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/pci.h>
  17 #include <linux/pci-acpi.h>
  18 #include <linux/dmar.h>
  19 #include <linux/acpi.h>
  20 #include <linux/slab.h>
  21 #include <linux/dmi.h>
  22 #include <linux/platform_data/x86/apple.h>
  23 #include <acpi/apei.h>  /* for acpi_hest_init() */
  24
  25 #include "internal.h"
  26
  27 #define ACPI_PCI_ROOT_CLASS             "pci_bridge"
  28 #define ACPI_PCI_ROOT_DEVICE_NAME       "PCI Root Bridge"
  29 static int acpi_pci_root_add(struct acpi_device *device,
  30                              const struct acpi_device_id *not_used);
  31 static void acpi_pci_root_remove(struct acpi_device *device);
  32
  33 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
  34 {
  35         acpiphp_check_host_bridge(adev);
  36         return 0;
  37 }
  38
  39 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
  40                                 | OSC_PCI_ASPM_SUPPORT \
  41                                 | OSC_PCI_CLOCK_PM_SUPPORT \
  42                                 | OSC_PCI_MSI_SUPPORT)
  43
  44 static const struct acpi_device_id root_device_ids[] = {
  45         {"PNP0A03", 0},
  46         {"", 0},
  47 };
  48
  49 static struct acpi_scan_handler pci_root_handler = {
  50         .ids = root_device_ids,
  51         .attach = acpi_pci_root_add,
  52         .detach = acpi_pci_root_remove,
  53         .hotplug = {
  54                 .enabled = true,
  55                 .scan_dependent = acpi_pci_root_scan_dependent,
  56         },
  57 };
  58
  59 /**
  60  * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
  61  * @handle:  the ACPI CA node in question.
  62  *
  63  * Note: we could make this API take a struct acpi_device * instead, but
  64  * for now, it's more convenient to operate on an acpi_handle.
  65  */
  66 int acpi_is_root_bridge(acpi_handle handle)
  67 {
  68         int ret;
  69         struct acpi_device *device;
  70
  71         ret = acpi_bus_get_device(handle, &device);
  72         if (ret)
  73                 return 0;
  74
  75         ret = acpi_match_device_ids(device, root_device_ids);
  76         if (ret)
  77                 return 0;
  78         else
  79                 return 1;
  80 }
  81 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
  82
  83 static acpi_status
  84 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
  85 {
  86         struct resource *res = data;
  87         struct acpi_resource_address64 address;
  88         acpi_status status;
  89
  90         status = acpi_resource_to_address64(resource, &address);
  91         if (ACPI_FAILURE(status))
  92                 return AE_OK;
  93
  94         if ((address.address.address_length > 0) &&
  95             (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
  96                 res->start = address.address.minimum;
  97                 res->end = address.address.minimum + address.address.address_length - 1;
  98         }
  99
 100         return AE_OK;
 101 }
 102
 103 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
 104                                              struct resource *res)
 105 {
 106         acpi_status status;
 107
 108         res->start = -1;
 109         status =
 110             acpi_walk_resources(handle, METHOD_NAME__CRS,
 111                                 get_root_bridge_busnr_callback, res);
 112         if (ACPI_FAILURE(status))
 113                 return status;
 114         if (res->start == -1)
 115                 return AE_ERROR;
 116         return AE_OK;
 117 }
 118
 119 struct pci_osc_bit_struct {
 120         u32 bit;
 121         char *desc;
 122 };
 123
 124 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
 125         { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
 126         { OSC_PCI_ASPM_SUPPORT, "ASPM" },
 127         { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
 128         { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
 129         { OSC_PCI_MSI_SUPPORT, "MSI" },
 130         { OSC_PCI_EDR_SUPPORT, "EDR" },
 131         { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
 132 };
 133
 134 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
 135         { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
 136         { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
 137         { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
 138         { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
 139         { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
 140         { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
 141         { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
 142 };
 143
 144 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
 145                             struct pci_osc_bit_struct *table, int size)
 146 {
 147         char buf[80];
 148         int i, len = 0;
 149         struct pci_osc_bit_struct *entry;
 150
 151         buf[0] = '\0';
 152         for (i = 0, entry = table; i < size; i++, entry++)
 153                 if (word & entry->bit)
 154                         len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
 155                                         len ? " " : "", entry->desc);
 156
 157         dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
 158 }
 159
 160 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
 161 {
 162         decode_osc_bits(root, msg, word, pci_osc_support_bit,
 163                         ARRAY_SIZE(pci_osc_support_bit));
 164 }
 165
 166 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
 167 {
 168         decode_osc_bits(root, msg, word, pci_osc_control_bit,
 169                         ARRAY_SIZE(pci_osc_control_bit));
 170 }
 171
 172 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
 173
 174 static acpi_status acpi_pci_run_osc(acpi_handle handle,
 175                                     const u32 *capbuf, u32 *retval)
 176 {
 177         struct acpi_osc_context context = {
 178                 .uuid_str = pci_osc_uuid_str,
 179                 .rev = 1,
 180                 .cap.length = 12,
 181                 .cap.pointer = (void *)capbuf,
 182         };
 183         acpi_status status;
 184
 185         status = acpi_run_osc(handle, &context);
 186         if (ACPI_SUCCESS(status)) {
 187                 *retval = *((u32 *)(context.ret.pointer + 8));
 188                 kfree(context.ret.pointer);
 189         }
 190         return status;
 191 }
 192
 193 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
 194                                         u32 support,
 195                                         u32 *control)
 196 {
 197         acpi_status status;
 198         u32 result, capbuf[3];
 199
 200         support &= OSC_PCI_SUPPORT_MASKS;
 201         support |= root->osc_support_set;
 202
 203         capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
 204         capbuf[OSC_SUPPORT_DWORD] = support;
 205         if (control) {
 206                 *control &= OSC_PCI_CONTROL_MASKS;
 207                 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
 208         } else {
 209                 /* Run _OSC query only with existing controls. */
 210                 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
 211         }
 212
 213         status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
 214         if (ACPI_SUCCESS(status)) {
 215                 root->osc_support_set = support;
 216                 if (control)
 217                         *control = result;
 218         }
 219         return status;
 220 }
 221
 222 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
 223 {
 224         return acpi_pci_query_osc(root, flags, NULL);
 225 }
 226
 227 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
 228 {
 229         struct acpi_pci_root *root;
 230         struct acpi_device *device;
 231
 232         if (acpi_bus_get_device(handle, &device) ||
 233             acpi_match_device_ids(device, root_device_ids))
 234                 return NULL;
 235
 236         root = acpi_driver_data(device);
 237
 238         return root;
 239 }
 240 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
 241
 242 struct acpi_handle_node {
 243         struct list_head node;
 244         acpi_handle handle;
 245 };
 246
 247 /**
 248  * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
 249  * @handle: the handle in question
 250  *
 251  * Given an ACPI CA handle, the desired PCI device is located in the
 252  * list of PCI devices.
 253  *
 254  * If the device is found, its reference count is increased and this
 255  * function returns a pointer to its data structure.  The caller must
 256  * decrement the reference count by calling pci_dev_put().
 257  * If no device is found, %NULL is returned.
 258  */
 259 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
 260 {
 261         int dev, fn;
 262         unsigned long long adr;
 263         acpi_status status;
 264         acpi_handle phandle;
 265         struct pci_bus *pbus;
 266         struct pci_dev *pdev = NULL;
 267         struct acpi_handle_node *node, *tmp;
 268         struct acpi_pci_root *root;
 269         LIST_HEAD(device_list);
 270
 271         /*
 272          * Walk up the ACPI CA namespace until we reach a PCI root bridge.
 273          */
 274         phandle = handle;
 275         while (!acpi_is_root_bridge(phandle)) {
 276                 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
 277                 if (!node)
 278                         goto out;
 279
 280                 INIT_LIST_HEAD(&node->node);
 281                 node->handle = phandle;
 282                 list_add(&node->node, &device_list);
 283
 284                 status = acpi_get_parent(phandle, &phandle);
 285                 if (ACPI_FAILURE(status))
 286                         goto out;
 287         }
 288
 289         root = acpi_pci_find_root(phandle);
 290         if (!root)
 291                 goto out;
 292
 293         pbus = root->bus;
 294
 295         /*
 296          * Now, walk back down the PCI device tree until we return to our
 297          * original handle. Assumes that everything between the PCI root
 298          * bridge and the device we're looking for must be a P2P bridge.
 299          */
 300         list_for_each_entry(node, &device_list, node) {
 301                 acpi_handle hnd = node->handle;
 302                 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
 303                 if (ACPI_FAILURE(status))
 304                         goto out;
 305                 dev = (adr >> 16) & 0xffff;
 306                 fn  = adr & 0xffff;
 307
 308                 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
 309                 if (!pdev || hnd == handle)
 310                         break;
 311
 312                 pbus = pdev->subordinate;
 313                 pci_dev_put(pdev);
 314
 315                 /*
 316                  * This function may be called for a non-PCI device that has a
 317                  * PCI parent (eg. a disk under a PCI SATA controller).  In that
 318                  * case pdev->subordinate will be NULL for the parent.
 319                  */
 320                 if (!pbus) {
 321                         dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
 322                         pdev = NULL;
 323                         break;
 324                 }
 325         }
 326 out:
 327         list_for_each_entry_safe(node, tmp, &device_list, node)
 328                 kfree(node);
 329
 330         return pdev;
 331 }
 332 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
 333
 334 /**
 335  * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
 336  * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
 337  * @mask: Mask of _OSC bits to request control of, place to store control mask.
 338  * @req: Mask of _OSC bits the control of is essential to the caller.
 339  *
 340  * Run _OSC query for @mask and if that is successful, compare the returned
 341  * mask of control bits with @req.  If all of the @req bits are set in the
 342  * returned mask, run _OSC request for it.
 343  *
 344  * The variable at the @mask address may be modified regardless of whether or
 345  * not the function returns success.  On success it will contain the mask of
 346  * _OSC bits the BIOS has granted control of, but its contents are meaningless
 347  * on failure.
 348  **/
 349 static acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
 350 {
 351         struct acpi_pci_root *root;
 352         acpi_status status;
 353         u32 ctrl, capbuf[3];
 354
 355         if (!mask)
 356                 return AE_BAD_PARAMETER;
 357
 358         ctrl = *mask & OSC_PCI_CONTROL_MASKS;
 359         if ((ctrl & req) != req)
 360                 return AE_TYPE;
 361
 362         root = acpi_pci_find_root(handle);
 363         if (!root)
 364                 return AE_NOT_EXIST;
 365
 366         *mask = ctrl | root->osc_control_set;
 367         /* No need to evaluate _OSC if the control was already granted. */
 368         if ((root->osc_control_set & ctrl) == ctrl)
 369                 return AE_OK;
 370
 371         /* Need to check the available controls bits before requesting them. */
 372         while (*mask) {
 373                 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
 374                 if (ACPI_FAILURE(status))
 375                         return status;
 376                 if (ctrl == *mask)
 377                         break;
 378                 decode_osc_control(root, "platform does not support",
 379                                    ctrl & ~(*mask));
 380                 ctrl = *mask;
 381         }
 382
 383         if ((ctrl & req) != req) {
 384                 decode_osc_control(root, "not requesting control; platform does not support",
 385                                    req & ~(ctrl));
 386                 return AE_SUPPORT;
 387         }
 388
 389         capbuf[OSC_QUERY_DWORD] = 0;
 390         capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
 391         capbuf[OSC_CONTROL_DWORD] = ctrl;
 392         status = acpi_pci_run_osc(handle, capbuf, mask);
 393         if (ACPI_FAILURE(status))
 394                 return status;
 395
 396         root->osc_control_set = *mask;
 397         return AE_OK;
 398 }
 399
 400 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
 401                                  bool is_pcie)
 402 {
 403         u32 support, control, requested;
 404         acpi_status status;
 405         struct acpi_device *device = root->device;
 406         acpi_handle handle = device->handle;
 407
 408         /*
 409          * Apple always return failure on _OSC calls when _OSI("Darwin") has
 410          * been called successfully. We know the feature set supported by the
 411          * platform, so avoid calling _OSC at all
 412          */
 413         if (x86_apple_machine) {
 414                 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
 415                 decode_osc_control(root, "OS assumes control of",
 416                                    root->osc_control_set);
 417                 return;
 418         }
 419
 420         /*
 421          * All supported architectures that use ACPI have support for
 422          * PCI domains, so we indicate this in _OSC support capabilities.
 423          */
 424         support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
 425         support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
 426         if (pci_ext_cfg_avail())
 427                 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
 428         if (pcie_aspm_support_enabled())
 429                 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
 430         if (pci_msi_enabled())
 431                 support |= OSC_PCI_MSI_SUPPORT;
 432         if (IS_ENABLED(CONFIG_PCIE_EDR))
 433                 support |= OSC_PCI_EDR_SUPPORT;
 434
 435         decode_osc_support(root, "OS supports", support);
 436         status = acpi_pci_osc_support(root, support);
 437         if (ACPI_FAILURE(status)) {
 438                 *no_aspm = 1;
 439
 440                 /* _OSC is optional for PCI host bridges */
 441                 if ((status == AE_NOT_FOUND) && !is_pcie)
 442                         return;
 443
 444                 dev_info(&device->dev, "_OSC: platform retains control of PCIe features (%s)\n",
 445                          acpi_format_exception(status));
 446                 return;
 447         }
 448
 449         if (pcie_ports_disabled) {
 450                 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
 451                 return;
 452         }
 453
 454         if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
 455                 decode_osc_support(root, "not requesting OS control; OS requires",
 456                                    ACPI_PCIE_REQ_SUPPORT);
 457                 return;
 458         }
 459
 460         control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
 461                 | OSC_PCI_EXPRESS_PME_CONTROL;
 462
 463         if (IS_ENABLED(CONFIG_PCIEASPM))
 464                 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
 465
 466         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
 467                 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
 468
 469         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
 470                 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
 471
 472         if (pci_aer_available())
 473                 control |= OSC_PCI_EXPRESS_AER_CONTROL;
 474
 475         /*
 476          * Per the Downstream Port Containment Related Enhancements ECN to
 477          * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
 478          * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
 479          * and EDR.
 480          */
 481         if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
 482                 control |= OSC_PCI_EXPRESS_DPC_CONTROL;
 483
 484         requested = control;
 485         status = acpi_pci_osc_control_set(handle, &control,
 486                                           OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
 487         if (ACPI_SUCCESS(status)) {
 488                 decode_osc_control(root, "OS now controls", control);
 489                 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
 490                         /*
 491                          * We have ASPM control, but the FADT indicates that
 492                          * it's unsupported. Leave existing configuration
 493                          * intact and prevent the OS from touching it.
 494                          */
 495                         dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
 496                         *no_aspm = 1;
 497                 }
 498         } else {
 499                 decode_osc_control(root, "OS requested", requested);
 500                 decode_osc_control(root, "platform willing to grant", control);
 501                 dev_info(&device->dev, "_OSC: platform retains control of PCIe features (%s)\n",
 502                         acpi_format_exception(status));
 503
 504                 /*
 505                  * We want to disable ASPM here, but aspm_disabled
 506                  * needs to remain in its state from boot so that we
 507                  * properly handle PCIe 1.1 devices.  So we set this
 508                  * flag here, to defer the action until after the ACPI
 509                  * root scan.
 510                  */
 511                 *no_aspm = 1;
 512         }
 513 }
 514
 515 static int acpi_pci_root_add(struct acpi_device *device,
 516                              const struct acpi_device_id *not_used)
 517 {
 518         unsigned long long segment, bus;
 519         acpi_status status;
 520         int result;
 521         struct acpi_pci_root *root;
 522         acpi_handle handle = device->handle;
 523         int no_aspm = 0;
 524         bool hotadd = system_state == SYSTEM_RUNNING;
 525         bool is_pcie;
 526
 527         root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
 528         if (!root)
 529                 return -ENOMEM;
 530
 531         segment = 0;
 532         status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
 533                                        &segment);
 534         if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
 535                 dev_err(&device->dev,  "can't evaluate _SEG\n");
 536                 result = -ENODEV;
 537                 goto end;
 538         }
 539
 540         /* Check _CRS first, then _BBN.  If no _BBN, default to zero. */
 541         root->secondary.flags = IORESOURCE_BUS;
 542         status = try_get_root_bridge_busnr(handle, &root->secondary);
 543         if (ACPI_FAILURE(status)) {
 544                 /*
 545                  * We need both the start and end of the downstream bus range
 546                  * to interpret _CBA (MMCONFIG base address), so it really is
 547                  * supposed to be in _CRS.  If we don't find it there, all we
 548                  * can do is assume [_BBN-0xFF] or [0-0xFF].
 549                  */
 550                 root->secondary.end = 0xFF;
 551                 dev_warn(&device->dev,
 552                          FW_BUG "no secondary bus range in _CRS\n");
 553                 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
 554                                                NULL, &bus);
 555                 if (ACPI_SUCCESS(status))
 556                         root->secondary.start = bus;
 557                 else if (status == AE_NOT_FOUND)
 558                         root->secondary.start = 0;
 559                 else {
 560                         dev_err(&device->dev, "can't evaluate _BBN\n");
 561                         result = -ENODEV;
 562                         goto end;
 563                 }
 564         }
 565
 566         root->device = device;
 567         root->segment = segment & 0xFFFF;
 568         strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
 569         strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
 570         device->driver_data = root;
 571
 572         if (hotadd && dmar_device_add(handle)) {
 573                 result = -ENXIO;
 574                 goto end;
 575         }
 576
 577         pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
 578                acpi_device_name(device), acpi_device_bid(device),
 579                root->segment, &root->secondary);
 580
 581         root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
 582
 583         is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
 584         negotiate_os_control(root, &no_aspm, is_pcie);
 585
 586         /*
 587          * TBD: Need PCI interface for enumeration/configuration of roots.
 588          */
 589
 590         /*
 591          * Scan the Root Bridge
 592          * --------------------
 593          * Must do this prior to any attempt to bind the root device, as the
 594          * PCI namespace does not get created until this call is made (and
 595          * thus the root bridge's pci_dev does not exist).
 596          */
 597         root->bus = pci_acpi_scan_root(root);
 598         if (!root->bus) {
 599                 dev_err(&device->dev,
 600                         "Bus %04x:%02x not present in PCI namespace\n",
 601                         root->segment, (unsigned int)root->secondary.start);
 602                 device->driver_data = NULL;
 603                 result = -ENODEV;
 604                 goto remove_dmar;
 605         }
 606
 607         if (no_aspm)
 608                 pcie_no_aspm();
 609
 610         pci_acpi_add_bus_pm_notifier(device);
 611         device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
 612
 613         if (hotadd) {
 614                 pcibios_resource_survey_bus(root->bus);
 615                 pci_assign_unassigned_root_bus_resources(root->bus);
 616                 /*
 617                  * This is only called for the hotadd case. For the boot-time
 618                  * case, we need to wait until after PCI initialization in
 619                  * order to deal with IOAPICs mapped in on a PCI BAR.
 620                  *
 621                  * This is currently x86-specific, because acpi_ioapic_add()
 622                  * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
 623                  * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
 624                  * (see drivers/acpi/Kconfig).
 625                  */
 626                 acpi_ioapic_add(root->device->handle);
 627         }
 628
 629         pci_lock_rescan_remove();
 630         pci_bus_add_devices(root->bus);
 631         pci_unlock_rescan_remove();
 632         return 1;
 633
 634 remove_dmar:
 635         if (hotadd)
 636                 dmar_device_remove(handle);
 637 end:
 638         kfree(root);
 639         return result;
 640 }
 641
 642 static void acpi_pci_root_remove(struct acpi_device *device)
 643 {
 644         struct acpi_pci_root *root = acpi_driver_data(device);
 645
 646         pci_lock_rescan_remove();
 647
 648         pci_stop_root_bus(root->bus);
 649
 650         pci_ioapic_remove(root);
 651         device_set_wakeup_capable(root->bus->bridge, false);
 652         pci_acpi_remove_bus_pm_notifier(device);
 653
 654         pci_remove_root_bus(root->bus);
 655         WARN_ON(acpi_ioapic_remove(root));
 656
 657         dmar_device_remove(device->handle);
 658
 659         pci_unlock_rescan_remove();
 660
 661         kfree(root);
 662 }
 663
 664 /*
 665  * Following code to support acpi_pci_root_create() is copied from
 666  * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
 667  * and ARM64.
 668  */
 669 static void acpi_pci_root_validate_resources(struct device *dev,
 670                                              struct list_head *resources,
 671                                              unsigned long type)
 672 {
 673         LIST_HEAD(list);
 674         struct resource *res1, *res2, *root = NULL;
 675         struct resource_entry *tmp, *entry, *entry2;
 676
 677         BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
 678         root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
 679
 680         list_splice_init(resources, &list);
 681         resource_list_for_each_entry_safe(entry, tmp, &list) {
 682                 bool free = false;
 683                 resource_size_t end;
 684
 685                 res1 = entry->res;
 686                 if (!(res1->flags & type))
 687                         goto next;
 688
 689                 /* Exclude non-addressable range or non-addressable portion */
 690                 end = min(res1->end, root->end);
 691                 if (end <= res1->start) {
 692                         dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
 693                                  res1);
 694                         free = true;
 695                         goto next;
 696                 } else if (res1->end != end) {
 697                         dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
 698                                  res1, (unsigned long long)end + 1,
 699                                  (unsigned long long)res1->end);
 700                         res1->end = end;
 701                 }
 702
 703                 resource_list_for_each_entry(entry2, resources) {
 704                         res2 = entry2->res;
 705                         if (!(res2->flags & type))
 706                                 continue;
 707
 708                         /*
 709                          * I don't like throwing away windows because then
 710                          * our resources no longer match the ACPI _CRS, but
 711                          * the kernel resource tree doesn't allow overlaps.
 712                          */
 713                         if (resource_union(res1, res2, res2)) {
 714                                 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
 715                                          res2, res1);
 716                                 free = true;
 717                                 goto next;
 718                         }
 719                 }
 720
 721 next:
 722                 resource_list_del(entry);
 723                 if (free)
 724                         resource_list_free_entry(entry);
 725                 else
 726                         resource_list_add_tail(entry, resources);
 727         }
 728 }
 729
 730 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
 731                         struct resource_entry *entry)
 732 {
 733 #ifdef PCI_IOBASE
 734         struct resource *res = entry->res;
 735         resource_size_t cpu_addr = res->start;
 736         resource_size_t pci_addr = cpu_addr - entry->offset;
 737         resource_size_t length = resource_size(res);
 738         unsigned long port;
 739
 740         if (pci_register_io_range(fwnode, cpu_addr, length))
 741                 goto err;
 742
 743         port = pci_address_to_pio(cpu_addr);
 744         if (port == (unsigned long)-1)
 745                 goto err;
 746
 747         res->start = port;
 748         res->end = port + length - 1;
 749         entry->offset = port - pci_addr;
 750
 751         if (pci_remap_iospace(res, cpu_addr) < 0)
 752                 goto err;
 753
 754         pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
 755         return;
 756 err:
 757         res->flags |= IORESOURCE_DISABLED;
 758 #endif
 759 }
 760
 761 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
 762 {
 763         int ret;
 764         struct list_head *list = &info->resources;
 765         struct acpi_device *device = info->bridge;
 766         struct resource_entry *entry, *tmp;
 767         unsigned long flags;
 768
 769         flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
 770         ret = acpi_dev_get_resources(device, list,
 771                                      acpi_dev_filter_resource_type_cb,
 772                                      (void *)flags);
 773         if (ret < 0)
 774                 dev_warn(&device->dev,
 775                          "failed to parse _CRS method, error code %d\n", ret);
 776         else if (ret == 0)
 777                 dev_dbg(&device->dev,
 778                         "no IO and memory resources present in _CRS\n");
 779         else {
 780                 resource_list_for_each_entry_safe(entry, tmp, list) {
 781                         if (entry->res->flags & IORESOURCE_IO)
 782                                 acpi_pci_root_remap_iospace(&device->fwnode,
 783                                                 entry);
 784
 785                         if (entry->res->flags & IORESOURCE_DISABLED)
 786                                 resource_list_destroy_entry(entry);
 787                         else
 788                                 entry->res->name = info->name;
 789                 }
 790                 acpi_pci_root_validate_resources(&device->dev, list,
 791                                                  IORESOURCE_MEM);
 792                 acpi_pci_root_validate_resources(&device->dev, list,
 793                                                  IORESOURCE_IO);
 794         }
 795
 796         return ret;
 797 }
 798
 799 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
 800 {
 801         struct resource_entry *entry, *tmp;
 802         struct resource *res, *conflict, *root = NULL;
 803
 804         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
 805                 res = entry->res;
 806                 if (res->flags & IORESOURCE_MEM)
 807                         root = &iomem_resource;
 808                 else if (res->flags & IORESOURCE_IO)
 809                         root = &ioport_resource;
 810                 else
 811                         continue;
 812
 813                 /*
 814                  * Some legacy x86 host bridge drivers use iomem_resource and
 815                  * ioport_resource as default resource pool, skip it.
 816                  */
 817                 if (res == root)
 818                         continue;
 819
 820                 conflict = insert_resource_conflict(root, res);
 821                 if (conflict) {
 822                         dev_info(&info->bridge->dev,
 823                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
 824                                  res, conflict->name, conflict);
 825                         resource_list_destroy_entry(entry);
 826                 }
 827         }
 828 }
 829
 830 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
 831 {
 832         struct resource *res;
 833         struct resource_entry *entry, *tmp;
 834
 835         if (!info)
 836                 return;
 837
 838         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
 839                 res = entry->res;
 840                 if (res->parent &&
 841                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 842                         release_resource(res);
 843                 resource_list_destroy_entry(entry);
 844         }
 845
 846         info->ops->release_info(info);
 847 }
 848
 849 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
 850 {
 851         struct resource *res;
 852         struct resource_entry *entry;
 853
 854         resource_list_for_each_entry(entry, &bridge->windows) {
 855                 res = entry->res;
 856                 if (res->flags & IORESOURCE_IO)
 857                         pci_unmap_iospace(res);
 858                 if (res->parent &&
 859                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 860                         release_resource(res);
 861         }
 862         __acpi_pci_root_release_info(bridge->release_data);
 863 }
 864
 865 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 866                                      struct acpi_pci_root_ops *ops,
 867                                      struct acpi_pci_root_info *info,
 868                                      void *sysdata)
 869 {
 870         int ret, busnum = root->secondary.start;
 871         struct acpi_device *device = root->device;
 872         int node = acpi_get_node(device->handle);
 873         struct pci_bus *bus;
 874         struct pci_host_bridge *host_bridge;
 875         union acpi_object *obj;
 876
 877         info->root = root;
 878         info->bridge = device;
 879         info->ops = ops;
 880         INIT_LIST_HEAD(&info->resources);
 881         snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
 882                  root->segment, busnum);
 883
 884         if (ops->init_info && ops->init_info(info))
 885                 goto out_release_info;
 886         if (ops->prepare_resources)
 887                 ret = ops->prepare_resources(info);
 888         else
 889                 ret = acpi_pci_probe_root_resources(info);
 890         if (ret < 0)
 891                 goto out_release_info;
 892
 893         pci_acpi_root_add_resources(info);
 894         pci_add_resource(&info->resources, &root->secondary);
 895         bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
 896                                   sysdata, &info->resources);
 897         if (!bus)
 898                 goto out_release_info;
 899
 900         host_bridge = to_pci_host_bridge(bus->bridge);
 901         if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
 902                 host_bridge->native_pcie_hotplug = 0;
 903         if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
 904                 host_bridge->native_shpc_hotplug = 0;
 905         if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
 906                 host_bridge->native_aer = 0;
 907         if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
 908                 host_bridge->native_pme = 0;
 909         if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
 910                 host_bridge->native_ltr = 0;
 911         if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
 912                 host_bridge->native_dpc = 0;
 913
 914         /*
 915          * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
 916          * exists and returns 0, we must preserve any PCI resource
 917          * assignments made by firmware for this host bridge.
 918          */
 919         obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
 920                                 DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
 921         if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
 922                 host_bridge->preserve_config = 1;
 923         ACPI_FREE(obj);
 924
 925         pci_scan_child_bus(bus);
 926         pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
 927                                     info);
 928         if (node != NUMA_NO_NODE)
 929                 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
 930         return bus;
 931
 932 out_release_info:
 933         __acpi_pci_root_release_info(info);
 934         return NULL;
 935 }
 936
 937 void __init acpi_pci_root_init(void)
 938 {
 939         acpi_hest_init();
 940         if (acpi_pci_disabled)
 941                 return;
 942
 943         pci_acpi_crs_quirks();
 944         acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
 945 }