1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/types.h>
13 #include <linux/mutex.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/pci.h>
17 #include <linux/pci-acpi.h>
18 #include <linux/dmar.h>
19 #include <linux/acpi.h>
20 #include <linux/slab.h>
21 #include <linux/dmi.h>
22 #include <linux/platform_data/x86/apple.h>
23 #include <acpi/apei.h> /* for acpi_hest_init() */
27 #define _COMPONENT ACPI_PCI_COMPONENT
28 ACPI_MODULE_NAME("pci_root");
29 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
30 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
31 static int acpi_pci_root_add(struct acpi_device *device,
32 const struct acpi_device_id *not_used);
33 static void acpi_pci_root_remove(struct acpi_device *device);
35 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
37 acpiphp_check_host_bridge(adev);
41 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
42 | OSC_PCI_ASPM_SUPPORT \
43 | OSC_PCI_CLOCK_PM_SUPPORT \
44 | OSC_PCI_MSI_SUPPORT)
46 static const struct acpi_device_id root_device_ids[] = {
51 static struct acpi_scan_handler pci_root_handler = {
52 .ids = root_device_ids,
53 .attach = acpi_pci_root_add,
54 .detach = acpi_pci_root_remove,
57 .scan_dependent = acpi_pci_root_scan_dependent,
61 static DEFINE_MUTEX(osc_lock);
64 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
65 * @handle - the ACPI CA node in question.
67 * Note: we could make this API take a struct acpi_device * instead, but
68 * for now, it's more convenient to operate on an acpi_handle.
70 int acpi_is_root_bridge(acpi_handle handle)
73 struct acpi_device *device;
75 ret = acpi_bus_get_device(handle, &device);
79 ret = acpi_match_device_ids(device, root_device_ids);
85 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
88 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
90 struct resource *res = data;
91 struct acpi_resource_address64 address;
94 status = acpi_resource_to_address64(resource, &address);
95 if (ACPI_FAILURE(status))
98 if ((address.address.address_length > 0) &&
99 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
100 res->start = address.address.minimum;
101 res->end = address.address.minimum + address.address.address_length - 1;
107 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
108 struct resource *res)
114 acpi_walk_resources(handle, METHOD_NAME__CRS,
115 get_root_bridge_busnr_callback, res);
116 if (ACPI_FAILURE(status))
118 if (res->start == -1)
123 struct pci_osc_bit_struct {
128 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
129 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
130 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
131 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
132 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
133 { OSC_PCI_MSI_SUPPORT, "MSI" },
134 { OSC_PCI_EDR_SUPPORT, "EDR" },
135 { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
138 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
139 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
140 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
141 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
142 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
143 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
144 { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
145 { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
148 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
149 struct pci_osc_bit_struct *table, int size)
153 struct pci_osc_bit_struct *entry;
156 for (i = 0, entry = table; i < size; i++, entry++)
157 if (word & entry->bit)
158 len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
159 len ? " " : "", entry->desc);
161 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
164 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
166 decode_osc_bits(root, msg, word, pci_osc_support_bit,
167 ARRAY_SIZE(pci_osc_support_bit));
170 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
172 decode_osc_bits(root, msg, word, pci_osc_control_bit,
173 ARRAY_SIZE(pci_osc_control_bit));
176 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
178 static acpi_status acpi_pci_run_osc(acpi_handle handle,
179 const u32 *capbuf, u32 *retval)
181 struct acpi_osc_context context = {
182 .uuid_str = pci_osc_uuid_str,
185 .cap.pointer = (void *)capbuf,
189 status = acpi_run_osc(handle, &context);
190 if (ACPI_SUCCESS(status)) {
191 *retval = *((u32 *)(context.ret.pointer + 8));
192 kfree(context.ret.pointer);
197 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
202 u32 result, capbuf[3];
204 support &= OSC_PCI_SUPPORT_MASKS;
205 support |= root->osc_support_set;
207 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
208 capbuf[OSC_SUPPORT_DWORD] = support;
210 *control &= OSC_PCI_CONTROL_MASKS;
211 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
213 /* Run _OSC query only with existing controls. */
214 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
217 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
218 if (ACPI_SUCCESS(status)) {
219 root->osc_support_set = support;
226 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
230 mutex_lock(&osc_lock);
231 status = acpi_pci_query_osc(root, flags, NULL);
232 mutex_unlock(&osc_lock);
236 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
238 struct acpi_pci_root *root;
239 struct acpi_device *device;
241 if (acpi_bus_get_device(handle, &device) ||
242 acpi_match_device_ids(device, root_device_ids))
245 root = acpi_driver_data(device);
249 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
251 struct acpi_handle_node {
252 struct list_head node;
257 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
258 * @handle: the handle in question
260 * Given an ACPI CA handle, the desired PCI device is located in the
261 * list of PCI devices.
263 * If the device is found, its reference count is increased and this
264 * function returns a pointer to its data structure. The caller must
265 * decrement the reference count by calling pci_dev_put().
266 * If no device is found, %NULL is returned.
268 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
271 unsigned long long adr;
274 struct pci_bus *pbus;
275 struct pci_dev *pdev = NULL;
276 struct acpi_handle_node *node, *tmp;
277 struct acpi_pci_root *root;
278 LIST_HEAD(device_list);
281 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
284 while (!acpi_is_root_bridge(phandle)) {
285 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
289 INIT_LIST_HEAD(&node->node);
290 node->handle = phandle;
291 list_add(&node->node, &device_list);
293 status = acpi_get_parent(phandle, &phandle);
294 if (ACPI_FAILURE(status))
298 root = acpi_pci_find_root(phandle);
305 * Now, walk back down the PCI device tree until we return to our
306 * original handle. Assumes that everything between the PCI root
307 * bridge and the device we're looking for must be a P2P bridge.
309 list_for_each_entry(node, &device_list, node) {
310 acpi_handle hnd = node->handle;
311 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
312 if (ACPI_FAILURE(status))
314 dev = (adr >> 16) & 0xffff;
317 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
318 if (!pdev || hnd == handle)
321 pbus = pdev->subordinate;
325 * This function may be called for a non-PCI device that has a
326 * PCI parent (eg. a disk under a PCI SATA controller). In that
327 * case pdev->subordinate will be NULL for the parent.
330 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
336 list_for_each_entry_safe(node, tmp, &device_list, node)
341 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
344 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
345 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
346 * @mask: Mask of _OSC bits to request control of, place to store control mask.
347 * @req: Mask of _OSC bits the control of is essential to the caller.
349 * Run _OSC query for @mask and if that is successful, compare the returned
350 * mask of control bits with @req. If all of the @req bits are set in the
351 * returned mask, run _OSC request for it.
353 * The variable at the @mask address may be modified regardless of whether or
354 * not the function returns success. On success it will contain the mask of
355 * _OSC bits the BIOS has granted control of, but its contents are meaningless
358 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
360 struct acpi_pci_root *root;
361 acpi_status status = AE_OK;
365 return AE_BAD_PARAMETER;
367 ctrl = *mask & OSC_PCI_CONTROL_MASKS;
368 if ((ctrl & req) != req)
371 root = acpi_pci_find_root(handle);
375 mutex_lock(&osc_lock);
377 *mask = ctrl | root->osc_control_set;
378 /* No need to evaluate _OSC if the control was already granted. */
379 if ((root->osc_control_set & ctrl) == ctrl)
382 /* Need to check the available controls bits before requesting them. */
384 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
385 if (ACPI_FAILURE(status))
389 decode_osc_control(root, "platform does not support",
394 if ((ctrl & req) != req) {
395 decode_osc_control(root, "not requesting control; platform does not support",
401 capbuf[OSC_QUERY_DWORD] = 0;
402 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
403 capbuf[OSC_CONTROL_DWORD] = ctrl;
404 status = acpi_pci_run_osc(handle, capbuf, mask);
405 if (ACPI_SUCCESS(status))
406 root->osc_control_set = *mask;
408 mutex_unlock(&osc_lock);
411 EXPORT_SYMBOL(acpi_pci_osc_control_set);
413 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
416 u32 support, control, requested;
418 struct acpi_device *device = root->device;
419 acpi_handle handle = device->handle;
422 * Apple always return failure on _OSC calls when _OSI("Darwin") has
423 * been called successfully. We know the feature set supported by the
424 * platform, so avoid calling _OSC at all
426 if (x86_apple_machine) {
427 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
428 decode_osc_control(root, "OS assumes control of",
429 root->osc_control_set);
434 * All supported architectures that use ACPI have support for
435 * PCI domains, so we indicate this in _OSC support capabilities.
437 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
438 support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
439 if (pci_ext_cfg_avail())
440 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
441 if (pcie_aspm_support_enabled())
442 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
443 if (pci_msi_enabled())
444 support |= OSC_PCI_MSI_SUPPORT;
445 if (IS_ENABLED(CONFIG_PCIE_EDR))
446 support |= OSC_PCI_EDR_SUPPORT;
448 decode_osc_support(root, "OS supports", support);
449 status = acpi_pci_osc_support(root, support);
450 if (ACPI_FAILURE(status)) {
453 /* _OSC is optional for PCI host bridges */
454 if ((status == AE_NOT_FOUND) && !is_pcie)
457 dev_info(&device->dev, "_OSC failed (%s)%s\n",
458 acpi_format_exception(status),
459 pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
463 if (pcie_ports_disabled) {
464 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
468 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
469 decode_osc_support(root, "not requesting OS control; OS requires",
470 ACPI_PCIE_REQ_SUPPORT);
474 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
475 | OSC_PCI_EXPRESS_PME_CONTROL;
477 if (IS_ENABLED(CONFIG_PCIEASPM))
478 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
480 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
481 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
483 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
484 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
486 if (pci_aer_available())
487 control |= OSC_PCI_EXPRESS_AER_CONTROL;
490 * Per the Downstream Port Containment Related Enhancements ECN to
491 * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
492 * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
495 if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
496 control |= OSC_PCI_EXPRESS_DPC_CONTROL;
499 status = acpi_pci_osc_control_set(handle, &control,
500 OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
501 if (ACPI_SUCCESS(status)) {
502 decode_osc_control(root, "OS now controls", control);
503 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
505 * We have ASPM control, but the FADT indicates that
506 * it's unsupported. Leave existing configuration
507 * intact and prevent the OS from touching it.
509 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
513 decode_osc_control(root, "OS requested", requested);
514 decode_osc_control(root, "platform willing to grant", control);
515 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
516 acpi_format_exception(status));
519 * We want to disable ASPM here, but aspm_disabled
520 * needs to remain in its state from boot so that we
521 * properly handle PCIe 1.1 devices. So we set this
522 * flag here, to defer the action until after the ACPI
529 static int acpi_pci_root_add(struct acpi_device *device,
530 const struct acpi_device_id *not_used)
532 unsigned long long segment, bus;
535 struct acpi_pci_root *root;
536 acpi_handle handle = device->handle;
538 bool hotadd = system_state == SYSTEM_RUNNING;
541 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
546 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
548 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
549 dev_err(&device->dev, "can't evaluate _SEG\n");
554 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
555 root->secondary.flags = IORESOURCE_BUS;
556 status = try_get_root_bridge_busnr(handle, &root->secondary);
557 if (ACPI_FAILURE(status)) {
559 * We need both the start and end of the downstream bus range
560 * to interpret _CBA (MMCONFIG base address), so it really is
561 * supposed to be in _CRS. If we don't find it there, all we
562 * can do is assume [_BBN-0xFF] or [0-0xFF].
564 root->secondary.end = 0xFF;
565 dev_warn(&device->dev,
566 FW_BUG "no secondary bus range in _CRS\n");
567 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
569 if (ACPI_SUCCESS(status))
570 root->secondary.start = bus;
571 else if (status == AE_NOT_FOUND)
572 root->secondary.start = 0;
574 dev_err(&device->dev, "can't evaluate _BBN\n");
580 root->device = device;
581 root->segment = segment & 0xFFFF;
582 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
583 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
584 device->driver_data = root;
586 if (hotadd && dmar_device_add(handle)) {
591 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
592 acpi_device_name(device), acpi_device_bid(device),
593 root->segment, &root->secondary);
595 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
597 is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
598 negotiate_os_control(root, &no_aspm, is_pcie);
601 * TBD: Need PCI interface for enumeration/configuration of roots.
605 * Scan the Root Bridge
606 * --------------------
607 * Must do this prior to any attempt to bind the root device, as the
608 * PCI namespace does not get created until this call is made (and
609 * thus the root bridge's pci_dev does not exist).
611 root->bus = pci_acpi_scan_root(root);
613 dev_err(&device->dev,
614 "Bus %04x:%02x not present in PCI namespace\n",
615 root->segment, (unsigned int)root->secondary.start);
616 device->driver_data = NULL;
624 pci_acpi_add_bus_pm_notifier(device);
625 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
628 pcibios_resource_survey_bus(root->bus);
629 pci_assign_unassigned_root_bus_resources(root->bus);
631 * This is only called for the hotadd case. For the boot-time
632 * case, we need to wait until after PCI initialization in
633 * order to deal with IOAPICs mapped in on a PCI BAR.
635 * This is currently x86-specific, because acpi_ioapic_add()
636 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
637 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
638 * (see drivers/acpi/Kconfig).
640 acpi_ioapic_add(root->device->handle);
643 pci_lock_rescan_remove();
644 pci_bus_add_devices(root->bus);
645 pci_unlock_rescan_remove();
650 dmar_device_remove(handle);
656 static void acpi_pci_root_remove(struct acpi_device *device)
658 struct acpi_pci_root *root = acpi_driver_data(device);
660 pci_lock_rescan_remove();
662 pci_stop_root_bus(root->bus);
664 pci_ioapic_remove(root);
665 device_set_wakeup_capable(root->bus->bridge, false);
666 pci_acpi_remove_bus_pm_notifier(device);
668 pci_remove_root_bus(root->bus);
669 WARN_ON(acpi_ioapic_remove(root));
671 dmar_device_remove(device->handle);
673 pci_unlock_rescan_remove();
679 * Following code to support acpi_pci_root_create() is copied from
680 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
683 static void acpi_pci_root_validate_resources(struct device *dev,
684 struct list_head *resources,
688 struct resource *res1, *res2, *root = NULL;
689 struct resource_entry *tmp, *entry, *entry2;
691 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
692 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
694 list_splice_init(resources, &list);
695 resource_list_for_each_entry_safe(entry, tmp, &list) {
700 if (!(res1->flags & type))
703 /* Exclude non-addressable range or non-addressable portion */
704 end = min(res1->end, root->end);
705 if (end <= res1->start) {
706 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
710 } else if (res1->end != end) {
711 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
712 res1, (unsigned long long)end + 1,
713 (unsigned long long)res1->end);
717 resource_list_for_each_entry(entry2, resources) {
719 if (!(res2->flags & type))
723 * I don't like throwing away windows because then
724 * our resources no longer match the ACPI _CRS, but
725 * the kernel resource tree doesn't allow overlaps.
727 if (resource_overlaps(res1, res2)) {
728 res2->start = min(res1->start, res2->start);
729 res2->end = max(res1->end, res2->end);
730 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
738 resource_list_del(entry);
740 resource_list_free_entry(entry);
742 resource_list_add_tail(entry, resources);
746 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
747 struct resource_entry *entry)
750 struct resource *res = entry->res;
751 resource_size_t cpu_addr = res->start;
752 resource_size_t pci_addr = cpu_addr - entry->offset;
753 resource_size_t length = resource_size(res);
756 if (pci_register_io_range(fwnode, cpu_addr, length))
759 port = pci_address_to_pio(cpu_addr);
760 if (port == (unsigned long)-1)
764 res->end = port + length - 1;
765 entry->offset = port - pci_addr;
767 if (pci_remap_iospace(res, cpu_addr) < 0)
770 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
773 res->flags |= IORESOURCE_DISABLED;
777 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
780 struct list_head *list = &info->resources;
781 struct acpi_device *device = info->bridge;
782 struct resource_entry *entry, *tmp;
785 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
786 ret = acpi_dev_get_resources(device, list,
787 acpi_dev_filter_resource_type_cb,
790 dev_warn(&device->dev,
791 "failed to parse _CRS method, error code %d\n", ret);
793 dev_dbg(&device->dev,
794 "no IO and memory resources present in _CRS\n");
796 resource_list_for_each_entry_safe(entry, tmp, list) {
797 if (entry->res->flags & IORESOURCE_IO)
798 acpi_pci_root_remap_iospace(&device->fwnode,
801 if (entry->res->flags & IORESOURCE_DISABLED)
802 resource_list_destroy_entry(entry);
804 entry->res->name = info->name;
806 acpi_pci_root_validate_resources(&device->dev, list,
808 acpi_pci_root_validate_resources(&device->dev, list,
815 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
817 struct resource_entry *entry, *tmp;
818 struct resource *res, *conflict, *root = NULL;
820 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
822 if (res->flags & IORESOURCE_MEM)
823 root = &iomem_resource;
824 else if (res->flags & IORESOURCE_IO)
825 root = &ioport_resource;
830 * Some legacy x86 host bridge drivers use iomem_resource and
831 * ioport_resource as default resource pool, skip it.
836 conflict = insert_resource_conflict(root, res);
838 dev_info(&info->bridge->dev,
839 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
840 res, conflict->name, conflict);
841 resource_list_destroy_entry(entry);
846 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
848 struct resource *res;
849 struct resource_entry *entry, *tmp;
854 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
857 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
858 release_resource(res);
859 resource_list_destroy_entry(entry);
862 info->ops->release_info(info);
865 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
867 struct resource *res;
868 struct resource_entry *entry;
870 resource_list_for_each_entry(entry, &bridge->windows) {
872 if (res->flags & IORESOURCE_IO)
873 pci_unmap_iospace(res);
875 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
876 release_resource(res);
878 __acpi_pci_root_release_info(bridge->release_data);
881 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
882 struct acpi_pci_root_ops *ops,
883 struct acpi_pci_root_info *info,
886 int ret, busnum = root->secondary.start;
887 struct acpi_device *device = root->device;
888 int node = acpi_get_node(device->handle);
890 struct pci_host_bridge *host_bridge;
891 union acpi_object *obj;
894 info->bridge = device;
896 INIT_LIST_HEAD(&info->resources);
897 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
898 root->segment, busnum);
900 if (ops->init_info && ops->init_info(info))
901 goto out_release_info;
902 if (ops->prepare_resources)
903 ret = ops->prepare_resources(info);
905 ret = acpi_pci_probe_root_resources(info);
907 goto out_release_info;
909 pci_acpi_root_add_resources(info);
910 pci_add_resource(&info->resources, &root->secondary);
911 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
912 sysdata, &info->resources);
914 goto out_release_info;
916 host_bridge = to_pci_host_bridge(bus->bridge);
917 if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
918 host_bridge->native_pcie_hotplug = 0;
919 if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
920 host_bridge->native_shpc_hotplug = 0;
921 if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
922 host_bridge->native_aer = 0;
923 if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
924 host_bridge->native_pme = 0;
925 if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
926 host_bridge->native_ltr = 0;
927 if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
928 host_bridge->native_dpc = 0;
931 * Evaluate the "PCI Boot Configuration" _DSM Function. If it
932 * exists and returns 0, we must preserve any PCI resource
933 * assignments made by firmware for this host bridge.
935 obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
936 DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
937 if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
938 host_bridge->preserve_config = 1;
941 pci_scan_child_bus(bus);
942 pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
944 if (node != NUMA_NO_NODE)
945 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
949 __acpi_pci_root_release_info(info);
953 void __init acpi_pci_root_init(void)
956 if (acpi_pci_disabled)
959 pci_acpi_crs_quirks();
960 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");