1 // SPDX-License-Identifier: GPL-2.0-only
3 * ACPI support for Intel Lynxpoint LPSS.
5 * Copyright (C) 2013, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rafael J. Wysocki <rafael.j.wysocki@intel.com>
10 #include <linux/acpi.h>
11 #include <linux/clkdev.h>
12 #include <linux/clk-provider.h>
13 #include <linux/dmi.h>
14 #include <linux/err.h>
16 #include <linux/mutex.h>
17 #include <linux/pci.h>
18 #include <linux/platform_device.h>
19 #include <linux/platform_data/x86/clk-lpss.h>
20 #include <linux/platform_data/x86/pmc_atom.h>
21 #include <linux/pm_domain.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/pwm.h>
24 #include <linux/suspend.h>
25 #include <linux/delay.h>
29 ACPI_MODULE_NAME("acpi_lpss");
31 #ifdef CONFIG_X86_INTEL_LPSS
33 #include <asm/cpu_device_id.h>
34 #include <asm/intel-family.h>
35 #include <asm/iosf_mbi.h>
37 #define LPSS_ADDR(desc) ((unsigned long)&desc)
39 #define LPSS_CLK_SIZE 0x04
40 #define LPSS_LTR_SIZE 0x18
42 /* Offsets relative to LPSS_PRIVATE_OFFSET */
43 #define LPSS_CLK_DIVIDER_DEF_MASK (BIT(1) | BIT(16))
44 #define LPSS_RESETS 0x04
45 #define LPSS_RESETS_RESET_FUNC BIT(0)
46 #define LPSS_RESETS_RESET_APB BIT(1)
47 #define LPSS_GENERAL 0x08
48 #define LPSS_GENERAL_LTR_MODE_SW BIT(2)
49 #define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
50 #define LPSS_SW_LTR 0x10
51 #define LPSS_AUTO_LTR 0x14
52 #define LPSS_LTR_SNOOP_REQ BIT(15)
53 #define LPSS_LTR_SNOOP_MASK 0x0000FFFF
54 #define LPSS_LTR_SNOOP_LAT_1US 0x800
55 #define LPSS_LTR_SNOOP_LAT_32US 0xC00
56 #define LPSS_LTR_SNOOP_LAT_SHIFT 5
57 #define LPSS_LTR_SNOOP_LAT_CUTOFF 3000
58 #define LPSS_LTR_MAX_VAL 0x3FF
59 #define LPSS_TX_INT 0x20
60 #define LPSS_TX_INT_MASK BIT(1)
62 #define LPSS_PRV_REG_COUNT 9
65 #define LPSS_CLK BIT(0)
66 #define LPSS_CLK_GATE BIT(1)
67 #define LPSS_CLK_DIVIDER BIT(2)
68 #define LPSS_LTR BIT(3)
69 #define LPSS_SAVE_CTX BIT(4)
70 #define LPSS_NO_D3_DELAY BIT(5)
72 struct lpss_private_data;
74 struct lpss_device_desc {
76 const char *clk_con_id;
77 unsigned int prv_offset;
78 size_t prv_size_override;
79 struct property_entry *properties;
80 void (*setup)(struct lpss_private_data *pdata);
81 bool resume_from_noirq;
84 static const struct lpss_device_desc lpss_dma_desc = {
88 struct lpss_private_data {
89 struct acpi_device *adev;
90 void __iomem *mmio_base;
91 resource_size_t mmio_size;
92 unsigned int fixed_clk_rate;
94 const struct lpss_device_desc *dev_desc;
95 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
98 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
99 static u32 pmc_atom_d3_mask = 0xfe000ffe;
101 /* LPSS run time quirks */
102 static unsigned int lpss_quirks;
105 * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
107 * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
108 * it can be powered off automatically whenever the last LPSS device goes down.
109 * In case of no power any access to the DMA controller will hang the system.
110 * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
111 * well as on ASuS T100TA transformer.
113 * This quirk overrides power state of entire LPSS island to keep DMA powered
114 * on whenever we have at least one other device in use.
116 #define LPSS_QUIRK_ALWAYS_POWER_ON BIT(0)
118 /* UART Component Parameter Register */
119 #define LPSS_UART_CPR 0xF4
120 #define LPSS_UART_CPR_AFCE BIT(4)
122 static void lpss_uart_setup(struct lpss_private_data *pdata)
127 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
128 val = readl(pdata->mmio_base + offset);
129 writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
131 val = readl(pdata->mmio_base + LPSS_UART_CPR);
132 if (!(val & LPSS_UART_CPR_AFCE)) {
133 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
134 val = readl(pdata->mmio_base + offset);
135 val |= LPSS_GENERAL_UART_RTS_OVRD;
136 writel(val, pdata->mmio_base + offset);
140 static void lpss_deassert_reset(struct lpss_private_data *pdata)
145 offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
146 val = readl(pdata->mmio_base + offset);
147 val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
148 writel(val, pdata->mmio_base + offset);
152 * BYT PWM used for backlight control by the i915 driver on systems without
153 * the Crystal Cove PMIC.
155 static struct pwm_lookup byt_pwm_lookup[] = {
156 PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
157 "pwm_soc_backlight", 0, PWM_POLARITY_NORMAL,
158 "pwm-lpss-platform"),
161 static void byt_pwm_setup(struct lpss_private_data *pdata)
163 struct acpi_device *adev = pdata->adev;
165 /* Only call pwm_add_table for the first PWM controller */
166 if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
169 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
172 #define LPSS_I2C_ENABLE 0x6c
174 static void byt_i2c_setup(struct lpss_private_data *pdata)
176 const char *uid_str = acpi_device_uid(pdata->adev);
177 acpi_handle handle = pdata->adev->handle;
178 unsigned long long shared_host = 0;
182 /* Expected to always be true, but better safe then sorry */
184 uid = simple_strtol(uid_str, NULL, 10);
186 /* Detect I2C bus shared with PUNIT and ignore its d3 status */
187 status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
188 if (ACPI_SUCCESS(status) && shared_host && uid)
189 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
191 lpss_deassert_reset(pdata);
193 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
194 pdata->fixed_clk_rate = 133000000;
196 writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
199 /* BSW PWM used for backlight control by the i915 driver */
200 static struct pwm_lookup bsw_pwm_lookup[] = {
201 PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
202 "pwm_soc_backlight", 0, PWM_POLARITY_NORMAL,
203 "pwm-lpss-platform"),
206 static void bsw_pwm_setup(struct lpss_private_data *pdata)
208 struct acpi_device *adev = pdata->adev;
210 /* Only call pwm_add_table for the first PWM controller */
211 if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
214 pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
217 static const struct lpss_device_desc lpt_dev_desc = {
218 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
223 static const struct lpss_device_desc lpt_i2c_dev_desc = {
224 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR | LPSS_SAVE_CTX,
228 static struct property_entry uart_properties[] = {
229 PROPERTY_ENTRY_U32("reg-io-width", 4),
230 PROPERTY_ENTRY_U32("reg-shift", 2),
231 PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
235 static const struct lpss_device_desc lpt_uart_dev_desc = {
236 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
238 .clk_con_id = "baudclk",
240 .setup = lpss_uart_setup,
241 .properties = uart_properties,
244 static const struct lpss_device_desc lpt_sdio_dev_desc = {
246 .prv_offset = 0x1000,
247 .prv_size_override = 0x1018,
250 static const struct lpss_device_desc byt_pwm_dev_desc = {
251 .flags = LPSS_SAVE_CTX,
253 .setup = byt_pwm_setup,
256 static const struct lpss_device_desc bsw_pwm_dev_desc = {
257 .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
259 .setup = bsw_pwm_setup,
262 static const struct lpss_device_desc byt_uart_dev_desc = {
263 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
264 .clk_con_id = "baudclk",
266 .setup = lpss_uart_setup,
267 .properties = uart_properties,
270 static const struct lpss_device_desc bsw_uart_dev_desc = {
271 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
273 .clk_con_id = "baudclk",
275 .setup = lpss_uart_setup,
276 .properties = uart_properties,
279 static const struct lpss_device_desc byt_spi_dev_desc = {
280 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
284 static const struct lpss_device_desc byt_sdio_dev_desc = {
288 static const struct lpss_device_desc byt_i2c_dev_desc = {
289 .flags = LPSS_CLK | LPSS_SAVE_CTX,
291 .setup = byt_i2c_setup,
292 .resume_from_noirq = true,
295 static const struct lpss_device_desc bsw_i2c_dev_desc = {
296 .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
298 .setup = byt_i2c_setup,
299 .resume_from_noirq = true,
302 static const struct lpss_device_desc bsw_spi_dev_desc = {
303 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
306 .setup = lpss_deassert_reset,
309 static const struct x86_cpu_id lpss_cpu_ids[] = {
310 X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL),
311 X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
317 #define LPSS_ADDR(desc) (0UL)
319 #endif /* CONFIG_X86_INTEL_LPSS */
321 static const struct acpi_device_id acpi_lpss_device_ids[] = {
322 /* Generic LPSS devices */
323 { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
325 /* Lynxpoint LPSS devices */
326 { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
327 { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
328 { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
329 { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
330 { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
331 { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
332 { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
335 /* BayTrail LPSS devices */
336 { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
337 { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
338 { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
339 { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
340 { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
344 /* Braswell LPSS devices */
345 { "80862286", LPSS_ADDR(lpss_dma_desc) },
346 { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
347 { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
348 { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
349 { "808622C0", LPSS_ADDR(lpss_dma_desc) },
350 { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
352 /* Broadwell LPSS devices */
353 { "INT3430", LPSS_ADDR(lpt_dev_desc) },
354 { "INT3431", LPSS_ADDR(lpt_dev_desc) },
355 { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
356 { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
357 { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
358 { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
359 { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
362 /* Wildcat Point LPSS devices */
363 { "INT3438", LPSS_ADDR(lpt_dev_desc) },
368 #ifdef CONFIG_X86_INTEL_LPSS
370 static int is_memory(struct acpi_resource *res, void *not_used)
373 return !acpi_dev_resource_memory(res, &r);
376 /* LPSS main clock device. */
377 static struct platform_device *lpss_clk_dev;
379 static inline void lpt_register_clock_device(void)
381 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
384 static int register_device_clock(struct acpi_device *adev,
385 struct lpss_private_data *pdata)
387 const struct lpss_device_desc *dev_desc = pdata->dev_desc;
388 const char *devname = dev_name(&adev->dev);
390 struct lpss_clk_data *clk_data;
391 const char *parent, *clk_name;
392 void __iomem *prv_base;
395 lpt_register_clock_device();
397 clk_data = platform_get_drvdata(lpss_clk_dev);
402 if (!pdata->mmio_base
403 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
406 parent = clk_data->name;
407 prv_base = pdata->mmio_base + dev_desc->prv_offset;
409 if (pdata->fixed_clk_rate) {
410 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
411 pdata->fixed_clk_rate);
415 if (dev_desc->flags & LPSS_CLK_GATE) {
416 clk = clk_register_gate(NULL, devname, parent, 0,
417 prv_base, 0, 0, NULL);
421 if (dev_desc->flags & LPSS_CLK_DIVIDER) {
422 /* Prevent division by zero */
423 if (!readl(prv_base))
424 writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
426 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
429 clk = clk_register_fractional_divider(NULL, clk_name, parent,
431 1, 15, 16, 15, 0, NULL);
434 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
439 clk = clk_register_gate(NULL, clk_name, parent,
440 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
441 prv_base, 31, 0, NULL);
450 clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
454 struct lpss_device_links {
455 const char *supplier_hid;
456 const char *supplier_uid;
457 const char *consumer_hid;
458 const char *consumer_uid;
460 const struct dmi_system_id *dep_missing_ids;
463 /* Please keep this list sorted alphabetically by vendor and model */
464 static const struct dmi_system_id i2c1_dep_missing_dmi_ids[] = {
467 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
468 DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"),
475 * The _DEP method is used to identify dependencies but instead of creating
476 * device links for every handle in _DEP, only links in the following list are
477 * created. That is necessary because, in the general case, _DEP can refer to
478 * devices that might not have drivers, or that are on different buses, or where
479 * the supplier is not enumerated until after the consumer is probed.
481 static const struct lpss_device_links lpss_device_links[] = {
482 /* CHT External sdcard slot controller depends on PMIC I2C ctrl */
483 {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
484 /* CHT iGPU depends on PMIC I2C controller */
485 {"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
486 /* BYT iGPU depends on the Embedded Controller I2C controller (UID 1) */
487 {"80860F41", "1", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME,
488 i2c1_dep_missing_dmi_ids},
489 /* BYT CR iGPU depends on PMIC I2C controller (UID 5 on CR) */
490 {"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
491 /* BYT iGPU depends on PMIC I2C controller (UID 7 on non CR) */
492 {"80860F41", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
495 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
496 const struct lpss_device_links *link)
498 return acpi_dev_hid_uid_match(adev, link->supplier_hid, link->supplier_uid);
501 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
502 const struct lpss_device_links *link)
504 return acpi_dev_hid_uid_match(adev, link->consumer_hid, link->consumer_uid);
512 static int match_hid_uid(struct device *dev, const void *data)
514 struct acpi_device *adev = ACPI_COMPANION(dev);
515 const struct hid_uid *id = data;
520 return acpi_dev_hid_uid_match(adev, id->hid, id->uid);
523 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
527 struct hid_uid data = {
532 dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
536 return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
539 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
541 struct acpi_handle_list dep_devices;
545 if (!acpi_has_method(adev->handle, "_DEP"))
548 status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
550 if (ACPI_FAILURE(status)) {
551 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
555 for (i = 0; i < dep_devices.count; i++) {
556 if (dep_devices.handles[i] == handle)
563 static void acpi_lpss_link_consumer(struct device *dev1,
564 const struct lpss_device_links *link)
568 dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
572 if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
573 || acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
574 device_link_add(dev2, dev1, link->flags);
579 static void acpi_lpss_link_supplier(struct device *dev1,
580 const struct lpss_device_links *link)
584 dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
588 if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
589 || acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
590 device_link_add(dev1, dev2, link->flags);
595 static void acpi_lpss_create_device_links(struct acpi_device *adev,
596 struct platform_device *pdev)
600 for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
601 const struct lpss_device_links *link = &lpss_device_links[i];
603 if (acpi_lpss_is_supplier(adev, link))
604 acpi_lpss_link_consumer(&pdev->dev, link);
606 if (acpi_lpss_is_consumer(adev, link))
607 acpi_lpss_link_supplier(&pdev->dev, link);
611 static int acpi_lpss_create_device(struct acpi_device *adev,
612 const struct acpi_device_id *id)
614 const struct lpss_device_desc *dev_desc;
615 struct lpss_private_data *pdata;
616 struct resource_entry *rentry;
617 struct list_head resource_list;
618 struct platform_device *pdev;
621 dev_desc = (const struct lpss_device_desc *)id->driver_data;
623 pdev = acpi_create_platform_device(adev, NULL);
624 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
626 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
630 INIT_LIST_HEAD(&resource_list);
631 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
635 list_for_each_entry(rentry, &resource_list, node)
636 if (resource_type(rentry->res) == IORESOURCE_MEM) {
637 if (dev_desc->prv_size_override)
638 pdata->mmio_size = dev_desc->prv_size_override;
640 pdata->mmio_size = resource_size(rentry->res);
641 pdata->mmio_base = ioremap(rentry->res->start,
646 acpi_dev_free_resource_list(&resource_list);
648 if (!pdata->mmio_base) {
649 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
650 adev->pnp.type.platform_id = 0;
651 /* Skip the device, but continue the namespace scan. */
657 pdata->dev_desc = dev_desc;
660 dev_desc->setup(pdata);
662 if (dev_desc->flags & LPSS_CLK) {
663 ret = register_device_clock(adev, pdata);
665 /* Skip the device, but continue the namespace scan. */
672 * This works around a known issue in ACPI tables where LPSS devices
673 * have _PS0 and _PS3 without _PSC (and no power resources), so
674 * acpi_bus_init_power() will assume that the BIOS has put them into D0.
676 acpi_device_fix_up_power(adev);
678 adev->driver_data = pdata;
679 pdev = acpi_create_platform_device(adev, dev_desc->properties);
680 if (!IS_ERR_OR_NULL(pdev)) {
681 acpi_lpss_create_device_links(adev, pdev);
686 adev->driver_data = NULL;
693 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
695 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
698 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
701 writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
704 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
706 struct acpi_device *adev;
707 struct lpss_private_data *pdata;
711 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
715 spin_lock_irqsave(&dev->power.lock, flags);
716 if (pm_runtime_suspended(dev)) {
720 pdata = acpi_driver_data(adev);
721 if (WARN_ON(!pdata || !pdata->mmio_base)) {
725 *val = __lpss_reg_read(pdata, reg);
728 spin_unlock_irqrestore(&dev->power.lock, flags);
732 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
739 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
740 ret = lpss_reg_read(dev, reg, <r_value);
744 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
747 static ssize_t lpss_ltr_mode_show(struct device *dev,
748 struct device_attribute *attr, char *buf)
754 ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode);
758 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
759 return sprintf(buf, "%s\n", outstr);
762 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
763 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
764 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
766 static struct attribute *lpss_attrs[] = {
767 &dev_attr_auto_ltr.attr,
768 &dev_attr_sw_ltr.attr,
769 &dev_attr_ltr_mode.attr,
773 static const struct attribute_group lpss_attr_group = {
778 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
780 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
781 u32 ltr_mode, ltr_val;
783 ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
785 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
786 ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
787 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
791 ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
792 if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
793 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
794 val = LPSS_LTR_MAX_VAL;
795 } else if (val > LPSS_LTR_MAX_VAL) {
796 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
797 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
799 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
802 __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
803 if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
804 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
805 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
811 * acpi_lpss_save_ctx() - Save the private registers of LPSS device
813 * @pdata: pointer to the private data of the LPSS device
815 * Most LPSS devices have private registers which may loose their context when
816 * the device is powered down. acpi_lpss_save_ctx() saves those registers into
819 static void acpi_lpss_save_ctx(struct device *dev,
820 struct lpss_private_data *pdata)
824 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
825 unsigned long offset = i * sizeof(u32);
827 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
828 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
829 pdata->prv_reg_ctx[i], offset);
834 * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
836 * @pdata: pointer to the private data of the LPSS device
838 * Restores the registers that were previously stored with acpi_lpss_save_ctx().
840 static void acpi_lpss_restore_ctx(struct device *dev,
841 struct lpss_private_data *pdata)
845 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
846 unsigned long offset = i * sizeof(u32);
848 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
849 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
850 pdata->prv_reg_ctx[i], offset);
854 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
857 * The following delay is needed or the subsequent write operations may
858 * fail. The LPSS devices are actually PCI devices and the PCI spec
859 * expects 10ms delay before the device can be accessed after D3 to D0
860 * transition. However some platforms like BSW does not need this delay.
862 unsigned int delay = 10; /* default 10ms delay */
864 if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
870 static int acpi_lpss_activate(struct device *dev)
872 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
875 ret = acpi_dev_resume(dev);
879 acpi_lpss_d3_to_d0_delay(pdata);
882 * This is called only on ->probe() stage where a device is either in
883 * known state defined by BIOS or most likely powered off. Due to this
884 * we have to deassert reset line to be sure that ->probe() will
885 * recognize the device.
887 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
888 lpss_deassert_reset(pdata);
893 static void acpi_lpss_dismiss(struct device *dev)
895 acpi_dev_suspend(dev, false);
898 /* IOSF SB for LPSS island */
899 #define LPSS_IOSF_UNIT_LPIOEP 0xA0
900 #define LPSS_IOSF_UNIT_LPIO1 0xAB
901 #define LPSS_IOSF_UNIT_LPIO2 0xAC
903 #define LPSS_IOSF_PMCSR 0x84
904 #define LPSS_PMCSR_D0 0
905 #define LPSS_PMCSR_D3hot 3
906 #define LPSS_PMCSR_Dx_MASK GENMASK(1, 0)
908 #define LPSS_IOSF_GPIODEF0 0x154
909 #define LPSS_GPIODEF0_DMA1_D3 BIT(2)
910 #define LPSS_GPIODEF0_DMA2_D3 BIT(3)
911 #define LPSS_GPIODEF0_DMA_D3_MASK GENMASK(3, 2)
912 #define LPSS_GPIODEF0_DMA_LLP BIT(13)
914 static DEFINE_MUTEX(lpss_iosf_mutex);
915 static bool lpss_iosf_d3_entered = true;
917 static void lpss_iosf_enter_d3_state(void)
920 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
921 u32 value2 = LPSS_PMCSR_D3hot;
922 u32 mask2 = LPSS_PMCSR_Dx_MASK;
924 * PMC provides an information about actual status of the LPSS devices.
925 * Here we read the values related to LPSS power island, i.e. LPSS
926 * devices, excluding both LPSS DMA controllers, along with SCC domain.
928 u32 func_dis, d3_sts_0, pmc_status;
931 ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
935 mutex_lock(&lpss_iosf_mutex);
937 ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
942 * Get the status of entire LPSS power island per device basis.
943 * Shutdown both LPSS DMA controllers if and only if all other devices
944 * are already in D3hot.
946 pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
950 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
951 LPSS_IOSF_PMCSR, value2, mask2);
953 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
954 LPSS_IOSF_PMCSR, value2, mask2);
956 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
957 LPSS_IOSF_GPIODEF0, value1, mask1);
959 lpss_iosf_d3_entered = true;
962 mutex_unlock(&lpss_iosf_mutex);
965 static void lpss_iosf_exit_d3_state(void)
967 u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
968 LPSS_GPIODEF0_DMA_LLP;
969 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
970 u32 value2 = LPSS_PMCSR_D0;
971 u32 mask2 = LPSS_PMCSR_Dx_MASK;
973 mutex_lock(&lpss_iosf_mutex);
975 if (!lpss_iosf_d3_entered)
978 lpss_iosf_d3_entered = false;
980 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
981 LPSS_IOSF_GPIODEF0, value1, mask1);
983 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
984 LPSS_IOSF_PMCSR, value2, mask2);
986 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
987 LPSS_IOSF_PMCSR, value2, mask2);
990 mutex_unlock(&lpss_iosf_mutex);
993 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
995 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
998 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
999 acpi_lpss_save_ctx(dev, pdata);
1001 ret = acpi_dev_suspend(dev, wakeup);
1004 * This call must be last in the sequence, otherwise PMC will return
1005 * wrong status for devices being about to be powered off. See
1006 * lpss_iosf_enter_d3_state() for further information.
1008 if (acpi_target_system_state() == ACPI_STATE_S0 &&
1009 lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1010 lpss_iosf_enter_d3_state();
1015 static int acpi_lpss_resume(struct device *dev)
1017 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1021 * This call is kept first to be in symmetry with
1022 * acpi_lpss_runtime_suspend() one.
1024 if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1025 lpss_iosf_exit_d3_state();
1027 ret = acpi_dev_resume(dev);
1031 acpi_lpss_d3_to_d0_delay(pdata);
1033 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1034 acpi_lpss_restore_ctx(dev, pdata);
1039 #ifdef CONFIG_PM_SLEEP
1040 static int acpi_lpss_do_suspend_late(struct device *dev)
1044 if (dev_pm_skip_suspend(dev))
1047 ret = pm_generic_suspend_late(dev);
1048 return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1051 static int acpi_lpss_suspend_late(struct device *dev)
1053 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1055 if (pdata->dev_desc->resume_from_noirq)
1058 return acpi_lpss_do_suspend_late(dev);
1061 static int acpi_lpss_suspend_noirq(struct device *dev)
1063 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1066 if (pdata->dev_desc->resume_from_noirq) {
1068 * The driver's ->suspend_late callback will be invoked by
1069 * acpi_lpss_do_suspend_late(), with the assumption that the
1070 * driver really wanted to run that code in ->suspend_noirq, but
1071 * it could not run after acpi_dev_suspend() and the driver
1072 * expected the latter to be called in the "late" phase.
1074 ret = acpi_lpss_do_suspend_late(dev);
1079 return acpi_subsys_suspend_noirq(dev);
1082 static int acpi_lpss_do_resume_early(struct device *dev)
1084 int ret = acpi_lpss_resume(dev);
1086 return ret ? ret : pm_generic_resume_early(dev);
1089 static int acpi_lpss_resume_early(struct device *dev)
1091 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1093 if (pdata->dev_desc->resume_from_noirq)
1096 if (dev_pm_skip_resume(dev))
1099 return acpi_lpss_do_resume_early(dev);
1102 static int acpi_lpss_resume_noirq(struct device *dev)
1104 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1107 /* Follow acpi_subsys_resume_noirq(). */
1108 if (dev_pm_skip_resume(dev))
1111 ret = pm_generic_resume_noirq(dev);
1115 if (!pdata->dev_desc->resume_from_noirq)
1119 * The driver's ->resume_early callback will be invoked by
1120 * acpi_lpss_do_resume_early(), with the assumption that the driver
1121 * really wanted to run that code in ->resume_noirq, but it could not
1122 * run before acpi_dev_resume() and the driver expected the latter to be
1123 * called in the "early" phase.
1125 return acpi_lpss_do_resume_early(dev);
1128 static int acpi_lpss_do_restore_early(struct device *dev)
1130 int ret = acpi_lpss_resume(dev);
1132 return ret ? ret : pm_generic_restore_early(dev);
1135 static int acpi_lpss_restore_early(struct device *dev)
1137 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1139 if (pdata->dev_desc->resume_from_noirq)
1142 return acpi_lpss_do_restore_early(dev);
1145 static int acpi_lpss_restore_noirq(struct device *dev)
1147 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1150 ret = pm_generic_restore_noirq(dev);
1154 if (!pdata->dev_desc->resume_from_noirq)
1157 /* This is analogous to what happens in acpi_lpss_resume_noirq(). */
1158 return acpi_lpss_do_restore_early(dev);
1161 static int acpi_lpss_do_poweroff_late(struct device *dev)
1163 int ret = pm_generic_poweroff_late(dev);
1165 return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1168 static int acpi_lpss_poweroff_late(struct device *dev)
1170 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1172 if (dev_pm_skip_suspend(dev))
1175 if (pdata->dev_desc->resume_from_noirq)
1178 return acpi_lpss_do_poweroff_late(dev);
1181 static int acpi_lpss_poweroff_noirq(struct device *dev)
1183 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1185 if (dev_pm_skip_suspend(dev))
1188 if (pdata->dev_desc->resume_from_noirq) {
1189 /* This is analogous to the acpi_lpss_suspend_noirq() case. */
1190 int ret = acpi_lpss_do_poweroff_late(dev);
1195 return pm_generic_poweroff_noirq(dev);
1197 #endif /* CONFIG_PM_SLEEP */
1199 static int acpi_lpss_runtime_suspend(struct device *dev)
1201 int ret = pm_generic_runtime_suspend(dev);
1203 return ret ? ret : acpi_lpss_suspend(dev, true);
1206 static int acpi_lpss_runtime_resume(struct device *dev)
1208 int ret = acpi_lpss_resume(dev);
1210 return ret ? ret : pm_generic_runtime_resume(dev);
1212 #endif /* CONFIG_PM */
1214 static struct dev_pm_domain acpi_lpss_pm_domain = {
1216 .activate = acpi_lpss_activate,
1217 .dismiss = acpi_lpss_dismiss,
1221 #ifdef CONFIG_PM_SLEEP
1222 .prepare = acpi_subsys_prepare,
1223 .complete = acpi_subsys_complete,
1224 .suspend = acpi_subsys_suspend,
1225 .suspend_late = acpi_lpss_suspend_late,
1226 .suspend_noirq = acpi_lpss_suspend_noirq,
1227 .resume_noirq = acpi_lpss_resume_noirq,
1228 .resume_early = acpi_lpss_resume_early,
1229 .freeze = acpi_subsys_freeze,
1230 .poweroff = acpi_subsys_poweroff,
1231 .poweroff_late = acpi_lpss_poweroff_late,
1232 .poweroff_noirq = acpi_lpss_poweroff_noirq,
1233 .restore_noirq = acpi_lpss_restore_noirq,
1234 .restore_early = acpi_lpss_restore_early,
1236 .runtime_suspend = acpi_lpss_runtime_suspend,
1237 .runtime_resume = acpi_lpss_runtime_resume,
1242 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1243 unsigned long action, void *data)
1245 struct platform_device *pdev = to_platform_device(data);
1246 struct lpss_private_data *pdata;
1247 struct acpi_device *adev;
1248 const struct acpi_device_id *id;
1250 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1251 if (!id || !id->driver_data)
1254 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1257 pdata = acpi_driver_data(adev);
1261 if (pdata->mmio_base &&
1262 pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1263 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1268 case BUS_NOTIFY_BIND_DRIVER:
1269 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1271 case BUS_NOTIFY_DRIVER_NOT_BOUND:
1272 case BUS_NOTIFY_UNBOUND_DRIVER:
1273 dev_pm_domain_set(&pdev->dev, NULL);
1275 case BUS_NOTIFY_ADD_DEVICE:
1276 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1277 if (pdata->dev_desc->flags & LPSS_LTR)
1278 return sysfs_create_group(&pdev->dev.kobj,
1281 case BUS_NOTIFY_DEL_DEVICE:
1282 if (pdata->dev_desc->flags & LPSS_LTR)
1283 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1284 dev_pm_domain_set(&pdev->dev, NULL);
1293 static struct notifier_block acpi_lpss_nb = {
1294 .notifier_call = acpi_lpss_platform_notify,
1297 static void acpi_lpss_bind(struct device *dev)
1299 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1301 if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1304 if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1305 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1307 dev_err(dev, "MMIO size insufficient to access LTR\n");
1310 static void acpi_lpss_unbind(struct device *dev)
1312 dev->power.set_latency_tolerance = NULL;
1315 static struct acpi_scan_handler lpss_handler = {
1316 .ids = acpi_lpss_device_ids,
1317 .attach = acpi_lpss_create_device,
1318 .bind = acpi_lpss_bind,
1319 .unbind = acpi_lpss_unbind,
1322 void __init acpi_lpss_init(void)
1324 const struct x86_cpu_id *id;
1327 ret = lpt_clk_init();
1331 id = x86_match_cpu(lpss_cpu_ids);
1333 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1335 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1336 acpi_scan_add_handler(&lpss_handler);
1341 static struct acpi_scan_handler lpss_handler = {
1342 .ids = acpi_lpss_device_ids,
1345 void __init acpi_lpss_init(void)
1347 acpi_scan_add_handler(&lpss_handler);
1350 #endif /* CONFIG_X86_INTEL_LPSS */