1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/xtensa/kernel/pci.c
5 * PCI bios-type initialisation for PCI machines
7 * Copyright (C) 2001-2005 Tensilica Inc.
9 * Based largely on work from Cort (ppc/kernel/pci.c)
10 * IO functions copied from sparc.
12 * Chris Zankel <chris@zankel.net>
15 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/delay.h>
18 #include <linux/string.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/errno.h>
22 #include <linux/memblock.h>
24 #include <asm/pci-bridge.h>
25 #include <asm/platform.h>
31 * pcibios_alloc_controller
32 * pcibios_enable_device
34 * pcibios_align_resource
39 static struct pci_controller *pci_ctrl_head;
40 static struct pci_controller **pci_ctrl_tail = &pci_ctrl_head;
42 static int pci_bus_count;
45 * We need to avoid collisions with `mirrored' VGA ports
46 * and other strange ISA hardware, so we always want the
47 * addresses to be allocated in the 0x000-0x0ff region
50 * Why? Because some silly external IO cards only decode
51 * the low 10 bits of the IO address. The 0x00-0xff region
52 * is reserved for motherboard devices that decode all 16
53 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
54 * but we want to try to avoid allocating at 0x2900-0x2bff
55 * which might have be mirrored at 0x0100-0x03ff..
58 pcibios_align_resource(void *data, const struct resource *res,
59 resource_size_t size, resource_size_t align)
61 struct pci_dev *dev = data;
62 resource_size_t start = res->start;
64 if (res->flags & IORESOURCE_IO) {
66 pr_err("PCI: I/O Region %s/%d too large (%u bytes)\n",
67 pci_name(dev), dev->resource - res,
72 start = (start + 0x3ff) & ~0x3ff;
78 static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
79 struct list_head *resources)
82 unsigned long io_offset;
85 io_offset = (unsigned long)pci_ctrl->io_space.base;
86 res = &pci_ctrl->io_resource;
89 pr_err("I/O resource not set for host bridge %d\n",
92 res->end = IO_SPACE_LIMIT;
93 res->flags = IORESOURCE_IO;
95 res->start += io_offset;
96 res->end += io_offset;
97 pci_add_resource_offset(resources, res, io_offset);
99 for (i = 0; i < 3; i++) {
100 res = &pci_ctrl->mem_resources[i];
104 pr_err("Memory resource not set for host bridge %d\n",
108 res->flags = IORESOURCE_MEM;
110 pci_add_resource(resources, res);
114 static int __init pcibios_init(void)
116 struct pci_controller *pci_ctrl;
117 struct list_head resources;
119 int next_busno = 0, ret;
121 pr_info("PCI: Probing PCI hardware\n");
123 /* Scan all of the recorded PCI controllers. */
124 for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
125 pci_ctrl->last_busno = 0xff;
126 INIT_LIST_HEAD(&resources);
127 pci_controller_apertures(pci_ctrl, &resources);
128 bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
129 pci_ctrl->ops, pci_ctrl, &resources);
134 pci_ctrl->last_busno = bus->busn_res.end;
135 if (next_busno <= pci_ctrl->last_busno)
136 next_busno = pci_ctrl->last_busno+1;
138 pci_bus_count = next_busno;
139 ret = platform_pcibios_fixup();
143 for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
145 pci_bus_add_devices(pci_ctrl->bus);
151 subsys_initcall(pcibios_init);
153 void pcibios_fixup_bus(struct pci_bus *bus)
156 /* This is a subordinate bridge */
157 pci_read_bridge_bases(bus);
161 void pcibios_set_master(struct pci_dev *dev)
163 /* No special bus mastering setup handling */
166 int pcibios_enable_device(struct pci_dev *dev, int mask)
172 pci_read_config_word(dev, PCI_COMMAND, &cmd);
174 for (idx=0; idx<6; idx++) {
175 r = &dev->resource[idx];
176 if (!r->start && r->end) {
177 pci_err(dev, "can't enable device: resource collisions\n");
180 if (r->flags & IORESOURCE_IO)
181 cmd |= PCI_COMMAND_IO;
182 if (r->flags & IORESOURCE_MEM)
183 cmd |= PCI_COMMAND_MEMORY;
185 if (cmd != old_cmd) {
186 pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd);
187 pci_write_config_word(dev, PCI_COMMAND, cmd);
194 * Platform support for /proc/bus/pci/X/Y mmap()s.
198 int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma)
200 struct pci_controller *pci_ctrl = (struct pci_controller*) pdev->sysdata;
201 resource_size_t ioaddr = pci_resource_start(pdev, bar);
204 return -EINVAL; /* should never happen */
206 /* Convert to an offset within this PCI controller */
207 ioaddr -= (unsigned long)pci_ctrl->io_space.base;
209 vma->vm_pgoff += (ioaddr + pci_ctrl->io_space.start) >> PAGE_SHIFT;