1 // SPDX-License-Identifier: GPL-2.0
3 * Core of Xen paravirt_ops implementation.
5 * This file contains the xen_paravirt_ops structure itself, and the
7 * - privileged instructions
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/memblock.h>
27 #include <linux/export.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/edd.h>
35 #include <linux/objtool.h>
38 #include <xen/events.h>
39 #include <xen/interface/xen.h>
40 #include <xen/interface/version.h>
41 #include <xen/interface/physdev.h>
42 #include <xen/interface/vcpu.h>
43 #include <xen/interface/memory.h>
44 #include <xen/interface/nmi.h>
45 #include <xen/interface/xen-mca.h>
46 #include <xen/features.h>
48 #include <xen/hvc-console.h>
51 #include <asm/paravirt.h>
54 #include <asm/xen/pci.h>
55 #include <asm/xen/hypercall.h>
56 #include <asm/xen/hypervisor.h>
57 #include <asm/xen/cpuid.h>
58 #include <asm/fixmap.h>
59 #include <asm/processor.h>
60 #include <asm/proto.h>
61 #include <asm/msr-index.h>
62 #include <asm/traps.h>
63 #include <asm/setup.h>
65 #include <asm/pgalloc.h>
66 #include <asm/tlbflush.h>
67 #include <asm/reboot.h>
68 #include <asm/stackprotector.h>
69 #include <asm/hypervisor.h>
70 #include <asm/mach_traps.h>
71 #include <asm/mwait.h>
72 #include <asm/pci_x86.h>
74 #ifdef CONFIG_X86_IOPL_IOPERM
75 #include <asm/io_bitmap.h>
79 #include <linux/acpi.h>
81 #include <acpi/pdc_intel.h>
82 #include <acpi/processor.h>
83 #include <xen/interface/platform.h>
89 #include "multicalls.h"
92 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
94 void *xen_initial_gdt;
96 static int xen_cpu_up_prepare_pv(unsigned int cpu);
97 static int xen_cpu_dead_pv(unsigned int cpu);
100 struct desc_struct desc[3];
104 * Updating the 3 TLS descriptors in the GDT on every task switch is
105 * surprisingly expensive so we avoid updating them if they haven't
106 * changed. Since Xen writes different descriptors than the one
107 * passed in the update_descriptor hypercall we keep shadow copies to
110 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
112 static void __init xen_banner(void)
114 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
115 struct xen_extraversion extra;
116 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
118 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
119 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
120 version >> 16, version & 0xffff, extra.extraversion,
121 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
124 static void __init xen_pv_init_platform(void)
126 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
128 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
129 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
131 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
132 xen_vcpu_info_reset(0);
134 /* pvclock is in shared info area */
138 static void __init xen_pv_guest_late_init(void)
141 /* Setup shared vcpu info for non-smp configurations */
142 xen_setup_vcpu_info_placement();
146 /* Check if running on Xen version (major, minor) or later */
148 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
150 unsigned int version;
155 version = HYPERVISOR_xen_version(XENVER_version, NULL);
156 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
157 ((version >> 16) > major))
162 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
163 static __read_mostly unsigned int cpuid_leaf5_edx_val;
165 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
166 unsigned int *cx, unsigned int *dx)
168 unsigned maskebx = ~0;
171 * Mask out inconvenient features, to try and disable as many
172 * unsupported kernel subsystems as possible.
175 case CPUID_MWAIT_LEAF:
176 /* Synthesize the values.. */
179 *cx = cpuid_leaf5_ecx_val;
180 *dx = cpuid_leaf5_edx_val;
184 /* Suppress extended topology stuff */
189 asm(XEN_EMULATE_PREFIX "cpuid"
194 : "0" (*ax), "2" (*cx));
198 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
200 static bool __init xen_check_mwait(void)
203 struct xen_platform_op op = {
204 .cmd = XENPF_set_processor_pminfo,
205 .u.set_pminfo.id = -1,
206 .u.set_pminfo.type = XEN_PM_PDC,
209 unsigned int ax, bx, cx, dx;
210 unsigned int mwait_mask;
212 /* We need to determine whether it is OK to expose the MWAIT
213 * capability to the kernel to harvest deeper than C3 states from ACPI
214 * _CST using the processor_harvest_xen.c module. For this to work, we
215 * need to gather the MWAIT_LEAF values (which the cstate.c code
216 * checks against). The hypervisor won't expose the MWAIT flag because
217 * it would break backwards compatibility; so we will find out directly
218 * from the hardware and hypercall.
220 if (!xen_initial_domain())
224 * When running under platform earlier than Xen4.2, do not expose
225 * mwait, to avoid the risk of loading native acpi pad driver
227 if (!xen_running_on_version_or_later(4, 2))
233 native_cpuid(&ax, &bx, &cx, &dx);
235 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
236 (1 << (X86_FEATURE_MWAIT % 32));
238 if ((cx & mwait_mask) != mwait_mask)
241 /* We need to emulate the MWAIT_LEAF and for that we need both
242 * ecx and edx. The hypercall provides only partial information.
245 ax = CPUID_MWAIT_LEAF;
250 native_cpuid(&ax, &bx, &cx, &dx);
252 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
253 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
255 buf[0] = ACPI_PDC_REVISION_ID;
257 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
259 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
261 if ((HYPERVISOR_platform_op(&op) == 0) &&
262 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
263 cpuid_leaf5_ecx_val = cx;
264 cpuid_leaf5_edx_val = dx;
272 static bool __init xen_check_xsave(void)
274 unsigned int cx, xsave_mask;
278 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
279 (1 << (X86_FEATURE_OSXSAVE % 32));
281 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
282 return (cx & xsave_mask) == xsave_mask;
285 static void __init xen_init_capabilities(void)
287 setup_force_cpu_cap(X86_FEATURE_XENPV);
288 setup_clear_cpu_cap(X86_FEATURE_DCA);
289 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
290 setup_clear_cpu_cap(X86_FEATURE_MTRR);
291 setup_clear_cpu_cap(X86_FEATURE_ACC);
292 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
293 setup_clear_cpu_cap(X86_FEATURE_SME);
296 * Xen PV would need some work to support PCID: CR3 handling as well
297 * as xen_flush_tlb_others() would need updating.
299 setup_clear_cpu_cap(X86_FEATURE_PCID);
301 if (!xen_initial_domain())
302 setup_clear_cpu_cap(X86_FEATURE_ACPI);
304 if (xen_check_mwait())
305 setup_force_cpu_cap(X86_FEATURE_MWAIT);
307 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
309 if (!xen_check_xsave()) {
310 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
311 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
315 static void xen_set_debugreg(int reg, unsigned long val)
317 HYPERVISOR_set_debugreg(reg, val);
320 static unsigned long xen_get_debugreg(int reg)
322 return HYPERVISOR_get_debugreg(reg);
325 static void xen_end_context_switch(struct task_struct *next)
328 paravirt_end_context_switch(next);
331 static unsigned long xen_store_tr(void)
337 * Set the page permissions for a particular virtual address. If the
338 * address is a vmalloc mapping (or other non-linear mapping), then
339 * find the linear mapping of the page and also set its protections to
342 static void set_aliased_prot(void *v, pgprot_t prot)
351 ptep = lookup_address((unsigned long)v, &level);
352 BUG_ON(ptep == NULL);
354 pfn = pte_pfn(*ptep);
355 pte = pfn_pte(pfn, prot);
358 * Careful: update_va_mapping() will fail if the virtual address
359 * we're poking isn't populated in the page tables. We don't
360 * need to worry about the direct map (that's always in the page
361 * tables), but we need to be careful about vmap space. In
362 * particular, the top level page table can lazily propagate
363 * entries between processes, so if we've switched mms since we
364 * vmapped the target in the first place, we might not have the
365 * top-level page table entry populated.
367 * We disable preemption because we want the same mm active when
368 * we probe the target and when we issue the hypercall. We'll
369 * have the same nominal mm, but if we're a kernel thread, lazy
370 * mm dropping could change our pgd.
372 * Out of an abundance of caution, this uses __get_user() to fault
373 * in the target address just in case there's some obscure case
374 * in which the target address isn't readable.
379 copy_from_kernel_nofault(&dummy, v, 1);
381 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
384 va = __va(PFN_PHYS(pfn));
386 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
392 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
394 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
398 * We need to mark the all aliases of the LDT pages RO. We
399 * don't need to call vm_flush_aliases(), though, since that's
400 * only responsible for flushing aliases out the TLBs, not the
401 * page tables, and Xen will flush the TLB for us if needed.
403 * To avoid confusing future readers: none of this is necessary
404 * to load the LDT. The hypervisor only checks this when the
405 * LDT is faulted in due to subsequent descriptor access.
408 for (i = 0; i < entries; i += entries_per_page)
409 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
412 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
414 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
417 for (i = 0; i < entries; i += entries_per_page)
418 set_aliased_prot(ldt + i, PAGE_KERNEL);
421 static void xen_set_ldt(const void *addr, unsigned entries)
423 struct mmuext_op *op;
424 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
426 trace_xen_cpu_set_ldt(addr, entries);
429 op->cmd = MMUEXT_SET_LDT;
430 op->arg1.linear_addr = (unsigned long)addr;
431 op->arg2.nr_ents = entries;
433 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
435 xen_mc_issue(PARAVIRT_LAZY_CPU);
438 static void xen_load_gdt(const struct desc_ptr *dtr)
440 unsigned long va = dtr->address;
441 unsigned int size = dtr->size + 1;
442 unsigned long pfn, mfn;
447 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
448 BUG_ON(size > PAGE_SIZE);
449 BUG_ON(va & ~PAGE_MASK);
452 * The GDT is per-cpu and is in the percpu data area.
453 * That can be virtually mapped, so we need to do a
454 * page-walk to get the underlying MFN for the
455 * hypercall. The page can also be in the kernel's
456 * linear range, so we need to RO that mapping too.
458 ptep = lookup_address(va, &level);
459 BUG_ON(ptep == NULL);
461 pfn = pte_pfn(*ptep);
462 mfn = pfn_to_mfn(pfn);
463 virt = __va(PFN_PHYS(pfn));
465 make_lowmem_page_readonly((void *)va);
466 make_lowmem_page_readonly(virt);
468 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
473 * load_gdt for early boot, when the gdt is only mapped once
475 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
477 unsigned long va = dtr->address;
478 unsigned int size = dtr->size + 1;
479 unsigned long pfn, mfn;
482 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
483 BUG_ON(size > PAGE_SIZE);
484 BUG_ON(va & ~PAGE_MASK);
486 pfn = virt_to_pfn(va);
487 mfn = pfn_to_mfn(pfn);
489 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
491 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
494 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
498 static inline bool desc_equal(const struct desc_struct *d1,
499 const struct desc_struct *d2)
501 return !memcmp(d1, d2, sizeof(*d1));
504 static void load_TLS_descriptor(struct thread_struct *t,
505 unsigned int cpu, unsigned int i)
507 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
508 struct desc_struct *gdt;
510 struct multicall_space mc;
512 if (desc_equal(shadow, &t->tls_array[i]))
515 *shadow = t->tls_array[i];
517 gdt = get_cpu_gdt_rw(cpu);
518 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
519 mc = __xen_mc_entry(0);
521 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
524 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
527 * In lazy mode we need to zero %fs, otherwise we may get an
528 * exception between the new %fs descriptor being loaded and
529 * %fs being effectively cleared at __switch_to().
531 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
536 load_TLS_descriptor(t, cpu, 0);
537 load_TLS_descriptor(t, cpu, 1);
538 load_TLS_descriptor(t, cpu, 2);
540 xen_mc_issue(PARAVIRT_LAZY_CPU);
543 static void xen_load_gs_index(unsigned int idx)
545 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
549 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
552 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
553 u64 entry = *(u64 *)ptr;
555 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
560 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
566 void noist_exc_debug(struct pt_regs *regs);
568 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi)
570 /* On Xen PV, NMI doesn't use IST. The C part is the sane as native. */
574 DEFINE_IDTENTRY_RAW(xenpv_exc_debug)
577 * There's no IST on Xen PV, but we still need to dispatch
578 * to the correct handler.
581 noist_exc_debug(regs);
586 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap)
588 /* This should never happen and there is no way to handle it. */
589 pr_err("Unknown trap in Xen PV mode.");
593 struct trap_array_entry {
599 #define TRAP_ENTRY(func, ist_ok) { \
600 .orig = asm_##func, \
601 .xen = xen_asm_##func, \
604 #define TRAP_ENTRY_REDIR(func, ist_ok) { \
605 .orig = asm_##func, \
606 .xen = xen_asm_xenpv_##func, \
609 static struct trap_array_entry trap_array[] = {
610 TRAP_ENTRY_REDIR(exc_debug, true ),
611 TRAP_ENTRY(exc_double_fault, true ),
612 #ifdef CONFIG_X86_MCE
613 TRAP_ENTRY(exc_machine_check, true ),
615 TRAP_ENTRY_REDIR(exc_nmi, true ),
616 TRAP_ENTRY(exc_int3, false ),
617 TRAP_ENTRY(exc_overflow, false ),
618 #ifdef CONFIG_IA32_EMULATION
619 { entry_INT80_compat, xen_entry_INT80_compat, false },
621 TRAP_ENTRY(exc_page_fault, false ),
622 TRAP_ENTRY(exc_divide_error, false ),
623 TRAP_ENTRY(exc_bounds, false ),
624 TRAP_ENTRY(exc_invalid_op, false ),
625 TRAP_ENTRY(exc_device_not_available, false ),
626 TRAP_ENTRY(exc_coproc_segment_overrun, false ),
627 TRAP_ENTRY(exc_invalid_tss, false ),
628 TRAP_ENTRY(exc_segment_not_present, false ),
629 TRAP_ENTRY(exc_stack_segment, false ),
630 TRAP_ENTRY(exc_general_protection, false ),
631 TRAP_ENTRY(exc_spurious_interrupt_bug, false ),
632 TRAP_ENTRY(exc_coprocessor_error, false ),
633 TRAP_ENTRY(exc_alignment_check, false ),
634 TRAP_ENTRY(exc_simd_coprocessor_error, false ),
637 static bool __ref get_trap_addr(void **addr, unsigned int ist)
640 bool ist_okay = false;
644 * Replace trap handler addresses by Xen specific ones.
645 * Check for known traps using IST and whitelist them.
646 * The debugger ones are the only ones we care about.
647 * Xen will handle faults like double_fault, so we should never see
648 * them. Warn if there's an unexpected IST-using fault handler.
650 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
651 struct trap_array_entry *entry = trap_array + nr;
653 if (*addr == entry->orig) {
655 ist_okay = entry->ist_okay;
661 if (nr == ARRAY_SIZE(trap_array) &&
662 *addr >= (void *)early_idt_handler_array[0] &&
663 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
664 nr = (*addr - (void *)early_idt_handler_array[0]) /
665 EARLY_IDT_HANDLER_SIZE;
666 *addr = (void *)xen_early_idt_handler_array[nr];
671 *addr = (void *)xen_asm_exc_xen_unknown_trap;
673 if (WARN_ON(found && ist != 0 && !ist_okay))
679 static int cvt_gate_to_trap(int vector, const gate_desc *val,
680 struct trap_info *info)
684 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
687 info->vector = vector;
689 addr = gate_offset(val);
690 if (!get_trap_addr((void **)&addr, val->bits.ist))
692 info->address = addr;
694 info->cs = gate_segment(val);
695 info->flags = val->bits.dpl;
696 /* interrupt gates clear IF */
697 if (val->bits.type == GATE_INTERRUPT)
698 info->flags |= 1 << 2;
703 /* Locations of each CPU's IDT */
704 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
706 /* Set an IDT entry. If the entry is part of the current IDT, then
708 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
710 unsigned long p = (unsigned long)&dt[entrynum];
711 unsigned long start, end;
713 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
717 start = __this_cpu_read(idt_desc.address);
718 end = start + __this_cpu_read(idt_desc.size) + 1;
722 native_write_idt_entry(dt, entrynum, g);
724 if (p >= start && (p + 8) <= end) {
725 struct trap_info info[2];
729 if (cvt_gate_to_trap(entrynum, g, &info[0]))
730 if (HYPERVISOR_set_trap_table(info))
737 static void xen_convert_trap_info(const struct desc_ptr *desc,
738 struct trap_info *traps)
740 unsigned in, out, count;
742 count = (desc->size+1) / sizeof(gate_desc);
745 for (in = out = 0; in < count; in++) {
746 gate_desc *entry = (gate_desc *)(desc->address) + in;
748 if (cvt_gate_to_trap(in, entry, &traps[out]))
751 traps[out].address = 0;
754 void xen_copy_trap_info(struct trap_info *traps)
756 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
758 xen_convert_trap_info(desc, traps);
761 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
762 hold a spinlock to protect the static traps[] array (static because
763 it avoids allocation, and saves stack space). */
764 static void xen_load_idt(const struct desc_ptr *desc)
766 static DEFINE_SPINLOCK(lock);
767 static struct trap_info traps[257];
769 trace_xen_cpu_load_idt(desc);
773 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
775 xen_convert_trap_info(desc, traps);
778 if (HYPERVISOR_set_trap_table(traps))
784 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
785 they're handled differently. */
786 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
787 const void *desc, int type)
789 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
800 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
803 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
813 * Version of write_gdt_entry for use at early boot-time needed to
814 * update an entry as simply as possible.
816 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
817 const void *desc, int type)
819 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
828 xmaddr_t maddr = virt_to_machine(&dt[entry]);
830 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
831 dt[entry] = *(struct desc_struct *)desc;
837 static void xen_load_sp0(unsigned long sp0)
839 struct multicall_space mcs;
841 mcs = xen_mc_entry(0);
842 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
843 xen_mc_issue(PARAVIRT_LAZY_CPU);
844 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
847 #ifdef CONFIG_X86_IOPL_IOPERM
848 static void xen_invalidate_io_bitmap(void)
850 struct physdev_set_iobitmap iobitmap = {
855 native_tss_invalidate_io_bitmap();
856 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
859 static void xen_update_io_bitmap(void)
861 struct physdev_set_iobitmap iobitmap;
862 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
864 native_tss_update_io_bitmap();
866 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) +
867 tss->x86_tss.io_bitmap_base;
868 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID)
869 iobitmap.nr_ports = 0;
871 iobitmap.nr_ports = IO_BITMAP_BITS;
873 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
877 static void xen_io_delay(void)
881 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
883 static unsigned long xen_read_cr0(void)
885 unsigned long cr0 = this_cpu_read(xen_cr0_value);
887 if (unlikely(cr0 == 0)) {
888 cr0 = native_read_cr0();
889 this_cpu_write(xen_cr0_value, cr0);
895 static void xen_write_cr0(unsigned long cr0)
897 struct multicall_space mcs;
899 this_cpu_write(xen_cr0_value, cr0);
901 /* Only pay attention to cr0.TS; everything else is
903 mcs = xen_mc_entry(0);
905 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
907 xen_mc_issue(PARAVIRT_LAZY_CPU);
910 static void xen_write_cr4(unsigned long cr4)
912 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
914 native_write_cr4(cr4);
917 static u64 xen_read_msr_safe(unsigned int msr, int *err)
921 if (pmu_msr_read(msr, &val, err))
924 val = native_read_msr_safe(msr, err);
926 case MSR_IA32_APICBASE:
927 val &= ~X2APIC_ENABLE;
933 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
942 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
943 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
944 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
947 base = ((u64)high << 32) | low;
948 if (HYPERVISOR_set_segment_base(which, base) != 0)
955 case MSR_SYSCALL_MASK:
956 case MSR_IA32_SYSENTER_CS:
957 case MSR_IA32_SYSENTER_ESP:
958 case MSR_IA32_SYSENTER_EIP:
959 /* Fast syscall setup is all done in hypercalls, so
960 these are all ignored. Stub them out here to stop
961 Xen console noise. */
965 if (!pmu_msr_write(msr, low, high, &ret))
966 ret = native_write_msr_safe(msr, low, high);
972 static u64 xen_read_msr(unsigned int msr)
975 * This will silently swallow a #GP from RDMSR. It may be worth
980 return xen_read_msr_safe(msr, &err);
983 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
986 * This will silently swallow a #GP from WRMSR. It may be worth
989 xen_write_msr_safe(msr, low, high);
992 /* This is called once we have the cpu_possible_mask */
993 void __init xen_setup_vcpu_info_placement(void)
997 for_each_possible_cpu(cpu) {
998 /* Set up direct vCPU id mapping for PV guests. */
999 per_cpu(xen_vcpu_id, cpu) = cpu;
1002 * xen_vcpu_setup(cpu) can fail -- in which case it
1003 * falls back to the shared_info version for cpus
1004 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
1006 * xen_cpu_up_prepare_pv() handles the rest by failing
1009 (void) xen_vcpu_setup(cpu);
1013 * xen_vcpu_setup managed to place the vcpu_info within the
1014 * percpu area for all cpus, so make use of it.
1016 if (xen_have_vcpu_info_placement) {
1017 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1018 pv_ops.irq.restore_fl =
1019 __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1020 pv_ops.irq.irq_disable =
1021 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1022 pv_ops.irq.irq_enable =
1023 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1024 pv_ops.mmu.read_cr2 =
1025 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
1029 static const struct pv_info xen_info __initconst = {
1030 .extra_user_64bit_cs = FLAT_USER_CS64,
1034 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1037 .set_debugreg = xen_set_debugreg,
1038 .get_debugreg = xen_get_debugreg,
1040 .read_cr0 = xen_read_cr0,
1041 .write_cr0 = xen_write_cr0,
1043 .write_cr4 = xen_write_cr4,
1045 .wbinvd = native_wbinvd,
1047 .read_msr = xen_read_msr,
1048 .write_msr = xen_write_msr,
1050 .read_msr_safe = xen_read_msr_safe,
1051 .write_msr_safe = xen_write_msr_safe,
1053 .read_pmc = xen_read_pmc,
1056 .usergs_sysret64 = xen_sysret64,
1058 .load_tr_desc = paravirt_nop,
1059 .set_ldt = xen_set_ldt,
1060 .load_gdt = xen_load_gdt,
1061 .load_idt = xen_load_idt,
1062 .load_tls = xen_load_tls,
1063 .load_gs_index = xen_load_gs_index,
1065 .alloc_ldt = xen_alloc_ldt,
1066 .free_ldt = xen_free_ldt,
1068 .store_tr = xen_store_tr,
1070 .write_ldt_entry = xen_write_ldt_entry,
1071 .write_gdt_entry = xen_write_gdt_entry,
1072 .write_idt_entry = xen_write_idt_entry,
1073 .load_sp0 = xen_load_sp0,
1075 #ifdef CONFIG_X86_IOPL_IOPERM
1076 .invalidate_io_bitmap = xen_invalidate_io_bitmap,
1077 .update_io_bitmap = xen_update_io_bitmap,
1079 .io_delay = xen_io_delay,
1081 /* Xen takes care of %gs when switching to usermode for us */
1082 .swapgs = paravirt_nop,
1084 .start_context_switch = paravirt_start_context_switch,
1085 .end_context_switch = xen_end_context_switch,
1088 static void xen_restart(char *msg)
1090 xen_reboot(SHUTDOWN_reboot);
1093 static void xen_machine_halt(void)
1095 xen_reboot(SHUTDOWN_poweroff);
1098 static void xen_machine_power_off(void)
1102 xen_reboot(SHUTDOWN_poweroff);
1105 static void xen_crash_shutdown(struct pt_regs *regs)
1107 xen_reboot(SHUTDOWN_crash);
1110 static const struct machine_ops xen_machine_ops __initconst = {
1111 .restart = xen_restart,
1112 .halt = xen_machine_halt,
1113 .power_off = xen_machine_power_off,
1114 .shutdown = xen_machine_halt,
1115 .crash_shutdown = xen_crash_shutdown,
1116 .emergency_restart = xen_emergency_restart,
1119 static unsigned char xen_get_nmi_reason(void)
1121 unsigned char reason = 0;
1123 /* Construct a value which looks like it came from port 0x61. */
1124 if (test_bit(_XEN_NMIREASON_io_error,
1125 &HYPERVISOR_shared_info->arch.nmi_reason))
1126 reason |= NMI_REASON_IOCHK;
1127 if (test_bit(_XEN_NMIREASON_pci_serr,
1128 &HYPERVISOR_shared_info->arch.nmi_reason))
1129 reason |= NMI_REASON_SERR;
1134 static void __init xen_boot_params_init_edd(void)
1136 #if IS_ENABLED(CONFIG_EDD)
1137 struct xen_platform_op op;
1138 struct edd_info *edd_info;
1143 edd_info = boot_params.eddbuf;
1144 mbr_signature = boot_params.edd_mbr_sig_buffer;
1146 op.cmd = XENPF_firmware_info;
1148 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1149 for (nr = 0; nr < EDDMAXNR; nr++) {
1150 struct edd_info *info = edd_info + nr;
1152 op.u.firmware_info.index = nr;
1153 info->params.length = sizeof(info->params);
1154 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1156 ret = HYPERVISOR_platform_op(&op);
1160 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1163 C(interface_support);
1164 C(legacy_max_cylinder);
1166 C(legacy_sectors_per_track);
1169 boot_params.eddbuf_entries = nr;
1171 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1172 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1173 op.u.firmware_info.index = nr;
1174 ret = HYPERVISOR_platform_op(&op);
1177 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1179 boot_params.edd_mbr_sig_buf_entries = nr;
1184 * Set up the GDT and segment registers for -fstack-protector. Until
1185 * we do this, we have to be careful not to call any stack-protected
1186 * function, which is most of the kernel.
1188 static void __init xen_setup_gdt(int cpu)
1190 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
1191 pv_ops.cpu.load_gdt = xen_load_gdt_boot;
1193 setup_stack_canary_segment(cpu);
1194 switch_to_new_gdt(cpu);
1196 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
1197 pv_ops.cpu.load_gdt = xen_load_gdt;
1200 static void __init xen_dom0_set_legacy_features(void)
1202 x86_platform.legacy.rtc = 1;
1205 /* First C function to be called on Xen boot */
1206 asmlinkage __visible void __init xen_start_kernel(void)
1208 struct physdev_set_iopl set_iopl;
1209 unsigned long initrd_start = 0;
1212 if (!xen_start_info)
1215 xen_domain_type = XEN_PV_DOMAIN;
1216 xen_start_flags = xen_start_info->flags;
1218 xen_setup_features();
1220 /* Install Xen paravirt ops */
1222 pv_ops.init.patch = paravirt_patch_default;
1223 pv_ops.cpu = xen_cpu_ops;
1227 * Setup xen_vcpu early because it is needed for
1228 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1230 * Don't do the full vcpu_info placement stuff until we have
1231 * the cpu_possible_mask and a non-dummy shared_info.
1233 xen_vcpu_info_reset(0);
1235 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1237 x86_init.resources.memory_setup = xen_memory_setup;
1238 x86_init.irqs.intr_mode_select = x86_init_noop;
1239 x86_init.irqs.intr_mode_init = x86_init_noop;
1240 x86_init.oem.arch_setup = xen_arch_setup;
1241 x86_init.oem.banner = xen_banner;
1242 x86_init.hyper.init_platform = xen_pv_init_platform;
1243 x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1246 * Set up some pagetable state before starting to set any ptes.
1249 xen_setup_machphys_mapping();
1252 /* Prevent unwanted bits from being set in PTEs. */
1253 __supported_pte_mask &= ~_PAGE_GLOBAL;
1254 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1257 * Prevent page tables from being allocated in highmem, even
1258 * if CONFIG_HIGHPTE is enabled.
1260 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1263 xen_build_dynamic_phys_to_machine();
1266 * Set up kernel GDT and segment registers, mainly so that
1267 * -fstack-protector code can be executed.
1271 /* Work out if we support NX */
1272 get_cpu_cap(&boot_cpu_data);
1275 /* Determine virtual and physical address sizes */
1276 get_cpu_address_sizes(&boot_cpu_data);
1278 /* Let's presume PV guests always boot on vCPU with id 0. */
1279 per_cpu(xen_vcpu_id, 0) = 0;
1281 idt_setup_early_handler();
1283 xen_init_capabilities();
1285 #ifdef CONFIG_X86_LOCAL_APIC
1287 * set up the basic apic ops.
1292 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1293 pv_ops.mmu.ptep_modify_prot_start =
1294 xen_ptep_modify_prot_start;
1295 pv_ops.mmu.ptep_modify_prot_commit =
1296 xen_ptep_modify_prot_commit;
1299 machine_ops = xen_machine_ops;
1302 * The only reliable way to retain the initial address of the
1303 * percpu gdt_page is to remember it here, so we can go and
1304 * mark it RW later, when the initial percpu area is freed.
1306 xen_initial_gdt = &per_cpu(gdt_page, 0);
1310 #ifdef CONFIG_ACPI_NUMA
1312 * The pages we from Xen are not related to machine pages, so
1313 * any NUMA information the kernel tries to get from ACPI will
1314 * be meaningless. Prevent it from trying.
1318 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1320 local_irq_disable();
1321 early_boot_irqs_disabled = true;
1323 xen_raw_console_write("mapping kernel into physical memory\n");
1324 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1325 xen_start_info->nr_pages);
1326 xen_reserve_special_pages();
1329 * We used to do this in xen_arch_setup, but that is too late
1330 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1331 * early_amd_init which pokes 0xcf8 port.
1334 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1336 xen_raw_printk("physdev_op failed %d\n", rc);
1339 if (xen_start_info->mod_start) {
1340 if (xen_start_info->flags & SIF_MOD_START_PFN)
1341 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1343 initrd_start = __pa(xen_start_info->mod_start);
1346 /* Poke various useful things into boot_params */
1347 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1348 boot_params.hdr.ramdisk_image = initrd_start;
1349 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1350 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1351 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1353 if (!xen_initial_domain()) {
1354 add_preferred_console("xenboot", 0, NULL);
1356 x86_init.pci.arch_init = pci_xen_init;
1358 const struct dom0_vga_console_info *info =
1359 (void *)((char *)xen_start_info +
1360 xen_start_info->console.dom0.info_off);
1361 struct xen_platform_op op = {
1362 .cmd = XENPF_firmware_info,
1363 .interface_version = XENPF_INTERFACE_VERSION,
1364 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1367 x86_platform.set_legacy_features =
1368 xen_dom0_set_legacy_features;
1369 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1370 xen_start_info->console.domU.mfn = 0;
1371 xen_start_info->console.domU.evtchn = 0;
1373 if (HYPERVISOR_platform_op(&op) == 0)
1374 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1376 /* Make sure ACS will be enabled */
1379 xen_acpi_sleep_register();
1381 /* Avoid searching for BIOS MP tables */
1382 x86_init.mpparse.find_smp_config = x86_init_noop;
1383 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1385 xen_boot_params_init_edd();
1389 * Disable selecting "Firmware First mode" for correctable
1390 * memory errors, as this is the duty of the hypervisor to
1393 acpi_disable_cmcff = 1;
1397 if (!boot_params.screen_info.orig_video_isVGA)
1398 add_preferred_console("tty", 0, NULL);
1399 add_preferred_console("hvc", 0, NULL);
1400 if (boot_params.screen_info.orig_video_isVGA)
1401 add_preferred_console("tty", 0, NULL);
1404 /* PCI BIOS service won't work from a PV guest. */
1405 pci_probe &= ~PCI_PROBE_BIOS;
1407 xen_raw_console_write("about to get started...\n");
1409 /* We need this for printk timestamps */
1410 xen_setup_runstate_info(0);
1412 xen_efi_init(&boot_params);
1414 /* Start the world */
1415 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1416 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1419 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1423 if (per_cpu(xen_vcpu, cpu) == NULL)
1426 xen_setup_timer(cpu);
1428 rc = xen_smp_intr_init(cpu);
1430 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1435 rc = xen_smp_intr_init_pv(cpu);
1437 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1445 static int xen_cpu_dead_pv(unsigned int cpu)
1447 xen_smp_intr_free(cpu);
1448 xen_smp_intr_free_pv(cpu);
1450 xen_teardown_timer(cpu);
1455 static uint32_t __init xen_platform_pv(void)
1457 if (xen_pv_domain())
1458 return xen_cpuid_base();
1463 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1465 .detect = xen_platform_pv,
1466 .type = X86_HYPER_XEN_PV,
1467 .runtime.pin_vcpu = xen_pin_vcpu,
1468 .ignore_nopv = true,