1 // SPDX-License-Identifier: GPL-2.0-only
3 * DMA translation between STA2x11 AMBA memory mapping and the x86 memory mapping
5 * ST Microelectronics ConneXt (STA2X11/STA2X10)
7 * Copyright (c) 2010-2011 Wind River Systems, Inc.
10 #include <linux/pci.h>
11 #include <linux/pci_ids.h>
12 #include <linux/export.h>
13 #include <linux/list.h>
14 #include <linux/dma-direct.h>
15 #include <asm/iommu.h>
17 #define STA2X11_SWIOTLB_SIZE (4*1024*1024)
20 * We build a list of bus numbers that are under the ConneXt. The
21 * main bridge hosts 4 busses, which are the 4 endpoints, in order.
23 #define STA2X11_NR_EP 4 /* 0..3 included */
24 #define STA2X11_NR_FUNCS 8 /* 0..7 included */
25 #define STA2X11_AMBA_SIZE (512 << 20)
27 struct sta2x11_ahb_regs { /* saved during suspend */
28 u32 base, pexlbase, pexhbase, crw;
31 struct sta2x11_mapping {
33 struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS];
36 struct sta2x11_instance {
37 struct list_head list;
39 struct sta2x11_mapping map[STA2X11_NR_EP];
42 static LIST_HEAD(sta2x11_instance_list);
44 /* At probe time, record new instances of this bridge (likely one only) */
45 static void sta2x11_new_instance(struct pci_dev *pdev)
47 struct sta2x11_instance *instance;
49 instance = kzalloc(sizeof(*instance), GFP_ATOMIC);
52 /* This has a subordinate bridge, with 4 more-subordinate ones */
53 instance->bus0 = pdev->subordinate->number + 1;
55 if (list_empty(&sta2x11_instance_list)) {
56 int size = STA2X11_SWIOTLB_SIZE;
57 /* First instance: register your own swiotlb area */
58 dev_info(&pdev->dev, "Using SWIOTLB (size %i)\n", size);
59 if (swiotlb_late_init_with_default_size(size))
60 dev_emerg(&pdev->dev, "init swiotlb failed\n");
62 list_add(&instance->list, &sta2x11_instance_list);
64 DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, 0xcc17, sta2x11_new_instance);
67 * Utility functions used in this file from below
69 static struct sta2x11_instance *sta2x11_pdev_to_instance(struct pci_dev *pdev)
71 struct sta2x11_instance *instance;
74 list_for_each_entry(instance, &sta2x11_instance_list, list) {
75 ep = pdev->bus->number - instance->bus0;
76 if (ep >= 0 && ep < STA2X11_NR_EP)
82 static int sta2x11_pdev_to_ep(struct pci_dev *pdev)
84 struct sta2x11_instance *instance;
86 instance = sta2x11_pdev_to_instance(pdev);
90 return pdev->bus->number - instance->bus0;
93 /* This is exported, as some devices need to access the MFD registers */
94 struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev)
96 return sta2x11_pdev_to_instance(pdev);
98 EXPORT_SYMBOL(sta2x11_get_instance);
100 /* At setup time, we use our own ops if the device is a ConneXt one */
101 static void sta2x11_setup_pdev(struct pci_dev *pdev)
103 struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
105 if (!instance) /* either a sta2x11 bridge or another ST device */
108 /* We must enable all devices as master, for audio DMA to work */
109 pci_set_master(pdev);
111 DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev);
114 * At boot we must set up the mappings for the pcie-to-amba bridge.
115 * It involves device access, and the same happens at suspend/resume time
118 #define AHB_MAPB 0xCA4
119 #define AHB_CRW(i) (AHB_MAPB + 0 + (i) * 0x10)
120 #define AHB_CRW_SZMASK 0xfffffc00UL
121 #define AHB_CRW_ENABLE (1 << 0)
122 #define AHB_CRW_WTYPE_MEM (2 << 1)
123 #define AHB_CRW_ROE (1UL << 3) /* Relax Order Ena */
124 #define AHB_CRW_NSE (1UL << 4) /* No Snoop Enable */
125 #define AHB_BASE(i) (AHB_MAPB + 4 + (i) * 0x10)
126 #define AHB_PEXLBASE(i) (AHB_MAPB + 8 + (i) * 0x10)
127 #define AHB_PEXHBASE(i) (AHB_MAPB + 12 + (i) * 0x10)
129 /* At probe time, enable mapping for each endpoint, using the pdev */
130 static void sta2x11_map_ep(struct pci_dev *pdev)
132 struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
133 struct device *dev = &pdev->dev;
134 u32 amba_base, max_amba_addr;
140 pci_read_config_dword(pdev, AHB_BASE(0), &amba_base);
141 max_amba_addr = amba_base + STA2X11_AMBA_SIZE - 1;
143 ret = dma_direct_set_offset(dev, 0, amba_base, STA2X11_AMBA_SIZE);
145 dev_err(dev, "sta2x11: could not set DMA offset\n");
147 dev->bus_dma_limit = max_amba_addr;
148 pci_set_consistent_dma_mask(pdev, max_amba_addr);
149 pci_set_dma_mask(pdev, max_amba_addr);
151 /* Configure AHB mapping */
152 pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0);
153 pci_write_config_dword(pdev, AHB_PEXHBASE(0), 0);
154 pci_write_config_dword(pdev, AHB_CRW(0), STA2X11_AMBA_SIZE |
155 AHB_CRW_WTYPE_MEM | AHB_CRW_ENABLE);
157 /* Disable all the other windows */
158 for (i = 1; i < STA2X11_NR_FUNCS; i++)
159 pci_write_config_dword(pdev, AHB_CRW(i), 0);
162 "sta2x11: Map EP %i: AMBA address %#8x-%#8x\n",
163 sta2x11_pdev_to_ep(pdev), amba_base, max_amba_addr);
165 DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep);
167 #ifdef CONFIG_PM /* Some register values must be saved and restored */
169 static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev)
171 struct sta2x11_instance *instance;
174 instance = sta2x11_pdev_to_instance(pdev);
177 ep = sta2x11_pdev_to_ep(pdev);
178 return instance->map + ep;
181 static void suspend_mapping(struct pci_dev *pdev)
183 struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
189 if (map->is_suspended)
191 map->is_suspended = 1;
193 /* Save all window configs */
194 for (i = 0; i < STA2X11_NR_FUNCS; i++) {
195 struct sta2x11_ahb_regs *regs = map->regs + i;
197 pci_read_config_dword(pdev, AHB_BASE(i), ®s->base);
198 pci_read_config_dword(pdev, AHB_PEXLBASE(i), ®s->pexlbase);
199 pci_read_config_dword(pdev, AHB_PEXHBASE(i), ®s->pexhbase);
200 pci_read_config_dword(pdev, AHB_CRW(i), ®s->crw);
203 DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, suspend_mapping);
205 static void resume_mapping(struct pci_dev *pdev)
207 struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
214 if (!map->is_suspended)
216 map->is_suspended = 0;
218 /* Restore all window configs */
219 for (i = 0; i < STA2X11_NR_FUNCS; i++) {
220 struct sta2x11_ahb_regs *regs = map->regs + i;
222 pci_write_config_dword(pdev, AHB_BASE(i), regs->base);
223 pci_write_config_dword(pdev, AHB_PEXLBASE(i), regs->pexlbase);
224 pci_write_config_dword(pdev, AHB_PEXHBASE(i), regs->pexhbase);
225 pci_write_config_dword(pdev, AHB_CRW(i), regs->crw);
228 pci_set_master(pdev); /* Like at boot, enable master on all devices */
230 DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, resume_mapping);
232 #endif /* CONFIG_PM */