1 // SPDX-License-Identifier: GPL-2.0
3 * BIOS32 and PCI BIOS handling.
6 #include <linux/bits.h>
7 #include <linux/bitfield.h>
9 #include <linux/init.h>
10 #include <linux/slab.h>
11 #include <linux/module.h>
12 #include <linux/uaccess.h>
14 #include <asm/pci_x86.h>
15 #include <asm/e820/types.h>
16 #include <asm/pci-functions.h>
17 #include <asm/set_memory.h>
19 /* BIOS32 signature: "_32_" */
20 #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
22 /* PCI signature: "PCI " */
23 #define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
25 /* PCI service signature: "$PCI" */
26 #define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
28 /* PCI BIOS hardware mechanism flags */
29 #define PCIBIOS_HW_TYPE1 0x01
30 #define PCIBIOS_HW_TYPE2 0x02
31 #define PCIBIOS_HW_TYPE1_SPEC 0x10
32 #define PCIBIOS_HW_TYPE2_SPEC 0x20
38 #define PCIBIOS_RETURN_CODE GENMASK(15, 8)
42 static u8 pcibios_get_return_code(u32 eax)
44 return FIELD_GET(PCIBIOS_RETURN_CODE, eax);
47 /* According to the BIOS specification at:
48 * http://members.datafast.net.au/dft0802/specs/bios21.pdf, we could
49 * restrict the x zone to some pages and make it ro. But this may be
50 * broken on some bios, complex to handle with static_protections.
51 * We could make the 0xe0000-0x100000 range rox, but this can break
54 * So we let's an rw and x hole when pcibios is used. This shouldn't
55 * happen for modern system with mmconfig, and if you don't want it
56 * you could disable pcibios...
58 static inline void set_bios_x(void)
61 set_memory_x(PAGE_OFFSET + BIOS_BEGIN, (BIOS_END - BIOS_BEGIN) >> PAGE_SHIFT);
62 if (__supported_pte_mask & _PAGE_NX)
63 printk(KERN_INFO "PCI: PCI BIOS area is rw and x. Use pci=nobios if you want it NX.\n");
67 * This is the standard structure used to identify the entry point
68 * to the BIOS32 Service Directory, as documented in
69 * Standard BIOS 32-bit Service Directory Proposal
70 * Revision 0.4 May 24, 1993
71 * Phoenix Technologies Ltd.
73 * and the PCI BIOS specification.
78 unsigned long signature; /* _32_ */
79 unsigned long entry; /* 32 bit physical address */
80 unsigned char revision; /* Revision level, 0 */
81 unsigned char length; /* Length in paragraphs should be 01 */
82 unsigned char checksum; /* All bytes must add up to zero */
83 unsigned char reserved[5]; /* Must be zero */
89 * Physical address of the service directory. I don't know if we're
90 * allowed to have more than one of these or not, so just in case
91 * we'll make pcibios_present() take a memory start parameter and store
96 unsigned long address;
97 unsigned short segment;
98 } bios32_indirect __initdata = { 0, __KERNEL_CS };
101 * Returns the entry point for the given service, NULL on error
104 static unsigned long __init bios32_service(unsigned long service)
106 unsigned char return_code; /* %al */
107 unsigned long address; /* %ebx */
108 unsigned long length; /* %ecx */
109 unsigned long entry; /* %edx */
112 local_irq_save(flags);
113 __asm__("lcall *(%%edi); cld"
114 : "=a" (return_code),
120 "D" (&bios32_indirect));
121 local_irq_restore(flags);
123 switch (return_code) {
125 return address + entry;
126 case 0x80: /* Not present */
127 printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
129 default: /* Shouldn't happen */
130 printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
131 service, return_code);
137 unsigned long address;
138 unsigned short segment;
139 } pci_indirect __ro_after_init = {
141 .segment = __KERNEL_CS,
144 static int pci_bios_present __ro_after_init;
146 static int __init check_pcibios(void)
148 u32 signature, eax, ebx, ecx;
149 u8 status, major_ver, minor_ver, hw_mech;
150 unsigned long flags, pcibios_entry;
152 if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
153 pci_indirect.address = pcibios_entry + PAGE_OFFSET;
155 local_irq_save(flags);
157 "lcall *(%%edi); cld\n\t"
165 : "1" (PCIBIOS_PCI_BIOS_PRESENT),
168 local_irq_restore(flags);
170 status = pcibios_get_return_code(eax);
171 hw_mech = eax & 0xff;
172 major_ver = (ebx >> 8) & 0xff;
173 minor_ver = ebx & 0xff;
174 if (pcibios_last_bus < 0)
175 pcibios_last_bus = ecx & 0xff;
176 DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
177 status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
178 if (status || signature != PCI_SIGNATURE) {
179 printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
183 printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
184 major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
185 #ifdef CONFIG_PCI_DIRECT
186 if (!(hw_mech & PCIBIOS_HW_TYPE1))
187 pci_probe &= ~PCI_PROBE_CONF1;
188 if (!(hw_mech & PCIBIOS_HW_TYPE2))
189 pci_probe &= ~PCI_PROBE_CONF2;
196 static int pci_bios_read(unsigned int seg, unsigned int bus,
197 unsigned int devfn, int reg, int len, u32 *value)
199 unsigned long result = 0;
201 unsigned long bx = (bus << 8) | devfn;
202 u16 number = 0, mask = 0;
205 if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
208 raw_spin_lock_irqsave(&pci_config_lock, flags);
212 number = PCIBIOS_READ_CONFIG_BYTE;
216 number = PCIBIOS_READ_CONFIG_WORD;
220 number = PCIBIOS_READ_CONFIG_DWORD;
224 __asm__("lcall *(%%esi); cld\n\t"
233 "S" (&pci_indirect));
235 * Zero-extend the result beyond 8 or 16 bits, do not trust the
236 * BIOS having done it:
241 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
243 return pcibios_get_return_code(result);
246 static int pci_bios_write(unsigned int seg, unsigned int bus,
247 unsigned int devfn, int reg, int len, u32 value)
249 unsigned long result = 0;
251 unsigned long bx = (bus << 8) | devfn;
255 if ((bus > 255) || (devfn > 255) || (reg > 255))
258 raw_spin_lock_irqsave(&pci_config_lock, flags);
262 number = PCIBIOS_WRITE_CONFIG_BYTE;
265 number = PCIBIOS_WRITE_CONFIG_WORD;
268 number = PCIBIOS_WRITE_CONFIG_DWORD;
272 __asm__("lcall *(%%esi); cld\n\t"
281 "S" (&pci_indirect));
283 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
285 return pcibios_get_return_code(result);
290 * Function table for BIOS32 access
293 static const struct pci_raw_ops pci_bios_access = {
294 .read = pci_bios_read,
295 .write = pci_bios_write
299 * Try to find PCI BIOS.
302 static const struct pci_raw_ops *__init pci_find_bios(void)
309 * Follow the standard procedure for locating the BIOS32 Service
310 * directory by scanning the permissible address range from
311 * 0xe0000 through 0xfffff for a valid BIOS32 structure.
314 for (check = (union bios32 *) __va(0xe0000);
315 check <= (union bios32 *) __va(0xffff0);
318 if (get_kernel_nofault(sig, &check->fields.signature))
321 if (check->fields.signature != BIOS32_SIGNATURE)
323 length = check->fields.length * 16;
327 for (i = 0; i < length ; ++i)
328 sum += check->chars[i];
331 if (check->fields.revision != 0) {
332 printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
333 check->fields.revision, check);
336 DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
337 if (check->fields.entry >= 0x100000) {
338 printk("PCI: BIOS32 entry (0x%p) in high memory, "
339 "cannot use.\n", check);
342 unsigned long bios32_entry = check->fields.entry;
343 DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
345 bios32_indirect.address = bios32_entry + PAGE_OFFSET;
348 return &pci_bios_access;
350 break; /* Hopefully more than one BIOS32 cannot happen... */
357 * BIOS Functions for IRQ Routing
360 struct irq_routing_options {
362 struct irq_info *table;
364 } __attribute__((packed));
366 struct irq_routing_table * pcibios_get_irq_routing_table(void)
368 struct irq_routing_options opt;
369 struct irq_routing_table *rt = NULL;
373 if (!pci_bios_present)
375 page = __get_free_page(GFP_KERNEL);
378 opt.table = (struct irq_info *) page;
379 opt.size = PAGE_SIZE;
380 opt.segment = __KERNEL_DS;
382 DBG("PCI: Fetching IRQ routing table... ");
383 __asm__("push %%es\n\t"
386 "lcall *(%%esi); cld\n\t"
394 : "0" (PCIBIOS_GET_ROUTING_OPTIONS),
400 DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map);
401 ret = pcibios_get_return_code(ret);
403 printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", ret);
404 } else if (opt.size) {
405 rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
407 memset(rt, 0, sizeof(struct irq_routing_table));
408 rt->size = opt.size + sizeof(struct irq_routing_table);
409 rt->exclusive_irqs = map;
410 memcpy(rt->slots, (void *) page, opt.size);
411 printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
417 EXPORT_SYMBOL(pcibios_get_irq_routing_table);
419 int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
423 __asm__("lcall *(%%esi); cld\n\t"
428 : "0" (PCIBIOS_SET_PCI_HW_INT),
429 "b" ((dev->bus->number << 8) | dev->devfn),
430 "c" ((irq << 8) | (pin + 10)),
431 "S" (&pci_indirect));
432 return pcibios_get_return_code(ret) == PCIBIOS_SUCCESSFUL;
434 EXPORT_SYMBOL(pcibios_set_irq_routing);
436 void __init pci_pcbios_init(void)
438 if ((pci_probe & PCI_PROBE_BIOS)
439 && ((raw_pci_ops = pci_find_bios()))) {
440 pci_bios_present = 1;