1 #include <linux/init.h>
4 #include <linux/spinlock.h>
6 #include <linux/interrupt.h>
7 #include <linux/export.h>
10 #include <asm/tlbflush.h>
11 #include <asm/mmu_context.h>
12 #include <asm/cache.h>
14 #include <asm/uv/uv.h>
15 #include <linux/debugfs.h>
18 * TLB flushing, formerly SMP-only
21 * These mean you can really definitely utterly forget about
22 * writing to user space from interrupts. (Its not allowed anyway).
24 * Optimizations Manfred Spraul <manfred@colorfullife.com>
26 * More scalable flush, from Andi Kleen
28 * Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi
31 atomic64_t last_mm_ctx_id = ATOMIC64_INIT(1);
34 static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,
35 u16 *new_asid, bool *need_flush)
39 if (!static_cpu_has(X86_FEATURE_PCID)) {
45 for (asid = 0; asid < TLB_NR_DYN_ASIDS; asid++) {
46 if (this_cpu_read(cpu_tlbstate.ctxs[asid].ctx_id) !=
51 *need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) <
57 * We don't currently own an ASID slot on this CPU.
60 *new_asid = this_cpu_add_return(cpu_tlbstate.next_asid, 1) - 1;
61 if (*new_asid >= TLB_NR_DYN_ASIDS) {
63 this_cpu_write(cpu_tlbstate.next_asid, 1);
68 void leave_mm(int cpu)
70 struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
73 * It's plausible that we're in lazy TLB mode while our mm is init_mm.
74 * If so, our callers still expect us to flush the TLB, but there
75 * aren't any user TLB entries in init_mm to worry about.
77 * This needs to happen before any other sanity checks due to
78 * intel_idle's shenanigans.
80 if (loaded_mm == &init_mm)
83 /* Warn if we're not lazy. */
84 WARN_ON(!this_cpu_read(cpu_tlbstate.is_lazy));
86 switch_mm(NULL, &init_mm, NULL);
89 void switch_mm(struct mm_struct *prev, struct mm_struct *next,
90 struct task_struct *tsk)
94 local_irq_save(flags);
95 switch_mm_irqs_off(prev, next, tsk);
96 local_irq_restore(flags);
99 void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
100 struct task_struct *tsk)
102 struct mm_struct *real_prev = this_cpu_read(cpu_tlbstate.loaded_mm);
103 u16 prev_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
104 unsigned cpu = smp_processor_id();
108 * NB: The scheduler will call us with prev == next when switching
109 * from lazy TLB mode to normal mode if active_mm isn't changing.
110 * When this happens, we don't assume that CR3 (and hence
111 * cpu_tlbstate.loaded_mm) matches next.
113 * NB: leave_mm() calls us with prev == NULL and tsk == NULL.
116 /* We don't want flush_tlb_func_* to run concurrently with us. */
117 if (IS_ENABLED(CONFIG_PROVE_LOCKING))
118 WARN_ON_ONCE(!irqs_disabled());
121 * Verify that CR3 is what we think it is. This will catch
122 * hypothetical buggy code that directly switches to swapper_pg_dir
123 * without going through leave_mm() / switch_mm_irqs_off() or that
124 * does something like write_cr3(read_cr3_pa()).
126 * Only do this check if CONFIG_DEBUG_VM=y because __read_cr3()
129 #ifdef CONFIG_DEBUG_VM
130 if (WARN_ON_ONCE(__read_cr3() != build_cr3(real_prev, prev_asid))) {
132 * If we were to BUG here, we'd be very likely to kill
133 * the system so hard that we don't see the call trace.
134 * Try to recover instead by ignoring the error and doing
135 * a global flush to minimize the chance of corruption.
137 * (This is far from being a fully correct recovery.
138 * Architecturally, the CPU could prefetch something
139 * back into an incorrect ASID slot and leave it there
140 * to cause trouble down the road. It's better than
146 this_cpu_write(cpu_tlbstate.is_lazy, false);
148 if (real_prev == next) {
149 VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[prev_asid].ctx_id) !=
150 next->context.ctx_id);
153 * We don't currently support having a real mm loaded without
154 * our cpu set in mm_cpumask(). We have all the bookkeeping
155 * in place to figure out whether we would need to flush
156 * if our cpu were cleared in mm_cpumask(), but we don't
159 if (WARN_ON_ONCE(real_prev != &init_mm &&
160 !cpumask_test_cpu(cpu, mm_cpumask(next))))
161 cpumask_set_cpu(cpu, mm_cpumask(next));
168 if (IS_ENABLED(CONFIG_VMAP_STACK)) {
170 * If our current stack is in vmalloc space and isn't
171 * mapped in the new pgd, we'll double-fault. Forcibly
174 unsigned int index = pgd_index(current_stack_pointer);
175 pgd_t *pgd = next->pgd + index;
177 if (unlikely(pgd_none(*pgd)))
178 set_pgd(pgd, init_mm.pgd[index]);
181 /* Stop remote flushes for the previous mm */
182 VM_WARN_ON_ONCE(!cpumask_test_cpu(cpu, mm_cpumask(real_prev)) &&
183 real_prev != &init_mm);
184 cpumask_clear_cpu(cpu, mm_cpumask(real_prev));
187 * Start remote flushes and then read tlb_gen.
189 cpumask_set_cpu(cpu, mm_cpumask(next));
190 next_tlb_gen = atomic64_read(&next->context.tlb_gen);
192 choose_new_asid(next, next_tlb_gen, &new_asid, &need_flush);
195 this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id);
196 this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
197 write_cr3(build_cr3(next, new_asid));
198 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH,
201 /* The new ASID is already up to date. */
202 write_cr3(build_cr3_noflush(next, new_asid));
203 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0);
206 this_cpu_write(cpu_tlbstate.loaded_mm, next);
207 this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid);
211 switch_ldt(real_prev, next);
215 * Please ignore the name of this function. It should be called
216 * switch_to_kernel_thread().
218 * enter_lazy_tlb() is a hint from the scheduler that we are entering a
219 * kernel thread or other context without an mm. Acceptable implementations
220 * include doing nothing whatsoever, switching to init_mm, or various clever
221 * lazy tricks to try to minimize TLB flushes.
223 * The scheduler reserves the right to call enter_lazy_tlb() several times
224 * in a row. It will notify us that we're going back to a real mm by
225 * calling switch_mm_irqs_off().
227 void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
229 if (this_cpu_read(cpu_tlbstate.loaded_mm) == &init_mm)
232 if (tlb_defer_switch_to_init_mm()) {
234 * There's a significant optimization that may be possible
235 * here. We have accurate enough TLB flush tracking that we
236 * don't need to maintain coherence of TLB per se when we're
237 * lazy. We do, however, need to maintain coherence of
238 * paging-structure caches. We could, in principle, leave our
239 * old mm loaded and only switch to init_mm when
240 * tlb_remove_page() happens.
242 this_cpu_write(cpu_tlbstate.is_lazy, true);
244 switch_mm(NULL, &init_mm, NULL);
249 * Call this when reinitializing a CPU. It fixes the following potential
252 * - The ASID changed from what cpu_tlbstate thinks it is (most likely
253 * because the CPU was taken down and came back up with CR3's PCID
254 * bits clear. CPU hotplug can do this.
256 * - The TLB contains junk in slots corresponding to inactive ASIDs.
258 * - The CPU went so far out to lunch that it may have missed a TLB
261 void initialize_tlbstate_and_flush(void)
264 struct mm_struct *mm = this_cpu_read(cpu_tlbstate.loaded_mm);
265 u64 tlb_gen = atomic64_read(&init_mm.context.tlb_gen);
266 unsigned long cr3 = __read_cr3();
268 /* Assert that CR3 already references the right mm. */
269 WARN_ON((cr3 & CR3_ADDR_MASK) != __pa(mm->pgd));
272 * Assert that CR4.PCIDE is set if needed. (CR4.PCIDE initialization
273 * doesn't work like other CR4 bits because it can only be set from
276 WARN_ON(boot_cpu_has(X86_FEATURE_PCID) &&
277 !(cr4_read_shadow() & X86_CR4_PCIDE));
279 /* Force ASID 0 and force a TLB flush. */
280 write_cr3(build_cr3(mm, 0));
282 /* Reinitialize tlbstate. */
283 this_cpu_write(cpu_tlbstate.loaded_mm_asid, 0);
284 this_cpu_write(cpu_tlbstate.next_asid, 1);
285 this_cpu_write(cpu_tlbstate.ctxs[0].ctx_id, mm->context.ctx_id);
286 this_cpu_write(cpu_tlbstate.ctxs[0].tlb_gen, tlb_gen);
288 for (i = 1; i < TLB_NR_DYN_ASIDS; i++)
289 this_cpu_write(cpu_tlbstate.ctxs[i].ctx_id, 0);
293 * flush_tlb_func_common()'s memory ordering requirement is that any
294 * TLB fills that happen after we flush the TLB are ordered after we
295 * read active_mm's tlb_gen. We don't need any explicit barriers
296 * because all x86 flush operations are serializing and the
297 * atomic64_read operation won't be reordered by the compiler.
299 static void flush_tlb_func_common(const struct flush_tlb_info *f,
300 bool local, enum tlb_flush_reason reason)
303 * We have three different tlb_gen values in here. They are:
305 * - mm_tlb_gen: the latest generation.
306 * - local_tlb_gen: the generation that this CPU has already caught
308 * - f->new_tlb_gen: the generation that the requester of the flush
309 * wants us to catch up to.
311 struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
312 u32 loaded_mm_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
313 u64 mm_tlb_gen = atomic64_read(&loaded_mm->context.tlb_gen);
314 u64 local_tlb_gen = this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].tlb_gen);
316 /* This code cannot presently handle being reentered. */
317 VM_WARN_ON(!irqs_disabled());
319 if (unlikely(loaded_mm == &init_mm))
322 VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].ctx_id) !=
323 loaded_mm->context.ctx_id);
325 if (this_cpu_read(cpu_tlbstate.is_lazy)) {
327 * We're in lazy mode. We need to at least flush our
328 * paging-structure cache to avoid speculatively reading
329 * garbage into our TLB. Since switching to init_mm is barely
330 * slower than a minimal flush, just switch to init_mm.
332 switch_mm_irqs_off(NULL, &init_mm, NULL);
336 if (unlikely(local_tlb_gen == mm_tlb_gen)) {
338 * There's nothing to do: we're already up to date. This can
339 * happen if two concurrent flushes happen -- the first flush to
340 * be handled can catch us all the way up, leaving no work for
343 trace_tlb_flush(reason, 0);
347 WARN_ON_ONCE(local_tlb_gen > mm_tlb_gen);
348 WARN_ON_ONCE(f->new_tlb_gen > mm_tlb_gen);
351 * If we get to this point, we know that our TLB is out of date.
352 * This does not strictly imply that we need to flush (it's
353 * possible that f->new_tlb_gen <= local_tlb_gen), but we're
354 * going to need to flush in the very near future, so we might
355 * as well get it over with.
357 * The only question is whether to do a full or partial flush.
359 * We do a partial flush if requested and two extra conditions
362 * 1. f->new_tlb_gen == local_tlb_gen + 1. We have an invariant that
363 * we've always done all needed flushes to catch up to
364 * local_tlb_gen. If, for example, local_tlb_gen == 2 and
365 * f->new_tlb_gen == 3, then we know that the flush needed to bring
366 * us up to date for tlb_gen 3 is the partial flush we're
369 * As an example of why this check is needed, suppose that there
370 * are two concurrent flushes. The first is a full flush that
371 * changes context.tlb_gen from 1 to 2. The second is a partial
372 * flush that changes context.tlb_gen from 2 to 3. If they get
373 * processed on this CPU in reverse order, we'll see
374 * local_tlb_gen == 1, mm_tlb_gen == 3, and end != TLB_FLUSH_ALL.
375 * If we were to use __flush_tlb_single() and set local_tlb_gen to
376 * 3, we'd be break the invariant: we'd update local_tlb_gen above
377 * 1 without the full flush that's needed for tlb_gen 2.
379 * 2. f->new_tlb_gen == mm_tlb_gen. This is purely an optimiation.
380 * Partial TLB flushes are not all that much cheaper than full TLB
381 * flushes, so it seems unlikely that it would be a performance win
382 * to do a partial flush if that won't bring our TLB fully up to
383 * date. By doing a full flush instead, we can increase
384 * local_tlb_gen all the way to mm_tlb_gen and we can probably
385 * avoid another flush in the very near future.
387 if (f->end != TLB_FLUSH_ALL &&
388 f->new_tlb_gen == local_tlb_gen + 1 &&
389 f->new_tlb_gen == mm_tlb_gen) {
392 unsigned long nr_pages = (f->end - f->start) >> PAGE_SHIFT;
395 while (addr < f->end) {
396 __flush_tlb_single(addr);
400 count_vm_tlb_events(NR_TLB_LOCAL_FLUSH_ONE, nr_pages);
401 trace_tlb_flush(reason, nr_pages);
406 count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
407 trace_tlb_flush(reason, TLB_FLUSH_ALL);
410 /* Both paths above update our state to mm_tlb_gen. */
411 this_cpu_write(cpu_tlbstate.ctxs[loaded_mm_asid].tlb_gen, mm_tlb_gen);
414 static void flush_tlb_func_local(void *info, enum tlb_flush_reason reason)
416 const struct flush_tlb_info *f = info;
418 flush_tlb_func_common(f, true, reason);
421 static void flush_tlb_func_remote(void *info)
423 const struct flush_tlb_info *f = info;
425 inc_irq_stat(irq_tlb_count);
427 if (f->mm && f->mm != this_cpu_read(cpu_tlbstate.loaded_mm))
430 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
431 flush_tlb_func_common(f, false, TLB_REMOTE_SHOOTDOWN);
434 void native_flush_tlb_others(const struct cpumask *cpumask,
435 const struct flush_tlb_info *info)
437 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
438 if (info->end == TLB_FLUSH_ALL)
439 trace_tlb_flush(TLB_REMOTE_SEND_IPI, TLB_FLUSH_ALL);
441 trace_tlb_flush(TLB_REMOTE_SEND_IPI,
442 (info->end - info->start) >> PAGE_SHIFT);
444 if (is_uv_system()) {
446 * This whole special case is confused. UV has a "Broadcast
447 * Assist Unit", which seems to be a fancy way to send IPIs.
448 * Back when x86 used an explicit TLB flush IPI, UV was
449 * optimized to use its own mechanism. These days, x86 uses
450 * smp_call_function_many(), but UV still uses a manual IPI,
451 * and that IPI's action is out of date -- it does a manual
452 * flush instead of calling flush_tlb_func_remote(). This
453 * means that the percpu tlb_gen variables won't be updated
454 * and we'll do pointless flushes on future context switches.
456 * Rather than hooking native_flush_tlb_others() here, I think
457 * that UV should be updated so that smp_call_function_many(),
458 * etc, are optimal on UV.
462 cpu = smp_processor_id();
463 cpumask = uv_flush_tlb_others(cpumask, info);
465 smp_call_function_many(cpumask, flush_tlb_func_remote,
469 smp_call_function_many(cpumask, flush_tlb_func_remote,
474 * See Documentation/x86/tlb.txt for details. We choose 33
475 * because it is large enough to cover the vast majority (at
476 * least 95%) of allocations, and is small enough that we are
477 * confident it will not cause too much overhead. Each single
478 * flush is about 100 ns, so this caps the maximum overhead at
481 * This is in units of pages.
483 static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
485 void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
486 unsigned long end, unsigned long vmflag)
490 struct flush_tlb_info info = {
496 /* This is also a barrier that synchronizes with switch_mm(). */
497 info.new_tlb_gen = inc_mm_tlb_gen(mm);
499 /* Should we flush just the requested range? */
500 if ((end != TLB_FLUSH_ALL) &&
501 !(vmflag & VM_HUGETLB) &&
502 ((end - start) >> PAGE_SHIFT) <= tlb_single_page_flush_ceiling) {
507 info.end = TLB_FLUSH_ALL;
510 if (mm == this_cpu_read(cpu_tlbstate.loaded_mm)) {
511 VM_WARN_ON(irqs_disabled());
513 flush_tlb_func_local(&info, TLB_LOCAL_MM_SHOOTDOWN);
517 if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids)
518 flush_tlb_others(mm_cpumask(mm), &info);
524 static void do_flush_tlb_all(void *info)
526 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
530 void flush_tlb_all(void)
532 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
533 on_each_cpu(do_flush_tlb_all, NULL, 1);
536 static void do_kernel_range_flush(void *info)
538 struct flush_tlb_info *f = info;
541 /* flush range by one by one 'invlpg' */
542 for (addr = f->start; addr < f->end; addr += PAGE_SIZE)
543 __flush_tlb_single(addr);
546 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
549 /* Balance as user space task's flush, a bit conservative */
550 if (end == TLB_FLUSH_ALL ||
551 (end - start) > tlb_single_page_flush_ceiling << PAGE_SHIFT) {
552 on_each_cpu(do_flush_tlb_all, NULL, 1);
554 struct flush_tlb_info info;
557 on_each_cpu(do_kernel_range_flush, &info, 1);
561 void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
563 struct flush_tlb_info info = {
566 .end = TLB_FLUSH_ALL,
571 if (cpumask_test_cpu(cpu, &batch->cpumask)) {
572 VM_WARN_ON(irqs_disabled());
574 flush_tlb_func_local(&info, TLB_LOCAL_SHOOTDOWN);
578 if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids)
579 flush_tlb_others(&batch->cpumask, &info);
581 cpumask_clear(&batch->cpumask);
586 static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf,
587 size_t count, loff_t *ppos)
592 len = sprintf(buf, "%ld\n", tlb_single_page_flush_ceiling);
593 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
596 static ssize_t tlbflush_write_file(struct file *file,
597 const char __user *user_buf, size_t count, loff_t *ppos)
603 len = min(count, sizeof(buf) - 1);
604 if (copy_from_user(buf, user_buf, len))
608 if (kstrtoint(buf, 0, &ceiling))
614 tlb_single_page_flush_ceiling = ceiling;
618 static const struct file_operations fops_tlbflush = {
619 .read = tlbflush_read_file,
620 .write = tlbflush_write_file,
621 .llseek = default_llseek,
624 static int __init create_tlb_single_page_flush_ceiling(void)
626 debugfs_create_file("tlb_single_page_flush_ceiling", S_IRUSR | S_IWUSR,
627 arch_debugfs_dir, NULL, &fops_tlbflush);
630 late_initcall(create_tlb_single_page_flush_ceiling);