1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/hugetlb.h>
5 #include <asm/pgalloc.h>
6 #include <asm/pgtable.h>
8 #include <asm/fixmap.h>
11 #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK
12 phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
13 EXPORT_SYMBOL(physical_mask);
16 #define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_ZERO)
19 #define PGALLOC_USER_GFP __GFP_HIGHMEM
21 #define PGALLOC_USER_GFP 0
24 gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP;
26 pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
28 return (pte_t *)__get_free_page(PGALLOC_GFP & ~__GFP_ACCOUNT);
31 pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
35 pte = alloc_pages(__userpte_alloc_gfp, 0);
38 if (!pgtable_page_ctor(pte)) {
45 static int __init setup_userpte(char *arg)
51 * "userpte=nohigh" disables allocation of user pagetables in
54 if (strcmp(arg, "nohigh") == 0)
55 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
60 early_param("userpte", setup_userpte);
62 void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
64 pgtable_page_dtor(pte);
65 paravirt_release_pte(page_to_pfn(pte));
66 paravirt_tlb_remove_table(tlb, pte);
69 #if CONFIG_PGTABLE_LEVELS > 2
70 void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
72 struct page *page = virt_to_page(pmd);
73 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
75 * NOTE! For PAE, any changes to the top page-directory-pointer-table
76 * entries need a full cr3 reload to flush.
79 tlb->need_flush_all = 1;
81 pgtable_pmd_page_dtor(page);
82 paravirt_tlb_remove_table(tlb, page);
85 #if CONFIG_PGTABLE_LEVELS > 3
86 void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
88 paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
89 paravirt_tlb_remove_table(tlb, virt_to_page(pud));
92 #if CONFIG_PGTABLE_LEVELS > 4
93 void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d)
95 paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT);
96 paravirt_tlb_remove_table(tlb, virt_to_page(p4d));
98 #endif /* CONFIG_PGTABLE_LEVELS > 4 */
99 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
100 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
102 static inline void pgd_list_add(pgd_t *pgd)
104 struct page *page = virt_to_page(pgd);
106 list_add(&page->lru, &pgd_list);
109 static inline void pgd_list_del(pgd_t *pgd)
111 struct page *page = virt_to_page(pgd);
113 list_del(&page->lru);
116 #define UNSHARED_PTRS_PER_PGD \
117 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
120 static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
122 virt_to_page(pgd)->pt_mm = mm;
125 struct mm_struct *pgd_page_get_mm(struct page *page)
130 static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
132 /* If the pgd points to a shared pagetable level (either the
133 ptes in non-PAE, or shared PMD in PAE), then just copy the
134 references from swapper_pg_dir. */
135 if (CONFIG_PGTABLE_LEVELS == 2 ||
136 (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
137 CONFIG_PGTABLE_LEVELS >= 4) {
138 clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
139 swapper_pg_dir + KERNEL_PGD_BOUNDARY,
143 /* list required to sync kernel mapping updates */
144 if (!SHARED_KERNEL_PMD) {
150 static void pgd_dtor(pgd_t *pgd)
152 if (SHARED_KERNEL_PMD)
155 spin_lock(&pgd_lock);
157 spin_unlock(&pgd_lock);
161 * List of all pgd's needed for non-PAE so it can invalidate entries
162 * in both cached and uncached pgd's; not needed for PAE since the
163 * kernel pmd is shared. If PAE were not to share the pmd a similar
164 * tactic would be needed. This is essentially codepath-based locking
165 * against pageattr.c; it is the unique case in which a valid change
166 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
167 * vmalloc faults work because attached pagetables are never freed.
171 #ifdef CONFIG_X86_PAE
173 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
174 * updating the top-level pagetable entries to guarantee the
175 * processor notices the update. Since this is expensive, and
176 * all 4 top-level entries are used almost immediately in a
177 * new process's life, we just pre-populate them here.
179 * Also, if we're in a paravirt environment where the kernel pmd is
180 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
181 * and initialize the kernel pmds here.
183 #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
186 * We allocate separate PMDs for the kernel part of the user page-table
187 * when PTI is enabled. We need them to map the per-process LDT into the
188 * user-space page-table.
190 #define PREALLOCATED_USER_PMDS (static_cpu_has(X86_FEATURE_PTI) ? \
193 void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
195 paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
197 /* Note: almost everything apart from _PAGE_PRESENT is
198 reserved at the pmd (PDPT) level. */
199 set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
202 * According to Intel App note "TLBs, Paging-Structure Caches,
203 * and Their Invalidation", April 2007, document 317080-001,
204 * section 8.1: in PAE mode we explicitly have to flush the
205 * TLB via cr3 if the top-level pgd is changed...
209 #else /* !CONFIG_X86_PAE */
211 /* No need to prepopulate any pagetable entries in non-PAE modes. */
212 #define PREALLOCATED_PMDS 0
213 #define PREALLOCATED_USER_PMDS 0
214 #endif /* CONFIG_X86_PAE */
216 static void free_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
220 for (i = 0; i < count; i++)
222 pgtable_pmd_page_dtor(virt_to_page(pmds[i]));
223 free_page((unsigned long)pmds[i]);
228 static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[], int count)
232 gfp_t gfp = PGALLOC_GFP;
235 gfp &= ~__GFP_ACCOUNT;
237 for (i = 0; i < count; i++) {
238 pmd_t *pmd = (pmd_t *)__get_free_page(gfp);
241 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
242 free_page((unsigned long)pmd);
252 free_pmds(mm, pmds, count);
260 * Mop up any pmd pages which may still be attached to the pgd.
261 * Normally they will be freed by munmap/exit_mmap, but any pmd we
262 * preallocate which never got a corresponding vma will need to be
265 static void mop_up_one_pmd(struct mm_struct *mm, pgd_t *pgdp)
269 if (pgd_val(pgd) != 0) {
270 pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
272 *pgdp = native_make_pgd(0);
274 paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
280 static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
284 for (i = 0; i < PREALLOCATED_PMDS; i++)
285 mop_up_one_pmd(mm, &pgdp[i]);
287 #ifdef CONFIG_PAGE_TABLE_ISOLATION
289 if (!static_cpu_has(X86_FEATURE_PTI))
292 pgdp = kernel_to_user_pgdp(pgdp);
294 for (i = 0; i < PREALLOCATED_USER_PMDS; i++)
295 mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]);
299 static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
305 if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
308 p4d = p4d_offset(pgd, 0);
309 pud = pud_offset(p4d, 0);
311 for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
312 pmd_t *pmd = pmds[i];
314 if (i >= KERNEL_PGD_BOUNDARY)
315 memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
316 sizeof(pmd_t) * PTRS_PER_PMD);
318 pud_populate(mm, pud, pmd);
322 #ifdef CONFIG_PAGE_TABLE_ISOLATION
323 static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
324 pgd_t *k_pgd, pmd_t *pmds[])
326 pgd_t *s_pgd = kernel_to_user_pgdp(swapper_pg_dir);
327 pgd_t *u_pgd = kernel_to_user_pgdp(k_pgd);
332 u_p4d = p4d_offset(u_pgd, 0);
333 u_pud = pud_offset(u_p4d, 0);
335 s_pgd += KERNEL_PGD_BOUNDARY;
336 u_pud += KERNEL_PGD_BOUNDARY;
338 for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) {
339 pmd_t *pmd = pmds[i];
341 memcpy(pmd, (pmd_t *)pgd_page_vaddr(*s_pgd),
342 sizeof(pmd_t) * PTRS_PER_PMD);
344 pud_populate(mm, u_pud, pmd);
349 static void pgd_prepopulate_user_pmd(struct mm_struct *mm,
350 pgd_t *k_pgd, pmd_t *pmds[])
355 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
356 * assumes that pgd should be in one page.
358 * But kernel with PAE paging that is not running as a Xen domain
359 * only needs to allocate 32 bytes for pgd instead of one page.
361 #ifdef CONFIG_X86_PAE
363 #include <linux/slab.h>
365 #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
368 static struct kmem_cache *pgd_cache;
370 static int __init pgd_cache_init(void)
373 * When PAE kernel is running as a Xen domain, it does not use
374 * shared kernel pmd. And this requires a whole page for pgd.
376 if (!SHARED_KERNEL_PMD)
380 * when PAE kernel is not running as a Xen domain, it uses
381 * shared kernel pmd. Shared kernel pmd does not require a whole
382 * page for pgd. We are able to just allocate a 32-byte for pgd.
383 * During boot time, we create a 32-byte slab for pgd table allocation.
385 pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
389 core_initcall(pgd_cache_init);
391 static inline pgd_t *_pgd_alloc(void)
394 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
395 * We allocate one page for pgd.
397 if (!SHARED_KERNEL_PMD)
398 return (pgd_t *)__get_free_pages(PGALLOC_GFP,
399 PGD_ALLOCATION_ORDER);
402 * Now PAE kernel is not running as a Xen domain. We can allocate
403 * a 32-byte slab for pgd to save memory space.
405 return kmem_cache_alloc(pgd_cache, PGALLOC_GFP);
408 static inline void _pgd_free(pgd_t *pgd)
410 if (!SHARED_KERNEL_PMD)
411 free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
413 kmem_cache_free(pgd_cache, pgd);
417 static inline pgd_t *_pgd_alloc(void)
419 return (pgd_t *)__get_free_pages(PGALLOC_GFP, PGD_ALLOCATION_ORDER);
422 static inline void _pgd_free(pgd_t *pgd)
424 free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
426 #endif /* CONFIG_X86_PAE */
428 pgd_t *pgd_alloc(struct mm_struct *mm)
431 pmd_t *u_pmds[PREALLOCATED_USER_PMDS];
432 pmd_t *pmds[PREALLOCATED_PMDS];
441 if (preallocate_pmds(mm, pmds, PREALLOCATED_PMDS) != 0)
444 if (preallocate_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS) != 0)
447 if (paravirt_pgd_alloc(mm) != 0)
448 goto out_free_user_pmds;
451 * Make sure that pre-populating the pmds is atomic with
452 * respect to anything walking the pgd_list, so that they
453 * never see a partially populated pgd.
455 spin_lock(&pgd_lock);
458 pgd_prepopulate_pmd(mm, pgd, pmds);
459 pgd_prepopulate_user_pmd(mm, pgd, u_pmds);
461 spin_unlock(&pgd_lock);
466 free_pmds(mm, u_pmds, PREALLOCATED_USER_PMDS);
468 free_pmds(mm, pmds, PREALLOCATED_PMDS);
475 void pgd_free(struct mm_struct *mm, pgd_t *pgd)
477 pgd_mop_up_pmds(mm, pgd);
479 paravirt_pgd_free(mm, pgd);
484 * Used to set accessed or dirty bits in the page table entries
485 * on other architectures. On x86, the accessed and dirty bits
486 * are tracked by hardware. However, do_wp_page calls this function
487 * to also make the pte writeable at the same time the dirty bit is
488 * set. In that case we do actually need to write the PTE.
490 int ptep_set_access_flags(struct vm_area_struct *vma,
491 unsigned long address, pte_t *ptep,
492 pte_t entry, int dirty)
494 int changed = !pte_same(*ptep, entry);
496 if (changed && dirty)
502 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
503 int pmdp_set_access_flags(struct vm_area_struct *vma,
504 unsigned long address, pmd_t *pmdp,
505 pmd_t entry, int dirty)
507 int changed = !pmd_same(*pmdp, entry);
509 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
511 if (changed && dirty) {
514 * We had a write-protection fault here and changed the pmd
515 * to to more permissive. No need to flush the TLB for that,
516 * #PF is architecturally guaranteed to do that and in the
517 * worst-case we'll generate a spurious fault.
524 int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
525 pud_t *pudp, pud_t entry, int dirty)
527 int changed = !pud_same(*pudp, entry);
529 VM_BUG_ON(address & ~HPAGE_PUD_MASK);
531 if (changed && dirty) {
534 * We had a write-protection fault here and changed the pud
535 * to to more permissive. No need to flush the TLB for that,
536 * #PF is architecturally guaranteed to do that and in the
537 * worst-case we'll generate a spurious fault.
545 int ptep_test_and_clear_young(struct vm_area_struct *vma,
546 unsigned long addr, pte_t *ptep)
550 if (pte_young(*ptep))
551 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
552 (unsigned long *) &ptep->pte);
557 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
558 int pmdp_test_and_clear_young(struct vm_area_struct *vma,
559 unsigned long addr, pmd_t *pmdp)
563 if (pmd_young(*pmdp))
564 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
565 (unsigned long *)pmdp);
569 int pudp_test_and_clear_young(struct vm_area_struct *vma,
570 unsigned long addr, pud_t *pudp)
574 if (pud_young(*pudp))
575 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
576 (unsigned long *)pudp);
582 int ptep_clear_flush_young(struct vm_area_struct *vma,
583 unsigned long address, pte_t *ptep)
586 * On x86 CPUs, clearing the accessed bit without a TLB flush
587 * doesn't cause data corruption. [ It could cause incorrect
588 * page aging and the (mistaken) reclaim of hot pages, but the
589 * chance of that should be relatively low. ]
591 * So as a performance optimization don't flush the TLB when
592 * clearing the accessed bit, it will eventually be flushed by
593 * a context switch or a VM operation anyway. [ In the rare
594 * event of it not getting flushed for a long time the delay
595 * shouldn't really matter because there's no real memory
596 * pressure for swapout to react to. ]
598 return ptep_test_and_clear_young(vma, address, ptep);
601 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
602 int pmdp_clear_flush_young(struct vm_area_struct *vma,
603 unsigned long address, pmd_t *pmdp)
607 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
609 young = pmdp_test_and_clear_young(vma, address, pmdp);
611 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
618 * reserve_top_address - reserves a hole in the top of kernel address space
619 * @reserve - size of hole to reserve
621 * Can be used to relocate the fixmap area and poke a hole in the top
622 * of kernel address space to make room for a hypervisor.
624 void __init reserve_top_address(unsigned long reserve)
627 BUG_ON(fixmaps_set > 0);
628 __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
629 printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
630 -reserve, __FIXADDR_TOP + PAGE_SIZE);
636 void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
638 unsigned long address = __fix_to_virt(idx);
640 if (idx >= __end_of_fixed_addresses) {
644 set_pte_vaddr(address, pte);
648 void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
651 /* Sanitize 'prot' against any unsupported bits: */
652 pgprot_val(flags) &= __default_kernel_pte_mask;
654 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
657 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
658 #ifdef CONFIG_X86_5LEVEL
660 * p4d_set_huge - setup kernel P4D mapping
662 * No 512GB pages yet -- always return 0
664 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
670 * p4d_clear_huge - clear kernel P4D mapping when it is set
672 * No 512GB pages yet -- always return 0
674 int p4d_clear_huge(p4d_t *p4d)
681 * pud_set_huge - setup kernel PUD mapping
683 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
684 * function sets up a huge page only if any of the following conditions are met:
686 * - MTRRs are disabled, or
688 * - MTRRs are enabled and the range is completely covered by a single MTRR, or
690 * - MTRRs are enabled and the corresponding MTRR memory type is WB, which
691 * has no effect on the requested PAT memory type.
693 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
694 * page mapping attempt fails.
696 * Returns 1 on success and 0 on failure.
698 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
702 mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);
703 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
704 (mtrr != MTRR_TYPE_WRBACK))
707 /* Bail out if we are we on a populated non-leaf entry: */
708 if (pud_present(*pud) && !pud_huge(*pud))
711 prot = pgprot_4k_2_large(prot);
713 set_pte((pte_t *)pud, pfn_pte(
714 (u64)addr >> PAGE_SHIFT,
715 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
721 * pmd_set_huge - setup kernel PMD mapping
723 * See text over pud_set_huge() above.
725 * Returns 1 on success and 0 on failure.
727 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
731 mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform);
732 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
733 (mtrr != MTRR_TYPE_WRBACK)) {
734 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
735 __func__, addr, addr + PMD_SIZE);
739 /* Bail out if we are we on a populated non-leaf entry: */
740 if (pmd_present(*pmd) && !pmd_huge(*pmd))
743 prot = pgprot_4k_2_large(prot);
745 set_pte((pte_t *)pmd, pfn_pte(
746 (u64)addr >> PAGE_SHIFT,
747 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
753 * pud_clear_huge - clear kernel PUD mapping when it is set
755 * Returns 1 on success and 0 on failure (no PUD map is found).
757 int pud_clear_huge(pud_t *pud)
759 if (pud_large(*pud)) {
768 * pmd_clear_huge - clear kernel PMD mapping when it is set
770 * Returns 1 on success and 0 on failure (no PMD map is found).
772 int pmd_clear_huge(pmd_t *pmd)
774 if (pmd_large(*pmd)) {
784 * pud_free_pmd_page - Clear pud entry and free pmd page.
785 * @pud: Pointer to a PUD.
786 * @addr: Virtual address associated with pud.
788 * Context: The pud range has been unmapped and TLB purged.
789 * Return: 1 if clearing the entry succeeded. 0 otherwise.
791 * NOTE: Callers must allow a single page allocation.
793 int pud_free_pmd_page(pud_t *pud, unsigned long addr)
802 pmd = (pmd_t *)pud_page_vaddr(*pud);
803 pmd_sv = (pmd_t *)__get_free_page(GFP_KERNEL);
807 for (i = 0; i < PTRS_PER_PMD; i++) {
809 if (!pmd_none(pmd[i]))
815 /* INVLPG to clear all paging-structure caches */
816 flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
818 for (i = 0; i < PTRS_PER_PMD; i++) {
819 if (!pmd_none(pmd_sv[i])) {
820 pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]);
821 free_page((unsigned long)pte);
825 free_page((unsigned long)pmd_sv);
826 free_page((unsigned long)pmd);
832 * pmd_free_pte_page - Clear pmd entry and free pte page.
833 * @pmd: Pointer to a PMD.
834 * @addr: Virtual address associated with pmd.
836 * Context: The pmd range has been unmapped and TLB purged.
837 * Return: 1 if clearing the entry succeeded. 0 otherwise.
839 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
846 pte = (pte_t *)pmd_page_vaddr(*pmd);
849 /* INVLPG to clear all paging-structure caches */
850 flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);
852 free_page((unsigned long)pte);
857 #else /* !CONFIG_X86_64 */
859 int pud_free_pmd_page(pud_t *pud, unsigned long addr)
861 return pud_none(*pud);
865 * Disable free page handling on x86-PAE. This assures that ioremap()
866 * does not update sync'd pmd entries. See vmalloc_sync_one().
868 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
870 return pmd_none(*pmd);
873 #endif /* CONFIG_X86_64 */
874 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */