1 #include <linux/extable.h>
2 #include <linux/uaccess.h>
3 #include <linux/sched/debug.h>
5 #include <asm/fpu/internal.h>
7 #include <asm/kdebug.h>
9 typedef bool (*ex_handler_t)(const struct exception_table_entry *,
10 struct pt_regs *, int);
12 static inline unsigned long
13 ex_fixup_addr(const struct exception_table_entry *x)
15 return (unsigned long)&x->fixup + x->fixup;
17 static inline ex_handler_t
18 ex_fixup_handler(const struct exception_table_entry *x)
20 return (ex_handler_t)((unsigned long)&x->handler + x->handler);
23 bool ex_handler_default(const struct exception_table_entry *fixup,
24 struct pt_regs *regs, int trapnr)
26 regs->ip = ex_fixup_addr(fixup);
29 EXPORT_SYMBOL(ex_handler_default);
31 bool ex_handler_fault(const struct exception_table_entry *fixup,
32 struct pt_regs *regs, int trapnr)
34 regs->ip = ex_fixup_addr(fixup);
38 EXPORT_SYMBOL_GPL(ex_handler_fault);
41 * Handler for UD0 exception following a failed test against the
42 * result of a refcount inc/dec/add/sub.
44 bool ex_handler_refcount(const struct exception_table_entry *fixup,
45 struct pt_regs *regs, int trapnr)
47 /* First unconditionally saturate the refcount. */
48 *(int *)regs->cx = INT_MIN / 2;
51 * Strictly speaking, this reports the fixup destination, not
52 * the fault location, and not the actually overflowing
53 * instruction, which is the instruction before the "js", but
54 * since that instruction could be a variety of lengths, just
55 * report the location after the overflow, which should be close
56 * enough for finding the overflow, as it's at least back in
57 * the function, having returned from .text.unlikely.
59 regs->ip = ex_fixup_addr(fixup);
62 * This function has been called because either a negative refcount
63 * value was seen by any of the refcount functions, or a zero
64 * refcount value was seen by refcount_dec().
66 * If we crossed from INT_MAX to INT_MIN, OF (Overflow Flag: result
67 * wrapped around) will be set. Additionally, seeing the refcount
68 * reach 0 will set ZF (Zero Flag: result was zero). In each of
69 * these cases we want a report, since it's a boundary condition.
72 if (regs->flags & (X86_EFLAGS_OF | X86_EFLAGS_ZF)) {
73 bool zero = regs->flags & X86_EFLAGS_ZF;
75 refcount_error_report(regs, zero ? "hit zero" : "overflow");
80 EXPORT_SYMBOL_GPL(ex_handler_refcount);
83 * Handler for when we fail to restore a task's FPU state. We should never get
84 * here because the FPU state of a task using the FPU (task->thread.fpu.state)
85 * should always be valid. However, past bugs have allowed userspace to set
86 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
87 * These caused XRSTOR to fail when switching to the task, leaking the FPU
88 * registers of the task previously executing on the CPU. Mitigate this class
89 * of vulnerability by restoring from the initial state (essentially, zeroing
90 * out all the FPU registers) if we can't restore from the task's FPU state.
92 bool ex_handler_fprestore(const struct exception_table_entry *fixup,
93 struct pt_regs *regs, int trapnr)
95 regs->ip = ex_fixup_addr(fixup);
97 WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
98 (void *)instruction_pointer(regs));
100 __copy_kernel_to_fpregs(&init_fpstate, -1);
103 EXPORT_SYMBOL_GPL(ex_handler_fprestore);
105 bool ex_handler_ext(const struct exception_table_entry *fixup,
106 struct pt_regs *regs, int trapnr)
108 /* Special hack for uaccess_err */
109 current->thread.uaccess_err = 1;
110 regs->ip = ex_fixup_addr(fixup);
113 EXPORT_SYMBOL(ex_handler_ext);
115 bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup,
116 struct pt_regs *regs, int trapnr)
118 if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n",
119 (unsigned int)regs->cx, regs->ip, (void *)regs->ip))
120 show_stack_regs(regs);
122 /* Pretend that the read succeeded and returned 0. */
123 regs->ip = ex_fixup_addr(fixup);
128 EXPORT_SYMBOL(ex_handler_rdmsr_unsafe);
130 bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup,
131 struct pt_regs *regs, int trapnr)
133 if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n",
134 (unsigned int)regs->cx, (unsigned int)regs->dx,
135 (unsigned int)regs->ax, regs->ip, (void *)regs->ip))
136 show_stack_regs(regs);
138 /* Pretend that the write succeeded. */
139 regs->ip = ex_fixup_addr(fixup);
142 EXPORT_SYMBOL(ex_handler_wrmsr_unsafe);
144 bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
145 struct pt_regs *regs, int trapnr)
147 if (static_cpu_has(X86_BUG_NULL_SEG))
148 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
149 asm volatile ("mov %0, %%fs" : : "rm" (0));
150 return ex_handler_default(fixup, regs, trapnr);
152 EXPORT_SYMBOL(ex_handler_clear_fs);
154 bool ex_has_fault_handler(unsigned long ip)
156 const struct exception_table_entry *e;
157 ex_handler_t handler;
159 e = search_exception_tables(ip);
162 handler = ex_fixup_handler(e);
164 return handler == ex_handler_fault;
167 int fixup_exception(struct pt_regs *regs, int trapnr)
169 const struct exception_table_entry *e;
170 ex_handler_t handler;
172 #ifdef CONFIG_PNPBIOS
173 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
174 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
175 extern u32 pnp_bios_is_utter_crap;
176 pnp_bios_is_utter_crap = 1;
177 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
181 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
182 panic("do_trap: can't hit this");
186 e = search_exception_tables(regs->ip);
190 handler = ex_fixup_handler(e);
191 return handler(e, regs, trapnr);
194 extern unsigned int early_recursion_flag;
196 /* Restricted version used during very early boot */
197 void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
199 /* Ignore early NMIs. */
200 if (trapnr == X86_TRAP_NMI)
203 if (early_recursion_flag > 2)
207 * Old CPUs leave the high bits of CS on the stack
208 * undefined. I'm not sure which CPUs do this, but at least
209 * the 486 DX works this way.
211 if (regs->cs != __KERNEL_CS)
215 * The full exception fixup machinery is available as soon as
216 * the early IDT is loaded. This means that it is the
217 * responsibility of extable users to either function correctly
218 * when handlers are invoked early or to simply avoid causing
219 * exceptions before they're ready to handle them.
221 * This is better than filtering which handlers can be used,
222 * because refusing to call a handler here is guaranteed to
223 * result in a hard-to-debug panic.
225 * Keep in mind that not all vectors actually get here. Early
226 * fage faults, for example, are special.
228 if (fixup_exception(regs, trapnr))
231 if (fixup_bug(regs, trapnr))
235 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
236 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
237 regs->orig_ax, read_cr2());