1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
5 #include <linux/kvm_host.h>
6 #include <asm/pvclock.h>
7 #include "kvm_cache_regs.h"
8 #include "kvm_emulate.h"
10 #define KVM_DEFAULT_PLE_GAP 128
11 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096
12 #define KVM_DEFAULT_PLE_WINDOW_GROW 2
13 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0
14 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX
15 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX
16 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000
18 static inline unsigned int __grow_ple_window(unsigned int val,
19 unsigned int base, unsigned int modifier, unsigned int max)
31 return min(ret, (u64)max);
34 static inline unsigned int __shrink_ple_window(unsigned int val,
35 unsigned int base, unsigned int modifier, unsigned int min)
48 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
50 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
52 vcpu->arch.exception.pending = false;
53 vcpu->arch.exception.injected = false;
56 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
59 vcpu->arch.interrupt.injected = true;
60 vcpu->arch.interrupt.soft = soft;
61 vcpu->arch.interrupt.nr = vector;
64 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
66 vcpu->arch.interrupt.injected = false;
69 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
71 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
72 vcpu->arch.nmi_injected;
75 static inline bool kvm_exception_is_soft(unsigned int nr)
77 return (nr == BP_VECTOR) || (nr == OF_VECTOR);
80 static inline bool is_protmode(struct kvm_vcpu *vcpu)
82 return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
85 static inline int is_long_mode(struct kvm_vcpu *vcpu)
88 return vcpu->arch.efer & EFER_LMA;
94 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
98 if (!is_long_mode(vcpu))
100 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
104 static inline bool is_la57_mode(struct kvm_vcpu *vcpu)
107 return (vcpu->arch.efer & EFER_LMA) &&
108 kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
114 static inline bool x86_exception_has_error_code(unsigned int vector)
116 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
117 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
118 BIT(PF_VECTOR) | BIT(AC_VECTOR);
120 return (1U << vector) & exception_has_error_code;
123 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
125 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
128 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
130 ++vcpu->stat.tlb_flush;
131 kvm_x86_ops.tlb_flush_current(vcpu);
134 static inline int is_pae(struct kvm_vcpu *vcpu)
136 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
139 static inline int is_pse(struct kvm_vcpu *vcpu)
141 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
144 static inline int is_paging(struct kvm_vcpu *vcpu)
146 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
149 static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
151 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
154 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
156 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
159 static inline u64 get_canonical(u64 la, u8 vaddr_bits)
161 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits);
164 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
166 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la;
169 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
170 gva_t gva, gfn_t gfn, unsigned access)
172 u64 gen = kvm_memslots(vcpu->kvm)->generation;
174 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
178 * If this is a shadow nested page table, the "GVA" is
181 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
182 vcpu->arch.mmio_access = access;
183 vcpu->arch.mmio_gfn = gfn;
184 vcpu->arch.mmio_gen = gen;
187 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
189 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
193 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
194 * clear all mmio cache info.
196 #define MMIO_GVA_ANY (~(gva_t)0)
198 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
200 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
203 vcpu->arch.mmio_gva = 0;
206 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
208 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
209 vcpu->arch.mmio_gva == (gva & PAGE_MASK))
215 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
217 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
218 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
224 static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu, int reg)
226 unsigned long val = kvm_register_read(vcpu, reg);
228 return is_64_bit_mode(vcpu) ? val : (u32)val;
231 static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
232 int reg, unsigned long val)
234 if (!is_64_bit_mode(vcpu))
236 return kvm_register_write(vcpu, reg, val);
239 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
241 return !(kvm->arch.disabled_quirks & quirk);
244 static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu)
246 return is_smm(vcpu) || kvm_x86_ops.apic_init_signal_blocked(vcpu);
249 void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
250 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
252 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
253 u64 get_kvmclock_ns(struct kvm *kvm);
255 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
256 gva_t addr, void *val, unsigned int bytes,
257 struct x86_exception *exception);
259 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
260 gva_t addr, void *val, unsigned int bytes,
261 struct x86_exception *exception);
263 int handle_ud(struct kvm_vcpu *vcpu);
265 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
267 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
268 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
269 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
270 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
271 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
272 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
274 bool kvm_vector_hashing_enabled(void);
275 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code);
276 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
277 int emulation_type, void *insn, int insn_len);
278 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu);
280 extern u64 host_xcr0;
281 extern u64 supported_xcr0;
282 extern u64 supported_xss;
284 static inline bool kvm_mpx_supported(void)
286 return (supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
287 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
290 extern unsigned int min_timer_period_us;
292 extern bool enable_vmware_backdoor;
294 extern int pi_inject_timer;
296 extern struct static_key kvm_no_apic_vcpu;
298 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
300 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
301 vcpu->arch.virtual_tsc_shift);
304 /* Same "calling convention" as do_div:
305 * - divide (n << 32) by base
309 #define do_shl32_div32(n, base) \
312 asm("divl %2" : "=a" (__quot), "=d" (__rem) \
313 : "rm" (base), "0" (0), "1" ((u32) n)); \
318 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
320 return kvm->arch.mwait_in_guest;
323 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
325 return kvm->arch.hlt_in_guest;
328 static inline bool kvm_pause_in_guest(struct kvm *kvm)
330 return kvm->arch.pause_in_guest;
333 static inline bool kvm_cstate_in_guest(struct kvm *kvm)
335 return kvm->arch.cstate_in_guest;
338 DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu);
340 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu)
342 __this_cpu_write(current_vcpu, vcpu);
345 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
347 __this_cpu_write(current_vcpu, NULL);
351 static inline bool kvm_pat_valid(u64 data)
353 if (data & 0xF8F8F8F8F8F8F8F8ull)
355 /* 0, 1, 4, 5, 6, 7 are valid values. */
356 return (data | ((data & 0x0202020202020202ull) << 1)) == data;
359 static inline bool kvm_dr7_valid(u64 data)
361 /* Bits [63:32] are reserved */
362 return !(data >> 32);
364 static inline bool kvm_dr6_valid(u64 data)
366 /* Bits [63:32] are reserved */
367 return !(data >> 32);
370 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
371 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
372 int kvm_spec_ctrl_test_value(u64 value);
373 int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
374 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu);
376 #define KVM_MSR_RET_INVALID 2
378 #define __cr4_reserved_bits(__cpu_has, __c) \
380 u64 __reserved_bits = CR4_RESERVED_BITS; \
382 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \
383 __reserved_bits |= X86_CR4_OSXSAVE; \
384 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \
385 __reserved_bits |= X86_CR4_SMEP; \
386 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \
387 __reserved_bits |= X86_CR4_SMAP; \
388 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \
389 __reserved_bits |= X86_CR4_FSGSBASE; \
390 if (!__cpu_has(__c, X86_FEATURE_PKU)) \
391 __reserved_bits |= X86_CR4_PKE; \
392 if (!__cpu_has(__c, X86_FEATURE_LA57)) \
393 __reserved_bits |= X86_CR4_LA57; \
394 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \
395 __reserved_bits |= X86_CR4_UMIP; \
396 if (!__cpu_has(__c, X86_FEATURE_VMX)) \
397 __reserved_bits |= X86_CR4_VMXE; \