arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs {
 188         struct user_return_notifier urn;
 189         bool registered;
 190         struct kvm_user_return_msr_values {
 191                 u64 host;
 192                 u64 curr;
 193         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 194 };
 195
 196 u32 __read_mostly kvm_nr_uret_msrs;
 197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 198 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 199 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 200
 201 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 202                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 203                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 204                                 | XFEATURE_MASK_PKRU)
 205
 206 u64 __read_mostly host_efer;
 207 EXPORT_SYMBOL_GPL(host_efer);
 208
 209 bool __read_mostly allow_smaller_maxphyaddr = 0;
 210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 211
 212 u64 __read_mostly host_xss;
 213 EXPORT_SYMBOL_GPL(host_xss);
 214 u64 __read_mostly supported_xss;
 215 EXPORT_SYMBOL_GPL(supported_xss);
 216
 217 struct kvm_stats_debugfs_item debugfs_entries[] = {
 218         VCPU_STAT("pf_fixed", pf_fixed),
 219         VCPU_STAT("pf_guest", pf_guest),
 220         VCPU_STAT("tlb_flush", tlb_flush),
 221         VCPU_STAT("invlpg", invlpg),
 222         VCPU_STAT("exits", exits),
 223         VCPU_STAT("io_exits", io_exits),
 224         VCPU_STAT("mmio_exits", mmio_exits),
 225         VCPU_STAT("signal_exits", signal_exits),
 226         VCPU_STAT("irq_window", irq_window_exits),
 227         VCPU_STAT("nmi_window", nmi_window_exits),
 228         VCPU_STAT("halt_exits", halt_exits),
 229         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 230         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 231         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 232         VCPU_STAT("halt_wakeup", halt_wakeup),
 233         VCPU_STAT("hypercalls", hypercalls),
 234         VCPU_STAT("request_irq", request_irq_exits),
 235         VCPU_STAT("irq_exits", irq_exits),
 236         VCPU_STAT("host_state_reload", host_state_reload),
 237         VCPU_STAT("fpu_reload", fpu_reload),
 238         VCPU_STAT("insn_emulation", insn_emulation),
 239         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 240         VCPU_STAT("irq_injections", irq_injections),
 241         VCPU_STAT("nmi_injections", nmi_injections),
 242         VCPU_STAT("req_event", req_event),
 243         VCPU_STAT("l1d_flush", l1d_flush),
 244         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 245         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 246         VCPU_STAT("nested_run", nested_run),
 247         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 248         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 249         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 250         VM_STAT("mmu_pte_write", mmu_pte_write),
 251         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 252         VM_STAT("mmu_flooded", mmu_flooded),
 253         VM_STAT("mmu_recycled", mmu_recycled),
 254         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 255         VM_STAT("mmu_unsync", mmu_unsync),
 256         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 257         VM_STAT("largepages", lpages, .mode = 0444),
 258         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 259         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 260         { NULL }
 261 };
 262
 263 u64 __read_mostly host_xcr0;
 264 u64 __read_mostly supported_xcr0;
 265 EXPORT_SYMBOL_GPL(supported_xcr0);
 266
 267 static struct kmem_cache *x86_fpu_cache;
 268
 269 static struct kmem_cache *x86_emulator_cache;
 270
 271 /*
 272  * When called, it means the previous get/set msr reached an invalid msr.
 273  * Return true if we want to ignore/silent this failed msr access.
 274  */
 275 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 static int kvm_probe_user_return_msr(u32 msr)
 340 {
 341         u64 val;
 342         int ret;
 343
 344         preempt_disable();
 345         ret = rdmsrl_safe(msr, &val);
 346         if (ret)
 347                 goto out;
 348         ret = wrmsrl_safe(msr, val);
 349 out:
 350         preempt_enable();
 351         return ret;
 352 }
 353
 354 int kvm_add_user_return_msr(u32 msr)
 355 {
 356         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 357
 358         if (kvm_probe_user_return_msr(msr))
 359                 return -1;
 360
 361         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 362         return kvm_nr_uret_msrs++;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 365
 366 int kvm_find_user_return_msr(u32 msr)
 367 {
 368         int i;
 369
 370         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 371                 if (kvm_uret_msrs_list[i] == msr)
 372                         return i;
 373         }
 374         return -1;
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 377
 378 static void kvm_user_return_msr_cpu_online(void)
 379 {
 380         unsigned int cpu = smp_processor_id();
 381         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 382         u64 value;
 383         int i;
 384
 385         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 386                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 387                 msrs->values[i].host = value;
 388                 msrs->values[i].curr = value;
 389         }
 390 }
 391
 392 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 393 {
 394         unsigned int cpu = smp_processor_id();
 395         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 396         int err;
 397
 398         value = (value & mask) | (msrs->values[slot].host & ~mask);
 399         if (value == msrs->values[slot].curr)
 400                 return 0;
 401         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 402         if (err)
 403                 return 1;
 404
 405         msrs->values[slot].curr = value;
 406         if (!msrs->registered) {
 407                 msrs->urn.on_user_return = kvm_on_user_return;
 408                 user_return_notifier_register(&msrs->urn);
 409                 msrs->registered = true;
 410         }
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 414
 415 static void drop_user_return_notifiers(void)
 416 {
 417         unsigned int cpu = smp_processor_id();
 418         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 419
 420         if (msrs->registered)
 421                 kvm_on_user_return(&msrs->urn);
 422 }
 423
 424 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 425 {
 426         return vcpu->arch.apic_base;
 427 }
 428 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 429
 430 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 431 {
 432         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 435
 436 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 437 {
 438         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 439         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 440         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 441                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 442
 443         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 444                 return 1;
 445         if (!msr_info->host_initiated) {
 446                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 447                         return 1;
 448                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 449                         return 1;
 450         }
 451
 452         kvm_lapic_set_base(vcpu, msr_info->data);
 453         kvm_recalculate_apic_map(vcpu->kvm);
 454         return 0;
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 457
 458 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 459 {
 460         /* Fault while not rebooting.  We want the trace. */
 461         BUG_ON(!kvm_rebooting);
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 464
 465 #define EXCPT_BENIGN            0
 466 #define EXCPT_CONTRIBUTORY      1
 467 #define EXCPT_PF                2
 468
 469 static int exception_class(int vector)
 470 {
 471         switch (vector) {
 472         case PF_VECTOR:
 473                 return EXCPT_PF;
 474         case DE_VECTOR:
 475         case TS_VECTOR:
 476         case NP_VECTOR:
 477         case SS_VECTOR:
 478         case GP_VECTOR:
 479                 return EXCPT_CONTRIBUTORY;
 480         default:
 481                 break;
 482         }
 483         return EXCPT_BENIGN;
 484 }
 485
 486 #define EXCPT_FAULT             0
 487 #define EXCPT_TRAP              1
 488 #define EXCPT_ABORT             2
 489 #define EXCPT_INTERRUPT         3
 490
 491 static int exception_type(int vector)
 492 {
 493         unsigned int mask;
 494
 495         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 496                 return EXCPT_INTERRUPT;
 497
 498         mask = 1 << vector;
 499
 500         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 501         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 502                 return EXCPT_TRAP;
 503
 504         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 505                 return EXCPT_ABORT;
 506
 507         /* Reserved exceptions will result in fault */
 508         return EXCPT_FAULT;
 509 }
 510
 511 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 512 {
 513         unsigned nr = vcpu->arch.exception.nr;
 514         bool has_payload = vcpu->arch.exception.has_payload;
 515         unsigned long payload = vcpu->arch.exception.payload;
 516
 517         if (!has_payload)
 518                 return;
 519
 520         switch (nr) {
 521         case DB_VECTOR:
 522                 /*
 523                  * "Certain debug exceptions may clear bit 0-3.  The
 524                  * remaining contents of the DR6 register are never
 525                  * cleared by the processor".
 526                  */
 527                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 528                 /*
 529                  * In order to reflect the #DB exception payload in guest
 530                  * dr6, three components need to be considered: active low
 531                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 532                  * DR6_BS and DR6_BT)
 533                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 534                  * In the target guest dr6:
 535                  * FIXED_1 bits should always be set.
 536                  * Active low bits should be cleared if 1-setting in payload.
 537                  * Active high bits should be set if 1-setting in payload.
 538                  *
 539                  * Note, the payload is compatible with the pending debug
 540                  * exceptions/exit qualification under VMX, that active_low bits
 541                  * are active high in payload.
 542                  * So they need to be flipped for DR6.
 543                  */
 544                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 545                 vcpu->arch.dr6 |= payload;
 546                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 547
 548                 /*
 549                  * The #DB payload is defined as compatible with the 'pending
 550                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 551                  * defined in the 'pending debug exceptions' field (enabled
 552                  * breakpoint), it is reserved and must be zero in DR6.
 553                  */
 554                 vcpu->arch.dr6 &= ~BIT(12);
 555                 break;
 556         case PF_VECTOR:
 557                 vcpu->arch.cr2 = payload;
 558                 break;
 559         }
 560
 561         vcpu->arch.exception.has_payload = false;
 562         vcpu->arch.exception.payload = 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 565
 566 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 567                 unsigned nr, bool has_error, u32 error_code,
 568                 bool has_payload, unsigned long payload, bool reinject)
 569 {
 570         u32 prev_nr;
 571         int class1, class2;
 572
 573         kvm_make_request(KVM_REQ_EVENT, vcpu);
 574
 575         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 576         queue:
 577                 if (reinject) {
 578                         /*
 579                          * On vmentry, vcpu->arch.exception.pending is only
 580                          * true if an event injection was blocked by
 581                          * nested_run_pending.  In that case, however,
 582                          * vcpu_enter_guest requests an immediate exit,
 583                          * and the guest shouldn't proceed far enough to
 584                          * need reinjection.
 585                          */
 586                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 587                         vcpu->arch.exception.injected = true;
 588                         if (WARN_ON_ONCE(has_payload)) {
 589                                 /*
 590                                  * A reinjected event has already
 591                                  * delivered its payload.
 592                                  */
 593                                 has_payload = false;
 594                                 payload = 0;
 595                         }
 596                 } else {
 597                         vcpu->arch.exception.pending = true;
 598                         vcpu->arch.exception.injected = false;
 599                 }
 600                 vcpu->arch.exception.has_error_code = has_error;
 601                 vcpu->arch.exception.nr = nr;
 602                 vcpu->arch.exception.error_code = error_code;
 603                 vcpu->arch.exception.has_payload = has_payload;
 604                 vcpu->arch.exception.payload = payload;
 605                 if (!is_guest_mode(vcpu))
 606                         kvm_deliver_exception_payload(vcpu);
 607                 return;
 608         }
 609
 610         /* to check exception */
 611         prev_nr = vcpu->arch.exception.nr;
 612         if (prev_nr == DF_VECTOR) {
 613                 /* triple fault -> shutdown */
 614                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 615                 return;
 616         }
 617         class1 = exception_class(prev_nr);
 618         class2 = exception_class(nr);
 619         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 620                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 621                 /*
 622                  * Generate double fault per SDM Table 5-5.  Set
 623                  * exception.pending = true so that the double fault
 624                  * can trigger a nested vmexit.
 625                  */
 626                 vcpu->arch.exception.pending = true;
 627                 vcpu->arch.exception.injected = false;
 628                 vcpu->arch.exception.has_error_code = true;
 629                 vcpu->arch.exception.nr = DF_VECTOR;
 630                 vcpu->arch.exception.error_code = 0;
 631                 vcpu->arch.exception.has_payload = false;
 632                 vcpu->arch.exception.payload = 0;
 633         } else
 634                 /* replace previous exception with a new one in a hope
 635                    that instruction re-execution will regenerate lost
 636                    exception */
 637                 goto queue;
 638 }
 639
 640 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 641 {
 642         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 645
 646 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 647 {
 648         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 651
 652 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 653                            unsigned long payload)
 654 {
 655         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 658
 659 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 660                                     u32 error_code, unsigned long payload)
 661 {
 662         kvm_multiple_exception(vcpu, nr, true, error_code,
 663                                true, payload, false);
 664 }
 665
 666 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 667 {
 668         if (err)
 669                 kvm_inject_gp(vcpu, 0);
 670         else
 671                 return kvm_skip_emulated_instruction(vcpu);
 672
 673         return 1;
 674 }
 675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 676
 677 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 678 {
 679         ++vcpu->stat.pf_guest;
 680         vcpu->arch.exception.nested_apf =
 681                 is_guest_mode(vcpu) && fault->async_page_fault;
 682         if (vcpu->arch.exception.nested_apf) {
 683                 vcpu->arch.apf.nested_apf_token = fault->address;
 684                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 685         } else {
 686                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 687                                         fault->address);
 688         }
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 691
 692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 693                                     struct x86_exception *fault)
 694 {
 695         struct kvm_mmu *fault_mmu;
 696         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 697
 698         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 699                                                vcpu->arch.walk_mmu;
 700
 701         /*
 702          * Invalidate the TLB entry for the faulting address, if it exists,
 703          * else the access will fault indefinitely (and to emulate hardware).
 704          */
 705         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 706             !(fault->error_code & PFERR_RSVD_MASK))
 707                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 708                                        fault_mmu->root_hpa);
 709
 710         fault_mmu->inject_page_fault(vcpu, fault);
 711         return fault->nested_page_fault;
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 714
 715 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 716 {
 717         atomic_inc(&vcpu->arch.nmi_queued);
 718         kvm_make_request(KVM_REQ_NMI, vcpu);
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 721
 722 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 723 {
 724         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 727
 728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 729 {
 730         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 733
 734 /*
 735  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 736  * a #GP and return false.
 737  */
 738 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 739 {
 740         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 741                 return true;
 742         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 743         return false;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 746
 747 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 748 {
 749         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                 return true;
 751
 752         kvm_queue_exception(vcpu, UD_VECTOR);
 753         return false;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_require_dr);
 756
 757 /*
 758  * This function will be used to read from the physical memory of the currently
 759  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 760  * can read from guest physical or from the guest's guest physical memory.
 761  */
 762 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 763                             gfn_t ngfn, void *data, int offset, int len,
 764                             u32 access)
 765 {
 766         struct x86_exception exception;
 767         gfn_t real_gfn;
 768         gpa_t ngpa;
 769
 770         ngpa     = gfn_to_gpa(ngfn);
 771         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 772         if (real_gfn == UNMAPPED_GVA)
 773                 return -EFAULT;
 774
 775         real_gfn = gpa_to_gfn(real_gfn);
 776
 777         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 780
 781 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 782                                void *data, int offset, int len, u32 access)
 783 {
 784         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 785                                        data, offset, len, access);
 786 }
 787
 788 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 789 {
 790         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 791 }
 792
 793 /*
 794  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 795  */
 796 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 797 {
 798         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 799         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 800         int i;
 801         int ret;
 802         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 803
 804         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 805                                       offset * sizeof(u64), sizeof(pdpte),
 806                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 807         if (ret < 0) {
 808                 ret = 0;
 809                 goto out;
 810         }
 811         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 812                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 813                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 814                         ret = 0;
 815                         goto out;
 816                 }
 817         }
 818         ret = 1;
 819
 820         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 821         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 822
 823 out:
 824
 825         return ret;
 826 }
 827 EXPORT_SYMBOL_GPL(load_pdptrs);
 828
 829 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 830 {
 831         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 832         int offset;
 833         gfn_t gfn;
 834         int r;
 835
 836         if (!is_pae_paging(vcpu))
 837                 return false;
 838
 839         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 840                 return true;
 841
 842         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 843         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 844         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 845                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 846         if (r < 0)
 847                 return true;
 848
 849         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 850 }
 851 EXPORT_SYMBOL_GPL(pdptrs_changed);
 852
 853 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 854 {
 855         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 856
 857         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 858                 kvm_clear_async_pf_completion_queue(vcpu);
 859                 kvm_async_pf_hash_reset(vcpu);
 860         }
 861
 862         if ((cr0 ^ old_cr0) & update_bits)
 863                 kvm_mmu_reset_context(vcpu);
 864
 865         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 866             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 867             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 868                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 871
 872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 873 {
 874         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 875         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 876
 877         cr0 |= X86_CR0_ET;
 878
 879 #ifdef CONFIG_X86_64
 880         if (cr0 & 0xffffffff00000000UL)
 881                 return 1;
 882 #endif
 883
 884         cr0 &= ~CR0_RESERVED_BITS;
 885
 886         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 887                 return 1;
 888
 889         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 890                 return 1;
 891
 892 #ifdef CONFIG_X86_64
 893         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 894             (cr0 & X86_CR0_PG)) {
 895                 int cs_db, cs_l;
 896
 897                 if (!is_pae(vcpu))
 898                         return 1;
 899                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 900                 if (cs_l)
 901                         return 1;
 902         }
 903 #endif
 904         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 905             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 906             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 910                 return 1;
 911
 912         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 913
 914         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 915
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 919
 920 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 921 {
 922         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_lmsw);
 925
 926 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 927 {
 928         if (vcpu->arch.guest_state_protected)
 929                 return;
 930
 931         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 932
 933                 if (vcpu->arch.xcr0 != host_xcr0)
 934                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 935
 936                 if (vcpu->arch.xsaves_enabled &&
 937                     vcpu->arch.ia32_xss != host_xss)
 938                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 939         }
 940
 941         if (static_cpu_has(X86_FEATURE_PKU) &&
 942             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 943              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 944             vcpu->arch.pkru != vcpu->arch.host_pkru)
 945                 __write_pkru(vcpu->arch.pkru);
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 948
 949 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 950 {
 951         if (vcpu->arch.guest_state_protected)
 952                 return;
 953
 954         if (static_cpu_has(X86_FEATURE_PKU) &&
 955             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 956              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 957                 vcpu->arch.pkru = rdpkru();
 958                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 959                         __write_pkru(vcpu->arch.host_pkru);
 960         }
 961
 962         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 963
 964                 if (vcpu->arch.xcr0 != host_xcr0)
 965                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 966
 967                 if (vcpu->arch.xsaves_enabled &&
 968                     vcpu->arch.ia32_xss != host_xss)
 969                         wrmsrl(MSR_IA32_XSS, host_xss);
 970         }
 971
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 974
 975 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 976 {
 977         u64 xcr0 = xcr;
 978         u64 old_xcr0 = vcpu->arch.xcr0;
 979         u64 valid_bits;
 980
 981         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 982         if (index != XCR_XFEATURE_ENABLED_MASK)
 983                 return 1;
 984         if (!(xcr0 & XFEATURE_MASK_FP))
 985                 return 1;
 986         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 987                 return 1;
 988
 989         /*
 990          * Do not allow the guest to set bits that we do not support
 991          * saving.  However, xcr0 bit 0 is always set, even if the
 992          * emulated CPU does not support XSAVE (see fx_init).
 993          */
 994         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 995         if (xcr0 & ~valid_bits)
 996                 return 1;
 997
 998         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 999             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1000                 return 1;
1001
1002         if (xcr0 & XFEATURE_MASK_AVX512) {
1003                 if (!(xcr0 & XFEATURE_MASK_YMM))
1004                         return 1;
1005                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1006                         return 1;
1007         }
1008         vcpu->arch.xcr0 = xcr0;
1009
1010         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1011                 kvm_update_cpuid_runtime(vcpu);
1012         return 0;
1013 }
1014
1015 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1016 {
1017         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1018             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1019                 kvm_inject_gp(vcpu, 0);
1020                 return 1;
1021         }
1022
1023         return kvm_skip_emulated_instruction(vcpu);
1024 }
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1026
1027 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1028 {
1029         if (cr4 & cr4_reserved_bits)
1030                 return false;
1031
1032         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1033                 return false;
1034
1035         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1038
1039 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1040 {
1041         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1042                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1043
1044         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1045             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1046                 kvm_mmu_reset_context(vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1088 {
1089         bool skip_tlb_flush = false;
1090 #ifdef CONFIG_X86_64
1091         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1092
1093         if (pcid_enabled) {
1094                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1095                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1096         }
1097 #endif
1098
1099         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1100                 if (!skip_tlb_flush) {
1101                         kvm_mmu_sync_roots(vcpu);
1102                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1103                 }
1104                 return 0;
1105         }
1106
1107         /*
1108          * Do not condition the GPA check on long mode, this helper is used to
1109          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110          * the current vCPU mode is accurate.
1111          */
1112         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1113                 return 1;
1114
1115         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1116                 return 1;
1117
1118         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119         vcpu->arch.cr3 = cr3;
1120         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1121
1122         return 0;
1123 }
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1125
1126 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1127 {
1128         if (cr8 & CR8_RESERVED_BITS)
1129                 return 1;
1130         if (lapic_in_kernel(vcpu))
1131                 kvm_lapic_set_tpr(vcpu, cr8);
1132         else
1133                 vcpu->arch.cr8 = cr8;
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1137
1138 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1139 {
1140         if (lapic_in_kernel(vcpu))
1141                 return kvm_lapic_get_cr8(vcpu);
1142         else
1143                 return vcpu->arch.cr8;
1144 }
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1146
1147 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1148 {
1149         int i;
1150
1151         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1152                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1153                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1154                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1155         }
1156 }
1157
1158 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1159 {
1160         unsigned long dr7;
1161
1162         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1163                 dr7 = vcpu->arch.guest_debug_dr7;
1164         else
1165                 dr7 = vcpu->arch.dr7;
1166         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1167         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1168         if (dr7 & DR7_BP_EN_MASK)
1169                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1172
1173 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1174 {
1175         u64 fixed = DR6_FIXED_1;
1176
1177         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1178                 fixed |= DR6_RTM;
1179
1180         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1181                 fixed |= DR6_BUS_LOCK;
1182         return fixed;
1183 }
1184
1185 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1186 {
1187         size_t size = ARRAY_SIZE(vcpu->arch.db);
1188
1189         switch (dr) {
1190         case 0 ... 3:
1191                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1192                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1193                         vcpu->arch.eff_db[dr] = val;
1194                 break;
1195         case 4:
1196         case 6:
1197                 if (!kvm_dr6_valid(val))
1198                         return 1; /* #GP */
1199                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1200                 break;
1201         case 5:
1202         default: /* 7 */
1203                 if (!kvm_dr7_valid(val))
1204                         return 1; /* #GP */
1205                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1206                 kvm_update_dr7(vcpu);
1207                 break;
1208         }
1209
1210         return 0;
1211 }
1212 EXPORT_SYMBOL_GPL(kvm_set_dr);
1213
1214 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1215 {
1216         size_t size = ARRAY_SIZE(vcpu->arch.db);
1217
1218         switch (dr) {
1219         case 0 ... 3:
1220                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1221                 break;
1222         case 4:
1223         case 6:
1224                 *val = vcpu->arch.dr6;
1225                 break;
1226         case 5:
1227         default: /* 7 */
1228                 *val = vcpu->arch.dr7;
1229                 break;
1230         }
1231 }
1232 EXPORT_SYMBOL_GPL(kvm_get_dr);
1233
1234 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1235 {
1236         u32 ecx = kvm_rcx_read(vcpu);
1237         u64 data;
1238
1239         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1240                 kvm_inject_gp(vcpu, 0);
1241                 return 1;
1242         }
1243
1244         kvm_rax_write(vcpu, (u32)data);
1245         kvm_rdx_write(vcpu, data >> 32);
1246         return kvm_skip_emulated_instruction(vcpu);
1247 }
1248 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1249
1250 /*
1251  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1252  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1253  *
1254  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1255  * extract the supported MSRs from the related const lists.
1256  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1257  * capabilities of the host cpu. This capabilities test skips MSRs that are
1258  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1259  * may depend on host virtualization features rather than host cpu features.
1260  */
1261
1262 static const u32 msrs_to_save_all[] = {
1263         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1264         MSR_STAR,
1265 #ifdef CONFIG_X86_64
1266         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1267 #endif
1268         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1269         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1270         MSR_IA32_SPEC_CTRL,
1271         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1272         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1273         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1274         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1275         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1276         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1277         MSR_IA32_UMWAIT_CONTROL,
1278
1279         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1280         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1281         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1282         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1283         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1284         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1285         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1286         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1287         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1289         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1290         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1291         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1292         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1293         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1294         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1295         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1296         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1298         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1299         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1300         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1301 };
1302
1303 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1304 static unsigned num_msrs_to_save;
1305
1306 static const u32 emulated_msrs_all[] = {
1307         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1308         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1309         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1310         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1311         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1312         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1313         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1314         HV_X64_MSR_RESET,
1315         HV_X64_MSR_VP_INDEX,
1316         HV_X64_MSR_VP_RUNTIME,
1317         HV_X64_MSR_SCONTROL,
1318         HV_X64_MSR_STIMER0_CONFIG,
1319         HV_X64_MSR_VP_ASSIST_PAGE,
1320         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1321         HV_X64_MSR_TSC_EMULATION_STATUS,
1322         HV_X64_MSR_SYNDBG_OPTIONS,
1323         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1324         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1325         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1326
1327         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1328         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1329
1330         MSR_IA32_TSC_ADJUST,
1331         MSR_IA32_TSC_DEADLINE,
1332         MSR_IA32_ARCH_CAPABILITIES,
1333         MSR_IA32_PERF_CAPABILITIES,
1334         MSR_IA32_MISC_ENABLE,
1335         MSR_IA32_MCG_STATUS,
1336         MSR_IA32_MCG_CTL,
1337         MSR_IA32_MCG_EXT_CTL,
1338         MSR_IA32_SMBASE,
1339         MSR_SMI_COUNT,
1340         MSR_PLATFORM_INFO,
1341         MSR_MISC_FEATURES_ENABLES,
1342         MSR_AMD64_VIRT_SPEC_CTRL,
1343         MSR_IA32_POWER_CTL,
1344         MSR_IA32_UCODE_REV,
1345
1346         /*
1347          * The following list leaves out MSRs whose values are determined
1348          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1349          * We always support the "true" VMX control MSRs, even if the host
1350          * processor does not, so I am putting these registers here rather
1351          * than in msrs_to_save_all.
1352          */
1353         MSR_IA32_VMX_BASIC,
1354         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1355         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1356         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1357         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1358         MSR_IA32_VMX_MISC,
1359         MSR_IA32_VMX_CR0_FIXED0,
1360         MSR_IA32_VMX_CR4_FIXED0,
1361         MSR_IA32_VMX_VMCS_ENUM,
1362         MSR_IA32_VMX_PROCBASED_CTLS2,
1363         MSR_IA32_VMX_EPT_VPID_CAP,
1364         MSR_IA32_VMX_VMFUNC,
1365
1366         MSR_K7_HWCR,
1367         MSR_KVM_POLL_CONTROL,
1368 };
1369
1370 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1371 static unsigned num_emulated_msrs;
1372
1373 /*
1374  * List of msr numbers which are used to expose MSR-based features that
1375  * can be used by a hypervisor to validate requested CPU features.
1376  */
1377 static const u32 msr_based_features_all[] = {
1378         MSR_IA32_VMX_BASIC,
1379         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1380         MSR_IA32_VMX_PINBASED_CTLS,
1381         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1382         MSR_IA32_VMX_PROCBASED_CTLS,
1383         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1384         MSR_IA32_VMX_EXIT_CTLS,
1385         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1386         MSR_IA32_VMX_ENTRY_CTLS,
1387         MSR_IA32_VMX_MISC,
1388         MSR_IA32_VMX_CR0_FIXED0,
1389         MSR_IA32_VMX_CR0_FIXED1,
1390         MSR_IA32_VMX_CR4_FIXED0,
1391         MSR_IA32_VMX_CR4_FIXED1,
1392         MSR_IA32_VMX_VMCS_ENUM,
1393         MSR_IA32_VMX_PROCBASED_CTLS2,
1394         MSR_IA32_VMX_EPT_VPID_CAP,
1395         MSR_IA32_VMX_VMFUNC,
1396
1397         MSR_F10H_DECFG,
1398         MSR_IA32_UCODE_REV,
1399         MSR_IA32_ARCH_CAPABILITIES,
1400         MSR_IA32_PERF_CAPABILITIES,
1401 };
1402
1403 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1404 static unsigned int num_msr_based_features;
1405
1406 static u64 kvm_get_arch_capabilities(void)
1407 {
1408         u64 data = 0;
1409
1410         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1411                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1412
1413         /*
1414          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1415          * the nested hypervisor runs with NX huge pages.  If it is not,
1416          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1417          * L1 guests, so it need not worry about its own (L2) guests.
1418          */
1419         data |= ARCH_CAP_PSCHANGE_MC_NO;
1420
1421         /*
1422          * If we're doing cache flushes (either "always" or "cond")
1423          * we will do one whenever the guest does a vmlaunch/vmresume.
1424          * If an outer hypervisor is doing the cache flush for us
1425          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1426          * capability to the guest too, and if EPT is disabled we're not
1427          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1428          * require a nested hypervisor to do a flush of its own.
1429          */
1430         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1431                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1432
1433         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1434                 data |= ARCH_CAP_RDCL_NO;
1435         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1436                 data |= ARCH_CAP_SSB_NO;
1437         if (!boot_cpu_has_bug(X86_BUG_MDS))
1438                 data |= ARCH_CAP_MDS_NO;
1439
1440         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1441                 /*
1442                  * If RTM=0 because the kernel has disabled TSX, the host might
1443                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1444                  * and therefore knows that there cannot be TAA) but keep
1445                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1446                  * and we want to allow migrating those guests to tsx=off hosts.
1447                  */
1448                 data &= ~ARCH_CAP_TAA_NO;
1449         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1450                 data |= ARCH_CAP_TAA_NO;
1451         } else {
1452                 /*
1453                  * Nothing to do here; we emulate TSX_CTRL if present on the
1454                  * host so the guest can choose between disabling TSX or
1455                  * using VERW to clear CPU buffers.
1456                  */
1457         }
1458
1459         return data;
1460 }
1461
1462 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1463 {
1464         switch (msr->index) {
1465         case MSR_IA32_ARCH_CAPABILITIES:
1466                 msr->data = kvm_get_arch_capabilities();
1467                 break;
1468         case MSR_IA32_UCODE_REV:
1469                 rdmsrl_safe(msr->index, &msr->data);
1470                 break;
1471         default:
1472                 return static_call(kvm_x86_get_msr_feature)(msr);
1473         }
1474         return 0;
1475 }
1476
1477 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1478 {
1479         struct kvm_msr_entry msr;
1480         int r;
1481
1482         msr.index = index;
1483         r = kvm_get_msr_feature(&msr);
1484
1485         if (r == KVM_MSR_RET_INVALID) {
1486                 /* Unconditionally clear the output for simplicity */
1487                 *data = 0;
1488                 if (kvm_msr_ignored_check(index, 0, false))
1489                         r = 0;
1490         }
1491
1492         if (r)
1493                 return r;
1494
1495         *data = msr.data;
1496
1497         return 0;
1498 }
1499
1500 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1501 {
1502         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1503                 return false;
1504
1505         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1506                 return false;
1507
1508         if (efer & (EFER_LME | EFER_LMA) &&
1509             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1510                 return false;
1511
1512         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1513                 return false;
1514
1515         return true;
1516
1517 }
1518 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1519 {
1520         if (efer & efer_reserved_bits)
1521                 return false;
1522
1523         return __kvm_valid_efer(vcpu, efer);
1524 }
1525 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1526
1527 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1528 {
1529         u64 old_efer = vcpu->arch.efer;
1530         u64 efer = msr_info->data;
1531         int r;
1532
1533         if (efer & efer_reserved_bits)
1534                 return 1;
1535
1536         if (!msr_info->host_initiated) {
1537                 if (!__kvm_valid_efer(vcpu, efer))
1538                         return 1;
1539
1540                 if (is_paging(vcpu) &&
1541                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1542                         return 1;
1543         }
1544
1545         efer &= ~EFER_LMA;
1546         efer |= vcpu->arch.efer & EFER_LMA;
1547
1548         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1549         if (r) {
1550                 WARN_ON(r > 0);
1551                 return r;
1552         }
1553
1554         /* Update reserved bits */
1555         if ((efer ^ old_efer) & EFER_NX)
1556                 kvm_mmu_reset_context(vcpu);
1557
1558         return 0;
1559 }
1560
1561 void kvm_enable_efer_bits(u64 mask)
1562 {
1563        efer_reserved_bits &= ~mask;
1564 }
1565 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1566
1567 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1568 {
1569         struct kvm_x86_msr_filter *msr_filter;
1570         struct msr_bitmap_range *ranges;
1571         struct kvm *kvm = vcpu->kvm;
1572         bool allowed;
1573         int idx;
1574         u32 i;
1575
1576         /* x2APIC MSRs do not support filtering. */
1577         if (index >= 0x800 && index <= 0x8ff)
1578                 return true;
1579
1580         idx = srcu_read_lock(&kvm->srcu);
1581
1582         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1583         if (!msr_filter) {
1584                 allowed = true;
1585                 goto out;
1586         }
1587
1588         allowed = msr_filter->default_allow;
1589         ranges = msr_filter->ranges;
1590
1591         for (i = 0; i < msr_filter->count; i++) {
1592                 u32 start = ranges[i].base;
1593                 u32 end = start + ranges[i].nmsrs;
1594                 u32 flags = ranges[i].flags;
1595                 unsigned long *bitmap = ranges[i].bitmap;
1596
1597                 if ((index >= start) && (index < end) && (flags & type)) {
1598                         allowed = !!test_bit(index - start, bitmap);
1599                         break;
1600                 }
1601         }
1602
1603 out:
1604         srcu_read_unlock(&kvm->srcu, idx);
1605
1606         return allowed;
1607 }
1608 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1609
1610 /*
1611  * Write @data into the MSR specified by @index.  Select MSR specific fault
1612  * checks are bypassed if @host_initiated is %true.
1613  * Returns 0 on success, non-0 otherwise.
1614  * Assumes vcpu_load() was already called.
1615  */
1616 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1617                          bool host_initiated)
1618 {
1619         struct msr_data msr;
1620
1621         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1622                 return KVM_MSR_RET_FILTERED;
1623
1624         switch (index) {
1625         case MSR_FS_BASE:
1626         case MSR_GS_BASE:
1627         case MSR_KERNEL_GS_BASE:
1628         case MSR_CSTAR:
1629         case MSR_LSTAR:
1630                 if (is_noncanonical_address(data, vcpu))
1631                         return 1;
1632                 break;
1633         case MSR_IA32_SYSENTER_EIP:
1634         case MSR_IA32_SYSENTER_ESP:
1635                 /*
1636                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1637                  * non-canonical address is written on Intel but not on
1638                  * AMD (which ignores the top 32-bits, because it does
1639                  * not implement 64-bit SYSENTER).
1640                  *
1641                  * 64-bit code should hence be able to write a non-canonical
1642                  * value on AMD.  Making the address canonical ensures that
1643                  * vmentry does not fail on Intel after writing a non-canonical
1644                  * value, and that something deterministic happens if the guest
1645                  * invokes 64-bit SYSENTER.
1646                  */
1647                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1648                 break;
1649         case MSR_TSC_AUX:
1650                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1651                         return 1;
1652
1653                 if (!host_initiated &&
1654                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1655                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1656                         return 1;
1657
1658                 /*
1659                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1660                  * incomplete and conflicting architectural behavior.  Current
1661                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1662                  * reserved and always read as zeros.  Enforce Intel's reserved
1663                  * bits check if and only if the guest CPU is Intel, and clear
1664                  * the bits in all other cases.  This ensures cross-vendor
1665                  * migration will provide consistent behavior for the guest.
1666                  */
1667                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1668                         return 1;
1669
1670                 data = (u32)data;
1671                 break;
1672         }
1673
1674         msr.data = data;
1675         msr.index = index;
1676         msr.host_initiated = host_initiated;
1677
1678         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1679 }
1680
1681 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1682                                      u32 index, u64 data, bool host_initiated)
1683 {
1684         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1685
1686         if (ret == KVM_MSR_RET_INVALID)
1687                 if (kvm_msr_ignored_check(index, data, true))
1688                         ret = 0;
1689
1690         return ret;
1691 }
1692
1693 /*
1694  * Read the MSR specified by @index into @data.  Select MSR specific fault
1695  * checks are bypassed if @host_initiated is %true.
1696  * Returns 0 on success, non-0 otherwise.
1697  * Assumes vcpu_load() was already called.
1698  */
1699 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1700                   bool host_initiated)
1701 {
1702         struct msr_data msr;
1703         int ret;
1704
1705         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1706                 return KVM_MSR_RET_FILTERED;
1707
1708         switch (index) {
1709         case MSR_TSC_AUX:
1710                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1711                         return 1;
1712
1713                 if (!host_initiated &&
1714                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1715                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1716                         return 1;
1717                 break;
1718         }
1719
1720         msr.index = index;
1721         msr.host_initiated = host_initiated;
1722
1723         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1724         if (!ret)
1725                 *data = msr.data;
1726         return ret;
1727 }
1728
1729 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1730                                      u32 index, u64 *data, bool host_initiated)
1731 {
1732         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1733
1734         if (ret == KVM_MSR_RET_INVALID) {
1735                 /* Unconditionally clear *data for simplicity */
1736                 *data = 0;
1737                 if (kvm_msr_ignored_check(index, 0, false))
1738                         ret = 0;
1739         }
1740
1741         return ret;
1742 }
1743
1744 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1745 {
1746         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1747 }
1748 EXPORT_SYMBOL_GPL(kvm_get_msr);
1749
1750 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1751 {
1752         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1753 }
1754 EXPORT_SYMBOL_GPL(kvm_set_msr);
1755
1756 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1757 {
1758         int err = vcpu->run->msr.error;
1759         if (!err) {
1760                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1761                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1762         }
1763
1764         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1765 }
1766
1767 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1768 {
1769         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1770 }
1771
1772 static u64 kvm_msr_reason(int r)
1773 {
1774         switch (r) {
1775         case KVM_MSR_RET_INVALID:
1776                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1777         case KVM_MSR_RET_FILTERED:
1778                 return KVM_MSR_EXIT_REASON_FILTER;
1779         default:
1780                 return KVM_MSR_EXIT_REASON_INVAL;
1781         }
1782 }
1783
1784 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1785                               u32 exit_reason, u64 data,
1786                               int (*completion)(struct kvm_vcpu *vcpu),
1787                               int r)
1788 {
1789         u64 msr_reason = kvm_msr_reason(r);
1790
1791         /* Check if the user wanted to know about this MSR fault */
1792         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1793                 return 0;
1794
1795         vcpu->run->exit_reason = exit_reason;
1796         vcpu->run->msr.error = 0;
1797         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1798         vcpu->run->msr.reason = msr_reason;
1799         vcpu->run->msr.index = index;
1800         vcpu->run->msr.data = data;
1801         vcpu->arch.complete_userspace_io = completion;
1802
1803         return 1;
1804 }
1805
1806 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1807 {
1808         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1809                                    complete_emulated_rdmsr, r);
1810 }
1811
1812 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1813 {
1814         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1815                                    complete_emulated_wrmsr, r);
1816 }
1817
1818 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1819 {
1820         u32 ecx = kvm_rcx_read(vcpu);
1821         u64 data;
1822         int r;
1823
1824         r = kvm_get_msr(vcpu, ecx, &data);
1825
1826         /* MSR read failed? See if we should ask user space */
1827         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1828                 /* Bounce to user space */
1829                 return 0;
1830         }
1831
1832         if (!r) {
1833                 trace_kvm_msr_read(ecx, data);
1834
1835                 kvm_rax_write(vcpu, data & -1u);
1836                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1837         } else {
1838                 trace_kvm_msr_read_ex(ecx);
1839         }
1840
1841         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1842 }
1843 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1844
1845 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1846 {
1847         u32 ecx = kvm_rcx_read(vcpu);
1848         u64 data = kvm_read_edx_eax(vcpu);
1849         int r;
1850
1851         r = kvm_set_msr(vcpu, ecx, data);
1852
1853         /* MSR write failed? See if we should ask user space */
1854         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1855                 /* Bounce to user space */
1856                 return 0;
1857
1858         /* Signal all other negative errors to userspace */
1859         if (r < 0)
1860                 return r;
1861
1862         if (!r)
1863                 trace_kvm_msr_write(ecx, data);
1864         else
1865                 trace_kvm_msr_write_ex(ecx, data);
1866
1867         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1868 }
1869 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1870
1871 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1872 {
1873         return kvm_skip_emulated_instruction(vcpu);
1874 }
1875 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1876
1877 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1878 {
1879         /* Treat an INVD instruction as a NOP and just skip it. */
1880         return kvm_emulate_as_nop(vcpu);
1881 }
1882 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1883
1884 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1885 {
1886         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1887         return kvm_emulate_as_nop(vcpu);
1888 }
1889 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1890
1891 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1892 {
1893         kvm_queue_exception(vcpu, UD_VECTOR);
1894         return 1;
1895 }
1896 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1897
1898 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1899 {
1900         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1901         return kvm_emulate_as_nop(vcpu);
1902 }
1903 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1904
1905 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1906 {
1907         xfer_to_guest_mode_prepare();
1908         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1909                 xfer_to_guest_mode_work_pending();
1910 }
1911
1912 /*
1913  * The fast path for frequent and performance sensitive wrmsr emulation,
1914  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1915  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1916  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1917  * other cases which must be called after interrupts are enabled on the host.
1918  */
1919 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1920 {
1921         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1922                 return 1;
1923
1924         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1925                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1926                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1927                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1928
1929                 data &= ~(1 << 12);
1930                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1931                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1932                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1933                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1934                 return 0;
1935         }
1936
1937         return 1;
1938 }
1939
1940 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1941 {
1942         if (!kvm_can_use_hv_timer(vcpu))
1943                 return 1;
1944
1945         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1946         return 0;
1947 }
1948
1949 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1950 {
1951         u32 msr = kvm_rcx_read(vcpu);
1952         u64 data;
1953         fastpath_t ret = EXIT_FASTPATH_NONE;
1954
1955         switch (msr) {
1956         case APIC_BASE_MSR + (APIC_ICR >> 4):
1957                 data = kvm_read_edx_eax(vcpu);
1958                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1959                         kvm_skip_emulated_instruction(vcpu);
1960                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1961                 }
1962                 break;
1963         case MSR_IA32_TSC_DEADLINE:
1964                 data = kvm_read_edx_eax(vcpu);
1965                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1966                         kvm_skip_emulated_instruction(vcpu);
1967                         ret = EXIT_FASTPATH_REENTER_GUEST;
1968                 }
1969                 break;
1970         default:
1971                 break;
1972         }
1973
1974         if (ret != EXIT_FASTPATH_NONE)
1975                 trace_kvm_msr_write(msr, data);
1976
1977         return ret;
1978 }
1979 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1980
1981 /*
1982  * Adapt set_msr() to msr_io()'s calling convention
1983  */
1984 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1985 {
1986         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1987 }
1988
1989 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1990 {
1991         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1992 }
1993
1994 #ifdef CONFIG_X86_64
1995 struct pvclock_clock {
1996         int vclock_mode;
1997         u64 cycle_last;
1998         u64 mask;
1999         u32 mult;
2000         u32 shift;
2001         u64 base_cycles;
2002         u64 offset;
2003 };
2004
2005 struct pvclock_gtod_data {
2006         seqcount_t      seq;
2007
2008         struct pvclock_clock clock; /* extract of a clocksource struct */
2009         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2010
2011         ktime_t         offs_boot;
2012         u64             wall_time_sec;
2013 };
2014
2015 static struct pvclock_gtod_data pvclock_gtod_data;
2016
2017 static void update_pvclock_gtod(struct timekeeper *tk)
2018 {
2019         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2020
2021         write_seqcount_begin(&vdata->seq);
2022
2023         /* copy pvclock gtod data */
2024         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2025         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2026         vdata->clock.mask               = tk->tkr_mono.mask;
2027         vdata->clock.mult               = tk->tkr_mono.mult;
2028         vdata->clock.shift              = tk->tkr_mono.shift;
2029         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2030         vdata->clock.offset             = tk->tkr_mono.base;
2031
2032         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2033         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2034         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2035         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2036         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2037         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2038         vdata->raw_clock.offset         = tk->tkr_raw.base;
2039
2040         vdata->wall_time_sec            = tk->xtime_sec;
2041
2042         vdata->offs_boot                = tk->offs_boot;
2043
2044         write_seqcount_end(&vdata->seq);
2045 }
2046
2047 static s64 get_kvmclock_base_ns(void)
2048 {
2049         /* Count up from boot time, but with the frequency of the raw clock.  */
2050         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2051 }
2052 #else
2053 static s64 get_kvmclock_base_ns(void)
2054 {
2055         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2056         return ktime_get_boottime_ns();
2057 }
2058 #endif
2059
2060 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2061 {
2062         int version;
2063         int r;
2064         struct pvclock_wall_clock wc;
2065         u32 wc_sec_hi;
2066         u64 wall_nsec;
2067
2068         if (!wall_clock)
2069                 return;
2070
2071         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2072         if (r)
2073                 return;
2074
2075         if (version & 1)
2076                 ++version;  /* first time write, random junk */
2077
2078         ++version;
2079
2080         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2081                 return;
2082
2083         /*
2084          * The guest calculates current wall clock time by adding
2085          * system time (updated by kvm_guest_time_update below) to the
2086          * wall clock specified here.  We do the reverse here.
2087          */
2088         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2089
2090         wc.nsec = do_div(wall_nsec, 1000000000);
2091         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2092         wc.version = version;
2093
2094         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2095
2096         if (sec_hi_ofs) {
2097                 wc_sec_hi = wall_nsec >> 32;
2098                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2099                                 &wc_sec_hi, sizeof(wc_sec_hi));
2100         }
2101
2102         version++;
2103         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2104 }
2105
2106 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2107                                   bool old_msr, bool host_initiated)
2108 {
2109         struct kvm_arch *ka = &vcpu->kvm->arch;
2110
2111         if (vcpu->vcpu_id == 0 && !host_initiated) {
2112                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2113                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2114
2115                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2116         }
2117
2118         vcpu->arch.time = system_time;
2119         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2120
2121         /* we verify if the enable bit is set... */
2122         vcpu->arch.pv_time_enabled = false;
2123         if (!(system_time & 1))
2124                 return;
2125
2126         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2127                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2128                                        sizeof(struct pvclock_vcpu_time_info)))
2129                 vcpu->arch.pv_time_enabled = true;
2130
2131         return;
2132 }
2133
2134 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2135 {
2136         do_shl32_div32(dividend, divisor);
2137         return dividend;
2138 }
2139
2140 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2141                                s8 *pshift, u32 *pmultiplier)
2142 {
2143         uint64_t scaled64;
2144         int32_t  shift = 0;
2145         uint64_t tps64;
2146         uint32_t tps32;
2147
2148         tps64 = base_hz;
2149         scaled64 = scaled_hz;
2150         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2151                 tps64 >>= 1;
2152                 shift--;
2153         }
2154
2155         tps32 = (uint32_t)tps64;
2156         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2157                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2158                         scaled64 >>= 1;
2159                 else
2160                         tps32 <<= 1;
2161                 shift++;
2162         }
2163
2164         *pshift = shift;
2165         *pmultiplier = div_frac(scaled64, tps32);
2166 }
2167
2168 #ifdef CONFIG_X86_64
2169 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2170 #endif
2171
2172 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2173 static unsigned long max_tsc_khz;
2174
2175 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2176 {
2177         u64 v = (u64)khz * (1000000 + ppm);
2178         do_div(v, 1000000);
2179         return v;
2180 }
2181
2182 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2183 {
2184         u64 ratio;
2185
2186         /* Guest TSC same frequency as host TSC? */
2187         if (!scale) {
2188                 vcpu->arch.l1_tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2189                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2190                 return 0;
2191         }
2192
2193         /* TSC scaling supported? */
2194         if (!kvm_has_tsc_control) {
2195                 if (user_tsc_khz > tsc_khz) {
2196                         vcpu->arch.tsc_catchup = 1;
2197                         vcpu->arch.tsc_always_catchup = 1;
2198                         return 0;
2199                 } else {
2200                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2201                         return -1;
2202                 }
2203         }
2204
2205         /* TSC scaling required  - calculate ratio */
2206         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2207                                 user_tsc_khz, tsc_khz);
2208
2209         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2210                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2211                                     user_tsc_khz);
2212                 return -1;
2213         }
2214
2215         vcpu->arch.l1_tsc_scaling_ratio = vcpu->arch.tsc_scaling_ratio = ratio;
2216         return 0;
2217 }
2218
2219 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2220 {
2221         u32 thresh_lo, thresh_hi;
2222         int use_scaling = 0;
2223
2224         /* tsc_khz can be zero if TSC calibration fails */
2225         if (user_tsc_khz == 0) {
2226                 /* set tsc_scaling_ratio to a safe value */
2227                 vcpu->arch.l1_tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2228                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2229                 return -1;
2230         }
2231
2232         /* Compute a scale to convert nanoseconds in TSC cycles */
2233         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2234                            &vcpu->arch.virtual_tsc_shift,
2235                            &vcpu->arch.virtual_tsc_mult);
2236         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2237
2238         /*
2239          * Compute the variation in TSC rate which is acceptable
2240          * within the range of tolerance and decide if the
2241          * rate being applied is within that bounds of the hardware
2242          * rate.  If so, no scaling or compensation need be done.
2243          */
2244         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2245         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2246         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2247                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2248                 use_scaling = 1;
2249         }
2250         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2251 }
2252
2253 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2254 {
2255         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2256                                       vcpu->arch.virtual_tsc_mult,
2257                                       vcpu->arch.virtual_tsc_shift);
2258         tsc += vcpu->arch.this_tsc_write;
2259         return tsc;
2260 }
2261
2262 static inline int gtod_is_based_on_tsc(int mode)
2263 {
2264         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2265 }
2266
2267 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2268 {
2269 #ifdef CONFIG_X86_64
2270         bool vcpus_matched;
2271         struct kvm_arch *ka = &vcpu->kvm->arch;
2272         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2273
2274         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2275                          atomic_read(&vcpu->kvm->online_vcpus));
2276
2277         /*
2278          * Once the masterclock is enabled, always perform request in
2279          * order to update it.
2280          *
2281          * In order to enable masterclock, the host clocksource must be TSC
2282          * and the vcpus need to have matched TSCs.  When that happens,
2283          * perform request to enable masterclock.
2284          */
2285         if (ka->use_master_clock ||
2286             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2287                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2288
2289         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2290                             atomic_read(&vcpu->kvm->online_vcpus),
2291                             ka->use_master_clock, gtod->clock.vclock_mode);
2292 #endif
2293 }
2294
2295 /*
2296  * Multiply tsc by a fixed point number represented by ratio.
2297  *
2298  * The most significant 64-N bits (mult) of ratio represent the
2299  * integral part of the fixed point number; the remaining N bits
2300  * (frac) represent the fractional part, ie. ratio represents a fixed
2301  * point number (mult + frac * 2^(-N)).
2302  *
2303  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2304  */
2305 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2306 {
2307         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2308 }
2309
2310 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2311 {
2312         u64 _tsc = tsc;
2313
2314         if (ratio != kvm_default_tsc_scaling_ratio)
2315                 _tsc = __scale_tsc(ratio, tsc);
2316
2317         return _tsc;
2318 }
2319 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2320
2321 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2322 {
2323         u64 tsc;
2324
2325         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2326
2327         return target_tsc - tsc;
2328 }
2329
2330 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2331 {
2332         return vcpu->arch.l1_tsc_offset +
2333                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2334 }
2335 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2336
2337 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2338 {
2339         u64 nested_offset;
2340
2341         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2342                 nested_offset = l1_offset;
2343         else
2344                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2345                                                 kvm_tsc_scaling_ratio_frac_bits);
2346
2347         nested_offset += l2_offset;
2348         return nested_offset;
2349 }
2350 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2351
2352 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2353 {
2354         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2355                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2356                                        kvm_tsc_scaling_ratio_frac_bits);
2357
2358         return l1_multiplier;
2359 }
2360 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2361
2362 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2363 {
2364         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2365                                    vcpu->arch.l1_tsc_offset,
2366                                    l1_offset);
2367
2368         vcpu->arch.l1_tsc_offset = l1_offset;
2369
2370         /*
2371          * If we are here because L1 chose not to trap WRMSR to TSC then
2372          * according to the spec this should set L1's TSC (as opposed to
2373          * setting L1's offset for L2).
2374          */
2375         if (is_guest_mode(vcpu))
2376                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2377                         l1_offset,
2378                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2379                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2380         else
2381                 vcpu->arch.tsc_offset = l1_offset;
2382
2383         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2384 }
2385
2386 static inline bool kvm_check_tsc_unstable(void)
2387 {
2388 #ifdef CONFIG_X86_64
2389         /*
2390          * TSC is marked unstable when we're running on Hyper-V,
2391          * 'TSC page' clocksource is good.
2392          */
2393         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2394                 return false;
2395 #endif
2396         return check_tsc_unstable();
2397 }
2398
2399 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2400 {
2401         struct kvm *kvm = vcpu->kvm;
2402         u64 offset, ns, elapsed;
2403         unsigned long flags;
2404         bool matched;
2405         bool already_matched;
2406         bool synchronizing = false;
2407
2408         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2409         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2410         ns = get_kvmclock_base_ns();
2411         elapsed = ns - kvm->arch.last_tsc_nsec;
2412
2413         if (vcpu->arch.virtual_tsc_khz) {
2414                 if (data == 0) {
2415                         /*
2416                          * detection of vcpu initialization -- need to sync
2417                          * with other vCPUs. This particularly helps to keep
2418                          * kvm_clock stable after CPU hotplug
2419                          */
2420                         synchronizing = true;
2421                 } else {
2422                         u64 tsc_exp = kvm->arch.last_tsc_write +
2423                                                 nsec_to_cycles(vcpu, elapsed);
2424                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2425                         /*
2426                          * Special case: TSC write with a small delta (1 second)
2427                          * of virtual cycle time against real time is
2428                          * interpreted as an attempt to synchronize the CPU.
2429                          */
2430                         synchronizing = data < tsc_exp + tsc_hz &&
2431                                         data + tsc_hz > tsc_exp;
2432                 }
2433         }
2434
2435         /*
2436          * For a reliable TSC, we can match TSC offsets, and for an unstable
2437          * TSC, we add elapsed time in this computation.  We could let the
2438          * compensation code attempt to catch up if we fall behind, but
2439          * it's better to try to match offsets from the beginning.
2440          */
2441         if (synchronizing &&
2442             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2443                 if (!kvm_check_tsc_unstable()) {
2444                         offset = kvm->arch.cur_tsc_offset;
2445                 } else {
2446                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2447                         data += delta;
2448                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2449                 }
2450                 matched = true;
2451                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2452         } else {
2453                 /*
2454                  * We split periods of matched TSC writes into generations.
2455                  * For each generation, we track the original measured
2456                  * nanosecond time, offset, and write, so if TSCs are in
2457                  * sync, we can match exact offset, and if not, we can match
2458                  * exact software computation in compute_guest_tsc()
2459                  *
2460                  * These values are tracked in kvm->arch.cur_xxx variables.
2461                  */
2462                 kvm->arch.cur_tsc_generation++;
2463                 kvm->arch.cur_tsc_nsec = ns;
2464                 kvm->arch.cur_tsc_write = data;
2465                 kvm->arch.cur_tsc_offset = offset;
2466                 matched = false;
2467         }
2468
2469         /*
2470          * We also track th most recent recorded KHZ, write and time to
2471          * allow the matching interval to be extended at each write.
2472          */
2473         kvm->arch.last_tsc_nsec = ns;
2474         kvm->arch.last_tsc_write = data;
2475         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2476
2477         vcpu->arch.last_guest_tsc = data;
2478
2479         /* Keep track of which generation this VCPU has synchronized to */
2480         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2481         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2482         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2483
2484         kvm_vcpu_write_tsc_offset(vcpu, offset);
2485         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2486
2487         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2488         if (!matched) {
2489                 kvm->arch.nr_vcpus_matched_tsc = 0;
2490         } else if (!already_matched) {
2491                 kvm->arch.nr_vcpus_matched_tsc++;
2492         }
2493
2494         kvm_track_tsc_matching(vcpu);
2495         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2496 }
2497
2498 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2499                                            s64 adjustment)
2500 {
2501         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2502         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2503 }
2504
2505 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2506 {
2507         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2508                 WARN_ON(adjustment < 0);
2509         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2510                                    vcpu->arch.l1_tsc_scaling_ratio);
2511         adjust_tsc_offset_guest(vcpu, adjustment);
2512 }
2513
2514 #ifdef CONFIG_X86_64
2515
2516 static u64 read_tsc(void)
2517 {
2518         u64 ret = (u64)rdtsc_ordered();
2519         u64 last = pvclock_gtod_data.clock.cycle_last;
2520
2521         if (likely(ret >= last))
2522                 return ret;
2523
2524         /*
2525          * GCC likes to generate cmov here, but this branch is extremely
2526          * predictable (it's just a function of time and the likely is
2527          * very likely) and there's a data dependence, so force GCC
2528          * to generate a branch instead.  I don't barrier() because
2529          * we don't actually need a barrier, and if this function
2530          * ever gets inlined it will generate worse code.
2531          */
2532         asm volatile ("");
2533         return last;
2534 }
2535
2536 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2537                           int *mode)
2538 {
2539         long v;
2540         u64 tsc_pg_val;
2541
2542         switch (clock->vclock_mode) {
2543         case VDSO_CLOCKMODE_HVCLOCK:
2544                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2545                                                   tsc_timestamp);
2546                 if (tsc_pg_val != U64_MAX) {
2547                         /* TSC page valid */
2548                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2549                         v = (tsc_pg_val - clock->cycle_last) &
2550                                 clock->mask;
2551                 } else {
2552                         /* TSC page invalid */
2553                         *mode = VDSO_CLOCKMODE_NONE;
2554                 }
2555                 break;
2556         case VDSO_CLOCKMODE_TSC:
2557                 *mode = VDSO_CLOCKMODE_TSC;
2558                 *tsc_timestamp = read_tsc();
2559                 v = (*tsc_timestamp - clock->cycle_last) &
2560                         clock->mask;
2561                 break;
2562         default:
2563                 *mode = VDSO_CLOCKMODE_NONE;
2564         }
2565
2566         if (*mode == VDSO_CLOCKMODE_NONE)
2567                 *tsc_timestamp = v = 0;
2568
2569         return v * clock->mult;
2570 }
2571
2572 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2573 {
2574         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2575         unsigned long seq;
2576         int mode;
2577         u64 ns;
2578
2579         do {
2580                 seq = read_seqcount_begin(&gtod->seq);
2581                 ns = gtod->raw_clock.base_cycles;
2582                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2583                 ns >>= gtod->raw_clock.shift;
2584                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2585         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2586         *t = ns;
2587
2588         return mode;
2589 }
2590
2591 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2592 {
2593         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2594         unsigned long seq;
2595         int mode;
2596         u64 ns;
2597
2598         do {
2599                 seq = read_seqcount_begin(&gtod->seq);
2600                 ts->tv_sec = gtod->wall_time_sec;
2601                 ns = gtod->clock.base_cycles;
2602                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2603                 ns >>= gtod->clock.shift;
2604         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2605
2606         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2607         ts->tv_nsec = ns;
2608
2609         return mode;
2610 }
2611
2612 /* returns true if host is using TSC based clocksource */
2613 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2614 {
2615         /* checked again under seqlock below */
2616         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2617                 return false;
2618
2619         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2620                                                       tsc_timestamp));
2621 }
2622
2623 /* returns true if host is using TSC based clocksource */
2624 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2625                                            u64 *tsc_timestamp)
2626 {
2627         /* checked again under seqlock below */
2628         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2629                 return false;
2630
2631         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2632 }
2633 #endif
2634
2635 /*
2636  *
2637  * Assuming a stable TSC across physical CPUS, and a stable TSC
2638  * across virtual CPUs, the following condition is possible.
2639  * Each numbered line represents an event visible to both
2640  * CPUs at the next numbered event.
2641  *
2642  * "timespecX" represents host monotonic time. "tscX" represents
2643  * RDTSC value.
2644  *
2645  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2646  *
2647  * 1.  read timespec0,tsc0
2648  * 2.                                   | timespec1 = timespec0 + N
2649  *                                      | tsc1 = tsc0 + M
2650  * 3. transition to guest               | transition to guest
2651  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2652  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2653  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2654  *
2655  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2656  *
2657  *      - ret0 < ret1
2658  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2659  *              ...
2660  *      - 0 < N - M => M < N
2661  *
2662  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2663  * always the case (the difference between two distinct xtime instances
2664  * might be smaller then the difference between corresponding TSC reads,
2665  * when updating guest vcpus pvclock areas).
2666  *
2667  * To avoid that problem, do not allow visibility of distinct
2668  * system_timestamp/tsc_timestamp values simultaneously: use a master
2669  * copy of host monotonic time values. Update that master copy
2670  * in lockstep.
2671  *
2672  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2673  *
2674  */
2675
2676 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2677 {
2678 #ifdef CONFIG_X86_64
2679         struct kvm_arch *ka = &kvm->arch;
2680         int vclock_mode;
2681         bool host_tsc_clocksource, vcpus_matched;
2682
2683         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2684                         atomic_read(&kvm->online_vcpus));
2685
2686         /*
2687          * If the host uses TSC clock, then passthrough TSC as stable
2688          * to the guest.
2689          */
2690         host_tsc_clocksource = kvm_get_time_and_clockread(
2691                                         &ka->master_kernel_ns,
2692                                         &ka->master_cycle_now);
2693
2694         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2695                                 && !ka->backwards_tsc_observed
2696                                 && !ka->boot_vcpu_runs_old_kvmclock;
2697
2698         if (ka->use_master_clock)
2699                 atomic_set(&kvm_guest_has_master_clock, 1);
2700
2701         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2702         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2703                                         vcpus_matched);
2704 #endif
2705 }
2706
2707 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2708 {
2709         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2710 }
2711
2712 static void kvm_gen_update_masterclock(struct kvm *kvm)
2713 {
2714 #ifdef CONFIG_X86_64
2715         int i;
2716         struct kvm_vcpu *vcpu;
2717         struct kvm_arch *ka = &kvm->arch;
2718         unsigned long flags;
2719
2720         kvm_hv_invalidate_tsc_page(kvm);
2721
2722         kvm_make_mclock_inprogress_request(kvm);
2723
2724         /* no guest entries from this point */
2725         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2726         pvclock_update_vm_gtod_copy(kvm);
2727         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2728
2729         kvm_for_each_vcpu(i, vcpu, kvm)
2730                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2731
2732         /* guest entries allowed */
2733         kvm_for_each_vcpu(i, vcpu, kvm)
2734                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2735 #endif
2736 }
2737
2738 u64 get_kvmclock_ns(struct kvm *kvm)
2739 {
2740         struct kvm_arch *ka = &kvm->arch;
2741         struct pvclock_vcpu_time_info hv_clock;
2742         unsigned long flags;
2743         u64 ret;
2744
2745         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2746         if (!ka->use_master_clock) {
2747                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2748                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2749         }
2750
2751         hv_clock.tsc_timestamp = ka->master_cycle_now;
2752         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2753         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2754
2755         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2756         get_cpu();
2757
2758         if (__this_cpu_read(cpu_tsc_khz)) {
2759                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2760                                    &hv_clock.tsc_shift,
2761                                    &hv_clock.tsc_to_system_mul);
2762                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2763         } else
2764                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2765
2766         put_cpu();
2767
2768         return ret;
2769 }
2770
2771 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2772                                    struct gfn_to_hva_cache *cache,
2773                                    unsigned int offset)
2774 {
2775         struct kvm_vcpu_arch *vcpu = &v->arch;
2776         struct pvclock_vcpu_time_info guest_hv_clock;
2777
2778         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2779                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2780                 return;
2781
2782         /* This VCPU is paused, but it's legal for a guest to read another
2783          * VCPU's kvmclock, so we really have to follow the specification where
2784          * it says that version is odd if data is being modified, and even after
2785          * it is consistent.
2786          *
2787          * Version field updates must be kept separate.  This is because
2788          * kvm_write_guest_cached might use a "rep movs" instruction, and
2789          * writes within a string instruction are weakly ordered.  So there
2790          * are three writes overall.
2791          *
2792          * As a small optimization, only write the version field in the first
2793          * and third write.  The vcpu->pv_time cache is still valid, because the
2794          * version field is the first in the struct.
2795          */
2796         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2797
2798         if (guest_hv_clock.version & 1)
2799                 ++guest_hv_clock.version;  /* first time write, random junk */
2800
2801         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2802         kvm_write_guest_offset_cached(v->kvm, cache,
2803                                       &vcpu->hv_clock, offset,
2804                                       sizeof(vcpu->hv_clock.version));
2805
2806         smp_wmb();
2807
2808         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2809         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2810
2811         if (vcpu->pvclock_set_guest_stopped_request) {
2812                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2813                 vcpu->pvclock_set_guest_stopped_request = false;
2814         }
2815
2816         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2817
2818         kvm_write_guest_offset_cached(v->kvm, cache,
2819                                       &vcpu->hv_clock, offset,
2820                                       sizeof(vcpu->hv_clock));
2821
2822         smp_wmb();
2823
2824         vcpu->hv_clock.version++;
2825         kvm_write_guest_offset_cached(v->kvm, cache,
2826                                      &vcpu->hv_clock, offset,
2827                                      sizeof(vcpu->hv_clock.version));
2828 }
2829
2830 static int kvm_guest_time_update(struct kvm_vcpu *v)
2831 {
2832         unsigned long flags, tgt_tsc_khz;
2833         struct kvm_vcpu_arch *vcpu = &v->arch;
2834         struct kvm_arch *ka = &v->kvm->arch;
2835         s64 kernel_ns;
2836         u64 tsc_timestamp, host_tsc;
2837         u8 pvclock_flags;
2838         bool use_master_clock;
2839
2840         kernel_ns = 0;
2841         host_tsc = 0;
2842
2843         /*
2844          * If the host uses TSC clock, then passthrough TSC as stable
2845          * to the guest.
2846          */
2847         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2848         use_master_clock = ka->use_master_clock;
2849         if (use_master_clock) {
2850                 host_tsc = ka->master_cycle_now;
2851                 kernel_ns = ka->master_kernel_ns;
2852         }
2853         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2854
2855         /* Keep irq disabled to prevent changes to the clock */
2856         local_irq_save(flags);
2857         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2858         if (unlikely(tgt_tsc_khz == 0)) {
2859                 local_irq_restore(flags);
2860                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2861                 return 1;
2862         }
2863         if (!use_master_clock) {
2864                 host_tsc = rdtsc();
2865                 kernel_ns = get_kvmclock_base_ns();
2866         }
2867
2868         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2869
2870         /*
2871          * We may have to catch up the TSC to match elapsed wall clock
2872          * time for two reasons, even if kvmclock is used.
2873          *   1) CPU could have been running below the maximum TSC rate
2874          *   2) Broken TSC compensation resets the base at each VCPU
2875          *      entry to avoid unknown leaps of TSC even when running
2876          *      again on the same CPU.  This may cause apparent elapsed
2877          *      time to disappear, and the guest to stand still or run
2878          *      very slowly.
2879          */
2880         if (vcpu->tsc_catchup) {
2881                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2882                 if (tsc > tsc_timestamp) {
2883                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2884                         tsc_timestamp = tsc;
2885                 }
2886         }
2887
2888         local_irq_restore(flags);
2889
2890         /* With all the info we got, fill in the values */
2891
2892         if (kvm_has_tsc_control)
2893                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2894                                             v->arch.l1_tsc_scaling_ratio);
2895
2896         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2897                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2898                                    &vcpu->hv_clock.tsc_shift,
2899                                    &vcpu->hv_clock.tsc_to_system_mul);
2900                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2901         }
2902
2903         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2904         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2905         vcpu->last_guest_tsc = tsc_timestamp;
2906
2907         /* If the host uses TSC clocksource, then it is stable */
2908         pvclock_flags = 0;
2909         if (use_master_clock)
2910                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2911
2912         vcpu->hv_clock.flags = pvclock_flags;
2913
2914         if (vcpu->pv_time_enabled)
2915                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2916         if (vcpu->xen.vcpu_info_set)
2917                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2918                                        offsetof(struct compat_vcpu_info, time));
2919         if (vcpu->xen.vcpu_time_info_set)
2920                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2921         if (v == kvm_get_vcpu(v->kvm, 0))
2922                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2923         return 0;
2924 }
2925
2926 /*
2927  * kvmclock updates which are isolated to a given vcpu, such as
2928  * vcpu->cpu migration, should not allow system_timestamp from
2929  * the rest of the vcpus to remain static. Otherwise ntp frequency
2930  * correction applies to one vcpu's system_timestamp but not
2931  * the others.
2932  *
2933  * So in those cases, request a kvmclock update for all vcpus.
2934  * We need to rate-limit these requests though, as they can
2935  * considerably slow guests that have a large number of vcpus.
2936  * The time for a remote vcpu to update its kvmclock is bound
2937  * by the delay we use to rate-limit the updates.
2938  */
2939
2940 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2941
2942 static void kvmclock_update_fn(struct work_struct *work)
2943 {
2944         int i;
2945         struct delayed_work *dwork = to_delayed_work(work);
2946         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2947                                            kvmclock_update_work);
2948         struct kvm *kvm = container_of(ka, struct kvm, arch);
2949         struct kvm_vcpu *vcpu;
2950
2951         kvm_for_each_vcpu(i, vcpu, kvm) {
2952                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2953                 kvm_vcpu_kick(vcpu);
2954         }
2955 }
2956
2957 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2958 {
2959         struct kvm *kvm = v->kvm;
2960
2961         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2962         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2963                                         KVMCLOCK_UPDATE_DELAY);
2964 }
2965
2966 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2967
2968 static void kvmclock_sync_fn(struct work_struct *work)
2969 {
2970         struct delayed_work *dwork = to_delayed_work(work);
2971         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2972                                            kvmclock_sync_work);
2973         struct kvm *kvm = container_of(ka, struct kvm, arch);
2974
2975         if (!kvmclock_periodic_sync)
2976                 return;
2977
2978         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2979         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2980                                         KVMCLOCK_SYNC_PERIOD);
2981 }
2982
2983 /*
2984  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2985  */
2986 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2987 {
2988         /* McStatusWrEn enabled? */
2989         if (guest_cpuid_is_amd_or_hygon(vcpu))
2990                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2991
2992         return false;
2993 }
2994
2995 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2996 {
2997         u64 mcg_cap = vcpu->arch.mcg_cap;
2998         unsigned bank_num = mcg_cap & 0xff;
2999         u32 msr = msr_info->index;
3000         u64 data = msr_info->data;
3001
3002         switch (msr) {
3003         case MSR_IA32_MCG_STATUS:
3004                 vcpu->arch.mcg_status = data;
3005                 break;
3006         case MSR_IA32_MCG_CTL:
3007                 if (!(mcg_cap & MCG_CTL_P) &&
3008                     (data || !msr_info->host_initiated))
3009                         return 1;
3010                 if (data != 0 && data != ~(u64)0)
3011                         return 1;
3012                 vcpu->arch.mcg_ctl = data;
3013                 break;
3014         default:
3015                 if (msr >= MSR_IA32_MC0_CTL &&
3016                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3017                         u32 offset = array_index_nospec(
3018                                 msr - MSR_IA32_MC0_CTL,
3019                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3020
3021                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3022                          * some Linux kernels though clear bit 10 in bank 4 to
3023                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3024                          * this to avoid an uncatched #GP in the guest
3025                          */
3026                         if ((offset & 0x3) == 0 &&
3027                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3028                                 return -1;
3029
3030                         /* MCi_STATUS */
3031                         if (!msr_info->host_initiated &&
3032                             (offset & 0x3) == 1 && data != 0) {
3033                                 if (!can_set_mci_status(vcpu))
3034                                         return -1;
3035                         }
3036
3037                         vcpu->arch.mce_banks[offset] = data;
3038                         break;
3039                 }
3040                 return 1;
3041         }
3042         return 0;
3043 }
3044
3045 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3046 {
3047         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3048
3049         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3050 }
3051
3052 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3053 {
3054         gpa_t gpa = data & ~0x3f;
3055
3056         /* Bits 4:5 are reserved, Should be zero */
3057         if (data & 0x30)
3058                 return 1;
3059
3060         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3061             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3062                 return 1;
3063
3064         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3065             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3066                 return 1;
3067
3068         if (!lapic_in_kernel(vcpu))
3069                 return data ? 1 : 0;
3070
3071         vcpu->arch.apf.msr_en_val = data;
3072
3073         if (!kvm_pv_async_pf_enabled(vcpu)) {
3074                 kvm_clear_async_pf_completion_queue(vcpu);
3075                 kvm_async_pf_hash_reset(vcpu);
3076                 return 0;
3077         }
3078
3079         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3080                                         sizeof(u64)))
3081                 return 1;
3082
3083         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3084         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3085
3086         kvm_async_pf_wakeup_all(vcpu);
3087
3088         return 0;
3089 }
3090
3091 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3092 {
3093         /* Bits 8-63 are reserved */
3094         if (data >> 8)
3095                 return 1;
3096
3097         if (!lapic_in_kernel(vcpu))
3098                 return 1;
3099
3100         vcpu->arch.apf.msr_int_val = data;
3101
3102         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3103
3104         return 0;
3105 }
3106
3107 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3108 {
3109         vcpu->arch.pv_time_enabled = false;
3110         vcpu->arch.time = 0;
3111 }
3112
3113 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3114 {
3115         ++vcpu->stat.tlb_flush;
3116         static_call(kvm_x86_tlb_flush_all)(vcpu);
3117 }
3118
3119 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3120 {
3121         ++vcpu->stat.tlb_flush;
3122
3123         if (!tdp_enabled) {
3124                /*
3125                  * A TLB flush on behalf of the guest is equivalent to
3126                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3127                  * a forced sync of the shadow page tables.  Unload the
3128                  * entire MMU here and the subsequent load will sync the
3129                  * shadow page tables, and also flush the TLB.
3130                  */
3131                 kvm_mmu_unload(vcpu);
3132                 return;
3133         }
3134
3135         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3136 }
3137
3138 static void record_steal_time(struct kvm_vcpu *vcpu)
3139 {
3140         struct kvm_host_map map;
3141         struct kvm_steal_time *st;
3142
3143         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3144                 kvm_xen_runstate_set_running(vcpu);
3145                 return;
3146         }
3147
3148         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3149                 return;
3150
3151         /* -EAGAIN is returned in atomic context so we can just return. */
3152         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3153                         &map, &vcpu->arch.st.cache, false))
3154                 return;
3155
3156         st = map.hva +
3157                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3158
3159         /*
3160          * Doing a TLB flush here, on the guest's behalf, can avoid
3161          * expensive IPIs.
3162          */
3163         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3164                 u8 st_preempted = xchg(&st->preempted, 0);
3165
3166                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3167                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3168                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3169                         kvm_vcpu_flush_tlb_guest(vcpu);
3170         } else {
3171                 st->preempted = 0;
3172         }
3173
3174         vcpu->arch.st.preempted = 0;
3175
3176         if (st->version & 1)
3177                 st->version += 1;  /* first time write, random junk */
3178
3179         st->version += 1;
3180
3181         smp_wmb();
3182
3183         st->steal += current->sched_info.run_delay -
3184                 vcpu->arch.st.last_steal;
3185         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3186
3187         smp_wmb();
3188
3189         st->version += 1;
3190
3191         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3192 }
3193
3194 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3195 {
3196         bool pr = false;
3197         u32 msr = msr_info->index;
3198         u64 data = msr_info->data;
3199
3200         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3201                 return kvm_xen_write_hypercall_page(vcpu, data);
3202
3203         switch (msr) {
3204         case MSR_AMD64_NB_CFG:
3205         case MSR_IA32_UCODE_WRITE:
3206         case MSR_VM_HSAVE_PA:
3207         case MSR_AMD64_PATCH_LOADER:
3208         case MSR_AMD64_BU_CFG2:
3209         case MSR_AMD64_DC_CFG:
3210         case MSR_F15H_EX_CFG:
3211                 break;
3212
3213         case MSR_IA32_UCODE_REV:
3214                 if (msr_info->host_initiated)
3215                         vcpu->arch.microcode_version = data;
3216                 break;
3217         case MSR_IA32_ARCH_CAPABILITIES:
3218                 if (!msr_info->host_initiated)
3219                         return 1;
3220                 vcpu->arch.arch_capabilities = data;
3221                 break;
3222         case MSR_IA32_PERF_CAPABILITIES: {
3223                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3224
3225                 if (!msr_info->host_initiated)
3226                         return 1;
3227                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3228                         return 1;
3229                 if (data & ~msr_ent.data)
3230                         return 1;
3231
3232                 vcpu->arch.perf_capabilities = data;
3233
3234                 return 0;
3235                 }
3236         case MSR_EFER:
3237                 return set_efer(vcpu, msr_info);
3238         case MSR_K7_HWCR:
3239                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3240                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3241                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3242
3243                 /* Handle McStatusWrEn */
3244                 if (data == BIT_ULL(18)) {
3245                         vcpu->arch.msr_hwcr = data;
3246                 } else if (data != 0) {
3247                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3248                                     data);
3249                         return 1;
3250                 }
3251                 break;
3252         case MSR_FAM10H_MMIO_CONF_BASE:
3253                 if (data != 0) {
3254                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3255                                     "0x%llx\n", data);
3256                         return 1;
3257                 }
3258                 break;
3259         case 0x200 ... 0x2ff:
3260                 return kvm_mtrr_set_msr(vcpu, msr, data);
3261         case MSR_IA32_APICBASE:
3262                 return kvm_set_apic_base(vcpu, msr_info);
3263         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3264                 return kvm_x2apic_msr_write(vcpu, msr, data);
3265         case MSR_IA32_TSC_DEADLINE:
3266                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3267                 break;
3268         case MSR_IA32_TSC_ADJUST:
3269                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3270                         if (!msr_info->host_initiated) {
3271                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3272                                 adjust_tsc_offset_guest(vcpu, adj);
3273                         }
3274                         vcpu->arch.ia32_tsc_adjust_msr = data;
3275                 }
3276                 break;
3277         case MSR_IA32_MISC_ENABLE:
3278                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3279                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3280                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3281                                 return 1;
3282                         vcpu->arch.ia32_misc_enable_msr = data;
3283                         kvm_update_cpuid_runtime(vcpu);
3284                 } else {
3285                         vcpu->arch.ia32_misc_enable_msr = data;
3286                 }
3287                 break;
3288         case MSR_IA32_SMBASE:
3289                 if (!msr_info->host_initiated)
3290                         return 1;
3291                 vcpu->arch.smbase = data;
3292                 break;
3293         case MSR_IA32_POWER_CTL:
3294                 vcpu->arch.msr_ia32_power_ctl = data;
3295                 break;
3296         case MSR_IA32_TSC:
3297                 if (msr_info->host_initiated) {
3298                         kvm_synchronize_tsc(vcpu, data);
3299                 } else {
3300                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3301                         adjust_tsc_offset_guest(vcpu, adj);
3302                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3303                 }
3304                 break;
3305         case MSR_IA32_XSS:
3306                 if (!msr_info->host_initiated &&
3307                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3308                         return 1;
3309                 /*
3310                  * KVM supports exposing PT to the guest, but does not support
3311                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3312                  * XSAVES/XRSTORS to save/restore PT MSRs.
3313                  */
3314                 if (data & ~supported_xss)
3315                         return 1;
3316                 vcpu->arch.ia32_xss = data;
3317                 break;
3318         case MSR_SMI_COUNT:
3319                 if (!msr_info->host_initiated)
3320                         return 1;
3321                 vcpu->arch.smi_count = data;
3322                 break;
3323         case MSR_KVM_WALL_CLOCK_NEW:
3324                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3325                         return 1;
3326
3327                 vcpu->kvm->arch.wall_clock = data;
3328                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3329                 break;
3330         case MSR_KVM_WALL_CLOCK:
3331                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3332                         return 1;
3333
3334                 vcpu->kvm->arch.wall_clock = data;
3335                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3336                 break;
3337         case MSR_KVM_SYSTEM_TIME_NEW:
3338                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3339                         return 1;
3340
3341                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3342                 break;
3343         case MSR_KVM_SYSTEM_TIME:
3344                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3345                         return 1;
3346
3347                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3348                 break;
3349         case MSR_KVM_ASYNC_PF_EN:
3350                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3351                         return 1;
3352
3353                 if (kvm_pv_enable_async_pf(vcpu, data))
3354                         return 1;
3355                 break;
3356         case MSR_KVM_ASYNC_PF_INT:
3357                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3358                         return 1;
3359
3360                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3361                         return 1;
3362                 break;
3363         case MSR_KVM_ASYNC_PF_ACK:
3364                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3365                         return 1;
3366                 if (data & 0x1) {
3367                         vcpu->arch.apf.pageready_pending = false;
3368                         kvm_check_async_pf_completion(vcpu);
3369                 }
3370                 break;
3371         case MSR_KVM_STEAL_TIME:
3372                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3373                         return 1;
3374
3375                 if (unlikely(!sched_info_on()))
3376                         return 1;
3377
3378                 if (data & KVM_STEAL_RESERVED_MASK)
3379                         return 1;
3380
3381                 vcpu->arch.st.msr_val = data;
3382
3383                 if (!(data & KVM_MSR_ENABLED))
3384                         break;
3385
3386                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3387
3388                 break;
3389         case MSR_KVM_PV_EOI_EN:
3390                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3391                         return 1;
3392
3393                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3394                         return 1;
3395                 break;
3396
3397         case MSR_KVM_POLL_CONTROL:
3398                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3399                         return 1;
3400
3401                 /* only enable bit supported */
3402                 if (data & (-1ULL << 1))
3403                         return 1;
3404
3405                 vcpu->arch.msr_kvm_poll_control = data;
3406                 break;
3407
3408         case MSR_IA32_MCG_CTL:
3409         case MSR_IA32_MCG_STATUS:
3410         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3411                 return set_msr_mce(vcpu, msr_info);
3412
3413         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3414         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3415                 pr = true;
3416                 fallthrough;
3417         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3418         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3419                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3420                         return kvm_pmu_set_msr(vcpu, msr_info);
3421
3422                 if (pr || data != 0)
3423                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3424                                     "0x%x data 0x%llx\n", msr, data);
3425                 break;
3426         case MSR_K7_CLK_CTL:
3427                 /*
3428                  * Ignore all writes to this no longer documented MSR.
3429                  * Writes are only relevant for old K7 processors,
3430                  * all pre-dating SVM, but a recommended workaround from
3431                  * AMD for these chips. It is possible to specify the
3432                  * affected processor models on the command line, hence
3433                  * the need to ignore the workaround.
3434                  */
3435                 break;
3436         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3437         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3438         case HV_X64_MSR_SYNDBG_OPTIONS:
3439         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3440         case HV_X64_MSR_CRASH_CTL:
3441         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3442         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3443         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3444         case HV_X64_MSR_TSC_EMULATION_STATUS:
3445                 return kvm_hv_set_msr_common(vcpu, msr, data,
3446                                              msr_info->host_initiated);
3447         case MSR_IA32_BBL_CR_CTL3:
3448                 /* Drop writes to this legacy MSR -- see rdmsr
3449                  * counterpart for further detail.
3450                  */
3451                 if (report_ignored_msrs)
3452                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3453                                 msr, data);
3454                 break;
3455         case MSR_AMD64_OSVW_ID_LENGTH:
3456                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3457                         return 1;
3458                 vcpu->arch.osvw.length = data;
3459                 break;
3460         case MSR_AMD64_OSVW_STATUS:
3461                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3462                         return 1;
3463                 vcpu->arch.osvw.status = data;
3464                 break;
3465         case MSR_PLATFORM_INFO:
3466                 if (!msr_info->host_initiated ||
3467                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3468                      cpuid_fault_enabled(vcpu)))
3469                         return 1;
3470                 vcpu->arch.msr_platform_info = data;
3471                 break;
3472         case MSR_MISC_FEATURES_ENABLES:
3473                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3474                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3475                      !supports_cpuid_fault(vcpu)))
3476                         return 1;
3477                 vcpu->arch.msr_misc_features_enables = data;
3478                 break;
3479         default:
3480                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3481                         return kvm_pmu_set_msr(vcpu, msr_info);
3482                 return KVM_MSR_RET_INVALID;
3483         }
3484         return 0;
3485 }
3486 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3487
3488 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3489 {
3490         u64 data;
3491         u64 mcg_cap = vcpu->arch.mcg_cap;
3492         unsigned bank_num = mcg_cap & 0xff;
3493
3494         switch (msr) {
3495         case MSR_IA32_P5_MC_ADDR:
3496         case MSR_IA32_P5_MC_TYPE:
3497                 data = 0;
3498                 break;
3499         case MSR_IA32_MCG_CAP:
3500                 data = vcpu->arch.mcg_cap;
3501                 break;
3502         case MSR_IA32_MCG_CTL:
3503                 if (!(mcg_cap & MCG_CTL_P) && !host)
3504                         return 1;
3505                 data = vcpu->arch.mcg_ctl;
3506                 break;
3507         case MSR_IA32_MCG_STATUS:
3508                 data = vcpu->arch.mcg_status;
3509                 break;
3510         default:
3511                 if (msr >= MSR_IA32_MC0_CTL &&
3512                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3513                         u32 offset = array_index_nospec(
3514                                 msr - MSR_IA32_MC0_CTL,
3515                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3516
3517                         data = vcpu->arch.mce_banks[offset];
3518                         break;
3519                 }
3520                 return 1;
3521         }
3522         *pdata = data;
3523         return 0;
3524 }
3525
3526 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3527 {
3528         switch (msr_info->index) {
3529         case MSR_IA32_PLATFORM_ID:
3530         case MSR_IA32_EBL_CR_POWERON:
3531         case MSR_IA32_LASTBRANCHFROMIP:
3532         case MSR_IA32_LASTBRANCHTOIP:
3533         case MSR_IA32_LASTINTFROMIP:
3534         case MSR_IA32_LASTINTTOIP:
3535         case MSR_K8_SYSCFG:
3536         case MSR_K8_TSEG_ADDR:
3537         case MSR_K8_TSEG_MASK:
3538         case MSR_VM_HSAVE_PA:
3539         case MSR_K8_INT_PENDING_MSG:
3540         case MSR_AMD64_NB_CFG:
3541         case MSR_FAM10H_MMIO_CONF_BASE:
3542         case MSR_AMD64_BU_CFG2:
3543         case MSR_IA32_PERF_CTL:
3544         case MSR_AMD64_DC_CFG:
3545         case MSR_F15H_EX_CFG:
3546         /*
3547          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3548          * limit) MSRs. Just return 0, as we do not want to expose the host
3549          * data here. Do not conditionalize this on CPUID, as KVM does not do
3550          * so for existing CPU-specific MSRs.
3551          */
3552         case MSR_RAPL_POWER_UNIT:
3553         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3554         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3555         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3556         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3557                 msr_info->data = 0;
3558                 break;
3559         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3560                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3561                         return kvm_pmu_get_msr(vcpu, msr_info);
3562                 if (!msr_info->host_initiated)
3563                         return 1;
3564                 msr_info->data = 0;
3565                 break;
3566         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3567         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3568         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3569         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3570                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3571                         return kvm_pmu_get_msr(vcpu, msr_info);
3572                 msr_info->data = 0;
3573                 break;
3574         case MSR_IA32_UCODE_REV:
3575                 msr_info->data = vcpu->arch.microcode_version;
3576                 break;
3577         case MSR_IA32_ARCH_CAPABILITIES:
3578                 if (!msr_info->host_initiated &&
3579                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3580                         return 1;
3581                 msr_info->data = vcpu->arch.arch_capabilities;
3582                 break;
3583         case MSR_IA32_PERF_CAPABILITIES:
3584                 if (!msr_info->host_initiated &&
3585                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3586                         return 1;
3587                 msr_info->data = vcpu->arch.perf_capabilities;
3588                 break;
3589         case MSR_IA32_POWER_CTL:
3590                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3591                 break;
3592         case MSR_IA32_TSC: {
3593                 /*
3594                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3595                  * even when not intercepted. AMD manual doesn't explicitly
3596                  * state this but appears to behave the same.
3597                  *
3598                  * On userspace reads and writes, however, we unconditionally
3599                  * return L1's TSC value to ensure backwards-compatible
3600                  * behavior for migration.
3601                  */
3602                 u64 offset, ratio;
3603
3604                 if (msr_info->host_initiated) {
3605                         offset = vcpu->arch.l1_tsc_offset;
3606                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3607                 } else {
3608                         offset = vcpu->arch.tsc_offset;
3609                         ratio = vcpu->arch.tsc_scaling_ratio;
3610                 }
3611
3612                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3613                 break;
3614         }
3615         case MSR_MTRRcap:
3616         case 0x200 ... 0x2ff:
3617                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3618         case 0xcd: /* fsb frequency */
3619                 msr_info->data = 3;
3620                 break;
3621                 /*
3622                  * MSR_EBC_FREQUENCY_ID
3623                  * Conservative value valid for even the basic CPU models.
3624                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3625                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3626                  * and 266MHz for model 3, or 4. Set Core Clock
3627                  * Frequency to System Bus Frequency Ratio to 1 (bits
3628                  * 31:24) even though these are only valid for CPU
3629                  * models > 2, however guests may end up dividing or
3630                  * multiplying by zero otherwise.
3631                  */
3632         case MSR_EBC_FREQUENCY_ID:
3633                 msr_info->data = 1 << 24;
3634                 break;
3635         case MSR_IA32_APICBASE:
3636                 msr_info->data = kvm_get_apic_base(vcpu);
3637                 break;
3638         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3639                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3640         case MSR_IA32_TSC_DEADLINE:
3641                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3642                 break;
3643         case MSR_IA32_TSC_ADJUST:
3644                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3645                 break;
3646         case MSR_IA32_MISC_ENABLE:
3647                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3648                 break;
3649         case MSR_IA32_SMBASE:
3650                 if (!msr_info->host_initiated)
3651                         return 1;
3652                 msr_info->data = vcpu->arch.smbase;
3653                 break;
3654         case MSR_SMI_COUNT:
3655                 msr_info->data = vcpu->arch.smi_count;
3656                 break;
3657         case MSR_IA32_PERF_STATUS:
3658                 /* TSC increment by tick */
3659                 msr_info->data = 1000ULL;
3660                 /* CPU multiplier */
3661                 msr_info->data |= (((uint64_t)4ULL) << 40);
3662                 break;
3663         case MSR_EFER:
3664                 msr_info->data = vcpu->arch.efer;
3665                 break;
3666         case MSR_KVM_WALL_CLOCK:
3667                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3668                         return 1;
3669
3670                 msr_info->data = vcpu->kvm->arch.wall_clock;
3671                 break;
3672         case MSR_KVM_WALL_CLOCK_NEW:
3673                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3674                         return 1;
3675
3676                 msr_info->data = vcpu->kvm->arch.wall_clock;
3677                 break;
3678         case MSR_KVM_SYSTEM_TIME:
3679                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3680                         return 1;
3681
3682                 msr_info->data = vcpu->arch.time;
3683                 break;
3684         case MSR_KVM_SYSTEM_TIME_NEW:
3685                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3686                         return 1;
3687
3688                 msr_info->data = vcpu->arch.time;
3689                 break;
3690         case MSR_KVM_ASYNC_PF_EN:
3691                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3692                         return 1;
3693
3694                 msr_info->data = vcpu->arch.apf.msr_en_val;
3695                 break;
3696         case MSR_KVM_ASYNC_PF_INT:
3697                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3698                         return 1;
3699
3700                 msr_info->data = vcpu->arch.apf.msr_int_val;
3701                 break;
3702         case MSR_KVM_ASYNC_PF_ACK:
3703                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3704                         return 1;
3705
3706                 msr_info->data = 0;
3707                 break;
3708         case MSR_KVM_STEAL_TIME:
3709                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3710                         return 1;
3711
3712                 msr_info->data = vcpu->arch.st.msr_val;
3713                 break;
3714         case MSR_KVM_PV_EOI_EN:
3715                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3716                         return 1;
3717
3718                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3719                 break;
3720         case MSR_KVM_POLL_CONTROL:
3721                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3722                         return 1;
3723
3724                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3725                 break;
3726         case MSR_IA32_P5_MC_ADDR:
3727         case MSR_IA32_P5_MC_TYPE:
3728         case MSR_IA32_MCG_CAP:
3729         case MSR_IA32_MCG_CTL:
3730         case MSR_IA32_MCG_STATUS:
3731         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3732                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3733                                    msr_info->host_initiated);
3734         case MSR_IA32_XSS:
3735                 if (!msr_info->host_initiated &&
3736                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3737                         return 1;
3738                 msr_info->data = vcpu->arch.ia32_xss;
3739                 break;
3740         case MSR_K7_CLK_CTL:
3741                 /*
3742                  * Provide expected ramp-up count for K7. All other
3743                  * are set to zero, indicating minimum divisors for
3744                  * every field.
3745                  *
3746                  * This prevents guest kernels on AMD host with CPU
3747                  * type 6, model 8 and higher from exploding due to
3748                  * the rdmsr failing.
3749                  */
3750                 msr_info->data = 0x20000000;
3751                 break;
3752         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3753         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3754         case HV_X64_MSR_SYNDBG_OPTIONS:
3755         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3756         case HV_X64_MSR_CRASH_CTL:
3757         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3758         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3759         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3760         case HV_X64_MSR_TSC_EMULATION_STATUS:
3761                 return kvm_hv_get_msr_common(vcpu,
3762                                              msr_info->index, &msr_info->data,
3763                                              msr_info->host_initiated);
3764         case MSR_IA32_BBL_CR_CTL3:
3765                 /* This legacy MSR exists but isn't fully documented in current
3766                  * silicon.  It is however accessed by winxp in very narrow
3767                  * scenarios where it sets bit #19, itself documented as
3768                  * a "reserved" bit.  Best effort attempt to source coherent
3769                  * read data here should the balance of the register be
3770                  * interpreted by the guest:
3771                  *
3772                  * L2 cache control register 3: 64GB range, 256KB size,
3773                  * enabled, latency 0x1, configured
3774                  */
3775                 msr_info->data = 0xbe702111;
3776                 break;
3777         case MSR_AMD64_OSVW_ID_LENGTH:
3778                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3779                         return 1;
3780                 msr_info->data = vcpu->arch.osvw.length;
3781                 break;
3782         case MSR_AMD64_OSVW_STATUS:
3783                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3784                         return 1;
3785                 msr_info->data = vcpu->arch.osvw.status;
3786                 break;
3787         case MSR_PLATFORM_INFO:
3788                 if (!msr_info->host_initiated &&
3789                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3790                         return 1;
3791                 msr_info->data = vcpu->arch.msr_platform_info;
3792                 break;
3793         case MSR_MISC_FEATURES_ENABLES:
3794                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3795                 break;
3796         case MSR_K7_HWCR:
3797                 msr_info->data = vcpu->arch.msr_hwcr;
3798                 break;
3799         default:
3800                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3801                         return kvm_pmu_get_msr(vcpu, msr_info);
3802                 return KVM_MSR_RET_INVALID;
3803         }
3804         return 0;
3805 }
3806 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3807
3808 /*
3809  * Read or write a bunch of msrs. All parameters are kernel addresses.
3810  *
3811  * @return number of msrs set successfully.
3812  */
3813 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3814                     struct kvm_msr_entry *entries,
3815                     int (*do_msr)(struct kvm_vcpu *vcpu,
3816                                   unsigned index, u64 *data))
3817 {
3818         int i;
3819
3820         for (i = 0; i < msrs->nmsrs; ++i)
3821                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3822                         break;
3823
3824         return i;
3825 }
3826
3827 /*
3828  * Read or write a bunch of msrs. Parameters are user addresses.
3829  *
3830  * @return number of msrs set successfully.
3831  */
3832 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3833                   int (*do_msr)(struct kvm_vcpu *vcpu,
3834                                 unsigned index, u64 *data),
3835                   int writeback)
3836 {
3837         struct kvm_msrs msrs;
3838         struct kvm_msr_entry *entries;
3839         int r, n;
3840         unsigned size;
3841
3842         r = -EFAULT;
3843         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3844                 goto out;
3845
3846         r = -E2BIG;
3847         if (msrs.nmsrs >= MAX_IO_MSRS)
3848                 goto out;
3849
3850         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3851         entries = memdup_user(user_msrs->entries, size);
3852         if (IS_ERR(entries)) {
3853                 r = PTR_ERR(entries);
3854                 goto out;
3855         }
3856
3857         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3858         if (r < 0)
3859                 goto out_free;
3860
3861         r = -EFAULT;
3862         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3863                 goto out_free;
3864
3865         r = n;
3866
3867 out_free:
3868         kfree(entries);
3869 out:
3870         return r;
3871 }
3872
3873 static inline bool kvm_can_mwait_in_guest(void)
3874 {
3875         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3876                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3877                 boot_cpu_has(X86_FEATURE_ARAT);
3878 }
3879
3880 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3881                                             struct kvm_cpuid2 __user *cpuid_arg)
3882 {
3883         struct kvm_cpuid2 cpuid;
3884         int r;
3885
3886         r = -EFAULT;
3887         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3888                 return r;
3889
3890         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3891         if (r)
3892                 return r;
3893
3894         r = -EFAULT;
3895         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3896                 return r;
3897
3898         return 0;
3899 }
3900
3901 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3902 {
3903         int r = 0;
3904
3905         switch (ext) {
3906         case KVM_CAP_IRQCHIP:
3907         case KVM_CAP_HLT:
3908         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3909         case KVM_CAP_SET_TSS_ADDR:
3910         case KVM_CAP_EXT_CPUID:
3911         case KVM_CAP_EXT_EMUL_CPUID:
3912         case KVM_CAP_CLOCKSOURCE:
3913         case KVM_CAP_PIT:
3914         case KVM_CAP_NOP_IO_DELAY:
3915         case KVM_CAP_MP_STATE:
3916         case KVM_CAP_SYNC_MMU:
3917         case KVM_CAP_USER_NMI:
3918         case KVM_CAP_REINJECT_CONTROL:
3919         case KVM_CAP_IRQ_INJECT_STATUS:
3920         case KVM_CAP_IOEVENTFD:
3921         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3922         case KVM_CAP_PIT2:
3923         case KVM_CAP_PIT_STATE2:
3924         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3925         case KVM_CAP_VCPU_EVENTS:
3926         case KVM_CAP_HYPERV:
3927         case KVM_CAP_HYPERV_VAPIC:
3928         case KVM_CAP_HYPERV_SPIN:
3929         case KVM_CAP_HYPERV_SYNIC:
3930         case KVM_CAP_HYPERV_SYNIC2:
3931         case KVM_CAP_HYPERV_VP_INDEX:
3932         case KVM_CAP_HYPERV_EVENTFD:
3933         case KVM_CAP_HYPERV_TLBFLUSH:
3934         case KVM_CAP_HYPERV_SEND_IPI:
3935         case KVM_CAP_HYPERV_CPUID:
3936         case KVM_CAP_SYS_HYPERV_CPUID:
3937         case KVM_CAP_PCI_SEGMENT:
3938         case KVM_CAP_DEBUGREGS:
3939         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3940         case KVM_CAP_XSAVE:
3941         case KVM_CAP_ASYNC_PF:
3942         case KVM_CAP_ASYNC_PF_INT:
3943         case KVM_CAP_GET_TSC_KHZ:
3944         case KVM_CAP_KVMCLOCK_CTRL:
3945         case KVM_CAP_READONLY_MEM:
3946         case KVM_CAP_HYPERV_TIME:
3947         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3948         case KVM_CAP_TSC_DEADLINE_TIMER:
3949         case KVM_CAP_DISABLE_QUIRKS:
3950         case KVM_CAP_SET_BOOT_CPU_ID:
3951         case KVM_CAP_SPLIT_IRQCHIP:
3952         case KVM_CAP_IMMEDIATE_EXIT:
3953         case KVM_CAP_PMU_EVENT_FILTER:
3954         case KVM_CAP_GET_MSR_FEATURES:
3955         case KVM_CAP_MSR_PLATFORM_INFO:
3956         case KVM_CAP_EXCEPTION_PAYLOAD:
3957         case KVM_CAP_SET_GUEST_DEBUG:
3958         case KVM_CAP_LAST_CPU:
3959         case KVM_CAP_X86_USER_SPACE_MSR:
3960         case KVM_CAP_X86_MSR_FILTER:
3961         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3962 #ifdef CONFIG_X86_SGX_KVM
3963         case KVM_CAP_SGX_ATTRIBUTE:
3964 #endif
3965         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3966                 r = 1;
3967                 break;
3968         case KVM_CAP_SET_GUEST_DEBUG2:
3969                 return KVM_GUESTDBG_VALID_MASK;
3970 #ifdef CONFIG_KVM_XEN
3971         case KVM_CAP_XEN_HVM:
3972                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3973                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3974                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3975                 if (sched_info_on())
3976                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3977                 break;
3978 #endif
3979         case KVM_CAP_SYNC_REGS:
3980                 r = KVM_SYNC_X86_VALID_FIELDS;
3981                 break;
3982         case KVM_CAP_ADJUST_CLOCK:
3983                 r = KVM_CLOCK_TSC_STABLE;
3984                 break;
3985         case KVM_CAP_X86_DISABLE_EXITS:
3986                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3987                       KVM_X86_DISABLE_EXITS_CSTATE;
3988                 if(kvm_can_mwait_in_guest())
3989                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3990                 break;
3991         case KVM_CAP_X86_SMM:
3992                 /* SMBASE is usually relocated above 1M on modern chipsets,
3993                  * and SMM handlers might indeed rely on 4G segment limits,
3994                  * so do not report SMM to be available if real mode is
3995                  * emulated via vm86 mode.  Still, do not go to great lengths
3996                  * to avoid userspace's usage of the feature, because it is a
3997                  * fringe case that is not enabled except via specific settings
3998                  * of the module parameters.
3999                  */
4000                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4001                 break;
4002         case KVM_CAP_VAPIC:
4003                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4004                 break;
4005         case KVM_CAP_NR_VCPUS:
4006                 r = KVM_SOFT_MAX_VCPUS;
4007                 break;
4008         case KVM_CAP_MAX_VCPUS:
4009                 r = KVM_MAX_VCPUS;
4010                 break;
4011         case KVM_CAP_MAX_VCPU_ID:
4012                 r = KVM_MAX_VCPU_ID;
4013                 break;
4014         case KVM_CAP_PV_MMU:    /* obsolete */
4015                 r = 0;
4016                 break;
4017         case KVM_CAP_MCE:
4018                 r = KVM_MAX_MCE_BANKS;
4019                 break;
4020         case KVM_CAP_XCRS:
4021                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4022                 break;
4023         case KVM_CAP_TSC_CONTROL:
4024                 r = kvm_has_tsc_control;
4025                 break;
4026         case KVM_CAP_X2APIC_API:
4027                 r = KVM_X2APIC_API_VALID_FLAGS;
4028                 break;
4029         case KVM_CAP_NESTED_STATE:
4030                 r = kvm_x86_ops.nested_ops->get_state ?
4031                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4032                 break;
4033         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4034                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4035                 break;
4036         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4037                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4038                 break;
4039         case KVM_CAP_SMALLER_MAXPHYADDR:
4040                 r = (int) allow_smaller_maxphyaddr;
4041                 break;
4042         case KVM_CAP_STEAL_TIME:
4043                 r = sched_info_on();
4044                 break;
4045         case KVM_CAP_X86_BUS_LOCK_EXIT:
4046                 if (kvm_has_bus_lock_exit)
4047                         r = KVM_BUS_LOCK_DETECTION_OFF |
4048                             KVM_BUS_LOCK_DETECTION_EXIT;
4049                 else
4050                         r = 0;
4051                 break;
4052         default:
4053                 break;
4054         }
4055         return r;
4056
4057 }
4058
4059 long kvm_arch_dev_ioctl(struct file *filp,
4060                         unsigned int ioctl, unsigned long arg)
4061 {
4062         void __user *argp = (void __user *)arg;
4063         long r;
4064
4065         switch (ioctl) {
4066         case KVM_GET_MSR_INDEX_LIST: {
4067                 struct kvm_msr_list __user *user_msr_list = argp;
4068                 struct kvm_msr_list msr_list;
4069                 unsigned n;
4070
4071                 r = -EFAULT;
4072                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4073                         goto out;
4074                 n = msr_list.nmsrs;
4075                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4076                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4077                         goto out;
4078                 r = -E2BIG;
4079                 if (n < msr_list.nmsrs)
4080                         goto out;
4081                 r = -EFAULT;
4082                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4083                                  num_msrs_to_save * sizeof(u32)))
4084                         goto out;
4085                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4086                                  &emulated_msrs,
4087                                  num_emulated_msrs * sizeof(u32)))
4088                         goto out;
4089                 r = 0;
4090                 break;
4091         }
4092         case KVM_GET_SUPPORTED_CPUID:
4093         case KVM_GET_EMULATED_CPUID: {
4094                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4095                 struct kvm_cpuid2 cpuid;
4096
4097                 r = -EFAULT;
4098                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4099                         goto out;
4100
4101                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4102                                             ioctl);
4103                 if (r)
4104                         goto out;
4105
4106                 r = -EFAULT;
4107                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4108                         goto out;
4109                 r = 0;
4110                 break;
4111         }
4112         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4113                 r = -EFAULT;
4114                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4115                                  sizeof(kvm_mce_cap_supported)))
4116                         goto out;
4117                 r = 0;
4118                 break;
4119         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4120                 struct kvm_msr_list __user *user_msr_list = argp;
4121                 struct kvm_msr_list msr_list;
4122                 unsigned int n;
4123
4124                 r = -EFAULT;
4125                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4126                         goto out;
4127                 n = msr_list.nmsrs;
4128                 msr_list.nmsrs = num_msr_based_features;
4129                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4130                         goto out;
4131                 r = -E2BIG;
4132                 if (n < msr_list.nmsrs)
4133                         goto out;
4134                 r = -EFAULT;
4135                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4136                                  num_msr_based_features * sizeof(u32)))
4137                         goto out;
4138                 r = 0;
4139                 break;
4140         }
4141         case KVM_GET_MSRS:
4142                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4143                 break;
4144         case KVM_GET_SUPPORTED_HV_CPUID:
4145                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4146                 break;
4147         default:
4148                 r = -EINVAL;
4149                 break;
4150         }
4151 out:
4152         return r;
4153 }
4154
4155 static void wbinvd_ipi(void *garbage)
4156 {
4157         wbinvd();
4158 }
4159
4160 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4161 {
4162         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4163 }
4164
4165 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4166 {
4167         /* Address WBINVD may be executed by guest */
4168         if (need_emulate_wbinvd(vcpu)) {
4169                 if (static_call(kvm_x86_has_wbinvd_exit)())
4170                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4171                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4172                         smp_call_function_single(vcpu->cpu,
4173                                         wbinvd_ipi, NULL, 1);
4174         }
4175
4176         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4177
4178         /* Save host pkru register if supported */
4179         vcpu->arch.host_pkru = read_pkru();
4180
4181         /* Apply any externally detected TSC adjustments (due to suspend) */
4182         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4183                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4184                 vcpu->arch.tsc_offset_adjustment = 0;
4185                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4186         }
4187
4188         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4189                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4190                                 rdtsc() - vcpu->arch.last_host_tsc;
4191                 if (tsc_delta < 0)
4192                         mark_tsc_unstable("KVM discovered backwards TSC");
4193
4194                 if (kvm_check_tsc_unstable()) {
4195                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4196                                                 vcpu->arch.last_guest_tsc);
4197                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4198                         vcpu->arch.tsc_catchup = 1;
4199                 }
4200
4201                 if (kvm_lapic_hv_timer_in_use(vcpu))
4202                         kvm_lapic_restart_hv_timer(vcpu);
4203
4204                 /*
4205                  * On a host with synchronized TSC, there is no need to update
4206                  * kvmclock on vcpu->cpu migration
4207                  */
4208                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4209                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4210                 if (vcpu->cpu != cpu)
4211                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4212                 vcpu->cpu = cpu;
4213         }
4214
4215         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4216 }
4217
4218 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4219 {
4220         struct kvm_host_map map;
4221         struct kvm_steal_time *st;
4222
4223         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4224                 return;
4225
4226         if (vcpu->arch.st.preempted)
4227                 return;
4228
4229         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4230                         &vcpu->arch.st.cache, true))
4231                 return;
4232
4233         st = map.hva +
4234                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4235
4236         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4237
4238         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4239 }
4240
4241 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4242 {
4243         int idx;
4244
4245         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4246                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4247
4248         /*
4249          * Take the srcu lock as memslots will be accessed to check the gfn
4250          * cache generation against the memslots generation.
4251          */
4252         idx = srcu_read_lock(&vcpu->kvm->srcu);
4253         if (kvm_xen_msr_enabled(vcpu->kvm))
4254                 kvm_xen_runstate_set_preempted(vcpu);
4255         else
4256                 kvm_steal_time_set_preempted(vcpu);
4257         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4258
4259         static_call(kvm_x86_vcpu_put)(vcpu);
4260         vcpu->arch.last_host_tsc = rdtsc();
4261         /*
4262          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4263          * on every vmexit, but if not, we might have a stale dr6 from the
4264          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4265          */
4266         set_debugreg(0, 6);
4267 }
4268
4269 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4270                                     struct kvm_lapic_state *s)
4271 {
4272         if (vcpu->arch.apicv_active)
4273                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4274
4275         return kvm_apic_get_state(vcpu, s);
4276 }
4277
4278 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4279                                     struct kvm_lapic_state *s)
4280 {
4281         int r;
4282
4283         r = kvm_apic_set_state(vcpu, s);
4284         if (r)
4285                 return r;
4286         update_cr8_intercept(vcpu);
4287
4288         return 0;
4289 }
4290
4291 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4292 {
4293         /*
4294          * We can accept userspace's request for interrupt injection
4295          * as long as we have a place to store the interrupt number.
4296          * The actual injection will happen when the CPU is able to
4297          * deliver the interrupt.
4298          */
4299         if (kvm_cpu_has_extint(vcpu))
4300                 return false;
4301
4302         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4303         return (!lapic_in_kernel(vcpu) ||
4304                 kvm_apic_accept_pic_intr(vcpu));
4305 }
4306
4307 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4308 {
4309         return kvm_arch_interrupt_allowed(vcpu) &&
4310                 kvm_cpu_accept_dm_intr(vcpu);
4311 }
4312
4313 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4314                                     struct kvm_interrupt *irq)
4315 {
4316         if (irq->irq >= KVM_NR_INTERRUPTS)
4317                 return -EINVAL;
4318
4319         if (!irqchip_in_kernel(vcpu->kvm)) {
4320                 kvm_queue_interrupt(vcpu, irq->irq, false);
4321                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4322                 return 0;
4323         }
4324
4325         /*
4326          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4327          * fail for in-kernel 8259.
4328          */
4329         if (pic_in_kernel(vcpu->kvm))
4330                 return -ENXIO;
4331
4332         if (vcpu->arch.pending_external_vector != -1)
4333                 return -EEXIST;
4334
4335         vcpu->arch.pending_external_vector = irq->irq;
4336         kvm_make_request(KVM_REQ_EVENT, vcpu);
4337         return 0;
4338 }
4339
4340 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4341 {
4342         kvm_inject_nmi(vcpu);
4343
4344         return 0;
4345 }
4346
4347 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4348 {
4349         kvm_make_request(KVM_REQ_SMI, vcpu);
4350
4351         return 0;
4352 }
4353
4354 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4355                                            struct kvm_tpr_access_ctl *tac)
4356 {
4357         if (tac->flags)
4358                 return -EINVAL;
4359         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4360         return 0;
4361 }
4362
4363 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4364                                         u64 mcg_cap)
4365 {
4366         int r;
4367         unsigned bank_num = mcg_cap & 0xff, bank;
4368
4369         r = -EINVAL;
4370         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4371                 goto out;
4372         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4373                 goto out;
4374         r = 0;
4375         vcpu->arch.mcg_cap = mcg_cap;
4376         /* Init IA32_MCG_CTL to all 1s */
4377         if (mcg_cap & MCG_CTL_P)
4378                 vcpu->arch.mcg_ctl = ~(u64)0;
4379         /* Init IA32_MCi_CTL to all 1s */
4380         for (bank = 0; bank < bank_num; bank++)
4381                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4382
4383         static_call(kvm_x86_setup_mce)(vcpu);
4384 out:
4385         return r;
4386 }
4387
4388 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4389                                       struct kvm_x86_mce *mce)
4390 {
4391         u64 mcg_cap = vcpu->arch.mcg_cap;
4392         unsigned bank_num = mcg_cap & 0xff;
4393         u64 *banks = vcpu->arch.mce_banks;
4394
4395         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4396                 return -EINVAL;
4397         /*
4398          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4399          * reporting is disabled
4400          */
4401         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4402             vcpu->arch.mcg_ctl != ~(u64)0)
4403                 return 0;
4404         banks += 4 * mce->bank;
4405         /*
4406          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4407          * reporting is disabled for the bank
4408          */
4409         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4410                 return 0;
4411         if (mce->status & MCI_STATUS_UC) {
4412                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4413                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4414                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4415                         return 0;
4416                 }
4417                 if (banks[1] & MCI_STATUS_VAL)
4418                         mce->status |= MCI_STATUS_OVER;
4419                 banks[2] = mce->addr;
4420                 banks[3] = mce->misc;
4421                 vcpu->arch.mcg_status = mce->mcg_status;
4422                 banks[1] = mce->status;
4423                 kvm_queue_exception(vcpu, MC_VECTOR);
4424         } else if (!(banks[1] & MCI_STATUS_VAL)
4425                    || !(banks[1] & MCI_STATUS_UC)) {
4426                 if (banks[1] & MCI_STATUS_VAL)
4427                         mce->status |= MCI_STATUS_OVER;
4428                 banks[2] = mce->addr;
4429                 banks[3] = mce->misc;
4430                 banks[1] = mce->status;
4431         } else
4432                 banks[1] |= MCI_STATUS_OVER;
4433         return 0;
4434 }
4435
4436 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4437                                                struct kvm_vcpu_events *events)
4438 {
4439         process_nmi(vcpu);
4440
4441         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4442                 process_smi(vcpu);
4443
4444         /*
4445          * In guest mode, payload delivery should be deferred,
4446          * so that the L1 hypervisor can intercept #PF before
4447          * CR2 is modified (or intercept #DB before DR6 is
4448          * modified under nVMX). Unless the per-VM capability,
4449          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4450          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4451          * opportunistically defer the exception payload, deliver it if the
4452          * capability hasn't been requested before processing a
4453          * KVM_GET_VCPU_EVENTS.
4454          */
4455         if (!vcpu->kvm->arch.exception_payload_enabled &&
4456             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4457                 kvm_deliver_exception_payload(vcpu);
4458
4459         /*
4460          * The API doesn't provide the instruction length for software
4461          * exceptions, so don't report them. As long as the guest RIP
4462          * isn't advanced, we should expect to encounter the exception
4463          * again.
4464          */
4465         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4466                 events->exception.injected = 0;
4467                 events->exception.pending = 0;
4468         } else {
4469                 events->exception.injected = vcpu->arch.exception.injected;
4470                 events->exception.pending = vcpu->arch.exception.pending;
4471                 /*
4472                  * For ABI compatibility, deliberately conflate
4473                  * pending and injected exceptions when
4474                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4475                  */
4476                 if (!vcpu->kvm->arch.exception_payload_enabled)
4477                         events->exception.injected |=
4478                                 vcpu->arch.exception.pending;
4479         }
4480         events->exception.nr = vcpu->arch.exception.nr;
4481         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4482         events->exception.error_code = vcpu->arch.exception.error_code;
4483         events->exception_has_payload = vcpu->arch.exception.has_payload;
4484         events->exception_payload = vcpu->arch.exception.payload;
4485
4486         events->interrupt.injected =
4487                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4488         events->interrupt.nr = vcpu->arch.interrupt.nr;
4489         events->interrupt.soft = 0;
4490         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4491
4492         events->nmi.injected = vcpu->arch.nmi_injected;
4493         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4494         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4495         events->nmi.pad = 0;
4496
4497         events->sipi_vector = 0; /* never valid when reporting to user space */
4498
4499         events->smi.smm = is_smm(vcpu);
4500         events->smi.pending = vcpu->arch.smi_pending;
4501         events->smi.smm_inside_nmi =
4502                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4503         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4504
4505         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4506                          | KVM_VCPUEVENT_VALID_SHADOW
4507                          | KVM_VCPUEVENT_VALID_SMM);
4508         if (vcpu->kvm->arch.exception_payload_enabled)
4509                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4510
4511         memset(&events->reserved, 0, sizeof(events->reserved));
4512 }
4513
4514 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4515
4516 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4517                                               struct kvm_vcpu_events *events)
4518 {
4519         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4520                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4521                               | KVM_VCPUEVENT_VALID_SHADOW
4522                               | KVM_VCPUEVENT_VALID_SMM
4523                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4524                 return -EINVAL;
4525
4526         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4527                 if (!vcpu->kvm->arch.exception_payload_enabled)
4528                         return -EINVAL;
4529                 if (events->exception.pending)
4530                         events->exception.injected = 0;
4531                 else
4532                         events->exception_has_payload = 0;
4533         } else {
4534                 events->exception.pending = 0;
4535                 events->exception_has_payload = 0;
4536         }
4537
4538         if ((events->exception.injected || events->exception.pending) &&
4539             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4540                 return -EINVAL;
4541
4542         /* INITs are latched while in SMM */
4543         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4544             (events->smi.smm || events->smi.pending) &&
4545             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4546                 return -EINVAL;
4547
4548         process_nmi(vcpu);
4549         vcpu->arch.exception.injected = events->exception.injected;
4550         vcpu->arch.exception.pending = events->exception.pending;
4551         vcpu->arch.exception.nr = events->exception.nr;
4552         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4553         vcpu->arch.exception.error_code = events->exception.error_code;
4554         vcpu->arch.exception.has_payload = events->exception_has_payload;
4555         vcpu->arch.exception.payload = events->exception_payload;
4556
4557         vcpu->arch.interrupt.injected = events->interrupt.injected;
4558         vcpu->arch.interrupt.nr = events->interrupt.nr;
4559         vcpu->arch.interrupt.soft = events->interrupt.soft;
4560         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4561                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4562                                                 events->interrupt.shadow);
4563
4564         vcpu->arch.nmi_injected = events->nmi.injected;
4565         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4566                 vcpu->arch.nmi_pending = events->nmi.pending;
4567         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4568
4569         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4570             lapic_in_kernel(vcpu))
4571                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4572
4573         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4574                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4575                         if (events->smi.smm)
4576                                 vcpu->arch.hflags |= HF_SMM_MASK;
4577                         else
4578                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4579                         kvm_smm_changed(vcpu);
4580                 }
4581
4582                 vcpu->arch.smi_pending = events->smi.pending;
4583
4584                 if (events->smi.smm) {
4585                         if (events->smi.smm_inside_nmi)
4586                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4587                         else
4588                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4589                 }
4590
4591                 if (lapic_in_kernel(vcpu)) {
4592                         if (events->smi.latched_init)
4593                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4594                         else
4595                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4596                 }
4597         }
4598
4599         kvm_make_request(KVM_REQ_EVENT, vcpu);
4600
4601         return 0;
4602 }
4603
4604 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4605                                              struct kvm_debugregs *dbgregs)
4606 {
4607         unsigned long val;
4608
4609         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4610         kvm_get_dr(vcpu, 6, &val);
4611         dbgregs->dr6 = val;
4612         dbgregs->dr7 = vcpu->arch.dr7;
4613         dbgregs->flags = 0;
4614         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4615 }
4616
4617 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4618                                             struct kvm_debugregs *dbgregs)
4619 {
4620         if (dbgregs->flags)
4621                 return -EINVAL;
4622
4623         if (!kvm_dr6_valid(dbgregs->dr6))
4624                 return -EINVAL;
4625         if (!kvm_dr7_valid(dbgregs->dr7))
4626                 return -EINVAL;
4627
4628         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4629         kvm_update_dr0123(vcpu);
4630         vcpu->arch.dr6 = dbgregs->dr6;
4631         vcpu->arch.dr7 = dbgregs->dr7;
4632         kvm_update_dr7(vcpu);
4633
4634         return 0;
4635 }
4636
4637 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4638
4639 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4640 {
4641         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4642         u64 xstate_bv = xsave->header.xfeatures;
4643         u64 valid;
4644
4645         /*
4646          * Copy legacy XSAVE area, to avoid complications with CPUID
4647          * leaves 0 and 1 in the loop below.
4648          */
4649         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4650
4651         /* Set XSTATE_BV */
4652         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4653         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4654
4655         /*
4656          * Copy each region from the possibly compacted offset to the
4657          * non-compacted offset.
4658          */
4659         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4660         while (valid) {
4661                 u64 xfeature_mask = valid & -valid;
4662                 int xfeature_nr = fls64(xfeature_mask) - 1;
4663                 void *src = get_xsave_addr(xsave, xfeature_nr);
4664
4665                 if (src) {
4666                         u32 size, offset, ecx, edx;
4667                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4668                                     &size, &offset, &ecx, &edx);
4669                         if (xfeature_nr == XFEATURE_PKRU)
4670                                 memcpy(dest + offset, &vcpu->arch.pkru,
4671                                        sizeof(vcpu->arch.pkru));
4672                         else
4673                                 memcpy(dest + offset, src, size);
4674
4675                 }
4676
4677                 valid -= xfeature_mask;
4678         }
4679 }
4680
4681 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4682 {
4683         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4684         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4685         u64 valid;
4686
4687         /*
4688          * Copy legacy XSAVE area, to avoid complications with CPUID
4689          * leaves 0 and 1 in the loop below.
4690          */
4691         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4692
4693         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4694         xsave->header.xfeatures = xstate_bv;
4695         if (boot_cpu_has(X86_FEATURE_XSAVES))
4696                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4697
4698         /*
4699          * Copy each region from the non-compacted offset to the
4700          * possibly compacted offset.
4701          */
4702         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4703         while (valid) {
4704                 u64 xfeature_mask = valid & -valid;
4705                 int xfeature_nr = fls64(xfeature_mask) - 1;
4706                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4707
4708                 if (dest) {
4709                         u32 size, offset, ecx, edx;
4710                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4711                                     &size, &offset, &ecx, &edx);
4712                         if (xfeature_nr == XFEATURE_PKRU)
4713                                 memcpy(&vcpu->arch.pkru, src + offset,
4714                                        sizeof(vcpu->arch.pkru));
4715                         else
4716                                 memcpy(dest, src + offset, size);
4717                 }
4718
4719                 valid -= xfeature_mask;
4720         }
4721 }
4722
4723 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4724                                          struct kvm_xsave *guest_xsave)
4725 {
4726         if (!vcpu->arch.guest_fpu)
4727                 return;
4728
4729         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4730                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4731                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4732         } else {
4733                 memcpy(guest_xsave->region,
4734                         &vcpu->arch.guest_fpu->state.fxsave,
4735                         sizeof(struct fxregs_state));
4736                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4737                         XFEATURE_MASK_FPSSE;
4738         }
4739 }
4740
4741 #define XSAVE_MXCSR_OFFSET 24
4742
4743 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4744                                         struct kvm_xsave *guest_xsave)
4745 {
4746         u64 xstate_bv;
4747         u32 mxcsr;
4748
4749         if (!vcpu->arch.guest_fpu)
4750                 return 0;
4751
4752         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4753         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4754
4755         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4756                 /*
4757                  * Here we allow setting states that are not present in
4758                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4759                  * with old userspace.
4760                  */
4761                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4762                         return -EINVAL;
4763                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4764         } else {
4765                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4766                         mxcsr & ~mxcsr_feature_mask)
4767                         return -EINVAL;
4768                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4769                         guest_xsave->region, sizeof(struct fxregs_state));
4770         }
4771         return 0;
4772 }
4773
4774 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4775                                         struct kvm_xcrs *guest_xcrs)
4776 {
4777         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4778                 guest_xcrs->nr_xcrs = 0;
4779                 return;
4780         }
4781
4782         guest_xcrs->nr_xcrs = 1;
4783         guest_xcrs->flags = 0;
4784         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4785         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4786 }
4787
4788 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4789                                        struct kvm_xcrs *guest_xcrs)
4790 {
4791         int i, r = 0;
4792
4793         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4794                 return -EINVAL;
4795
4796         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4797                 return -EINVAL;
4798
4799         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4800                 /* Only support XCR0 currently */
4801                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4802                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4803                                 guest_xcrs->xcrs[i].value);
4804                         break;
4805                 }
4806         if (r)
4807                 r = -EINVAL;
4808         return r;
4809 }
4810
4811 /*
4812  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4813  * stopped by the hypervisor.  This function will be called from the host only.
4814  * EINVAL is returned when the host attempts to set the flag for a guest that
4815  * does not support pv clocks.
4816  */
4817 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4818 {
4819         if (!vcpu->arch.pv_time_enabled)
4820                 return -EINVAL;
4821         vcpu->arch.pvclock_set_guest_stopped_request = true;
4822         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4823         return 0;
4824 }
4825
4826 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4827                                      struct kvm_enable_cap *cap)
4828 {
4829         int r;
4830         uint16_t vmcs_version;
4831         void __user *user_ptr;
4832
4833         if (cap->flags)
4834                 return -EINVAL;
4835
4836         switch (cap->cap) {
4837         case KVM_CAP_HYPERV_SYNIC2:
4838                 if (cap->args[0])
4839                         return -EINVAL;
4840                 fallthrough;
4841
4842         case KVM_CAP_HYPERV_SYNIC:
4843                 if (!irqchip_in_kernel(vcpu->kvm))
4844                         return -EINVAL;
4845                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4846                                              KVM_CAP_HYPERV_SYNIC2);
4847         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4848                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4849                         return -ENOTTY;
4850                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4851                 if (!r) {
4852                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4853                         if (copy_to_user(user_ptr, &vmcs_version,
4854                                          sizeof(vmcs_version)))
4855                                 r = -EFAULT;
4856                 }
4857                 return r;
4858         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4859                 if (!kvm_x86_ops.enable_direct_tlbflush)
4860                         return -ENOTTY;
4861
4862                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4863
4864         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4865                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4866                 if (vcpu->arch.pv_cpuid.enforce)
4867                         kvm_update_pv_runtime(vcpu);
4868
4869                 return 0;
4870         default:
4871                 return -EINVAL;
4872         }
4873 }
4874
4875 long kvm_arch_vcpu_ioctl(struct file *filp,
4876                          unsigned int ioctl, unsigned long arg)
4877 {
4878         struct kvm_vcpu *vcpu = filp->private_data;
4879         void __user *argp = (void __user *)arg;
4880         int r;
4881         union {
4882                 struct kvm_lapic_state *lapic;
4883                 struct kvm_xsave *xsave;
4884                 struct kvm_xcrs *xcrs;
4885                 void *buffer;
4886         } u;
4887
4888         vcpu_load(vcpu);
4889
4890         u.buffer = NULL;
4891         switch (ioctl) {
4892         case KVM_GET_LAPIC: {
4893                 r = -EINVAL;
4894                 if (!lapic_in_kernel(vcpu))
4895                         goto out;
4896                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4897                                 GFP_KERNEL_ACCOUNT);
4898
4899                 r = -ENOMEM;
4900                 if (!u.lapic)
4901                         goto out;
4902                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4903                 if (r)
4904                         goto out;
4905                 r = -EFAULT;
4906                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4907                         goto out;
4908                 r = 0;
4909                 break;
4910         }
4911         case KVM_SET_LAPIC: {
4912                 r = -EINVAL;
4913                 if (!lapic_in_kernel(vcpu))
4914                         goto out;
4915                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4916                 if (IS_ERR(u.lapic)) {
4917                         r = PTR_ERR(u.lapic);
4918                         goto out_nofree;
4919                 }
4920
4921                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4922                 break;
4923         }
4924         case KVM_INTERRUPT: {
4925                 struct kvm_interrupt irq;
4926
4927                 r = -EFAULT;
4928                 if (copy_from_user(&irq, argp, sizeof(irq)))
4929                         goto out;
4930                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4931                 break;
4932         }
4933         case KVM_NMI: {
4934                 r = kvm_vcpu_ioctl_nmi(vcpu);
4935                 break;
4936         }
4937         case KVM_SMI: {
4938                 r = kvm_vcpu_ioctl_smi(vcpu);
4939                 break;
4940         }
4941         case KVM_SET_CPUID: {
4942                 struct kvm_cpuid __user *cpuid_arg = argp;
4943                 struct kvm_cpuid cpuid;
4944
4945                 r = -EFAULT;
4946                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4947                         goto out;
4948                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4949                 break;
4950         }
4951         case KVM_SET_CPUID2: {
4952                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4953                 struct kvm_cpuid2 cpuid;
4954
4955                 r = -EFAULT;
4956                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4957                         goto out;
4958                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4959                                               cpuid_arg->entries);
4960                 break;
4961         }
4962         case KVM_GET_CPUID2: {
4963                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4964                 struct kvm_cpuid2 cpuid;
4965
4966                 r = -EFAULT;
4967                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4968                         goto out;
4969                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4970                                               cpuid_arg->entries);
4971                 if (r)
4972                         goto out;
4973                 r = -EFAULT;
4974                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4975                         goto out;
4976                 r = 0;
4977                 break;
4978         }
4979         case KVM_GET_MSRS: {
4980                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4981                 r = msr_io(vcpu, argp, do_get_msr, 1);
4982                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4983                 break;
4984         }
4985         case KVM_SET_MSRS: {
4986                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4987                 r = msr_io(vcpu, argp, do_set_msr, 0);
4988                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4989                 break;
4990         }
4991         case KVM_TPR_ACCESS_REPORTING: {
4992                 struct kvm_tpr_access_ctl tac;
4993
4994                 r = -EFAULT;
4995                 if (copy_from_user(&tac, argp, sizeof(tac)))
4996                         goto out;
4997                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4998                 if (r)
4999                         goto out;
5000                 r = -EFAULT;
5001                 if (copy_to_user(argp, &tac, sizeof(tac)))
5002                         goto out;
5003                 r = 0;
5004                 break;
5005         };
5006         case KVM_SET_VAPIC_ADDR: {
5007                 struct kvm_vapic_addr va;
5008                 int idx;
5009
5010                 r = -EINVAL;
5011                 if (!lapic_in_kernel(vcpu))
5012                         goto out;
5013                 r = -EFAULT;
5014                 if (copy_from_user(&va, argp, sizeof(va)))
5015                         goto out;
5016                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5017                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5018                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5019                 break;
5020         }
5021         case KVM_X86_SETUP_MCE: {
5022                 u64 mcg_cap;
5023
5024                 r = -EFAULT;
5025                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5026                         goto out;
5027                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5028                 break;
5029         }
5030         case KVM_X86_SET_MCE: {
5031                 struct kvm_x86_mce mce;
5032
5033                 r = -EFAULT;
5034                 if (copy_from_user(&mce, argp, sizeof(mce)))
5035                         goto out;
5036                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5037                 break;
5038         }
5039         case KVM_GET_VCPU_EVENTS: {
5040                 struct kvm_vcpu_events events;
5041
5042                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5043
5044                 r = -EFAULT;
5045                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5046                         break;
5047                 r = 0;
5048                 break;
5049         }
5050         case KVM_SET_VCPU_EVENTS: {
5051                 struct kvm_vcpu_events events;
5052
5053                 r = -EFAULT;
5054                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5055                         break;
5056
5057                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5058                 break;
5059         }
5060         case KVM_GET_DEBUGREGS: {
5061                 struct kvm_debugregs dbgregs;
5062
5063                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5064
5065                 r = -EFAULT;
5066                 if (copy_to_user(argp, &dbgregs,
5067                                  sizeof(struct kvm_debugregs)))
5068                         break;
5069                 r = 0;
5070                 break;
5071         }
5072         case KVM_SET_DEBUGREGS: {
5073                 struct kvm_debugregs dbgregs;
5074
5075                 r = -EFAULT;
5076                 if (copy_from_user(&dbgregs, argp,
5077                                    sizeof(struct kvm_debugregs)))
5078                         break;
5079
5080                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5081                 break;
5082         }
5083         case KVM_GET_XSAVE: {
5084                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5085                 r = -ENOMEM;
5086                 if (!u.xsave)
5087                         break;
5088
5089                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5090
5091                 r = -EFAULT;
5092                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5093                         break;
5094                 r = 0;
5095                 break;
5096         }
5097         case KVM_SET_XSAVE: {
5098                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5099                 if (IS_ERR(u.xsave)) {
5100                         r = PTR_ERR(u.xsave);
5101                         goto out_nofree;
5102                 }
5103
5104                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5105                 break;
5106         }
5107         case KVM_GET_XCRS: {
5108                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5109                 r = -ENOMEM;
5110                 if (!u.xcrs)
5111                         break;
5112
5113                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5114
5115                 r = -EFAULT;
5116                 if (copy_to_user(argp, u.xcrs,
5117                                  sizeof(struct kvm_xcrs)))
5118                         break;
5119                 r = 0;
5120                 break;
5121         }
5122         case KVM_SET_XCRS: {
5123                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5124                 if (IS_ERR(u.xcrs)) {
5125                         r = PTR_ERR(u.xcrs);
5126                         goto out_nofree;
5127                 }
5128
5129                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5130                 break;
5131         }
5132         case KVM_SET_TSC_KHZ: {
5133                 u32 user_tsc_khz;
5134
5135                 r = -EINVAL;
5136                 user_tsc_khz = (u32)arg;
5137
5138                 if (kvm_has_tsc_control &&
5139                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5140                         goto out;
5141
5142                 if (user_tsc_khz == 0)
5143                         user_tsc_khz = tsc_khz;
5144
5145                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5146                         r = 0;
5147
5148                 goto out;
5149         }
5150         case KVM_GET_TSC_KHZ: {
5151                 r = vcpu->arch.virtual_tsc_khz;
5152                 goto out;
5153         }
5154         case KVM_KVMCLOCK_CTRL: {
5155                 r = kvm_set_guest_paused(vcpu);
5156                 goto out;
5157         }
5158         case KVM_ENABLE_CAP: {
5159                 struct kvm_enable_cap cap;
5160
5161                 r = -EFAULT;
5162                 if (copy_from_user(&cap, argp, sizeof(cap)))
5163                         goto out;
5164                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5165                 break;
5166         }
5167         case KVM_GET_NESTED_STATE: {
5168                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5169                 u32 user_data_size;
5170
5171                 r = -EINVAL;
5172                 if (!kvm_x86_ops.nested_ops->get_state)
5173                         break;
5174
5175                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5176                 r = -EFAULT;
5177                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5178                         break;
5179
5180                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5181                                                      user_data_size);
5182                 if (r < 0)
5183                         break;
5184
5185                 if (r > user_data_size) {
5186                         if (put_user(r, &user_kvm_nested_state->size))
5187                                 r = -EFAULT;
5188                         else
5189                                 r = -E2BIG;
5190                         break;
5191                 }
5192
5193                 r = 0;
5194                 break;
5195         }
5196         case KVM_SET_NESTED_STATE: {
5197                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5198                 struct kvm_nested_state kvm_state;
5199                 int idx;
5200
5201                 r = -EINVAL;
5202                 if (!kvm_x86_ops.nested_ops->set_state)
5203                         break;
5204
5205                 r = -EFAULT;
5206                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5207                         break;
5208
5209                 r = -EINVAL;
5210                 if (kvm_state.size < sizeof(kvm_state))
5211                         break;
5212
5213                 if (kvm_state.flags &
5214                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5215                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5216                       | KVM_STATE_NESTED_GIF_SET))
5217                         break;
5218
5219                 /* nested_run_pending implies guest_mode.  */
5220                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5221                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5222                         break;
5223
5224                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5225                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5226                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5227                 break;
5228         }
5229         case KVM_GET_SUPPORTED_HV_CPUID:
5230                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5231                 break;
5232 #ifdef CONFIG_KVM_XEN
5233         case KVM_XEN_VCPU_GET_ATTR: {
5234                 struct kvm_xen_vcpu_attr xva;
5235
5236                 r = -EFAULT;
5237                 if (copy_from_user(&xva, argp, sizeof(xva)))
5238                         goto out;
5239                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5240                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5241                         r = -EFAULT;
5242                 break;
5243         }
5244         case KVM_XEN_VCPU_SET_ATTR: {
5245                 struct kvm_xen_vcpu_attr xva;
5246
5247                 r = -EFAULT;
5248                 if (copy_from_user(&xva, argp, sizeof(xva)))
5249                         goto out;
5250                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5251                 break;
5252         }
5253 #endif
5254         default:
5255                 r = -EINVAL;
5256         }
5257 out:
5258         kfree(u.buffer);
5259 out_nofree:
5260         vcpu_put(vcpu);
5261         return r;
5262 }
5263
5264 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5265 {
5266         return VM_FAULT_SIGBUS;
5267 }
5268
5269 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5270 {
5271         int ret;
5272
5273         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5274                 return -EINVAL;
5275         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5276         return ret;
5277 }
5278
5279 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5280                                               u64 ident_addr)
5281 {
5282         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5283 }
5284
5285 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5286                                          unsigned long kvm_nr_mmu_pages)
5287 {
5288         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5289                 return -EINVAL;
5290
5291         mutex_lock(&kvm->slots_lock);
5292
5293         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5294         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5295
5296         mutex_unlock(&kvm->slots_lock);
5297         return 0;
5298 }
5299
5300 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5301 {
5302         return kvm->arch.n_max_mmu_pages;
5303 }
5304
5305 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5306 {
5307         struct kvm_pic *pic = kvm->arch.vpic;
5308         int r;
5309
5310         r = 0;
5311         switch (chip->chip_id) {
5312         case KVM_IRQCHIP_PIC_MASTER:
5313                 memcpy(&chip->chip.pic, &pic->pics[0],
5314                         sizeof(struct kvm_pic_state));
5315                 break;
5316         case KVM_IRQCHIP_PIC_SLAVE:
5317                 memcpy(&chip->chip.pic, &pic->pics[1],
5318                         sizeof(struct kvm_pic_state));
5319                 break;
5320         case KVM_IRQCHIP_IOAPIC:
5321                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5322                 break;
5323         default:
5324                 r = -EINVAL;
5325                 break;
5326         }
5327         return r;
5328 }
5329
5330 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5331 {
5332         struct kvm_pic *pic = kvm->arch.vpic;
5333         int r;
5334
5335         r = 0;
5336         switch (chip->chip_id) {
5337         case KVM_IRQCHIP_PIC_MASTER:
5338                 spin_lock(&pic->lock);
5339                 memcpy(&pic->pics[0], &chip->chip.pic,
5340                         sizeof(struct kvm_pic_state));
5341                 spin_unlock(&pic->lock);
5342                 break;
5343         case KVM_IRQCHIP_PIC_SLAVE:
5344                 spin_lock(&pic->lock);
5345                 memcpy(&pic->pics[1], &chip->chip.pic,
5346                         sizeof(struct kvm_pic_state));
5347                 spin_unlock(&pic->lock);
5348                 break;
5349         case KVM_IRQCHIP_IOAPIC:
5350                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5351                 break;
5352         default:
5353                 r = -EINVAL;
5354                 break;
5355         }
5356         kvm_pic_update_irq(pic);
5357         return r;
5358 }
5359
5360 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5361 {
5362         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5363
5364         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5365
5366         mutex_lock(&kps->lock);
5367         memcpy(ps, &kps->channels, sizeof(*ps));
5368         mutex_unlock(&kps->lock);
5369         return 0;
5370 }
5371
5372 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5373 {
5374         int i;
5375         struct kvm_pit *pit = kvm->arch.vpit;
5376
5377         mutex_lock(&pit->pit_state.lock);
5378         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5379         for (i = 0; i < 3; i++)
5380                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5381         mutex_unlock(&pit->pit_state.lock);
5382         return 0;
5383 }
5384
5385 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5386 {
5387         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5388         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5389                 sizeof(ps->channels));
5390         ps->flags = kvm->arch.vpit->pit_state.flags;
5391         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5392         memset(&ps->reserved, 0, sizeof(ps->reserved));
5393         return 0;
5394 }
5395
5396 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5397 {
5398         int start = 0;
5399         int i;
5400         u32 prev_legacy, cur_legacy;
5401         struct kvm_pit *pit = kvm->arch.vpit;
5402
5403         mutex_lock(&pit->pit_state.lock);
5404         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5405         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5406         if (!prev_legacy && cur_legacy)
5407                 start = 1;
5408         memcpy(&pit->pit_state.channels, &ps->channels,
5409                sizeof(pit->pit_state.channels));
5410         pit->pit_state.flags = ps->flags;
5411         for (i = 0; i < 3; i++)
5412                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5413                                    start && i == 0);
5414         mutex_unlock(&pit->pit_state.lock);
5415         return 0;
5416 }
5417
5418 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5419                                  struct kvm_reinject_control *control)
5420 {
5421         struct kvm_pit *pit = kvm->arch.vpit;
5422
5423         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5424          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5425          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5426          */
5427         mutex_lock(&pit->pit_state.lock);
5428         kvm_pit_set_reinject(pit, control->pit_reinject);
5429         mutex_unlock(&pit->pit_state.lock);
5430
5431         return 0;
5432 }
5433
5434 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5435 {
5436
5437         /*
5438          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5439          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5440          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5441          * VM-Exit.
5442          */
5443         struct kvm_vcpu *vcpu;
5444         int i;
5445
5446         kvm_for_each_vcpu(i, vcpu, kvm)
5447                 kvm_vcpu_kick(vcpu);
5448 }
5449
5450 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5451                         bool line_status)
5452 {
5453         if (!irqchip_in_kernel(kvm))
5454                 return -ENXIO;
5455
5456         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5457                                         irq_event->irq, irq_event->level,
5458                                         line_status);
5459         return 0;
5460 }
5461
5462 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5463                             struct kvm_enable_cap *cap)
5464 {
5465         int r;
5466
5467         if (cap->flags)
5468                 return -EINVAL;
5469
5470         switch (cap->cap) {
5471         case KVM_CAP_DISABLE_QUIRKS:
5472                 kvm->arch.disabled_quirks = cap->args[0];
5473                 r = 0;
5474                 break;
5475         case KVM_CAP_SPLIT_IRQCHIP: {
5476                 mutex_lock(&kvm->lock);
5477                 r = -EINVAL;
5478                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5479                         goto split_irqchip_unlock;
5480                 r = -EEXIST;
5481                 if (irqchip_in_kernel(kvm))
5482                         goto split_irqchip_unlock;
5483                 if (kvm->created_vcpus)
5484                         goto split_irqchip_unlock;
5485                 r = kvm_setup_empty_irq_routing(kvm);
5486                 if (r)
5487                         goto split_irqchip_unlock;
5488                 /* Pairs with irqchip_in_kernel. */
5489                 smp_wmb();
5490                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5491                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5492                 r = 0;
5493 split_irqchip_unlock:
5494                 mutex_unlock(&kvm->lock);
5495                 break;
5496         }
5497         case KVM_CAP_X2APIC_API:
5498                 r = -EINVAL;
5499                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5500                         break;
5501
5502                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5503                         kvm->arch.x2apic_format = true;
5504                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5505                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5506
5507                 r = 0;
5508                 break;
5509         case KVM_CAP_X86_DISABLE_EXITS:
5510                 r = -EINVAL;
5511                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5512                         break;
5513
5514                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5515                         kvm_can_mwait_in_guest())
5516                         kvm->arch.mwait_in_guest = true;
5517                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5518                         kvm->arch.hlt_in_guest = true;
5519                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5520                         kvm->arch.pause_in_guest = true;
5521                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5522                         kvm->arch.cstate_in_guest = true;
5523                 r = 0;
5524                 break;
5525         case KVM_CAP_MSR_PLATFORM_INFO:
5526                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5527                 r = 0;
5528                 break;
5529         case KVM_CAP_EXCEPTION_PAYLOAD:
5530                 kvm->arch.exception_payload_enabled = cap->args[0];
5531                 r = 0;
5532                 break;
5533         case KVM_CAP_X86_USER_SPACE_MSR:
5534                 kvm->arch.user_space_msr_mask = cap->args[0];
5535                 r = 0;
5536                 break;
5537         case KVM_CAP_X86_BUS_LOCK_EXIT:
5538                 r = -EINVAL;
5539                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5540                         break;
5541
5542                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5543                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5544                         break;
5545
5546                 if (kvm_has_bus_lock_exit &&
5547                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5548                         kvm->arch.bus_lock_detection_enabled = true;
5549                 r = 0;
5550                 break;
5551 #ifdef CONFIG_X86_SGX_KVM
5552         case KVM_CAP_SGX_ATTRIBUTE: {
5553                 unsigned long allowed_attributes = 0;
5554
5555                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5556                 if (r)
5557                         break;
5558
5559                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5560                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5561                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5562                         kvm->arch.sgx_provisioning_allowed = true;
5563                 else
5564                         r = -EINVAL;
5565                 break;
5566         }
5567 #endif
5568         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5569                 r = -EINVAL;
5570                 if (kvm_x86_ops.vm_copy_enc_context_from)
5571                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5572                 return r;
5573         default:
5574                 r = -EINVAL;
5575                 break;
5576         }
5577         return r;
5578 }
5579
5580 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5581 {
5582         struct kvm_x86_msr_filter *msr_filter;
5583
5584         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5585         if (!msr_filter)
5586                 return NULL;
5587
5588         msr_filter->default_allow = default_allow;
5589         return msr_filter;
5590 }
5591
5592 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5593 {
5594         u32 i;
5595
5596         if (!msr_filter)
5597                 return;
5598
5599         for (i = 0; i < msr_filter->count; i++)
5600                 kfree(msr_filter->ranges[i].bitmap);
5601
5602         kfree(msr_filter);
5603 }
5604
5605 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5606                               struct kvm_msr_filter_range *user_range)
5607 {
5608         unsigned long *bitmap = NULL;
5609         size_t bitmap_size;
5610
5611         if (!user_range->nmsrs)
5612                 return 0;
5613
5614         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5615                 return -EINVAL;
5616
5617         if (!user_range->flags)
5618                 return -EINVAL;
5619
5620         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5621         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5622                 return -EINVAL;
5623
5624         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5625         if (IS_ERR(bitmap))
5626                 return PTR_ERR(bitmap);
5627
5628         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5629                 .flags = user_range->flags,
5630                 .base = user_range->base,
5631                 .nmsrs = user_range->nmsrs,
5632                 .bitmap = bitmap,
5633         };
5634
5635         msr_filter->count++;
5636         return 0;
5637 }
5638
5639 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5640 {
5641         struct kvm_msr_filter __user *user_msr_filter = argp;
5642         struct kvm_x86_msr_filter *new_filter, *old_filter;
5643         struct kvm_msr_filter filter;
5644         bool default_allow;
5645         bool empty = true;
5646         int r = 0;
5647         u32 i;
5648
5649         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5650                 return -EFAULT;
5651
5652         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5653                 empty &= !filter.ranges[i].nmsrs;
5654
5655         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5656         if (empty && !default_allow)
5657                 return -EINVAL;
5658
5659         new_filter = kvm_alloc_msr_filter(default_allow);
5660         if (!new_filter)
5661                 return -ENOMEM;
5662
5663         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5664                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5665                 if (r) {
5666                         kvm_free_msr_filter(new_filter);
5667                         return r;
5668                 }
5669         }
5670
5671         mutex_lock(&kvm->lock);
5672
5673         /* The per-VM filter is protected by kvm->lock... */
5674         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5675
5676         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5677         synchronize_srcu(&kvm->srcu);
5678
5679         kvm_free_msr_filter(old_filter);
5680
5681         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5682         mutex_unlock(&kvm->lock);
5683
5684         return 0;
5685 }
5686
5687 long kvm_arch_vm_ioctl(struct file *filp,
5688                        unsigned int ioctl, unsigned long arg)
5689 {
5690         struct kvm *kvm = filp->private_data;
5691         void __user *argp = (void __user *)arg;
5692         int r = -ENOTTY;
5693         /*
5694          * This union makes it completely explicit to gcc-3.x
5695          * that these two variables' stack usage should be
5696          * combined, not added together.
5697          */
5698         union {
5699                 struct kvm_pit_state ps;
5700                 struct kvm_pit_state2 ps2;
5701                 struct kvm_pit_config pit_config;
5702         } u;
5703
5704         switch (ioctl) {
5705         case KVM_SET_TSS_ADDR:
5706                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5707                 break;
5708         case KVM_SET_IDENTITY_MAP_ADDR: {
5709                 u64 ident_addr;
5710
5711                 mutex_lock(&kvm->lock);
5712                 r = -EINVAL;
5713                 if (kvm->created_vcpus)
5714                         goto set_identity_unlock;
5715                 r = -EFAULT;
5716                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5717                         goto set_identity_unlock;
5718                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5719 set_identity_unlock:
5720                 mutex_unlock(&kvm->lock);
5721                 break;
5722         }
5723         case KVM_SET_NR_MMU_PAGES:
5724                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5725                 break;
5726         case KVM_GET_NR_MMU_PAGES:
5727                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5728                 break;
5729         case KVM_CREATE_IRQCHIP: {
5730                 mutex_lock(&kvm->lock);
5731
5732                 r = -EEXIST;
5733                 if (irqchip_in_kernel(kvm))
5734                         goto create_irqchip_unlock;
5735
5736                 r = -EINVAL;
5737                 if (kvm->created_vcpus)
5738                         goto create_irqchip_unlock;
5739
5740                 r = kvm_pic_init(kvm);
5741                 if (r)
5742                         goto create_irqchip_unlock;
5743
5744                 r = kvm_ioapic_init(kvm);
5745                 if (r) {
5746                         kvm_pic_destroy(kvm);
5747                         goto create_irqchip_unlock;
5748                 }
5749
5750                 r = kvm_setup_default_irq_routing(kvm);
5751                 if (r) {
5752                         kvm_ioapic_destroy(kvm);
5753                         kvm_pic_destroy(kvm);
5754                         goto create_irqchip_unlock;
5755                 }
5756                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5757                 smp_wmb();
5758                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5759         create_irqchip_unlock:
5760                 mutex_unlock(&kvm->lock);
5761                 break;
5762         }
5763         case KVM_CREATE_PIT:
5764                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5765                 goto create_pit;
5766         case KVM_CREATE_PIT2:
5767                 r = -EFAULT;
5768                 if (copy_from_user(&u.pit_config, argp,
5769                                    sizeof(struct kvm_pit_config)))
5770                         goto out;
5771         create_pit:
5772                 mutex_lock(&kvm->lock);
5773                 r = -EEXIST;
5774                 if (kvm->arch.vpit)
5775                         goto create_pit_unlock;
5776                 r = -ENOMEM;
5777                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5778                 if (kvm->arch.vpit)
5779                         r = 0;
5780         create_pit_unlock:
5781                 mutex_unlock(&kvm->lock);
5782                 break;
5783         case KVM_GET_IRQCHIP: {
5784                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5785                 struct kvm_irqchip *chip;
5786
5787                 chip = memdup_user(argp, sizeof(*chip));
5788                 if (IS_ERR(chip)) {
5789                         r = PTR_ERR(chip);
5790                         goto out;
5791                 }
5792
5793                 r = -ENXIO;
5794                 if (!irqchip_kernel(kvm))
5795                         goto get_irqchip_out;
5796                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5797                 if (r)
5798                         goto get_irqchip_out;
5799                 r = -EFAULT;
5800                 if (copy_to_user(argp, chip, sizeof(*chip)))
5801                         goto get_irqchip_out;
5802                 r = 0;
5803         get_irqchip_out:
5804                 kfree(chip);
5805                 break;
5806         }
5807         case KVM_SET_IRQCHIP: {
5808                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5809                 struct kvm_irqchip *chip;
5810
5811                 chip = memdup_user(argp, sizeof(*chip));
5812                 if (IS_ERR(chip)) {
5813                         r = PTR_ERR(chip);
5814                         goto out;
5815                 }
5816
5817                 r = -ENXIO;
5818                 if (!irqchip_kernel(kvm))
5819                         goto set_irqchip_out;
5820                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5821         set_irqchip_out:
5822                 kfree(chip);
5823                 break;
5824         }
5825         case KVM_GET_PIT: {
5826                 r = -EFAULT;
5827                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5828                         goto out;
5829                 r = -ENXIO;
5830                 if (!kvm->arch.vpit)
5831                         goto out;
5832                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5833                 if (r)
5834                         goto out;
5835                 r = -EFAULT;
5836                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5837                         goto out;
5838                 r = 0;
5839                 break;
5840         }
5841         case KVM_SET_PIT: {
5842                 r = -EFAULT;
5843                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5844                         goto out;
5845                 mutex_lock(&kvm->lock);
5846                 r = -ENXIO;
5847                 if (!kvm->arch.vpit)
5848                         goto set_pit_out;
5849                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5850 set_pit_out:
5851                 mutex_unlock(&kvm->lock);
5852                 break;
5853         }
5854         case KVM_GET_PIT2: {
5855                 r = -ENXIO;
5856                 if (!kvm->arch.vpit)
5857                         goto out;
5858                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5859                 if (r)
5860                         goto out;
5861                 r = -EFAULT;
5862                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5863                         goto out;
5864                 r = 0;
5865                 break;
5866         }
5867         case KVM_SET_PIT2: {
5868                 r = -EFAULT;
5869                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5870                         goto out;
5871                 mutex_lock(&kvm->lock);
5872                 r = -ENXIO;
5873                 if (!kvm->arch.vpit)
5874                         goto set_pit2_out;
5875                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5876 set_pit2_out:
5877                 mutex_unlock(&kvm->lock);
5878                 break;
5879         }
5880         case KVM_REINJECT_CONTROL: {
5881                 struct kvm_reinject_control control;
5882                 r =  -EFAULT;
5883                 if (copy_from_user(&control, argp, sizeof(control)))
5884                         goto out;
5885                 r = -ENXIO;
5886                 if (!kvm->arch.vpit)
5887                         goto out;
5888                 r = kvm_vm_ioctl_reinject(kvm, &control);
5889                 break;
5890         }
5891         case KVM_SET_BOOT_CPU_ID:
5892                 r = 0;
5893                 mutex_lock(&kvm->lock);
5894                 if (kvm->created_vcpus)
5895                         r = -EBUSY;
5896                 else
5897                         kvm->arch.bsp_vcpu_id = arg;
5898                 mutex_unlock(&kvm->lock);
5899                 break;
5900 #ifdef CONFIG_KVM_XEN
5901         case KVM_XEN_HVM_CONFIG: {
5902                 struct kvm_xen_hvm_config xhc;
5903                 r = -EFAULT;
5904                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5905                         goto out;
5906                 r = kvm_xen_hvm_config(kvm, &xhc);
5907                 break;
5908         }
5909         case KVM_XEN_HVM_GET_ATTR: {
5910                 struct kvm_xen_hvm_attr xha;
5911
5912                 r = -EFAULT;
5913                 if (copy_from_user(&xha, argp, sizeof(xha)))
5914                         goto out;
5915                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5916                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5917                         r = -EFAULT;
5918                 break;
5919         }
5920         case KVM_XEN_HVM_SET_ATTR: {
5921                 struct kvm_xen_hvm_attr xha;
5922
5923                 r = -EFAULT;
5924                 if (copy_from_user(&xha, argp, sizeof(xha)))
5925                         goto out;
5926                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5927                 break;
5928         }
5929 #endif
5930         case KVM_SET_CLOCK: {
5931                 struct kvm_arch *ka = &kvm->arch;
5932                 struct kvm_clock_data user_ns;
5933                 u64 now_ns;
5934
5935                 r = -EFAULT;
5936                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5937                         goto out;
5938
5939                 r = -EINVAL;
5940                 if (user_ns.flags)
5941                         goto out;
5942
5943                 r = 0;
5944                 /*
5945                  * TODO: userspace has to take care of races with VCPU_RUN, so
5946                  * kvm_gen_update_masterclock() can be cut down to locked
5947                  * pvclock_update_vm_gtod_copy().
5948                  */
5949                 kvm_gen_update_masterclock(kvm);
5950
5951                 /*
5952                  * This pairs with kvm_guest_time_update(): when masterclock is
5953                  * in use, we use master_kernel_ns + kvmclock_offset to set
5954                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5955                  * is slightly ahead) here we risk going negative on unsigned
5956                  * 'system_time' when 'user_ns.clock' is very small.
5957                  */
5958                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5959                 if (kvm->arch.use_master_clock)
5960                         now_ns = ka->master_kernel_ns;
5961                 else
5962                         now_ns = get_kvmclock_base_ns();
5963                 ka->kvmclock_offset = user_ns.clock - now_ns;
5964                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5965
5966                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5967                 break;
5968         }
5969         case KVM_GET_CLOCK: {
5970                 struct kvm_clock_data user_ns;
5971                 u64 now_ns;
5972
5973                 now_ns = get_kvmclock_ns(kvm);
5974                 user_ns.clock = now_ns;
5975                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5976                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5977
5978                 r = -EFAULT;
5979                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5980                         goto out;
5981                 r = 0;
5982                 break;
5983         }
5984         case KVM_MEMORY_ENCRYPT_OP: {
5985                 r = -ENOTTY;
5986                 if (kvm_x86_ops.mem_enc_op)
5987                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5988                 break;
5989         }
5990         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5991                 struct kvm_enc_region region;
5992
5993                 r = -EFAULT;
5994                 if (copy_from_user(&region, argp, sizeof(region)))
5995                         goto out;
5996
5997                 r = -ENOTTY;
5998                 if (kvm_x86_ops.mem_enc_reg_region)
5999                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6000                 break;
6001         }
6002         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6003                 struct kvm_enc_region region;
6004
6005                 r = -EFAULT;
6006                 if (copy_from_user(&region, argp, sizeof(region)))
6007                         goto out;
6008
6009                 r = -ENOTTY;
6010                 if (kvm_x86_ops.mem_enc_unreg_region)
6011                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6012                 break;
6013         }
6014         case KVM_HYPERV_EVENTFD: {
6015                 struct kvm_hyperv_eventfd hvevfd;
6016
6017                 r = -EFAULT;
6018                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6019                         goto out;
6020                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6021                 break;
6022         }
6023         case KVM_SET_PMU_EVENT_FILTER:
6024                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6025                 break;
6026         case KVM_X86_SET_MSR_FILTER:
6027                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6028                 break;
6029         default:
6030                 r = -ENOTTY;
6031         }
6032 out:
6033         return r;
6034 }
6035
6036 static void kvm_init_msr_list(void)
6037 {
6038         struct x86_pmu_capability x86_pmu;
6039         u32 dummy[2];
6040         unsigned i;
6041
6042         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6043                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6044
6045         perf_get_x86_pmu_capability(&x86_pmu);
6046
6047         num_msrs_to_save = 0;
6048         num_emulated_msrs = 0;
6049         num_msr_based_features = 0;
6050
6051         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6052                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6053                         continue;
6054
6055                 /*
6056                  * Even MSRs that are valid in the host may not be exposed
6057                  * to the guests in some cases.
6058                  */
6059                 switch (msrs_to_save_all[i]) {
6060                 case MSR_IA32_BNDCFGS:
6061                         if (!kvm_mpx_supported())
6062                                 continue;
6063                         break;
6064                 case MSR_TSC_AUX:
6065                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6066                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6067                                 continue;
6068                         break;
6069                 case MSR_IA32_UMWAIT_CONTROL:
6070                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6071                                 continue;
6072                         break;
6073                 case MSR_IA32_RTIT_CTL:
6074                 case MSR_IA32_RTIT_STATUS:
6075                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6076                                 continue;
6077                         break;
6078                 case MSR_IA32_RTIT_CR3_MATCH:
6079                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6080                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6081                                 continue;
6082                         break;
6083                 case MSR_IA32_RTIT_OUTPUT_BASE:
6084                 case MSR_IA32_RTIT_OUTPUT_MASK:
6085                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6086                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6087                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6088                                 continue;
6089                         break;
6090                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6091                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6092                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6093                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6094                                 continue;
6095                         break;
6096                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6097                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6098                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6099                                 continue;
6100                         break;
6101                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6102                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6103                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6104                                 continue;
6105                         break;
6106                 default:
6107                         break;
6108                 }
6109
6110                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6111         }
6112
6113         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6114                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6115                         continue;
6116
6117                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6118         }
6119
6120         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6121                 struct kvm_msr_entry msr;
6122
6123                 msr.index = msr_based_features_all[i];
6124                 if (kvm_get_msr_feature(&msr))
6125                         continue;
6126
6127                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6128         }
6129 }
6130
6131 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6132                            const void *v)
6133 {
6134         int handled = 0;
6135         int n;
6136
6137         do {
6138                 n = min(len, 8);
6139                 if (!(lapic_in_kernel(vcpu) &&
6140                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6141                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6142                         break;
6143                 handled += n;
6144                 addr += n;
6145                 len -= n;
6146                 v += n;
6147         } while (len);
6148
6149         return handled;
6150 }
6151
6152 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6153 {
6154         int handled = 0;
6155         int n;
6156
6157         do {
6158                 n = min(len, 8);
6159                 if (!(lapic_in_kernel(vcpu) &&
6160                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6161                                          addr, n, v))
6162                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6163                         break;
6164                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6165                 handled += n;
6166                 addr += n;
6167                 len -= n;
6168                 v += n;
6169         } while (len);
6170
6171         return handled;
6172 }
6173
6174 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6175                         struct kvm_segment *var, int seg)
6176 {
6177         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6178 }
6179
6180 void kvm_get_segment(struct kvm_vcpu *vcpu,
6181                      struct kvm_segment *var, int seg)
6182 {
6183         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6184 }
6185
6186 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6187                            struct x86_exception *exception)
6188 {
6189         gpa_t t_gpa;
6190
6191         BUG_ON(!mmu_is_nested(vcpu));
6192
6193         /* NPT walks are always user-walks */
6194         access |= PFERR_USER_MASK;
6195         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6196
6197         return t_gpa;
6198 }
6199
6200 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6201                               struct x86_exception *exception)
6202 {
6203         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6204         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6205 }
6206 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6207
6208  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6209                                 struct x86_exception *exception)
6210 {
6211         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6212         access |= PFERR_FETCH_MASK;
6213         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6214 }
6215
6216 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6217                                struct x86_exception *exception)
6218 {
6219         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6220         access |= PFERR_WRITE_MASK;
6221         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6222 }
6223 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6224
6225 /* uses this to access any guest's mapped memory without checking CPL */
6226 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6227                                 struct x86_exception *exception)
6228 {
6229         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6230 }
6231
6232 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6233                                       struct kvm_vcpu *vcpu, u32 access,
6234                                       struct x86_exception *exception)
6235 {
6236         void *data = val;
6237         int r = X86EMUL_CONTINUE;
6238
6239         while (bytes) {
6240                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6241                                                             exception);
6242                 unsigned offset = addr & (PAGE_SIZE-1);
6243                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6244                 int ret;
6245
6246                 if (gpa == UNMAPPED_GVA)
6247                         return X86EMUL_PROPAGATE_FAULT;
6248                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6249                                                offset, toread);
6250                 if (ret < 0) {
6251                         r = X86EMUL_IO_NEEDED;
6252                         goto out;
6253                 }
6254
6255                 bytes -= toread;
6256                 data += toread;
6257                 addr += toread;
6258         }
6259 out:
6260         return r;
6261 }
6262
6263 /* used for instruction fetching */
6264 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6265                                 gva_t addr, void *val, unsigned int bytes,
6266                                 struct x86_exception *exception)
6267 {
6268         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6269         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6270         unsigned offset;
6271         int ret;
6272
6273         /* Inline kvm_read_guest_virt_helper for speed.  */
6274         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6275                                                     exception);
6276         if (unlikely(gpa == UNMAPPED_GVA))
6277                 return X86EMUL_PROPAGATE_FAULT;
6278
6279         offset = addr & (PAGE_SIZE-1);
6280         if (WARN_ON(offset + bytes > PAGE_SIZE))
6281                 bytes = (unsigned)PAGE_SIZE - offset;
6282         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6283                                        offset, bytes);
6284         if (unlikely(ret < 0))
6285                 return X86EMUL_IO_NEEDED;
6286
6287         return X86EMUL_CONTINUE;
6288 }
6289
6290 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6291                                gva_t addr, void *val, unsigned int bytes,
6292                                struct x86_exception *exception)
6293 {
6294         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6295
6296         /*
6297          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6298          * is returned, but our callers are not ready for that and they blindly
6299          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6300          * uninitialized kernel stack memory into cr2 and error code.
6301          */
6302         memset(exception, 0, sizeof(*exception));
6303         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6304                                           exception);
6305 }
6306 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6307
6308 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6309                              gva_t addr, void *val, unsigned int bytes,
6310                              struct x86_exception *exception, bool system)
6311 {
6312         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6313         u32 access = 0;
6314
6315         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6316                 access |= PFERR_USER_MASK;
6317
6318         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6319 }
6320
6321 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6322                 unsigned long addr, void *val, unsigned int bytes)
6323 {
6324         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6325         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6326
6327         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6328 }
6329
6330 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6331                                       struct kvm_vcpu *vcpu, u32 access,
6332                                       struct x86_exception *exception)
6333 {
6334         void *data = val;
6335         int r = X86EMUL_CONTINUE;
6336
6337         while (bytes) {
6338                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6339                                                              access,
6340                                                              exception);
6341                 unsigned offset = addr & (PAGE_SIZE-1);
6342                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6343                 int ret;
6344
6345                 if (gpa == UNMAPPED_GVA)
6346                         return X86EMUL_PROPAGATE_FAULT;
6347                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6348                 if (ret < 0) {
6349                         r = X86EMUL_IO_NEEDED;
6350                         goto out;
6351                 }
6352
6353                 bytes -= towrite;
6354                 data += towrite;
6355                 addr += towrite;
6356         }
6357 out:
6358         return r;
6359 }
6360
6361 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6362                               unsigned int bytes, struct x86_exception *exception,
6363                               bool system)
6364 {
6365         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6366         u32 access = PFERR_WRITE_MASK;
6367
6368         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6369                 access |= PFERR_USER_MASK;
6370
6371         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6372                                            access, exception);
6373 }
6374
6375 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6376                                 unsigned int bytes, struct x86_exception *exception)
6377 {
6378         /* kvm_write_guest_virt_system can pull in tons of pages. */
6379         vcpu->arch.l1tf_flush_l1d = true;
6380
6381         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6382                                            PFERR_WRITE_MASK, exception);
6383 }
6384 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6385
6386 int handle_ud(struct kvm_vcpu *vcpu)
6387 {
6388         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6389         int emul_type = EMULTYPE_TRAP_UD;
6390         char sig[5]; /* ud2; .ascii "kvm" */
6391         struct x86_exception e;
6392
6393         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6394                 return 1;
6395
6396         if (force_emulation_prefix &&
6397             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6398                                 sig, sizeof(sig), &e) == 0 &&
6399             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6400                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6401                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6402         }
6403
6404         return kvm_emulate_instruction(vcpu, emul_type);
6405 }
6406 EXPORT_SYMBOL_GPL(handle_ud);
6407
6408 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6409                             gpa_t gpa, bool write)
6410 {
6411         /* For APIC access vmexit */
6412         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6413                 return 1;
6414
6415         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6416                 trace_vcpu_match_mmio(gva, gpa, write, true);
6417                 return 1;
6418         }
6419
6420         return 0;
6421 }
6422
6423 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6424                                 gpa_t *gpa, struct x86_exception *exception,
6425                                 bool write)
6426 {
6427         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6428                 | (write ? PFERR_WRITE_MASK : 0);
6429
6430         /*
6431          * currently PKRU is only applied to ept enabled guest so
6432          * there is no pkey in EPT page table for L1 guest or EPT
6433          * shadow page table for L2 guest.
6434          */
6435         if (vcpu_match_mmio_gva(vcpu, gva)
6436             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6437                                  vcpu->arch.mmio_access, 0, access)) {
6438                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6439                                         (gva & (PAGE_SIZE - 1));
6440                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6441                 return 1;
6442         }
6443
6444         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6445
6446         if (*gpa == UNMAPPED_GVA)
6447                 return -1;
6448
6449         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6450 }
6451
6452 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6453                         const void *val, int bytes)
6454 {
6455         int ret;
6456
6457         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6458         if (ret < 0)
6459                 return 0;
6460         kvm_page_track_write(vcpu, gpa, val, bytes);
6461         return 1;
6462 }
6463
6464 struct read_write_emulator_ops {
6465         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6466                                   int bytes);
6467         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6468                                   void *val, int bytes);
6469         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6470                                int bytes, void *val);
6471         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6472                                     void *val, int bytes);
6473         bool write;
6474 };
6475
6476 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6477 {
6478         if (vcpu->mmio_read_completed) {
6479                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6480                                vcpu->mmio_fragments[0].gpa, val);
6481                 vcpu->mmio_read_completed = 0;
6482                 return 1;
6483         }
6484
6485         return 0;
6486 }
6487
6488 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6489                         void *val, int bytes)
6490 {
6491         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6492 }
6493
6494 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6495                          void *val, int bytes)
6496 {
6497         return emulator_write_phys(vcpu, gpa, val, bytes);
6498 }
6499
6500 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6501 {
6502         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6503         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6504 }
6505
6506 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6507                           void *val, int bytes)
6508 {
6509         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6510         return X86EMUL_IO_NEEDED;
6511 }
6512
6513 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6514                            void *val, int bytes)
6515 {
6516         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6517
6518         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6519         return X86EMUL_CONTINUE;
6520 }
6521
6522 static const struct read_write_emulator_ops read_emultor = {
6523         .read_write_prepare = read_prepare,
6524         .read_write_emulate = read_emulate,
6525         .read_write_mmio = vcpu_mmio_read,
6526         .read_write_exit_mmio = read_exit_mmio,
6527 };
6528
6529 static const struct read_write_emulator_ops write_emultor = {
6530         .read_write_emulate = write_emulate,
6531         .read_write_mmio = write_mmio,
6532         .read_write_exit_mmio = write_exit_mmio,
6533         .write = true,
6534 };
6535
6536 static int emulator_read_write_onepage(unsigned long addr, void *val,
6537                                        unsigned int bytes,
6538                                        struct x86_exception *exception,
6539                                        struct kvm_vcpu *vcpu,
6540                                        const struct read_write_emulator_ops *ops)
6541 {
6542         gpa_t gpa;
6543         int handled, ret;
6544         bool write = ops->write;
6545         struct kvm_mmio_fragment *frag;
6546         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6547
6548         /*
6549          * If the exit was due to a NPF we may already have a GPA.
6550          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6551          * Note, this cannot be used on string operations since string
6552          * operation using rep will only have the initial GPA from the NPF
6553          * occurred.
6554          */
6555         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6556             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6557                 gpa = ctxt->gpa_val;
6558                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6559         } else {
6560                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6561                 if (ret < 0)
6562                         return X86EMUL_PROPAGATE_FAULT;
6563         }
6564
6565         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6566                 return X86EMUL_CONTINUE;
6567
6568         /*
6569          * Is this MMIO handled locally?
6570          */
6571         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6572         if (handled == bytes)
6573                 return X86EMUL_CONTINUE;
6574
6575         gpa += handled;
6576         bytes -= handled;
6577         val += handled;
6578
6579         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6580         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6581         frag->gpa = gpa;
6582         frag->data = val;
6583         frag->len = bytes;
6584         return X86EMUL_CONTINUE;
6585 }
6586
6587 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6588                         unsigned long addr,
6589                         void *val, unsigned int bytes,
6590                         struct x86_exception *exception,
6591                         const struct read_write_emulator_ops *ops)
6592 {
6593         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6594         gpa_t gpa;
6595         int rc;
6596
6597         if (ops->read_write_prepare &&
6598                   ops->read_write_prepare(vcpu, val, bytes))
6599                 return X86EMUL_CONTINUE;
6600
6601         vcpu->mmio_nr_fragments = 0;
6602
6603         /* Crossing a page boundary? */
6604         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6605                 int now;
6606
6607                 now = -addr & ~PAGE_MASK;
6608                 rc = emulator_read_write_onepage(addr, val, now, exception,
6609                                                  vcpu, ops);
6610
6611                 if (rc != X86EMUL_CONTINUE)
6612                         return rc;
6613                 addr += now;
6614                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6615                         addr = (u32)addr;
6616                 val += now;
6617                 bytes -= now;
6618         }
6619
6620         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6621                                          vcpu, ops);
6622         if (rc != X86EMUL_CONTINUE)
6623                 return rc;
6624
6625         if (!vcpu->mmio_nr_fragments)
6626                 return rc;
6627
6628         gpa = vcpu->mmio_fragments[0].gpa;
6629
6630         vcpu->mmio_needed = 1;
6631         vcpu->mmio_cur_fragment = 0;
6632
6633         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6634         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6635         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6636         vcpu->run->mmio.phys_addr = gpa;
6637
6638         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6639 }
6640
6641 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6642                                   unsigned long addr,
6643                                   void *val,
6644                                   unsigned int bytes,
6645                                   struct x86_exception *exception)
6646 {
6647         return emulator_read_write(ctxt, addr, val, bytes,
6648                                    exception, &read_emultor);
6649 }
6650
6651 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6652                             unsigned long addr,
6653                             const void *val,
6654                             unsigned int bytes,
6655                             struct x86_exception *exception)
6656 {
6657         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6658                                    exception, &write_emultor);
6659 }
6660
6661 #define CMPXCHG_TYPE(t, ptr, old, new) \
6662         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6663
6664 #ifdef CONFIG_X86_64
6665 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6666 #else
6667 #  define CMPXCHG64(ptr, old, new) \
6668         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6669 #endif
6670
6671 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6672                                      unsigned long addr,
6673                                      const void *old,
6674                                      const void *new,
6675                                      unsigned int bytes,
6676                                      struct x86_exception *exception)
6677 {
6678         struct kvm_host_map map;
6679         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6680         u64 page_line_mask;
6681         gpa_t gpa;
6682         char *kaddr;
6683         bool exchanged;
6684
6685         /* guests cmpxchg8b have to be emulated atomically */
6686         if (bytes > 8 || (bytes & (bytes - 1)))
6687                 goto emul_write;
6688
6689         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6690
6691         if (gpa == UNMAPPED_GVA ||
6692             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6693                 goto emul_write;
6694
6695         /*
6696          * Emulate the atomic as a straight write to avoid #AC if SLD is
6697          * enabled in the host and the access splits a cache line.
6698          */
6699         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6700                 page_line_mask = ~(cache_line_size() - 1);
6701         else
6702                 page_line_mask = PAGE_MASK;
6703
6704         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6705                 goto emul_write;
6706
6707         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6708                 goto emul_write;
6709
6710         kaddr = map.hva + offset_in_page(gpa);
6711
6712         switch (bytes) {
6713         case 1:
6714                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6715                 break;
6716         case 2:
6717                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6718                 break;
6719         case 4:
6720                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6721                 break;
6722         case 8:
6723                 exchanged = CMPXCHG64(kaddr, old, new);
6724                 break;
6725         default:
6726                 BUG();
6727         }
6728
6729         kvm_vcpu_unmap(vcpu, &map, true);
6730
6731         if (!exchanged)
6732                 return X86EMUL_CMPXCHG_FAILED;
6733
6734         kvm_page_track_write(vcpu, gpa, new, bytes);
6735
6736         return X86EMUL_CONTINUE;
6737
6738 emul_write:
6739         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6740
6741         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6742 }
6743
6744 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6745 {
6746         int r = 0, i;
6747
6748         for (i = 0; i < vcpu->arch.pio.count; i++) {
6749                 if (vcpu->arch.pio.in)
6750                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6751                                             vcpu->arch.pio.size, pd);
6752                 else
6753                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6754                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6755                                              pd);
6756                 if (r)
6757                         break;
6758                 pd += vcpu->arch.pio.size;
6759         }
6760         return r;
6761 }
6762
6763 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6764                                unsigned short port, void *val,
6765                                unsigned int count, bool in)
6766 {
6767         vcpu->arch.pio.port = port;
6768         vcpu->arch.pio.in = in;
6769         vcpu->arch.pio.count  = count;
6770         vcpu->arch.pio.size = size;
6771
6772         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6773                 vcpu->arch.pio.count = 0;
6774                 return 1;
6775         }
6776
6777         vcpu->run->exit_reason = KVM_EXIT_IO;
6778         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6779         vcpu->run->io.size = size;
6780         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6781         vcpu->run->io.count = count;
6782         vcpu->run->io.port = port;
6783
6784         return 0;
6785 }
6786
6787 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6788                            unsigned short port, void *val, unsigned int count)
6789 {
6790         int ret;
6791
6792         if (vcpu->arch.pio.count)
6793                 goto data_avail;
6794
6795         memset(vcpu->arch.pio_data, 0, size * count);
6796
6797         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6798         if (ret) {
6799 data_avail:
6800                 memcpy(val, vcpu->arch.pio_data, size * count);
6801                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6802                 vcpu->arch.pio.count = 0;
6803                 return 1;
6804         }
6805
6806         return 0;
6807 }
6808
6809 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6810                                     int size, unsigned short port, void *val,
6811                                     unsigned int count)
6812 {
6813         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6814
6815 }
6816
6817 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6818                             unsigned short port, const void *val,
6819                             unsigned int count)
6820 {
6821         memcpy(vcpu->arch.pio_data, val, size * count);
6822         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6823         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6824 }
6825
6826 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6827                                      int size, unsigned short port,
6828                                      const void *val, unsigned int count)
6829 {
6830         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6831 }
6832
6833 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6834 {
6835         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6836 }
6837
6838 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6839 {
6840         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6841 }
6842
6843 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6844 {
6845         if (!need_emulate_wbinvd(vcpu))
6846                 return X86EMUL_CONTINUE;
6847
6848         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6849                 int cpu = get_cpu();
6850
6851                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6852                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6853                                 wbinvd_ipi, NULL, 1);
6854                 put_cpu();
6855                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6856         } else
6857                 wbinvd();
6858         return X86EMUL_CONTINUE;
6859 }
6860
6861 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6862 {
6863         kvm_emulate_wbinvd_noskip(vcpu);
6864         return kvm_skip_emulated_instruction(vcpu);
6865 }
6866 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6867
6868
6869
6870 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6871 {
6872         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6873 }
6874
6875 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6876                             unsigned long *dest)
6877 {
6878         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6879 }
6880
6881 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6882                            unsigned long value)
6883 {
6884
6885         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6886 }
6887
6888 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6889 {
6890         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6891 }
6892
6893 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6894 {
6895         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6896         unsigned long value;
6897
6898         switch (cr) {
6899         case 0:
6900                 value = kvm_read_cr0(vcpu);
6901                 break;
6902         case 2:
6903                 value = vcpu->arch.cr2;
6904                 break;
6905         case 3:
6906                 value = kvm_read_cr3(vcpu);
6907                 break;
6908         case 4:
6909                 value = kvm_read_cr4(vcpu);
6910                 break;
6911         case 8:
6912                 value = kvm_get_cr8(vcpu);
6913                 break;
6914         default:
6915                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6916                 return 0;
6917         }
6918
6919         return value;
6920 }
6921
6922 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6923 {
6924         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6925         int res = 0;
6926
6927         switch (cr) {
6928         case 0:
6929                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6930                 break;
6931         case 2:
6932                 vcpu->arch.cr2 = val;
6933                 break;
6934         case 3:
6935                 res = kvm_set_cr3(vcpu, val);
6936                 break;
6937         case 4:
6938                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6939                 break;
6940         case 8:
6941                 res = kvm_set_cr8(vcpu, val);
6942                 break;
6943         default:
6944                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6945                 res = -1;
6946         }
6947
6948         return res;
6949 }
6950
6951 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6952 {
6953         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6954 }
6955
6956 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6957 {
6958         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6959 }
6960
6961 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6962 {
6963         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6964 }
6965
6966 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6967 {
6968         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6969 }
6970
6971 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6972 {
6973         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6974 }
6975
6976 static unsigned long emulator_get_cached_segment_base(
6977         struct x86_emulate_ctxt *ctxt, int seg)
6978 {
6979         return get_segment_base(emul_to_vcpu(ctxt), seg);
6980 }
6981
6982 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6983                                  struct desc_struct *desc, u32 *base3,
6984                                  int seg)
6985 {
6986         struct kvm_segment var;
6987
6988         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6989         *selector = var.selector;
6990
6991         if (var.unusable) {
6992                 memset(desc, 0, sizeof(*desc));
6993                 if (base3)
6994                         *base3 = 0;
6995                 return false;
6996         }
6997
6998         if (var.g)
6999                 var.limit >>= 12;
7000         set_desc_limit(desc, var.limit);
7001         set_desc_base(desc, (unsigned long)var.base);
7002 #ifdef CONFIG_X86_64
7003         if (base3)
7004                 *base3 = var.base >> 32;
7005 #endif
7006         desc->type = var.type;
7007         desc->s = var.s;
7008         desc->dpl = var.dpl;
7009         desc->p = var.present;
7010         desc->avl = var.avl;
7011         desc->l = var.l;
7012         desc->d = var.db;
7013         desc->g = var.g;
7014
7015         return true;
7016 }
7017
7018 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7019                                  struct desc_struct *desc, u32 base3,
7020                                  int seg)
7021 {
7022         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7023         struct kvm_segment var;
7024
7025         var.selector = selector;
7026         var.base = get_desc_base(desc);
7027 #ifdef CONFIG_X86_64
7028         var.base |= ((u64)base3) << 32;
7029 #endif
7030         var.limit = get_desc_limit(desc);
7031         if (desc->g)
7032                 var.limit = (var.limit << 12) | 0xfff;
7033         var.type = desc->type;
7034         var.dpl = desc->dpl;
7035         var.db = desc->d;
7036         var.s = desc->s;
7037         var.l = desc->l;
7038         var.g = desc->g;
7039         var.avl = desc->avl;
7040         var.present = desc->p;
7041         var.unusable = !var.present;
7042         var.padding = 0;
7043
7044         kvm_set_segment(vcpu, &var, seg);
7045         return;
7046 }
7047
7048 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7049                             u32 msr_index, u64 *pdata)
7050 {
7051         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7052         int r;
7053
7054         r = kvm_get_msr(vcpu, msr_index, pdata);
7055
7056         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7057                 /* Bounce to user space */
7058                 return X86EMUL_IO_NEEDED;
7059         }
7060
7061         return r;
7062 }
7063
7064 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7065                             u32 msr_index, u64 data)
7066 {
7067         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7068         int r;
7069
7070         r = kvm_set_msr(vcpu, msr_index, data);
7071
7072         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7073                 /* Bounce to user space */
7074                 return X86EMUL_IO_NEEDED;
7075         }
7076
7077         return r;
7078 }
7079
7080 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7081 {
7082         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7083
7084         return vcpu->arch.smbase;
7085 }
7086
7087 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7088 {
7089         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7090
7091         vcpu->arch.smbase = smbase;
7092 }
7093
7094 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7095                               u32 pmc)
7096 {
7097         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7098 }
7099
7100 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7101                              u32 pmc, u64 *pdata)
7102 {
7103         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7104 }
7105
7106 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7107 {
7108         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7109 }
7110
7111 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7112                               struct x86_instruction_info *info,
7113                               enum x86_intercept_stage stage)
7114 {
7115         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7116                                             &ctxt->exception);
7117 }
7118
7119 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7120                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7121                               bool exact_only)
7122 {
7123         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7124 }
7125
7126 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7127 {
7128         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7129 }
7130
7131 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7132 {
7133         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7134 }
7135
7136 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7137 {
7138         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7139 }
7140
7141 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7142 {
7143         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7144 }
7145
7146 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7147 {
7148         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7149 }
7150
7151 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7152 {
7153         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7154 }
7155
7156 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7157 {
7158         return emul_to_vcpu(ctxt)->arch.hflags;
7159 }
7160
7161 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7162 {
7163         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7164
7165         vcpu->arch.hflags = emul_flags;
7166         kvm_mmu_reset_context(vcpu);
7167 }
7168
7169 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7170                                   const char *smstate)
7171 {
7172         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7173 }
7174
7175 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7176 {
7177         kvm_smm_changed(emul_to_vcpu(ctxt));
7178 }
7179
7180 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7181 {
7182         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7183 }
7184
7185 static const struct x86_emulate_ops emulate_ops = {
7186         .read_gpr            = emulator_read_gpr,
7187         .write_gpr           = emulator_write_gpr,
7188         .read_std            = emulator_read_std,
7189         .write_std           = emulator_write_std,
7190         .read_phys           = kvm_read_guest_phys_system,
7191         .fetch               = kvm_fetch_guest_virt,
7192         .read_emulated       = emulator_read_emulated,
7193         .write_emulated      = emulator_write_emulated,
7194         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7195         .invlpg              = emulator_invlpg,
7196         .pio_in_emulated     = emulator_pio_in_emulated,
7197         .pio_out_emulated    = emulator_pio_out_emulated,
7198         .get_segment         = emulator_get_segment,
7199         .set_segment         = emulator_set_segment,
7200         .get_cached_segment_base = emulator_get_cached_segment_base,
7201         .get_gdt             = emulator_get_gdt,
7202         .get_idt             = emulator_get_idt,
7203         .set_gdt             = emulator_set_gdt,
7204         .set_idt             = emulator_set_idt,
7205         .get_cr              = emulator_get_cr,
7206         .set_cr              = emulator_set_cr,
7207         .cpl                 = emulator_get_cpl,
7208         .get_dr              = emulator_get_dr,
7209         .set_dr              = emulator_set_dr,
7210         .get_smbase          = emulator_get_smbase,
7211         .set_smbase          = emulator_set_smbase,
7212         .set_msr             = emulator_set_msr,
7213         .get_msr             = emulator_get_msr,
7214         .check_pmc           = emulator_check_pmc,
7215         .read_pmc            = emulator_read_pmc,
7216         .halt                = emulator_halt,
7217         .wbinvd              = emulator_wbinvd,
7218         .fix_hypercall       = emulator_fix_hypercall,
7219         .intercept           = emulator_intercept,
7220         .get_cpuid           = emulator_get_cpuid,
7221         .guest_has_long_mode = emulator_guest_has_long_mode,
7222         .guest_has_movbe     = emulator_guest_has_movbe,
7223         .guest_has_fxsr      = emulator_guest_has_fxsr,
7224         .set_nmi_mask        = emulator_set_nmi_mask,
7225         .get_hflags          = emulator_get_hflags,
7226         .set_hflags          = emulator_set_hflags,
7227         .pre_leave_smm       = emulator_pre_leave_smm,
7228         .post_leave_smm      = emulator_post_leave_smm,
7229         .set_xcr             = emulator_set_xcr,
7230 };
7231
7232 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7233 {
7234         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7235         /*
7236          * an sti; sti; sequence only disable interrupts for the first
7237          * instruction. So, if the last instruction, be it emulated or
7238          * not, left the system with the INT_STI flag enabled, it
7239          * means that the last instruction is an sti. We should not
7240          * leave the flag on in this case. The same goes for mov ss
7241          */
7242         if (int_shadow & mask)
7243                 mask = 0;
7244         if (unlikely(int_shadow || mask)) {
7245                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7246                 if (!mask)
7247                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7248         }
7249 }
7250
7251 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7252 {
7253         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7254         if (ctxt->exception.vector == PF_VECTOR)
7255                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7256
7257         if (ctxt->exception.error_code_valid)
7258                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7259                                       ctxt->exception.error_code);
7260         else
7261                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7262         return false;
7263 }
7264
7265 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7266 {
7267         struct x86_emulate_ctxt *ctxt;
7268
7269         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7270         if (!ctxt) {
7271                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7272                 return NULL;
7273         }
7274
7275         ctxt->vcpu = vcpu;
7276         ctxt->ops = &emulate_ops;
7277         vcpu->arch.emulate_ctxt = ctxt;
7278
7279         return ctxt;
7280 }
7281
7282 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7283 {
7284         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7285         int cs_db, cs_l;
7286
7287         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7288
7289         ctxt->gpa_available = false;
7290         ctxt->eflags = kvm_get_rflags(vcpu);
7291         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7292
7293         ctxt->eip = kvm_rip_read(vcpu);
7294         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7295                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7296                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7297                      cs_db                              ? X86EMUL_MODE_PROT32 :
7298                                                           X86EMUL_MODE_PROT16;
7299         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7300         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7301         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7302
7303         ctxt->interruptibility = 0;
7304         ctxt->have_exception = false;
7305         ctxt->exception.vector = -1;
7306         ctxt->perm_ok = false;
7307
7308         init_decode_cache(ctxt);
7309         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7310 }
7311
7312 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7313 {
7314         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7315         int ret;
7316
7317         init_emulate_ctxt(vcpu);
7318
7319         ctxt->op_bytes = 2;
7320         ctxt->ad_bytes = 2;
7321         ctxt->_eip = ctxt->eip + inc_eip;
7322         ret = emulate_int_real(ctxt, irq);
7323
7324         if (ret != X86EMUL_CONTINUE) {
7325                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7326         } else {
7327                 ctxt->eip = ctxt->_eip;
7328                 kvm_rip_write(vcpu, ctxt->eip);
7329                 kvm_set_rflags(vcpu, ctxt->eflags);
7330         }
7331 }
7332 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7333
7334 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7335 {
7336         ++vcpu->stat.insn_emulation_fail;
7337         trace_kvm_emulate_insn_failed(vcpu);
7338
7339         if (emulation_type & EMULTYPE_VMWARE_GP) {
7340                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7341                 return 1;
7342         }
7343
7344         if (emulation_type & EMULTYPE_SKIP) {
7345                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7346                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7347                 vcpu->run->internal.ndata = 0;
7348                 return 0;
7349         }
7350
7351         kvm_queue_exception(vcpu, UD_VECTOR);
7352
7353         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7354                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7355                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7356                 vcpu->run->internal.ndata = 0;
7357                 return 0;
7358         }
7359
7360         return 1;
7361 }
7362
7363 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7364                                   bool write_fault_to_shadow_pgtable,
7365                                   int emulation_type)
7366 {
7367         gpa_t gpa = cr2_or_gpa;
7368         kvm_pfn_t pfn;
7369
7370         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7371                 return false;
7372
7373         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7374             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7375                 return false;
7376
7377         if (!vcpu->arch.mmu->direct_map) {
7378                 /*
7379                  * Write permission should be allowed since only
7380                  * write access need to be emulated.
7381                  */
7382                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7383
7384                 /*
7385                  * If the mapping is invalid in guest, let cpu retry
7386                  * it to generate fault.
7387                  */
7388                 if (gpa == UNMAPPED_GVA)
7389                         return true;
7390         }
7391
7392         /*
7393          * Do not retry the unhandleable instruction if it faults on the
7394          * readonly host memory, otherwise it will goto a infinite loop:
7395          * retry instruction -> write #PF -> emulation fail -> retry
7396          * instruction -> ...
7397          */
7398         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7399
7400         /*
7401          * If the instruction failed on the error pfn, it can not be fixed,
7402          * report the error to userspace.
7403          */
7404         if (is_error_noslot_pfn(pfn))
7405                 return false;
7406
7407         kvm_release_pfn_clean(pfn);
7408
7409         /* The instructions are well-emulated on direct mmu. */
7410         if (vcpu->arch.mmu->direct_map) {
7411                 unsigned int indirect_shadow_pages;
7412
7413                 write_lock(&vcpu->kvm->mmu_lock);
7414                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7415                 write_unlock(&vcpu->kvm->mmu_lock);
7416
7417                 if (indirect_shadow_pages)
7418                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7419
7420                 return true;
7421         }
7422
7423         /*
7424          * if emulation was due to access to shadowed page table
7425          * and it failed try to unshadow page and re-enter the
7426          * guest to let CPU execute the instruction.
7427          */
7428         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7429
7430         /*
7431          * If the access faults on its page table, it can not
7432          * be fixed by unprotecting shadow page and it should
7433          * be reported to userspace.
7434          */
7435         return !write_fault_to_shadow_pgtable;
7436 }
7437
7438 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7439                               gpa_t cr2_or_gpa,  int emulation_type)
7440 {
7441         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7442         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7443
7444         last_retry_eip = vcpu->arch.last_retry_eip;
7445         last_retry_addr = vcpu->arch.last_retry_addr;
7446
7447         /*
7448          * If the emulation is caused by #PF and it is non-page_table
7449          * writing instruction, it means the VM-EXIT is caused by shadow
7450          * page protected, we can zap the shadow page and retry this
7451          * instruction directly.
7452          *
7453          * Note: if the guest uses a non-page-table modifying instruction
7454          * on the PDE that points to the instruction, then we will unmap
7455          * the instruction and go to an infinite loop. So, we cache the
7456          * last retried eip and the last fault address, if we meet the eip
7457          * and the address again, we can break out of the potential infinite
7458          * loop.
7459          */
7460         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7461
7462         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7463                 return false;
7464
7465         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7466             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7467                 return false;
7468
7469         if (x86_page_table_writing_insn(ctxt))
7470                 return false;
7471
7472         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7473                 return false;
7474
7475         vcpu->arch.last_retry_eip = ctxt->eip;
7476         vcpu->arch.last_retry_addr = cr2_or_gpa;
7477
7478         if (!vcpu->arch.mmu->direct_map)
7479                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7480
7481         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7482
7483         return true;
7484 }
7485
7486 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7487 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7488
7489 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7490 {
7491         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7492                 /* This is a good place to trace that we are exiting SMM.  */
7493                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7494
7495                 /* Process a latched INIT or SMI, if any.  */
7496                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7497         }
7498
7499         kvm_mmu_reset_context(vcpu);
7500 }
7501
7502 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7503                                 unsigned long *db)
7504 {
7505         u32 dr6 = 0;
7506         int i;
7507         u32 enable, rwlen;
7508
7509         enable = dr7;
7510         rwlen = dr7 >> 16;
7511         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7512                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7513                         dr6 |= (1 << i);
7514         return dr6;
7515 }
7516
7517 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7518 {
7519         struct kvm_run *kvm_run = vcpu->run;
7520
7521         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7522                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7523                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7524                 kvm_run->debug.arch.exception = DB_VECTOR;
7525                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7526                 return 0;
7527         }
7528         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7529         return 1;
7530 }
7531
7532 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7533 {
7534         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7535         int r;
7536
7537         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7538         if (unlikely(!r))
7539                 return 0;
7540
7541         /*
7542          * rflags is the old, "raw" value of the flags.  The new value has
7543          * not been saved yet.
7544          *
7545          * This is correct even for TF set by the guest, because "the
7546          * processor will not generate this exception after the instruction
7547          * that sets the TF flag".
7548          */
7549         if (unlikely(rflags & X86_EFLAGS_TF))
7550                 r = kvm_vcpu_do_singlestep(vcpu);
7551         return r;
7552 }
7553 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7554
7555 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7556 {
7557         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7558             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7559                 struct kvm_run *kvm_run = vcpu->run;
7560                 unsigned long eip = kvm_get_linear_rip(vcpu);
7561                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7562                                            vcpu->arch.guest_debug_dr7,
7563                                            vcpu->arch.eff_db);
7564
7565                 if (dr6 != 0) {
7566                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7567                         kvm_run->debug.arch.pc = eip;
7568                         kvm_run->debug.arch.exception = DB_VECTOR;
7569                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7570                         *r = 0;
7571                         return true;
7572                 }
7573         }
7574
7575         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7576             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7577                 unsigned long eip = kvm_get_linear_rip(vcpu);
7578                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7579                                            vcpu->arch.dr7,
7580                                            vcpu->arch.db);
7581
7582                 if (dr6 != 0) {
7583                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7584                         *r = 1;
7585                         return true;
7586                 }
7587         }
7588
7589         return false;
7590 }
7591
7592 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7593 {
7594         switch (ctxt->opcode_len) {
7595         case 1:
7596                 switch (ctxt->b) {
7597                 case 0xe4:      /* IN */
7598                 case 0xe5:
7599                 case 0xec:
7600                 case 0xed:
7601                 case 0xe6:      /* OUT */
7602                 case 0xe7:
7603                 case 0xee:
7604                 case 0xef:
7605                 case 0x6c:      /* INS */
7606                 case 0x6d:
7607                 case 0x6e:      /* OUTS */
7608                 case 0x6f:
7609                         return true;
7610                 }
7611                 break;
7612         case 2:
7613                 switch (ctxt->b) {
7614                 case 0x33:      /* RDPMC */
7615                         return true;
7616                 }
7617                 break;
7618         }
7619
7620         return false;
7621 }
7622
7623 /*
7624  * Decode to be emulated instruction. Return EMULATION_OK if success.
7625  */
7626 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7627                                     void *insn, int insn_len)
7628 {
7629         int r = EMULATION_OK;
7630         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7631
7632         init_emulate_ctxt(vcpu);
7633
7634         /*
7635          * We will reenter on the same instruction since we do not set
7636          * complete_userspace_io. This does not handle watchpoints yet,
7637          * those would be handled in the emulate_ops.
7638          */
7639         if (!(emulation_type & EMULTYPE_SKIP) &&
7640             kvm_vcpu_check_breakpoint(vcpu, &r))
7641                 return r;
7642
7643         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7644
7645         trace_kvm_emulate_insn_start(vcpu);
7646         ++vcpu->stat.insn_emulation;
7647
7648         return r;
7649 }
7650 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7651
7652 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7653                             int emulation_type, void *insn, int insn_len)
7654 {
7655         int r;
7656         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7657         bool writeback = true;
7658         bool write_fault_to_spt;
7659
7660         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7661                 return 1;
7662
7663         vcpu->arch.l1tf_flush_l1d = true;
7664
7665         /*
7666          * Clear write_fault_to_shadow_pgtable here to ensure it is
7667          * never reused.
7668          */
7669         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7670         vcpu->arch.write_fault_to_shadow_pgtable = false;
7671
7672         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7673                 kvm_clear_exception_queue(vcpu);
7674
7675                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7676                                                     insn, insn_len);
7677                 if (r != EMULATION_OK)  {
7678                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7679                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7680                                 kvm_queue_exception(vcpu, UD_VECTOR);
7681                                 return 1;
7682                         }
7683                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7684                                                   write_fault_to_spt,
7685                                                   emulation_type))
7686                                 return 1;
7687                         if (ctxt->have_exception) {
7688                                 /*
7689                                  * #UD should result in just EMULATION_FAILED, and trap-like
7690                                  * exception should not be encountered during decode.
7691                                  */
7692                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7693                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7694                                 inject_emulated_exception(vcpu);
7695                                 return 1;
7696                         }
7697                         return handle_emulation_failure(vcpu, emulation_type);
7698                 }
7699         }
7700
7701         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7702             !is_vmware_backdoor_opcode(ctxt)) {
7703                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7704                 return 1;
7705         }
7706
7707         /*
7708          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7709          * for kvm_skip_emulated_instruction().  The caller is responsible for
7710          * updating interruptibility state and injecting single-step #DBs.
7711          */
7712         if (emulation_type & EMULTYPE_SKIP) {
7713                 kvm_rip_write(vcpu, ctxt->_eip);
7714                 if (ctxt->eflags & X86_EFLAGS_RF)
7715                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7716                 return 1;
7717         }
7718
7719         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7720                 return 1;
7721
7722         /* this is needed for vmware backdoor interface to work since it
7723            changes registers values  during IO operation */
7724         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7725                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7726                 emulator_invalidate_register_cache(ctxt);
7727         }
7728
7729 restart:
7730         if (emulation_type & EMULTYPE_PF) {
7731                 /* Save the faulting GPA (cr2) in the address field */
7732                 ctxt->exception.address = cr2_or_gpa;
7733
7734                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7735                 if (vcpu->arch.mmu->direct_map) {
7736                         ctxt->gpa_available = true;
7737                         ctxt->gpa_val = cr2_or_gpa;
7738                 }
7739         } else {
7740                 /* Sanitize the address out of an abundance of paranoia. */
7741                 ctxt->exception.address = 0;
7742         }
7743
7744         r = x86_emulate_insn(ctxt);
7745
7746         if (r == EMULATION_INTERCEPTED)
7747                 return 1;
7748
7749         if (r == EMULATION_FAILED) {
7750                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7751                                         emulation_type))
7752                         return 1;
7753
7754                 return handle_emulation_failure(vcpu, emulation_type);
7755         }
7756
7757         if (ctxt->have_exception) {
7758                 r = 1;
7759                 if (inject_emulated_exception(vcpu))
7760                         return r;
7761         } else if (vcpu->arch.pio.count) {
7762                 if (!vcpu->arch.pio.in) {
7763                         /* FIXME: return into emulator if single-stepping.  */
7764                         vcpu->arch.pio.count = 0;
7765                 } else {
7766                         writeback = false;
7767                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7768                 }
7769                 r = 0;
7770         } else if (vcpu->mmio_needed) {
7771                 ++vcpu->stat.mmio_exits;
7772
7773                 if (!vcpu->mmio_is_write)
7774                         writeback = false;
7775                 r = 0;
7776                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7777         } else if (r == EMULATION_RESTART)
7778                 goto restart;
7779         else
7780                 r = 1;
7781
7782         if (writeback) {
7783                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7784                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7785                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7786                 if (!ctxt->have_exception ||
7787                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7788                         kvm_rip_write(vcpu, ctxt->eip);
7789                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7790                                 r = kvm_vcpu_do_singlestep(vcpu);
7791                         if (kvm_x86_ops.update_emulated_instruction)
7792                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7793                         __kvm_set_rflags(vcpu, ctxt->eflags);
7794                 }
7795
7796                 /*
7797                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7798                  * do nothing, and it will be requested again as soon as
7799                  * the shadow expires.  But we still need to check here,
7800                  * because POPF has no interrupt shadow.
7801                  */
7802                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7803                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7804         } else
7805                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7806
7807         return r;
7808 }
7809
7810 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7811 {
7812         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7813 }
7814 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7815
7816 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7817                                         void *insn, int insn_len)
7818 {
7819         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7820 }
7821 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7822
7823 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7824 {
7825         vcpu->arch.pio.count = 0;
7826         return 1;
7827 }
7828
7829 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7830 {
7831         vcpu->arch.pio.count = 0;
7832
7833         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7834                 return 1;
7835
7836         return kvm_skip_emulated_instruction(vcpu);
7837 }
7838
7839 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7840                             unsigned short port)
7841 {
7842         unsigned long val = kvm_rax_read(vcpu);
7843         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7844
7845         if (ret)
7846                 return ret;
7847
7848         /*
7849          * Workaround userspace that relies on old KVM behavior of %rip being
7850          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7851          */
7852         if (port == 0x7e &&
7853             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7854                 vcpu->arch.complete_userspace_io =
7855                         complete_fast_pio_out_port_0x7e;
7856                 kvm_skip_emulated_instruction(vcpu);
7857         } else {
7858                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7859                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7860         }
7861         return 0;
7862 }
7863
7864 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7865 {
7866         unsigned long val;
7867
7868         /* We should only ever be called with arch.pio.count equal to 1 */
7869         BUG_ON(vcpu->arch.pio.count != 1);
7870
7871         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7872                 vcpu->arch.pio.count = 0;
7873                 return 1;
7874         }
7875
7876         /* For size less than 4 we merge, else we zero extend */
7877         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7878
7879         /*
7880          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7881          * the copy and tracing
7882          */
7883         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7884         kvm_rax_write(vcpu, val);
7885
7886         return kvm_skip_emulated_instruction(vcpu);
7887 }
7888
7889 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7890                            unsigned short port)
7891 {
7892         unsigned long val;
7893         int ret;
7894
7895         /* For size less than 4 we merge, else we zero extend */
7896         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7897
7898         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7899         if (ret) {
7900                 kvm_rax_write(vcpu, val);
7901                 return ret;
7902         }
7903
7904         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7905         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7906
7907         return 0;
7908 }
7909
7910 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7911 {
7912         int ret;
7913
7914         if (in)
7915                 ret = kvm_fast_pio_in(vcpu, size, port);
7916         else
7917                 ret = kvm_fast_pio_out(vcpu, size, port);
7918         return ret && kvm_skip_emulated_instruction(vcpu);
7919 }
7920 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7921
7922 static int kvmclock_cpu_down_prep(unsigned int cpu)
7923 {
7924         __this_cpu_write(cpu_tsc_khz, 0);
7925         return 0;
7926 }
7927
7928 static void tsc_khz_changed(void *data)
7929 {
7930         struct cpufreq_freqs *freq = data;
7931         unsigned long khz = 0;
7932
7933         if (data)
7934                 khz = freq->new;
7935         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7936                 khz = cpufreq_quick_get(raw_smp_processor_id());
7937         if (!khz)
7938                 khz = tsc_khz;
7939         __this_cpu_write(cpu_tsc_khz, khz);
7940 }
7941
7942 #ifdef CONFIG_X86_64
7943 static void kvm_hyperv_tsc_notifier(void)
7944 {
7945         struct kvm *kvm;
7946         struct kvm_vcpu *vcpu;
7947         int cpu;
7948         unsigned long flags;
7949
7950         mutex_lock(&kvm_lock);
7951         list_for_each_entry(kvm, &vm_list, vm_list)
7952                 kvm_make_mclock_inprogress_request(kvm);
7953
7954         hyperv_stop_tsc_emulation();
7955
7956         /* TSC frequency always matches when on Hyper-V */
7957         for_each_present_cpu(cpu)
7958                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7959         kvm_max_guest_tsc_khz = tsc_khz;
7960
7961         list_for_each_entry(kvm, &vm_list, vm_list) {
7962                 struct kvm_arch *ka = &kvm->arch;
7963
7964                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7965                 pvclock_update_vm_gtod_copy(kvm);
7966                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7967
7968                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7969                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7970
7971                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7972                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7973         }
7974         mutex_unlock(&kvm_lock);
7975 }
7976 #endif
7977
7978 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7979 {
7980         struct kvm *kvm;
7981         struct kvm_vcpu *vcpu;
7982         int i, send_ipi = 0;
7983
7984         /*
7985          * We allow guests to temporarily run on slowing clocks,
7986          * provided we notify them after, or to run on accelerating
7987          * clocks, provided we notify them before.  Thus time never
7988          * goes backwards.
7989          *
7990          * However, we have a problem.  We can't atomically update
7991          * the frequency of a given CPU from this function; it is
7992          * merely a notifier, which can be called from any CPU.
7993          * Changing the TSC frequency at arbitrary points in time
7994          * requires a recomputation of local variables related to
7995          * the TSC for each VCPU.  We must flag these local variables
7996          * to be updated and be sure the update takes place with the
7997          * new frequency before any guests proceed.
7998          *
7999          * Unfortunately, the combination of hotplug CPU and frequency
8000          * change creates an intractable locking scenario; the order
8001          * of when these callouts happen is undefined with respect to
8002          * CPU hotplug, and they can race with each other.  As such,
8003          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8004          * undefined; you can actually have a CPU frequency change take
8005          * place in between the computation of X and the setting of the
8006          * variable.  To protect against this problem, all updates of
8007          * the per_cpu tsc_khz variable are done in an interrupt
8008          * protected IPI, and all callers wishing to update the value
8009          * must wait for a synchronous IPI to complete (which is trivial
8010          * if the caller is on the CPU already).  This establishes the
8011          * necessary total order on variable updates.
8012          *
8013          * Note that because a guest time update may take place
8014          * anytime after the setting of the VCPU's request bit, the
8015          * correct TSC value must be set before the request.  However,
8016          * to ensure the update actually makes it to any guest which
8017          * starts running in hardware virtualization between the set
8018          * and the acquisition of the spinlock, we must also ping the
8019          * CPU after setting the request bit.
8020          *
8021          */
8022
8023         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8024
8025         mutex_lock(&kvm_lock);
8026         list_for_each_entry(kvm, &vm_list, vm_list) {
8027                 kvm_for_each_vcpu(i, vcpu, kvm) {
8028                         if (vcpu->cpu != cpu)
8029                                 continue;
8030                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8031                         if (vcpu->cpu != raw_smp_processor_id())
8032                                 send_ipi = 1;
8033                 }
8034         }
8035         mutex_unlock(&kvm_lock);
8036
8037         if (freq->old < freq->new && send_ipi) {
8038                 /*
8039                  * We upscale the frequency.  Must make the guest
8040                  * doesn't see old kvmclock values while running with
8041                  * the new frequency, otherwise we risk the guest sees
8042                  * time go backwards.
8043                  *
8044                  * In case we update the frequency for another cpu
8045                  * (which might be in guest context) send an interrupt
8046                  * to kick the cpu out of guest context.  Next time
8047                  * guest context is entered kvmclock will be updated,
8048                  * so the guest will not see stale values.
8049                  */
8050                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8051         }
8052 }
8053
8054 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8055                                      void *data)
8056 {
8057         struct cpufreq_freqs *freq = data;
8058         int cpu;
8059
8060         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8061                 return 0;
8062         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8063                 return 0;
8064
8065         for_each_cpu(cpu, freq->policy->cpus)
8066                 __kvmclock_cpufreq_notifier(freq, cpu);
8067
8068         return 0;
8069 }
8070
8071 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8072         .notifier_call  = kvmclock_cpufreq_notifier
8073 };
8074
8075 static int kvmclock_cpu_online(unsigned int cpu)
8076 {
8077         tsc_khz_changed(NULL);
8078         return 0;
8079 }
8080
8081 static void kvm_timer_init(void)
8082 {
8083         max_tsc_khz = tsc_khz;
8084
8085         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8086 #ifdef CONFIG_CPU_FREQ
8087                 struct cpufreq_policy *policy;
8088                 int cpu;
8089
8090                 cpu = get_cpu();
8091                 policy = cpufreq_cpu_get(cpu);
8092                 if (policy) {
8093                         if (policy->cpuinfo.max_freq)
8094                                 max_tsc_khz = policy->cpuinfo.max_freq;
8095                         cpufreq_cpu_put(policy);
8096                 }
8097                 put_cpu();
8098 #endif
8099                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8100                                           CPUFREQ_TRANSITION_NOTIFIER);
8101         }
8102
8103         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8104                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8105 }
8106
8107 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8108 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8109
8110 int kvm_is_in_guest(void)
8111 {
8112         return __this_cpu_read(current_vcpu) != NULL;
8113 }
8114
8115 static int kvm_is_user_mode(void)
8116 {
8117         int user_mode = 3;
8118
8119         if (__this_cpu_read(current_vcpu))
8120                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8121
8122         return user_mode != 0;
8123 }
8124
8125 static unsigned long kvm_get_guest_ip(void)
8126 {
8127         unsigned long ip = 0;
8128
8129         if (__this_cpu_read(current_vcpu))
8130                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8131
8132         return ip;
8133 }
8134
8135 static void kvm_handle_intel_pt_intr(void)
8136 {
8137         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8138
8139         kvm_make_request(KVM_REQ_PMI, vcpu);
8140         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8141                         (unsigned long *)&vcpu->arch.pmu.global_status);
8142 }
8143
8144 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8145         .is_in_guest            = kvm_is_in_guest,
8146         .is_user_mode           = kvm_is_user_mode,
8147         .get_guest_ip           = kvm_get_guest_ip,
8148         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8149 };
8150
8151 #ifdef CONFIG_X86_64
8152 static void pvclock_gtod_update_fn(struct work_struct *work)
8153 {
8154         struct kvm *kvm;
8155
8156         struct kvm_vcpu *vcpu;
8157         int i;
8158
8159         mutex_lock(&kvm_lock);
8160         list_for_each_entry(kvm, &vm_list, vm_list)
8161                 kvm_for_each_vcpu(i, vcpu, kvm)
8162                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8163         atomic_set(&kvm_guest_has_master_clock, 0);
8164         mutex_unlock(&kvm_lock);
8165 }
8166
8167 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8168
8169 /*
8170  * Indirection to move queue_work() out of the tk_core.seq write held
8171  * region to prevent possible deadlocks against time accessors which
8172  * are invoked with work related locks held.
8173  */
8174 static void pvclock_irq_work_fn(struct irq_work *w)
8175 {
8176         queue_work(system_long_wq, &pvclock_gtod_work);
8177 }
8178
8179 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8180
8181 /*
8182  * Notification about pvclock gtod data update.
8183  */
8184 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8185                                void *priv)
8186 {
8187         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8188         struct timekeeper *tk = priv;
8189
8190         update_pvclock_gtod(tk);
8191
8192         /*
8193          * Disable master clock if host does not trust, or does not use,
8194          * TSC based clocksource. Delegate queue_work() to irq_work as
8195          * this is invoked with tk_core.seq write held.
8196          */
8197         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8198             atomic_read(&kvm_guest_has_master_clock) != 0)
8199                 irq_work_queue(&pvclock_irq_work);
8200         return 0;
8201 }
8202
8203 static struct notifier_block pvclock_gtod_notifier = {
8204         .notifier_call = pvclock_gtod_notify,
8205 };
8206 #endif
8207
8208 int kvm_arch_init(void *opaque)
8209 {
8210         struct kvm_x86_init_ops *ops = opaque;
8211         int r;
8212
8213         if (kvm_x86_ops.hardware_enable) {
8214                 printk(KERN_ERR "kvm: already loaded the other module\n");
8215                 r = -EEXIST;
8216                 goto out;
8217         }
8218
8219         if (!ops->cpu_has_kvm_support()) {
8220                 pr_err_ratelimited("kvm: no hardware support\n");
8221                 r = -EOPNOTSUPP;
8222                 goto out;
8223         }
8224         if (ops->disabled_by_bios()) {
8225                 pr_err_ratelimited("kvm: disabled by bios\n");
8226                 r = -EOPNOTSUPP;
8227                 goto out;
8228         }
8229
8230         /*
8231          * KVM explicitly assumes that the guest has an FPU and
8232          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8233          * vCPU's FPU state as a fxregs_state struct.
8234          */
8235         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8236                 printk(KERN_ERR "kvm: inadequate fpu\n");
8237                 r = -EOPNOTSUPP;
8238                 goto out;
8239         }
8240
8241         r = -ENOMEM;
8242         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8243                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8244                                           NULL);
8245         if (!x86_fpu_cache) {
8246                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8247                 goto out;
8248         }
8249
8250         x86_emulator_cache = kvm_alloc_emulator_cache();
8251         if (!x86_emulator_cache) {
8252                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8253                 goto out_free_x86_fpu_cache;
8254         }
8255
8256         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8257         if (!user_return_msrs) {
8258                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8259                 goto out_free_x86_emulator_cache;
8260         }
8261         kvm_nr_uret_msrs = 0;
8262
8263         r = kvm_mmu_module_init();
8264         if (r)
8265                 goto out_free_percpu;
8266
8267         kvm_timer_init();
8268
8269         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8270
8271         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8272                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8273                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8274         }
8275
8276         if (pi_inject_timer == -1)
8277                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8278 #ifdef CONFIG_X86_64
8279         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8280
8281         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8282                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8283 #endif
8284
8285         return 0;
8286
8287 out_free_percpu:
8288         free_percpu(user_return_msrs);
8289 out_free_x86_emulator_cache:
8290         kmem_cache_destroy(x86_emulator_cache);
8291 out_free_x86_fpu_cache:
8292         kmem_cache_destroy(x86_fpu_cache);
8293 out:
8294         return r;
8295 }
8296
8297 void kvm_arch_exit(void)
8298 {
8299 #ifdef CONFIG_X86_64
8300         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8301                 clear_hv_tscchange_cb();
8302 #endif
8303         kvm_lapic_exit();
8304         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8305
8306         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8307                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8308                                             CPUFREQ_TRANSITION_NOTIFIER);
8309         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8310 #ifdef CONFIG_X86_64
8311         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8312         irq_work_sync(&pvclock_irq_work);
8313         cancel_work_sync(&pvclock_gtod_work);
8314 #endif
8315         kvm_x86_ops.hardware_enable = NULL;
8316         kvm_mmu_module_exit();
8317         free_percpu(user_return_msrs);
8318         kmem_cache_destroy(x86_emulator_cache);
8319         kmem_cache_destroy(x86_fpu_cache);
8320 #ifdef CONFIG_KVM_XEN
8321         static_key_deferred_flush(&kvm_xen_enabled);
8322         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8323 #endif
8324 }
8325
8326 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8327 {
8328         ++vcpu->stat.halt_exits;
8329         if (lapic_in_kernel(vcpu)) {
8330                 vcpu->arch.mp_state = state;
8331                 return 1;
8332         } else {
8333                 vcpu->run->exit_reason = reason;
8334                 return 0;
8335         }
8336 }
8337
8338 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8339 {
8340         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8341 }
8342 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8343
8344 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8345 {
8346         int ret = kvm_skip_emulated_instruction(vcpu);
8347         /*
8348          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8349          * KVM_EXIT_DEBUG here.
8350          */
8351         return kvm_vcpu_halt(vcpu) && ret;
8352 }
8353 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8354
8355 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8356 {
8357         int ret = kvm_skip_emulated_instruction(vcpu);
8358
8359         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8360 }
8361 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8362
8363 #ifdef CONFIG_X86_64
8364 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8365                                 unsigned long clock_type)
8366 {
8367         struct kvm_clock_pairing clock_pairing;
8368         struct timespec64 ts;
8369         u64 cycle;
8370         int ret;
8371
8372         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8373                 return -KVM_EOPNOTSUPP;
8374
8375         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8376                 return -KVM_EOPNOTSUPP;
8377
8378         clock_pairing.sec = ts.tv_sec;
8379         clock_pairing.nsec = ts.tv_nsec;
8380         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8381         clock_pairing.flags = 0;
8382         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8383
8384         ret = 0;
8385         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8386                             sizeof(struct kvm_clock_pairing)))
8387                 ret = -KVM_EFAULT;
8388
8389         return ret;
8390 }
8391 #endif
8392
8393 /*
8394  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8395  *
8396  * @apicid - apicid of vcpu to be kicked.
8397  */
8398 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8399 {
8400         struct kvm_lapic_irq lapic_irq;
8401
8402         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8403         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8404         lapic_irq.level = 0;
8405         lapic_irq.dest_id = apicid;
8406         lapic_irq.msi_redir_hint = false;
8407
8408         lapic_irq.delivery_mode = APIC_DM_REMRD;
8409         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8410 }
8411
8412 bool kvm_apicv_activated(struct kvm *kvm)
8413 {
8414         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8415 }
8416 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8417
8418 void kvm_apicv_init(struct kvm *kvm, bool enable)
8419 {
8420         if (enable)
8421                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8422                           &kvm->arch.apicv_inhibit_reasons);
8423         else
8424                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8425                         &kvm->arch.apicv_inhibit_reasons);
8426 }
8427 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8428
8429 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8430 {
8431         struct kvm_vcpu *target = NULL;
8432         struct kvm_apic_map *map;
8433
8434         vcpu->stat.directed_yield_attempted++;
8435
8436         if (single_task_running())
8437                 goto no_yield;
8438
8439         rcu_read_lock();
8440         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8441
8442         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8443                 target = map->phys_map[dest_id]->vcpu;
8444
8445         rcu_read_unlock();
8446
8447         if (!target || !READ_ONCE(target->ready))
8448                 goto no_yield;
8449
8450         /* Ignore requests to yield to self */
8451         if (vcpu == target)
8452                 goto no_yield;
8453
8454         if (kvm_vcpu_yield_to(target) <= 0)
8455                 goto no_yield;
8456
8457         vcpu->stat.directed_yield_successful++;
8458
8459 no_yield:
8460         return;
8461 }
8462
8463 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8464 {
8465         unsigned long nr, a0, a1, a2, a3, ret;
8466         int op_64_bit;
8467
8468         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8469                 return kvm_xen_hypercall(vcpu);
8470
8471         if (kvm_hv_hypercall_enabled(vcpu))
8472                 return kvm_hv_hypercall(vcpu);
8473
8474         nr = kvm_rax_read(vcpu);
8475         a0 = kvm_rbx_read(vcpu);
8476         a1 = kvm_rcx_read(vcpu);
8477         a2 = kvm_rdx_read(vcpu);
8478         a3 = kvm_rsi_read(vcpu);
8479
8480         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8481
8482         op_64_bit = is_64_bit_mode(vcpu);
8483         if (!op_64_bit) {
8484                 nr &= 0xFFFFFFFF;
8485                 a0 &= 0xFFFFFFFF;
8486                 a1 &= 0xFFFFFFFF;
8487                 a2 &= 0xFFFFFFFF;
8488                 a3 &= 0xFFFFFFFF;
8489         }
8490
8491         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8492                 ret = -KVM_EPERM;
8493                 goto out;
8494         }
8495
8496         ret = -KVM_ENOSYS;
8497
8498         switch (nr) {
8499         case KVM_HC_VAPIC_POLL_IRQ:
8500                 ret = 0;
8501                 break;
8502         case KVM_HC_KICK_CPU:
8503                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8504                         break;
8505
8506                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8507                 kvm_sched_yield(vcpu, a1);
8508                 ret = 0;
8509                 break;
8510 #ifdef CONFIG_X86_64
8511         case KVM_HC_CLOCK_PAIRING:
8512                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8513                 break;
8514 #endif
8515         case KVM_HC_SEND_IPI:
8516                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8517                         break;
8518
8519                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8520                 break;
8521         case KVM_HC_SCHED_YIELD:
8522                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8523                         break;
8524
8525                 kvm_sched_yield(vcpu, a0);
8526                 ret = 0;
8527                 break;
8528         default:
8529                 ret = -KVM_ENOSYS;
8530                 break;
8531         }
8532 out:
8533         if (!op_64_bit)
8534                 ret = (u32)ret;
8535         kvm_rax_write(vcpu, ret);
8536
8537         ++vcpu->stat.hypercalls;
8538         return kvm_skip_emulated_instruction(vcpu);
8539 }
8540 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8541
8542 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8543 {
8544         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8545         char instruction[3];
8546         unsigned long rip = kvm_rip_read(vcpu);
8547
8548         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8549
8550         return emulator_write_emulated(ctxt, rip, instruction, 3,
8551                 &ctxt->exception);
8552 }
8553
8554 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8555 {
8556         return vcpu->run->request_interrupt_window &&
8557                 likely(!pic_in_kernel(vcpu->kvm));
8558 }
8559
8560 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8561 {
8562         struct kvm_run *kvm_run = vcpu->run;
8563
8564         /*
8565          * if_flag is obsolete and useless, so do not bother
8566          * setting it for SEV-ES guests.  Userspace can just
8567          * use kvm_run->ready_for_interrupt_injection.
8568          */
8569         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8570                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8571
8572         kvm_run->cr8 = kvm_get_cr8(vcpu);
8573         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8574         kvm_run->ready_for_interrupt_injection =
8575                 pic_in_kernel(vcpu->kvm) ||
8576                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8577
8578         if (is_smm(vcpu))
8579                 kvm_run->flags |= KVM_RUN_X86_SMM;
8580 }
8581
8582 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8583 {
8584         int max_irr, tpr;
8585
8586         if (!kvm_x86_ops.update_cr8_intercept)
8587                 return;
8588
8589         if (!lapic_in_kernel(vcpu))
8590                 return;
8591
8592         if (vcpu->arch.apicv_active)
8593                 return;
8594
8595         if (!vcpu->arch.apic->vapic_addr)
8596                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8597         else
8598                 max_irr = -1;
8599
8600         if (max_irr != -1)
8601                 max_irr >>= 4;
8602
8603         tpr = kvm_lapic_get_cr8(vcpu);
8604
8605         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8606 }
8607
8608
8609 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8610 {
8611         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8612                 return -EIO;
8613
8614         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8615                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8616                 return 1;
8617         }
8618
8619         return kvm_x86_ops.nested_ops->check_events(vcpu);
8620 }
8621
8622 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8623 {
8624         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8625                 vcpu->arch.exception.error_code = false;
8626         static_call(kvm_x86_queue_exception)(vcpu);
8627 }
8628
8629 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8630 {
8631         int r;
8632         bool can_inject = true;
8633
8634         /* try to reinject previous events if any */
8635
8636         if (vcpu->arch.exception.injected) {
8637                 kvm_inject_exception(vcpu);
8638                 can_inject = false;
8639         }
8640         /*
8641          * Do not inject an NMI or interrupt if there is a pending
8642          * exception.  Exceptions and interrupts are recognized at
8643          * instruction boundaries, i.e. the start of an instruction.
8644          * Trap-like exceptions, e.g. #DB, have higher priority than
8645          * NMIs and interrupts, i.e. traps are recognized before an
8646          * NMI/interrupt that's pending on the same instruction.
8647          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8648          * priority, but are only generated (pended) during instruction
8649          * execution, i.e. a pending fault-like exception means the
8650          * fault occurred on the *previous* instruction and must be
8651          * serviced prior to recognizing any new events in order to
8652          * fully complete the previous instruction.
8653          */
8654         else if (!vcpu->arch.exception.pending) {
8655                 if (vcpu->arch.nmi_injected) {
8656                         static_call(kvm_x86_set_nmi)(vcpu);
8657                         can_inject = false;
8658                 } else if (vcpu->arch.interrupt.injected) {
8659                         static_call(kvm_x86_set_irq)(vcpu);
8660                         can_inject = false;
8661                 }
8662         }
8663
8664         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8665                      vcpu->arch.exception.pending);
8666
8667         /*
8668          * Call check_nested_events() even if we reinjected a previous event
8669          * in order for caller to determine if it should require immediate-exit
8670          * from L2 to L1 due to pending L1 events which require exit
8671          * from L2 to L1.
8672          */
8673         if (is_guest_mode(vcpu)) {
8674                 r = kvm_check_nested_events(vcpu);
8675                 if (r < 0)
8676                         goto busy;
8677         }
8678
8679         /* try to inject new event if pending */
8680         if (vcpu->arch.exception.pending) {
8681                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8682                                         vcpu->arch.exception.has_error_code,
8683                                         vcpu->arch.exception.error_code);
8684
8685                 vcpu->arch.exception.pending = false;
8686                 vcpu->arch.exception.injected = true;
8687
8688                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8689                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8690                                              X86_EFLAGS_RF);
8691
8692                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8693                         kvm_deliver_exception_payload(vcpu);
8694                         if (vcpu->arch.dr7 & DR7_GD) {
8695                                 vcpu->arch.dr7 &= ~DR7_GD;
8696                                 kvm_update_dr7(vcpu);
8697                         }
8698                 }
8699
8700                 kvm_inject_exception(vcpu);
8701                 can_inject = false;
8702         }
8703
8704         /*
8705          * Finally, inject interrupt events.  If an event cannot be injected
8706          * due to architectural conditions (e.g. IF=0) a window-open exit
8707          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8708          * and can architecturally be injected, but we cannot do it right now:
8709          * an interrupt could have arrived just now and we have to inject it
8710          * as a vmexit, or there could already an event in the queue, which is
8711          * indicated by can_inject.  In that case we request an immediate exit
8712          * in order to make progress and get back here for another iteration.
8713          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8714          */
8715         if (vcpu->arch.smi_pending) {
8716                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8717                 if (r < 0)
8718                         goto busy;
8719                 if (r) {
8720                         vcpu->arch.smi_pending = false;
8721                         ++vcpu->arch.smi_count;
8722                         enter_smm(vcpu);
8723                         can_inject = false;
8724                 } else
8725                         static_call(kvm_x86_enable_smi_window)(vcpu);
8726         }
8727
8728         if (vcpu->arch.nmi_pending) {
8729                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8730                 if (r < 0)
8731                         goto busy;
8732                 if (r) {
8733                         --vcpu->arch.nmi_pending;
8734                         vcpu->arch.nmi_injected = true;
8735                         static_call(kvm_x86_set_nmi)(vcpu);
8736                         can_inject = false;
8737                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8738                 }
8739                 if (vcpu->arch.nmi_pending)
8740                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8741         }
8742
8743         if (kvm_cpu_has_injectable_intr(vcpu)) {
8744                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8745                 if (r < 0)
8746                         goto busy;
8747                 if (r) {
8748                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8749                         static_call(kvm_x86_set_irq)(vcpu);
8750                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8751                 }
8752                 if (kvm_cpu_has_injectable_intr(vcpu))
8753                         static_call(kvm_x86_enable_irq_window)(vcpu);
8754         }
8755
8756         if (is_guest_mode(vcpu) &&
8757             kvm_x86_ops.nested_ops->hv_timer_pending &&
8758             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8759                 *req_immediate_exit = true;
8760
8761         WARN_ON(vcpu->arch.exception.pending);
8762         return;
8763
8764 busy:
8765         *req_immediate_exit = true;
8766         return;
8767 }
8768
8769 static void process_nmi(struct kvm_vcpu *vcpu)
8770 {
8771         unsigned limit = 2;
8772
8773         /*
8774          * x86 is limited to one NMI running, and one NMI pending after it.
8775          * If an NMI is already in progress, limit further NMIs to just one.
8776          * Otherwise, allow two (and we'll inject the first one immediately).
8777          */
8778         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8779                 limit = 1;
8780
8781         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8782         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8783         kvm_make_request(KVM_REQ_EVENT, vcpu);
8784 }
8785
8786 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8787 {
8788         u32 flags = 0;
8789         flags |= seg->g       << 23;
8790         flags |= seg->db      << 22;
8791         flags |= seg->l       << 21;
8792         flags |= seg->avl     << 20;
8793         flags |= seg->present << 15;
8794         flags |= seg->dpl     << 13;
8795         flags |= seg->s       << 12;
8796         flags |= seg->type    << 8;
8797         return flags;
8798 }
8799
8800 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8801 {
8802         struct kvm_segment seg;
8803         int offset;
8804
8805         kvm_get_segment(vcpu, &seg, n);
8806         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8807
8808         if (n < 3)
8809                 offset = 0x7f84 + n * 12;
8810         else
8811                 offset = 0x7f2c + (n - 3) * 12;
8812
8813         put_smstate(u32, buf, offset + 8, seg.base);
8814         put_smstate(u32, buf, offset + 4, seg.limit);
8815         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8816 }
8817
8818 #ifdef CONFIG_X86_64
8819 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8820 {
8821         struct kvm_segment seg;
8822         int offset;
8823         u16 flags;
8824
8825         kvm_get_segment(vcpu, &seg, n);
8826         offset = 0x7e00 + n * 16;
8827
8828         flags = enter_smm_get_segment_flags(&seg) >> 8;
8829         put_smstate(u16, buf, offset, seg.selector);
8830         put_smstate(u16, buf, offset + 2, flags);
8831         put_smstate(u32, buf, offset + 4, seg.limit);
8832         put_smstate(u64, buf, offset + 8, seg.base);
8833 }
8834 #endif
8835
8836 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8837 {
8838         struct desc_ptr dt;
8839         struct kvm_segment seg;
8840         unsigned long val;
8841         int i;
8842
8843         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8844         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8845         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8846         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8847
8848         for (i = 0; i < 8; i++)
8849                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8850
8851         kvm_get_dr(vcpu, 6, &val);
8852         put_smstate(u32, buf, 0x7fcc, (u32)val);
8853         kvm_get_dr(vcpu, 7, &val);
8854         put_smstate(u32, buf, 0x7fc8, (u32)val);
8855
8856         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8857         put_smstate(u32, buf, 0x7fc4, seg.selector);
8858         put_smstate(u32, buf, 0x7f64, seg.base);
8859         put_smstate(u32, buf, 0x7f60, seg.limit);
8860         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8861
8862         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8863         put_smstate(u32, buf, 0x7fc0, seg.selector);
8864         put_smstate(u32, buf, 0x7f80, seg.base);
8865         put_smstate(u32, buf, 0x7f7c, seg.limit);
8866         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8867
8868         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8869         put_smstate(u32, buf, 0x7f74, dt.address);
8870         put_smstate(u32, buf, 0x7f70, dt.size);
8871
8872         static_call(kvm_x86_get_idt)(vcpu, &dt);
8873         put_smstate(u32, buf, 0x7f58, dt.address);
8874         put_smstate(u32, buf, 0x7f54, dt.size);
8875
8876         for (i = 0; i < 6; i++)
8877                 enter_smm_save_seg_32(vcpu, buf, i);
8878
8879         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8880
8881         /* revision id */
8882         put_smstate(u32, buf, 0x7efc, 0x00020000);
8883         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8884 }
8885
8886 #ifdef CONFIG_X86_64
8887 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8888 {
8889         struct desc_ptr dt;
8890         struct kvm_segment seg;
8891         unsigned long val;
8892         int i;
8893
8894         for (i = 0; i < 16; i++)
8895                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8896
8897         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8898         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8899
8900         kvm_get_dr(vcpu, 6, &val);
8901         put_smstate(u64, buf, 0x7f68, val);
8902         kvm_get_dr(vcpu, 7, &val);
8903         put_smstate(u64, buf, 0x7f60, val);
8904
8905         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8906         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8907         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8908
8909         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8910
8911         /* revision id */
8912         put_smstate(u32, buf, 0x7efc, 0x00020064);
8913
8914         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8915
8916         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8917         put_smstate(u16, buf, 0x7e90, seg.selector);
8918         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8919         put_smstate(u32, buf, 0x7e94, seg.limit);
8920         put_smstate(u64, buf, 0x7e98, seg.base);
8921
8922         static_call(kvm_x86_get_idt)(vcpu, &dt);
8923         put_smstate(u32, buf, 0x7e84, dt.size);
8924         put_smstate(u64, buf, 0x7e88, dt.address);
8925
8926         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8927         put_smstate(u16, buf, 0x7e70, seg.selector);
8928         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8929         put_smstate(u32, buf, 0x7e74, seg.limit);
8930         put_smstate(u64, buf, 0x7e78, seg.base);
8931
8932         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8933         put_smstate(u32, buf, 0x7e64, dt.size);
8934         put_smstate(u64, buf, 0x7e68, dt.address);
8935
8936         for (i = 0; i < 6; i++)
8937                 enter_smm_save_seg_64(vcpu, buf, i);
8938 }
8939 #endif
8940
8941 static void enter_smm(struct kvm_vcpu *vcpu)
8942 {
8943         struct kvm_segment cs, ds;
8944         struct desc_ptr dt;
8945         char buf[512];
8946         u32 cr0;
8947
8948         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8949         memset(buf, 0, 512);
8950 #ifdef CONFIG_X86_64
8951         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8952                 enter_smm_save_state_64(vcpu, buf);
8953         else
8954 #endif
8955                 enter_smm_save_state_32(vcpu, buf);
8956
8957         /*
8958          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8959          * vCPU state (e.g. leave guest mode) after we've saved the state into
8960          * the SMM state-save area.
8961          */
8962         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8963
8964         vcpu->arch.hflags |= HF_SMM_MASK;
8965         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8966
8967         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8968                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8969         else
8970                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8971
8972         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8973         kvm_rip_write(vcpu, 0x8000);
8974
8975         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8976         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8977         vcpu->arch.cr0 = cr0;
8978
8979         static_call(kvm_x86_set_cr4)(vcpu, 0);
8980
8981         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8982         dt.address = dt.size = 0;
8983         static_call(kvm_x86_set_idt)(vcpu, &dt);
8984
8985         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8986
8987         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8988         cs.base = vcpu->arch.smbase;
8989
8990         ds.selector = 0;
8991         ds.base = 0;
8992
8993         cs.limit    = ds.limit = 0xffffffff;
8994         cs.type     = ds.type = 0x3;
8995         cs.dpl      = ds.dpl = 0;
8996         cs.db       = ds.db = 0;
8997         cs.s        = ds.s = 1;
8998         cs.l        = ds.l = 0;
8999         cs.g        = ds.g = 1;
9000         cs.avl      = ds.avl = 0;
9001         cs.present  = ds.present = 1;
9002         cs.unusable = ds.unusable = 0;
9003         cs.padding  = ds.padding = 0;
9004
9005         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9006         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9007         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9008         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9009         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9010         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9011
9012 #ifdef CONFIG_X86_64
9013         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9014                 static_call(kvm_x86_set_efer)(vcpu, 0);
9015 #endif
9016
9017         kvm_update_cpuid_runtime(vcpu);
9018         kvm_mmu_reset_context(vcpu);
9019 }
9020
9021 static void process_smi(struct kvm_vcpu *vcpu)
9022 {
9023         vcpu->arch.smi_pending = true;
9024         kvm_make_request(KVM_REQ_EVENT, vcpu);
9025 }
9026
9027 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9028                                        unsigned long *vcpu_bitmap)
9029 {
9030         cpumask_var_t cpus;
9031
9032         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9033
9034         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9035                                     NULL, vcpu_bitmap, cpus);
9036
9037         free_cpumask_var(cpus);
9038 }
9039
9040 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9041 {
9042         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9043 }
9044
9045 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9046 {
9047         if (!lapic_in_kernel(vcpu))
9048                 return;
9049
9050         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9051         kvm_apic_update_apicv(vcpu);
9052         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9053 }
9054 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9055
9056 /*
9057  * NOTE: Do not hold any lock prior to calling this.
9058  *
9059  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9060  * locked, because it calls __x86_set_memory_region() which does
9061  * synchronize_srcu(&kvm->srcu).
9062  */
9063 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9064 {
9065         struct kvm_vcpu *except;
9066         unsigned long old, new, expected;
9067
9068         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9069             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9070                 return;
9071
9072         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9073         do {
9074                 expected = new = old;
9075                 if (activate)
9076                         __clear_bit(bit, &new);
9077                 else
9078                         __set_bit(bit, &new);
9079                 if (new == old)
9080                         break;
9081                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9082         } while (old != expected);
9083
9084         if (!!old == !!new)
9085                 return;
9086
9087         trace_kvm_apicv_update_request(activate, bit);
9088         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9089                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9090
9091         /*
9092          * Sending request to update APICV for all other vcpus,
9093          * while update the calling vcpu immediately instead of
9094          * waiting for another #VMEXIT to handle the request.
9095          */
9096         except = kvm_get_running_vcpu();
9097         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9098                                          except);
9099         if (except)
9100                 kvm_vcpu_update_apicv(except);
9101 }
9102 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9103
9104 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9105 {
9106         if (!kvm_apic_present(vcpu))
9107                 return;
9108
9109         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9110
9111         if (irqchip_split(vcpu->kvm))
9112                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9113         else {
9114                 if (vcpu->arch.apicv_active)
9115                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9116                 if (ioapic_in_kernel(vcpu->kvm))
9117                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9118         }
9119
9120         if (is_guest_mode(vcpu))
9121                 vcpu->arch.load_eoi_exitmap_pending = true;
9122         else
9123                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9124 }
9125
9126 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9127 {
9128         u64 eoi_exit_bitmap[4];
9129
9130         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9131                 return;
9132
9133         if (to_hv_vcpu(vcpu))
9134                 bitmap_or((ulong *)eoi_exit_bitmap,
9135                           vcpu->arch.ioapic_handled_vectors,
9136                           to_hv_synic(vcpu)->vec_bitmap, 256);
9137
9138         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9139 }
9140
9141 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9142                                             unsigned long start, unsigned long end)
9143 {
9144         unsigned long apic_address;
9145
9146         /*
9147          * The physical address of apic access page is stored in the VMCS.
9148          * Update it when it becomes invalid.
9149          */
9150         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9151         if (start <= apic_address && apic_address < end)
9152                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9153 }
9154
9155 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9156 {
9157         if (!lapic_in_kernel(vcpu))
9158                 return;
9159
9160         if (!kvm_x86_ops.set_apic_access_page_addr)
9161                 return;
9162
9163         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9164 }
9165
9166 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9167 {
9168         smp_send_reschedule(vcpu->cpu);
9169 }
9170 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9171
9172 /*
9173  * Returns 1 to let vcpu_run() continue the guest execution loop without
9174  * exiting to the userspace.  Otherwise, the value will be returned to the
9175  * userspace.
9176  */
9177 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9178 {
9179         int r;
9180         bool req_int_win =
9181                 dm_request_for_irq_injection(vcpu) &&
9182                 kvm_cpu_accept_dm_intr(vcpu);
9183         fastpath_t exit_fastpath;
9184
9185         bool req_immediate_exit = false;
9186
9187         /* Forbid vmenter if vcpu dirty ring is soft-full */
9188         if (unlikely(vcpu->kvm->dirty_ring_size &&
9189                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9190                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9191                 trace_kvm_dirty_ring_exit(vcpu);
9192                 r = 0;
9193                 goto out;
9194         }
9195
9196         if (kvm_request_pending(vcpu)) {
9197                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9198                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9199                                 r = 0;
9200                                 goto out;
9201                         }
9202                 }
9203                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9204                         kvm_mmu_unload(vcpu);
9205                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9206                         __kvm_migrate_timers(vcpu);
9207                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9208                         kvm_gen_update_masterclock(vcpu->kvm);
9209                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9210                         kvm_gen_kvmclock_update(vcpu);
9211                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9212                         r = kvm_guest_time_update(vcpu);
9213                         if (unlikely(r))
9214                                 goto out;
9215                 }
9216                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9217                         kvm_mmu_sync_roots(vcpu);
9218                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9219                         kvm_mmu_load_pgd(vcpu);
9220                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9221                         kvm_vcpu_flush_tlb_all(vcpu);
9222
9223                         /* Flushing all ASIDs flushes the current ASID... */
9224                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9225                 }
9226                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9227                         kvm_vcpu_flush_tlb_current(vcpu);
9228                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9229                         kvm_vcpu_flush_tlb_guest(vcpu);
9230
9231                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9232                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9233                         r = 0;
9234                         goto out;
9235                 }
9236                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9237                         if (is_guest_mode(vcpu)) {
9238                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9239                         } else {
9240                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9241                                 vcpu->mmio_needed = 0;
9242                                 r = 0;
9243                                 goto out;
9244                         }
9245                 }
9246                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9247                         /* Page is swapped out. Do synthetic halt */
9248                         vcpu->arch.apf.halted = true;
9249                         r = 1;
9250                         goto out;
9251                 }
9252                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9253                         record_steal_time(vcpu);
9254                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9255                         process_smi(vcpu);
9256                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9257                         process_nmi(vcpu);
9258                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9259                         kvm_pmu_handle_event(vcpu);
9260                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9261                         kvm_pmu_deliver_pmi(vcpu);
9262                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9263                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9264                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9265                                      vcpu->arch.ioapic_handled_vectors)) {
9266                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9267                                 vcpu->run->eoi.vector =
9268                                                 vcpu->arch.pending_ioapic_eoi;
9269                                 r = 0;
9270                                 goto out;
9271                         }
9272                 }
9273                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9274                         vcpu_scan_ioapic(vcpu);
9275                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9276                         vcpu_load_eoi_exitmap(vcpu);
9277                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9278                         kvm_vcpu_reload_apic_access_page(vcpu);
9279                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9280                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9281                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9282                         r = 0;
9283                         goto out;
9284                 }
9285                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9286                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9287                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9288                         r = 0;
9289                         goto out;
9290                 }
9291                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9292                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9293
9294                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9295                         vcpu->run->hyperv = hv_vcpu->exit;
9296                         r = 0;
9297                         goto out;
9298                 }
9299
9300                 /*
9301                  * KVM_REQ_HV_STIMER has to be processed after
9302                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9303                  * depend on the guest clock being up-to-date
9304                  */
9305                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9306                         kvm_hv_process_stimers(vcpu);
9307                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9308                         kvm_vcpu_update_apicv(vcpu);
9309                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9310                         kvm_check_async_pf_completion(vcpu);
9311                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9312                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9313
9314                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9315                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9316         }
9317
9318         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9319             kvm_xen_has_interrupt(vcpu)) {
9320                 ++vcpu->stat.req_event;
9321                 kvm_apic_accept_events(vcpu);
9322                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9323                         r = 1;
9324                         goto out;
9325                 }
9326
9327                 inject_pending_event(vcpu, &req_immediate_exit);
9328                 if (req_int_win)
9329                         static_call(kvm_x86_enable_irq_window)(vcpu);
9330
9331                 if (kvm_lapic_enabled(vcpu)) {
9332                         update_cr8_intercept(vcpu);
9333                         kvm_lapic_sync_to_vapic(vcpu);
9334                 }
9335         }
9336
9337         r = kvm_mmu_reload(vcpu);
9338         if (unlikely(r)) {
9339                 goto cancel_injection;
9340         }
9341
9342         preempt_disable();
9343
9344         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9345
9346         /*
9347          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9348          * IPI are then delayed after guest entry, which ensures that they
9349          * result in virtual interrupt delivery.
9350          */
9351         local_irq_disable();
9352         vcpu->mode = IN_GUEST_MODE;
9353
9354         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9355
9356         /*
9357          * 1) We should set ->mode before checking ->requests.  Please see
9358          * the comment in kvm_vcpu_exiting_guest_mode().
9359          *
9360          * 2) For APICv, we should set ->mode before checking PID.ON. This
9361          * pairs with the memory barrier implicit in pi_test_and_set_on
9362          * (see vmx_deliver_posted_interrupt).
9363          *
9364          * 3) This also orders the write to mode from any reads to the page
9365          * tables done while the VCPU is running.  Please see the comment
9366          * in kvm_flush_remote_tlbs.
9367          */
9368         smp_mb__after_srcu_read_unlock();
9369
9370         /*
9371          * This handles the case where a posted interrupt was
9372          * notified with kvm_vcpu_kick.
9373          */
9374         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9375                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9376
9377         if (kvm_vcpu_exit_request(vcpu)) {
9378                 vcpu->mode = OUTSIDE_GUEST_MODE;
9379                 smp_wmb();
9380                 local_irq_enable();
9381                 preempt_enable();
9382                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9383                 r = 1;
9384                 goto cancel_injection;
9385         }
9386
9387         if (req_immediate_exit) {
9388                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9389                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9390         }
9391
9392         fpregs_assert_state_consistent();
9393         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9394                 switch_fpu_return();
9395
9396         if (unlikely(vcpu->arch.switch_db_regs)) {
9397                 set_debugreg(0, 7);
9398                 set_debugreg(vcpu->arch.eff_db[0], 0);
9399                 set_debugreg(vcpu->arch.eff_db[1], 1);
9400                 set_debugreg(vcpu->arch.eff_db[2], 2);
9401                 set_debugreg(vcpu->arch.eff_db[3], 3);
9402                 set_debugreg(vcpu->arch.dr6, 6);
9403                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9404         }
9405
9406         for (;;) {
9407                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9408                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9409                         break;
9410
9411                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9412                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9413                         break;
9414                 }
9415
9416                 if (vcpu->arch.apicv_active)
9417                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9418         }
9419
9420         /*
9421          * Do this here before restoring debug registers on the host.  And
9422          * since we do this before handling the vmexit, a DR access vmexit
9423          * can (a) read the correct value of the debug registers, (b) set
9424          * KVM_DEBUGREG_WONT_EXIT again.
9425          */
9426         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9427                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9428                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9429                 kvm_update_dr0123(vcpu);
9430                 kvm_update_dr7(vcpu);
9431                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9432         }
9433
9434         /*
9435          * If the guest has used debug registers, at least dr7
9436          * will be disabled while returning to the host.
9437          * If we don't have active breakpoints in the host, we don't
9438          * care about the messed up debug address registers. But if
9439          * we have some of them active, restore the old state.
9440          */
9441         if (hw_breakpoint_active())
9442                 hw_breakpoint_restore();
9443
9444         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9445         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9446
9447         vcpu->mode = OUTSIDE_GUEST_MODE;
9448         smp_wmb();
9449
9450         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9451
9452         /*
9453          * Consume any pending interrupts, including the possible source of
9454          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9455          * An instruction is required after local_irq_enable() to fully unblock
9456          * interrupts on processors that implement an interrupt shadow, the
9457          * stat.exits increment will do nicely.
9458          */
9459         kvm_before_interrupt(vcpu);
9460         local_irq_enable();
9461         ++vcpu->stat.exits;
9462         local_irq_disable();
9463         kvm_after_interrupt(vcpu);
9464
9465         /*
9466          * Wait until after servicing IRQs to account guest time so that any
9467          * ticks that occurred while running the guest are properly accounted
9468          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9469          * of accounting via context tracking, but the loss of accuracy is
9470          * acceptable for all known use cases.
9471          */
9472         vtime_account_guest_exit();
9473
9474         if (lapic_in_kernel(vcpu)) {
9475                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9476                 if (delta != S64_MIN) {
9477                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9478                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9479                 }
9480         }
9481
9482         local_irq_enable();
9483         preempt_enable();
9484
9485         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9486
9487         /*
9488          * Profile KVM exit RIPs:
9489          */
9490         if (unlikely(prof_on == KVM_PROFILING)) {
9491                 unsigned long rip = kvm_rip_read(vcpu);
9492                 profile_hit(KVM_PROFILING, (void *)rip);
9493         }
9494
9495         if (unlikely(vcpu->arch.tsc_always_catchup))
9496                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9497
9498         if (vcpu->arch.apic_attention)
9499                 kvm_lapic_sync_from_vapic(vcpu);
9500
9501         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9502         return r;
9503
9504 cancel_injection:
9505         if (req_immediate_exit)
9506                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9507         static_call(kvm_x86_cancel_injection)(vcpu);
9508         if (unlikely(vcpu->arch.apic_attention))
9509                 kvm_lapic_sync_from_vapic(vcpu);
9510 out:
9511         return r;
9512 }
9513
9514 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9515 {
9516         if (!kvm_arch_vcpu_runnable(vcpu) &&
9517             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9518                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9519                 kvm_vcpu_block(vcpu);
9520                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9521
9522                 if (kvm_x86_ops.post_block)
9523                         static_call(kvm_x86_post_block)(vcpu);
9524
9525                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9526                         return 1;
9527         }
9528
9529         kvm_apic_accept_events(vcpu);
9530         switch(vcpu->arch.mp_state) {
9531         case KVM_MP_STATE_HALTED:
9532         case KVM_MP_STATE_AP_RESET_HOLD:
9533                 vcpu->arch.pv.pv_unhalted = false;
9534                 vcpu->arch.mp_state =
9535                         KVM_MP_STATE_RUNNABLE;
9536                 fallthrough;
9537         case KVM_MP_STATE_RUNNABLE:
9538                 vcpu->arch.apf.halted = false;
9539                 break;
9540         case KVM_MP_STATE_INIT_RECEIVED:
9541                 break;
9542         default:
9543                 return -EINTR;
9544         }
9545         return 1;
9546 }
9547
9548 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9549 {
9550         if (is_guest_mode(vcpu))
9551                 kvm_check_nested_events(vcpu);
9552
9553         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9554                 !vcpu->arch.apf.halted);
9555 }
9556
9557 static int vcpu_run(struct kvm_vcpu *vcpu)
9558 {
9559         int r;
9560         struct kvm *kvm = vcpu->kvm;
9561
9562         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9563         vcpu->arch.l1tf_flush_l1d = true;
9564
9565         for (;;) {
9566                 if (kvm_vcpu_running(vcpu)) {
9567                         r = vcpu_enter_guest(vcpu);
9568                 } else {
9569                         r = vcpu_block(kvm, vcpu);
9570                 }
9571
9572                 if (r <= 0)
9573                         break;
9574
9575                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9576                 if (kvm_cpu_has_pending_timer(vcpu))
9577                         kvm_inject_pending_timer_irqs(vcpu);
9578
9579                 if (dm_request_for_irq_injection(vcpu) &&
9580                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9581                         r = 0;
9582                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9583                         ++vcpu->stat.request_irq_exits;
9584                         break;
9585                 }
9586
9587                 if (__xfer_to_guest_mode_work_pending()) {
9588                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9589                         r = xfer_to_guest_mode_handle_work(vcpu);
9590                         if (r)
9591                                 return r;
9592                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9593                 }
9594         }
9595
9596         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9597
9598         return r;
9599 }
9600
9601 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9602 {
9603         int r;
9604
9605         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9606         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9607         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9608         return r;
9609 }
9610
9611 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9612 {
9613         BUG_ON(!vcpu->arch.pio.count);
9614
9615         return complete_emulated_io(vcpu);
9616 }
9617
9618 /*
9619  * Implements the following, as a state machine:
9620  *
9621  * read:
9622  *   for each fragment
9623  *     for each mmio piece in the fragment
9624  *       write gpa, len
9625  *       exit
9626  *       copy data
9627  *   execute insn
9628  *
9629  * write:
9630  *   for each fragment
9631  *     for each mmio piece in the fragment
9632  *       write gpa, len
9633  *       copy data
9634  *       exit
9635  */
9636 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9637 {
9638         struct kvm_run *run = vcpu->run;
9639         struct kvm_mmio_fragment *frag;
9640         unsigned len;
9641
9642         BUG_ON(!vcpu->mmio_needed);
9643
9644         /* Complete previous fragment */
9645         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9646         len = min(8u, frag->len);
9647         if (!vcpu->mmio_is_write)
9648                 memcpy(frag->data, run->mmio.data, len);
9649
9650         if (frag->len <= 8) {
9651                 /* Switch to the next fragment. */
9652                 frag++;
9653                 vcpu->mmio_cur_fragment++;
9654         } else {
9655                 /* Go forward to the next mmio piece. */
9656                 frag->data += len;
9657                 frag->gpa += len;
9658                 frag->len -= len;
9659         }
9660
9661         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9662                 vcpu->mmio_needed = 0;
9663
9664                 /* FIXME: return into emulator if single-stepping.  */
9665                 if (vcpu->mmio_is_write)
9666                         return 1;
9667                 vcpu->mmio_read_completed = 1;
9668                 return complete_emulated_io(vcpu);
9669         }
9670
9671         run->exit_reason = KVM_EXIT_MMIO;
9672         run->mmio.phys_addr = frag->gpa;
9673         if (vcpu->mmio_is_write)
9674                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9675         run->mmio.len = min(8u, frag->len);
9676         run->mmio.is_write = vcpu->mmio_is_write;
9677         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9678         return 0;
9679 }
9680
9681 static void kvm_save_current_fpu(struct fpu *fpu)
9682 {
9683         /*
9684          * If the target FPU state is not resident in the CPU registers, just
9685          * memcpy() from current, else save CPU state directly to the target.
9686          */
9687         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9688                 memcpy(&fpu->state, &current->thread.fpu.state,
9689                        fpu_kernel_xstate_size);
9690         else
9691                 copy_fpregs_to_fpstate(fpu);
9692 }
9693
9694 /* Swap (qemu) user FPU context for the guest FPU context. */
9695 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9696 {
9697         fpregs_lock();
9698
9699         kvm_save_current_fpu(vcpu->arch.user_fpu);
9700
9701         /*
9702          * Guests with protected state can't have it set by the hypervisor,
9703          * so skip trying to set it.
9704          */
9705         if (vcpu->arch.guest_fpu)
9706                 /* PKRU is separately restored in kvm_x86_ops.run. */
9707                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9708                                         ~XFEATURE_MASK_PKRU);
9709
9710         fpregs_mark_activate();
9711         fpregs_unlock();
9712
9713         trace_kvm_fpu(1);
9714 }
9715
9716 /* When vcpu_run ends, restore user space FPU context. */
9717 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9718 {
9719         fpregs_lock();
9720
9721         /*
9722          * Guests with protected state can't have it read by the hypervisor,
9723          * so skip trying to save it.
9724          */
9725         if (vcpu->arch.guest_fpu)
9726                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9727
9728         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9729
9730         fpregs_mark_activate();
9731         fpregs_unlock();
9732
9733         ++vcpu->stat.fpu_reload;
9734         trace_kvm_fpu(0);
9735 }
9736
9737 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9738 {
9739         struct kvm_run *kvm_run = vcpu->run;
9740         int r;
9741
9742         vcpu_load(vcpu);
9743         kvm_sigset_activate(vcpu);
9744         kvm_run->flags = 0;
9745         kvm_load_guest_fpu(vcpu);
9746
9747         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9748                 if (kvm_run->immediate_exit) {
9749                         r = -EINTR;
9750                         goto out;
9751                 }
9752                 kvm_vcpu_block(vcpu);
9753                 kvm_apic_accept_events(vcpu);
9754                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9755                 r = -EAGAIN;
9756                 if (signal_pending(current)) {
9757                         r = -EINTR;
9758                         kvm_run->exit_reason = KVM_EXIT_INTR;
9759                         ++vcpu->stat.signal_exits;
9760                 }
9761                 goto out;
9762         }
9763
9764         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9765                 r = -EINVAL;
9766                 goto out;
9767         }
9768
9769         if (kvm_run->kvm_dirty_regs) {
9770                 r = sync_regs(vcpu);
9771                 if (r != 0)
9772                         goto out;
9773         }
9774
9775         /* re-sync apic's tpr */
9776         if (!lapic_in_kernel(vcpu)) {
9777                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9778                         r = -EINVAL;
9779                         goto out;
9780                 }
9781         }
9782
9783         if (unlikely(vcpu->arch.complete_userspace_io)) {
9784                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9785                 vcpu->arch.complete_userspace_io = NULL;
9786                 r = cui(vcpu);
9787                 if (r <= 0)
9788                         goto out;
9789         } else
9790                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9791
9792         if (kvm_run->immediate_exit)
9793                 r = -EINTR;
9794         else
9795                 r = vcpu_run(vcpu);
9796
9797 out:
9798         kvm_put_guest_fpu(vcpu);
9799         if (kvm_run->kvm_valid_regs)
9800                 store_regs(vcpu);
9801         post_kvm_run_save(vcpu);
9802         kvm_sigset_deactivate(vcpu);
9803
9804         vcpu_put(vcpu);
9805         return r;
9806 }
9807
9808 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9809 {
9810         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9811                 /*
9812                  * We are here if userspace calls get_regs() in the middle of
9813                  * instruction emulation. Registers state needs to be copied
9814                  * back from emulation context to vcpu. Userspace shouldn't do
9815                  * that usually, but some bad designed PV devices (vmware
9816                  * backdoor interface) need this to work
9817                  */
9818                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9819                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9820         }
9821         regs->rax = kvm_rax_read(vcpu);
9822         regs->rbx = kvm_rbx_read(vcpu);
9823         regs->rcx = kvm_rcx_read(vcpu);
9824         regs->rdx = kvm_rdx_read(vcpu);
9825         regs->rsi = kvm_rsi_read(vcpu);
9826         regs->rdi = kvm_rdi_read(vcpu);
9827         regs->rsp = kvm_rsp_read(vcpu);
9828         regs->rbp = kvm_rbp_read(vcpu);
9829 #ifdef CONFIG_X86_64
9830         regs->r8 = kvm_r8_read(vcpu);
9831         regs->r9 = kvm_r9_read(vcpu);
9832         regs->r10 = kvm_r10_read(vcpu);
9833         regs->r11 = kvm_r11_read(vcpu);
9834         regs->r12 = kvm_r12_read(vcpu);
9835         regs->r13 = kvm_r13_read(vcpu);
9836         regs->r14 = kvm_r14_read(vcpu);
9837         regs->r15 = kvm_r15_read(vcpu);
9838 #endif
9839
9840         regs->rip = kvm_rip_read(vcpu);
9841         regs->rflags = kvm_get_rflags(vcpu);
9842 }
9843
9844 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9845 {
9846         vcpu_load(vcpu);
9847         __get_regs(vcpu, regs);
9848         vcpu_put(vcpu);
9849         return 0;
9850 }
9851
9852 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9853 {
9854         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9855         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9856
9857         kvm_rax_write(vcpu, regs->rax);
9858         kvm_rbx_write(vcpu, regs->rbx);
9859         kvm_rcx_write(vcpu, regs->rcx);
9860         kvm_rdx_write(vcpu, regs->rdx);
9861         kvm_rsi_write(vcpu, regs->rsi);
9862         kvm_rdi_write(vcpu, regs->rdi);
9863         kvm_rsp_write(vcpu, regs->rsp);
9864         kvm_rbp_write(vcpu, regs->rbp);
9865 #ifdef CONFIG_X86_64
9866         kvm_r8_write(vcpu, regs->r8);
9867         kvm_r9_write(vcpu, regs->r9);
9868         kvm_r10_write(vcpu, regs->r10);
9869         kvm_r11_write(vcpu, regs->r11);
9870         kvm_r12_write(vcpu, regs->r12);
9871         kvm_r13_write(vcpu, regs->r13);
9872         kvm_r14_write(vcpu, regs->r14);
9873         kvm_r15_write(vcpu, regs->r15);
9874 #endif
9875
9876         kvm_rip_write(vcpu, regs->rip);
9877         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9878
9879         vcpu->arch.exception.pending = false;
9880
9881         kvm_make_request(KVM_REQ_EVENT, vcpu);
9882 }
9883
9884 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9885 {
9886         vcpu_load(vcpu);
9887         __set_regs(vcpu, regs);
9888         vcpu_put(vcpu);
9889         return 0;
9890 }
9891
9892 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9893 {
9894         struct kvm_segment cs;
9895
9896         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9897         *db = cs.db;
9898         *l = cs.l;
9899 }
9900 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9901
9902 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9903 {
9904         struct desc_ptr dt;
9905
9906         if (vcpu->arch.guest_state_protected)
9907                 goto skip_protected_regs;
9908
9909         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9910         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9911         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9912         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9913         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9914         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9915
9916         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9917         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9918
9919         static_call(kvm_x86_get_idt)(vcpu, &dt);
9920         sregs->idt.limit = dt.size;
9921         sregs->idt.base = dt.address;
9922         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9923         sregs->gdt.limit = dt.size;
9924         sregs->gdt.base = dt.address;
9925
9926         sregs->cr2 = vcpu->arch.cr2;
9927         sregs->cr3 = kvm_read_cr3(vcpu);
9928
9929 skip_protected_regs:
9930         sregs->cr0 = kvm_read_cr0(vcpu);
9931         sregs->cr4 = kvm_read_cr4(vcpu);
9932         sregs->cr8 = kvm_get_cr8(vcpu);
9933         sregs->efer = vcpu->arch.efer;
9934         sregs->apic_base = kvm_get_apic_base(vcpu);
9935
9936         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9937
9938         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9939                 set_bit(vcpu->arch.interrupt.nr,
9940                         (unsigned long *)sregs->interrupt_bitmap);
9941 }
9942
9943 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9944                                   struct kvm_sregs *sregs)
9945 {
9946         vcpu_load(vcpu);
9947         __get_sregs(vcpu, sregs);
9948         vcpu_put(vcpu);
9949         return 0;
9950 }
9951
9952 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9953                                     struct kvm_mp_state *mp_state)
9954 {
9955         vcpu_load(vcpu);
9956         if (kvm_mpx_supported())
9957                 kvm_load_guest_fpu(vcpu);
9958
9959         kvm_apic_accept_events(vcpu);
9960         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9961              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9962             vcpu->arch.pv.pv_unhalted)
9963                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9964         else
9965                 mp_state->mp_state = vcpu->arch.mp_state;
9966
9967         if (kvm_mpx_supported())
9968                 kvm_put_guest_fpu(vcpu);
9969         vcpu_put(vcpu);
9970         return 0;
9971 }
9972
9973 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9974                                     struct kvm_mp_state *mp_state)
9975 {
9976         int ret = -EINVAL;
9977
9978         vcpu_load(vcpu);
9979
9980         if (!lapic_in_kernel(vcpu) &&
9981             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9982                 goto out;
9983
9984         /*
9985          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9986          * INIT state; latched init should be reported using
9987          * KVM_SET_VCPU_EVENTS, so reject it here.
9988          */
9989         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9990             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9991              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9992                 goto out;
9993
9994         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9995                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9996                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9997         } else
9998                 vcpu->arch.mp_state = mp_state->mp_state;
9999         kvm_make_request(KVM_REQ_EVENT, vcpu);
10000
10001         ret = 0;
10002 out:
10003         vcpu_put(vcpu);
10004         return ret;
10005 }
10006
10007 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10008                     int reason, bool has_error_code, u32 error_code)
10009 {
10010         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10011         int ret;
10012
10013         init_emulate_ctxt(vcpu);
10014
10015         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10016                                    has_error_code, error_code);
10017         if (ret) {
10018                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10019                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10020                 vcpu->run->internal.ndata = 0;
10021                 return 0;
10022         }
10023
10024         kvm_rip_write(vcpu, ctxt->eip);
10025         kvm_set_rflags(vcpu, ctxt->eflags);
10026         return 1;
10027 }
10028 EXPORT_SYMBOL_GPL(kvm_task_switch);
10029
10030 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10031 {
10032         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10033                 /*
10034                  * When EFER.LME and CR0.PG are set, the processor is in
10035                  * 64-bit mode (though maybe in a 32-bit code segment).
10036                  * CR4.PAE and EFER.LMA must be set.
10037                  */
10038                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10039                         return false;
10040                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10041                         return false;
10042         } else {
10043                 /*
10044                  * Not in 64-bit mode: EFER.LMA is clear and the code
10045                  * segment cannot be 64-bit.
10046                  */
10047                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10048                         return false;
10049         }
10050
10051         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10052 }
10053
10054 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10055 {
10056         struct msr_data apic_base_msr;
10057         int mmu_reset_needed = 0;
10058         int pending_vec, max_bits, idx;
10059         struct desc_ptr dt;
10060         int ret = -EINVAL;
10061
10062         if (!kvm_is_valid_sregs(vcpu, sregs))
10063                 goto out;
10064
10065         apic_base_msr.data = sregs->apic_base;
10066         apic_base_msr.host_initiated = true;
10067         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10068                 goto out;
10069
10070         if (vcpu->arch.guest_state_protected)
10071                 goto skip_protected_regs;
10072
10073         dt.size = sregs->idt.limit;
10074         dt.address = sregs->idt.base;
10075         static_call(kvm_x86_set_idt)(vcpu, &dt);
10076         dt.size = sregs->gdt.limit;
10077         dt.address = sregs->gdt.base;
10078         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10079
10080         vcpu->arch.cr2 = sregs->cr2;
10081         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10082         vcpu->arch.cr3 = sregs->cr3;
10083         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10084
10085         kvm_set_cr8(vcpu, sregs->cr8);
10086
10087         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10088         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10089
10090         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10091         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10092         vcpu->arch.cr0 = sregs->cr0;
10093
10094         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10095         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10096
10097         idx = srcu_read_lock(&vcpu->kvm->srcu);
10098         if (is_pae_paging(vcpu)) {
10099                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10100                 mmu_reset_needed = 1;
10101         }
10102         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10103
10104         if (mmu_reset_needed)
10105                 kvm_mmu_reset_context(vcpu);
10106
10107         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10108         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10109         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10110         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10111         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10112         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10113
10114         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10115         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10116
10117         update_cr8_intercept(vcpu);
10118
10119         /* Older userspace won't unhalt the vcpu on reset. */
10120         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10121             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10122             !is_protmode(vcpu))
10123                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10124
10125 skip_protected_regs:
10126         max_bits = KVM_NR_INTERRUPTS;
10127         pending_vec = find_first_bit(
10128                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10129         if (pending_vec < max_bits) {
10130                 kvm_queue_interrupt(vcpu, pending_vec, false);
10131                 pr_debug("Set back pending irq %d\n", pending_vec);
10132         }
10133
10134         kvm_make_request(KVM_REQ_EVENT, vcpu);
10135
10136         ret = 0;
10137 out:
10138         return ret;
10139 }
10140
10141 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10142                                   struct kvm_sregs *sregs)
10143 {
10144         int ret;
10145
10146         vcpu_load(vcpu);
10147         ret = __set_sregs(vcpu, sregs);
10148         vcpu_put(vcpu);
10149         return ret;
10150 }
10151
10152 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10153                                         struct kvm_guest_debug *dbg)
10154 {
10155         unsigned long rflags;
10156         int i, r;
10157
10158         if (vcpu->arch.guest_state_protected)
10159                 return -EINVAL;
10160
10161         vcpu_load(vcpu);
10162
10163         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10164                 r = -EBUSY;
10165                 if (vcpu->arch.exception.pending)
10166                         goto out;
10167                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10168                         kvm_queue_exception(vcpu, DB_VECTOR);
10169                 else
10170                         kvm_queue_exception(vcpu, BP_VECTOR);
10171         }
10172
10173         /*
10174          * Read rflags as long as potentially injected trace flags are still
10175          * filtered out.
10176          */
10177         rflags = kvm_get_rflags(vcpu);
10178
10179         vcpu->guest_debug = dbg->control;
10180         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10181                 vcpu->guest_debug = 0;
10182
10183         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10184                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10185                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10186                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10187         } else {
10188                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10189                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10190         }
10191         kvm_update_dr7(vcpu);
10192
10193         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10194                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10195
10196         /*
10197          * Trigger an rflags update that will inject or remove the trace
10198          * flags.
10199          */
10200         kvm_set_rflags(vcpu, rflags);
10201
10202         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10203
10204         r = 0;
10205
10206 out:
10207         vcpu_put(vcpu);
10208         return r;
10209 }
10210
10211 /*
10212  * Translate a guest virtual address to a guest physical address.
10213  */
10214 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10215                                     struct kvm_translation *tr)
10216 {
10217         unsigned long vaddr = tr->linear_address;
10218         gpa_t gpa;
10219         int idx;
10220
10221         vcpu_load(vcpu);
10222
10223         idx = srcu_read_lock(&vcpu->kvm->srcu);
10224         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10225         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10226         tr->physical_address = gpa;
10227         tr->valid = gpa != UNMAPPED_GVA;
10228         tr->writeable = 1;
10229         tr->usermode = 0;
10230
10231         vcpu_put(vcpu);
10232         return 0;
10233 }
10234
10235 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10236 {
10237         struct fxregs_state *fxsave;
10238
10239         if (!vcpu->arch.guest_fpu)
10240                 return 0;
10241
10242         vcpu_load(vcpu);
10243
10244         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10245         memcpy(fpu->fpr, fxsave->st_space, 128);
10246         fpu->fcw = fxsave->cwd;
10247         fpu->fsw = fxsave->swd;
10248         fpu->ftwx = fxsave->twd;
10249         fpu->last_opcode = fxsave->fop;
10250         fpu->last_ip = fxsave->rip;
10251         fpu->last_dp = fxsave->rdp;
10252         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10253
10254         vcpu_put(vcpu);
10255         return 0;
10256 }
10257
10258 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10259 {
10260         struct fxregs_state *fxsave;
10261
10262         if (!vcpu->arch.guest_fpu)
10263                 return 0;
10264
10265         vcpu_load(vcpu);
10266
10267         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10268
10269         memcpy(fxsave->st_space, fpu->fpr, 128);
10270         fxsave->cwd = fpu->fcw;
10271         fxsave->swd = fpu->fsw;
10272         fxsave->twd = fpu->ftwx;
10273         fxsave->fop = fpu->last_opcode;
10274         fxsave->rip = fpu->last_ip;
10275         fxsave->rdp = fpu->last_dp;
10276         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10277
10278         vcpu_put(vcpu);
10279         return 0;
10280 }
10281
10282 static void store_regs(struct kvm_vcpu *vcpu)
10283 {
10284         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10285
10286         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10287                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10288
10289         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10290                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10291
10292         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10293                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10294                                 vcpu, &vcpu->run->s.regs.events);
10295 }
10296
10297 static int sync_regs(struct kvm_vcpu *vcpu)
10298 {
10299         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10300                 return -EINVAL;
10301
10302         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10303                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10304                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10305         }
10306         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10307                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10308                         return -EINVAL;
10309                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10310         }
10311         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10312                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10313                                 vcpu, &vcpu->run->s.regs.events))
10314                         return -EINVAL;
10315                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10316         }
10317
10318         return 0;
10319 }
10320
10321 static void fx_init(struct kvm_vcpu *vcpu)
10322 {
10323         if (!vcpu->arch.guest_fpu)
10324                 return;
10325
10326         fpstate_init(&vcpu->arch.guest_fpu->state);
10327         if (boot_cpu_has(X86_FEATURE_XSAVES))
10328                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10329                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10330
10331         /*
10332          * Ensure guest xcr0 is valid for loading
10333          */
10334         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10335
10336         vcpu->arch.cr0 |= X86_CR0_ET;
10337 }
10338
10339 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10340 {
10341         if (vcpu->arch.guest_fpu) {
10342                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10343                 vcpu->arch.guest_fpu = NULL;
10344         }
10345 }
10346 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10347
10348 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10349 {
10350         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10351                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10352                              "guest TSC will not be reliable\n");
10353
10354         return 0;
10355 }
10356
10357 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10358 {
10359         struct page *page;
10360         int r;
10361
10362         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10363                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10364         else
10365                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10366
10367         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10368
10369         r = kvm_mmu_create(vcpu);
10370         if (r < 0)
10371                 return r;
10372
10373         if (irqchip_in_kernel(vcpu->kvm)) {
10374                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10375                 if (r < 0)
10376                         goto fail_mmu_destroy;
10377                 if (kvm_apicv_activated(vcpu->kvm))
10378                         vcpu->arch.apicv_active = true;
10379         } else
10380                 static_branch_inc(&kvm_has_noapic_vcpu);
10381
10382         r = -ENOMEM;
10383
10384         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10385         if (!page)
10386                 goto fail_free_lapic;
10387         vcpu->arch.pio_data = page_address(page);
10388
10389         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10390                                        GFP_KERNEL_ACCOUNT);
10391         if (!vcpu->arch.mce_banks)
10392                 goto fail_free_pio_data;
10393         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10394
10395         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10396                                 GFP_KERNEL_ACCOUNT))
10397                 goto fail_free_mce_banks;
10398
10399         if (!alloc_emulate_ctxt(vcpu))
10400                 goto free_wbinvd_dirty_mask;
10401
10402         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10403                                                 GFP_KERNEL_ACCOUNT);
10404         if (!vcpu->arch.user_fpu) {
10405                 pr_err("kvm: failed to allocate userspace's fpu\n");
10406                 goto free_emulate_ctxt;
10407         }
10408
10409         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10410                                                  GFP_KERNEL_ACCOUNT);
10411         if (!vcpu->arch.guest_fpu) {
10412                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10413                 goto free_user_fpu;
10414         }
10415         fx_init(vcpu);
10416
10417         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10418         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10419
10420         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10421
10422         kvm_async_pf_hash_reset(vcpu);
10423         kvm_pmu_init(vcpu);
10424
10425         vcpu->arch.pending_external_vector = -1;
10426         vcpu->arch.preempted_in_kernel = false;
10427
10428         r = static_call(kvm_x86_vcpu_create)(vcpu);
10429         if (r)
10430                 goto free_guest_fpu;
10431
10432         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10433         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10434         kvm_vcpu_mtrr_init(vcpu);
10435         vcpu_load(vcpu);
10436         kvm_vcpu_reset(vcpu, false);
10437         kvm_init_mmu(vcpu, false);
10438         vcpu_put(vcpu);
10439         return 0;
10440
10441 free_guest_fpu:
10442         kvm_free_guest_fpu(vcpu);
10443 free_user_fpu:
10444         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10445 free_emulate_ctxt:
10446         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10447 free_wbinvd_dirty_mask:
10448         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10449 fail_free_mce_banks:
10450         kfree(vcpu->arch.mce_banks);
10451 fail_free_pio_data:
10452         free_page((unsigned long)vcpu->arch.pio_data);
10453 fail_free_lapic:
10454         kvm_free_lapic(vcpu);
10455 fail_mmu_destroy:
10456         kvm_mmu_destroy(vcpu);
10457         return r;
10458 }
10459
10460 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10461 {
10462         struct kvm *kvm = vcpu->kvm;
10463
10464         if (mutex_lock_killable(&vcpu->mutex))
10465                 return;
10466         vcpu_load(vcpu);
10467         kvm_synchronize_tsc(vcpu, 0);
10468         vcpu_put(vcpu);
10469
10470         /* poll control enabled by default */
10471         vcpu->arch.msr_kvm_poll_control = 1;
10472
10473         mutex_unlock(&vcpu->mutex);
10474
10475         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10476                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10477                                                 KVMCLOCK_SYNC_PERIOD);
10478 }
10479
10480 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10481 {
10482         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10483         int idx;
10484
10485         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10486
10487         kvmclock_reset(vcpu);
10488
10489         static_call(kvm_x86_vcpu_free)(vcpu);
10490
10491         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10492         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10493         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10494         kvm_free_guest_fpu(vcpu);
10495
10496         kvm_hv_vcpu_uninit(vcpu);
10497         kvm_pmu_destroy(vcpu);
10498         kfree(vcpu->arch.mce_banks);
10499         kvm_free_lapic(vcpu);
10500         idx = srcu_read_lock(&vcpu->kvm->srcu);
10501         kvm_mmu_destroy(vcpu);
10502         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10503         free_page((unsigned long)vcpu->arch.pio_data);
10504         kvfree(vcpu->arch.cpuid_entries);
10505         if (!lapic_in_kernel(vcpu))
10506                 static_branch_dec(&kvm_has_noapic_vcpu);
10507 }
10508
10509 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10510 {
10511         kvm_lapic_reset(vcpu, init_event);
10512
10513         vcpu->arch.hflags = 0;
10514
10515         vcpu->arch.smi_pending = 0;
10516         vcpu->arch.smi_count = 0;
10517         atomic_set(&vcpu->arch.nmi_queued, 0);
10518         vcpu->arch.nmi_pending = 0;
10519         vcpu->arch.nmi_injected = false;
10520         kvm_clear_interrupt_queue(vcpu);
10521         kvm_clear_exception_queue(vcpu);
10522
10523         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10524         kvm_update_dr0123(vcpu);
10525         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10526         vcpu->arch.dr7 = DR7_FIXED_1;
10527         kvm_update_dr7(vcpu);
10528
10529         vcpu->arch.cr2 = 0;
10530
10531         kvm_make_request(KVM_REQ_EVENT, vcpu);
10532         vcpu->arch.apf.msr_en_val = 0;
10533         vcpu->arch.apf.msr_int_val = 0;
10534         vcpu->arch.st.msr_val = 0;
10535
10536         kvmclock_reset(vcpu);
10537
10538         kvm_clear_async_pf_completion_queue(vcpu);
10539         kvm_async_pf_hash_reset(vcpu);
10540         vcpu->arch.apf.halted = false;
10541
10542         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10543                 void *mpx_state_buffer;
10544
10545                 /*
10546                  * To avoid have the INIT path from kvm_apic_has_events() that be
10547                  * called with loaded FPU and does not let userspace fix the state.
10548                  */
10549                 if (init_event)
10550                         kvm_put_guest_fpu(vcpu);
10551                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10552                                         XFEATURE_BNDREGS);
10553                 if (mpx_state_buffer)
10554                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10555                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10556                                         XFEATURE_BNDCSR);
10557                 if (mpx_state_buffer)
10558                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10559                 if (init_event)
10560                         kvm_load_guest_fpu(vcpu);
10561         }
10562
10563         if (!init_event) {
10564                 kvm_pmu_reset(vcpu);
10565                 vcpu->arch.smbase = 0x30000;
10566
10567                 vcpu->arch.msr_misc_features_enables = 0;
10568
10569                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10570         }
10571
10572         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10573         vcpu->arch.regs_avail = ~0;
10574         vcpu->arch.regs_dirty = ~0;
10575
10576         vcpu->arch.ia32_xss = 0;
10577
10578         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10579 }
10580
10581 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10582 {
10583         struct kvm_segment cs;
10584
10585         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10586         cs.selector = vector << 8;
10587         cs.base = vector << 12;
10588         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10589         kvm_rip_write(vcpu, 0);
10590 }
10591 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10592
10593 int kvm_arch_hardware_enable(void)
10594 {
10595         struct kvm *kvm;
10596         struct kvm_vcpu *vcpu;
10597         int i;
10598         int ret;
10599         u64 local_tsc;
10600         u64 max_tsc = 0;
10601         bool stable, backwards_tsc = false;
10602
10603         kvm_user_return_msr_cpu_online();
10604         ret = static_call(kvm_x86_hardware_enable)();
10605         if (ret != 0)
10606                 return ret;
10607
10608         local_tsc = rdtsc();
10609         stable = !kvm_check_tsc_unstable();
10610         list_for_each_entry(kvm, &vm_list, vm_list) {
10611                 kvm_for_each_vcpu(i, vcpu, kvm) {
10612                         if (!stable && vcpu->cpu == smp_processor_id())
10613                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10614                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10615                                 backwards_tsc = true;
10616                                 if (vcpu->arch.last_host_tsc > max_tsc)
10617                                         max_tsc = vcpu->arch.last_host_tsc;
10618                         }
10619                 }
10620         }
10621
10622         /*
10623          * Sometimes, even reliable TSCs go backwards.  This happens on
10624          * platforms that reset TSC during suspend or hibernate actions, but
10625          * maintain synchronization.  We must compensate.  Fortunately, we can
10626          * detect that condition here, which happens early in CPU bringup,
10627          * before any KVM threads can be running.  Unfortunately, we can't
10628          * bring the TSCs fully up to date with real time, as we aren't yet far
10629          * enough into CPU bringup that we know how much real time has actually
10630          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10631          * variables that haven't been updated yet.
10632          *
10633          * So we simply find the maximum observed TSC above, then record the
10634          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10635          * the adjustment will be applied.  Note that we accumulate
10636          * adjustments, in case multiple suspend cycles happen before some VCPU
10637          * gets a chance to run again.  In the event that no KVM threads get a
10638          * chance to run, we will miss the entire elapsed period, as we'll have
10639          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10640          * loose cycle time.  This isn't too big a deal, since the loss will be
10641          * uniform across all VCPUs (not to mention the scenario is extremely
10642          * unlikely). It is possible that a second hibernate recovery happens
10643          * much faster than a first, causing the observed TSC here to be
10644          * smaller; this would require additional padding adjustment, which is
10645          * why we set last_host_tsc to the local tsc observed here.
10646          *
10647          * N.B. - this code below runs only on platforms with reliable TSC,
10648          * as that is the only way backwards_tsc is set above.  Also note
10649          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10650          * have the same delta_cyc adjustment applied if backwards_tsc
10651          * is detected.  Note further, this adjustment is only done once,
10652          * as we reset last_host_tsc on all VCPUs to stop this from being
10653          * called multiple times (one for each physical CPU bringup).
10654          *
10655          * Platforms with unreliable TSCs don't have to deal with this, they
10656          * will be compensated by the logic in vcpu_load, which sets the TSC to
10657          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10658          * guarantee that they stay in perfect synchronization.
10659          */
10660         if (backwards_tsc) {
10661                 u64 delta_cyc = max_tsc - local_tsc;
10662                 list_for_each_entry(kvm, &vm_list, vm_list) {
10663                         kvm->arch.backwards_tsc_observed = true;
10664                         kvm_for_each_vcpu(i, vcpu, kvm) {
10665                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10666                                 vcpu->arch.last_host_tsc = local_tsc;
10667                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10668                         }
10669
10670                         /*
10671                          * We have to disable TSC offset matching.. if you were
10672                          * booting a VM while issuing an S4 host suspend....
10673                          * you may have some problem.  Solving this issue is
10674                          * left as an exercise to the reader.
10675                          */
10676                         kvm->arch.last_tsc_nsec = 0;
10677                         kvm->arch.last_tsc_write = 0;
10678                 }
10679
10680         }
10681         return 0;
10682 }
10683
10684 void kvm_arch_hardware_disable(void)
10685 {
10686         static_call(kvm_x86_hardware_disable)();
10687         drop_user_return_notifiers();
10688 }
10689
10690 int kvm_arch_hardware_setup(void *opaque)
10691 {
10692         struct kvm_x86_init_ops *ops = opaque;
10693         int r;
10694
10695         rdmsrl_safe(MSR_EFER, &host_efer);
10696
10697         if (boot_cpu_has(X86_FEATURE_XSAVES))
10698                 rdmsrl(MSR_IA32_XSS, host_xss);
10699
10700         r = ops->hardware_setup();
10701         if (r != 0)
10702                 return r;
10703
10704         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10705         kvm_ops_static_call_update();
10706
10707         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10708                 supported_xss = 0;
10709
10710 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10711         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10712 #undef __kvm_cpu_cap_has
10713
10714         if (kvm_has_tsc_control) {
10715                 /*
10716                  * Make sure the user can only configure tsc_khz values that
10717                  * fit into a signed integer.
10718                  * A min value is not calculated because it will always
10719                  * be 1 on all machines.
10720                  */
10721                 u64 max = min(0x7fffffffULL,
10722                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10723                 kvm_max_guest_tsc_khz = max;
10724
10725                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10726         }
10727
10728         kvm_init_msr_list();
10729         return 0;
10730 }
10731
10732 void kvm_arch_hardware_unsetup(void)
10733 {
10734         static_call(kvm_x86_hardware_unsetup)();
10735 }
10736
10737 int kvm_arch_check_processor_compat(void *opaque)
10738 {
10739         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10740         struct kvm_x86_init_ops *ops = opaque;
10741
10742         WARN_ON(!irqs_disabled());
10743
10744         if (__cr4_reserved_bits(cpu_has, c) !=
10745             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10746                 return -EIO;
10747
10748         return ops->check_processor_compatibility();
10749 }
10750
10751 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10752 {
10753         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10754 }
10755 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10756
10757 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10758 {
10759         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10760 }
10761
10762 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10763 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10764
10765 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10766 {
10767         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10768
10769         vcpu->arch.l1tf_flush_l1d = true;
10770         if (pmu->version && unlikely(pmu->event_count)) {
10771                 pmu->need_cleanup = true;
10772                 kvm_make_request(KVM_REQ_PMU, vcpu);
10773         }
10774         static_call(kvm_x86_sched_in)(vcpu, cpu);
10775 }
10776
10777 void kvm_arch_free_vm(struct kvm *kvm)
10778 {
10779         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10780         vfree(kvm);
10781 }
10782
10783
10784 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10785 {
10786         if (type)
10787                 return -EINVAL;
10788
10789         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10790         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10791         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10792         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10793         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10794         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10795
10796         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10797         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10798         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10799         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10800                 &kvm->arch.irq_sources_bitmap);
10801
10802         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10803         mutex_init(&kvm->arch.apic_map_lock);
10804         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10805
10806         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10807         pvclock_update_vm_gtod_copy(kvm);
10808
10809         kvm->arch.guest_can_read_msr_platform_info = true;
10810
10811         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10812         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10813
10814         kvm_hv_init_vm(kvm);
10815         kvm_page_track_init(kvm);
10816         kvm_mmu_init_vm(kvm);
10817
10818         return static_call(kvm_x86_vm_init)(kvm);
10819 }
10820
10821 int kvm_arch_post_init_vm(struct kvm *kvm)
10822 {
10823         return kvm_mmu_post_init_vm(kvm);
10824 }
10825
10826 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10827 {
10828         vcpu_load(vcpu);
10829         kvm_mmu_unload(vcpu);
10830         vcpu_put(vcpu);
10831 }
10832
10833 static void kvm_free_vcpus(struct kvm *kvm)
10834 {
10835         unsigned int i;
10836         struct kvm_vcpu *vcpu;
10837
10838         /*
10839          * Unpin any mmu pages first.
10840          */
10841         kvm_for_each_vcpu(i, vcpu, kvm) {
10842                 kvm_clear_async_pf_completion_queue(vcpu);
10843                 kvm_unload_vcpu_mmu(vcpu);
10844         }
10845         kvm_for_each_vcpu(i, vcpu, kvm)
10846                 kvm_vcpu_destroy(vcpu);
10847
10848         mutex_lock(&kvm->lock);
10849         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10850                 kvm->vcpus[i] = NULL;
10851
10852         atomic_set(&kvm->online_vcpus, 0);
10853         mutex_unlock(&kvm->lock);
10854 }
10855
10856 void kvm_arch_sync_events(struct kvm *kvm)
10857 {
10858         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10859         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10860         kvm_free_pit(kvm);
10861 }
10862
10863 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10864
10865 /**
10866  * __x86_set_memory_region: Setup KVM internal memory slot
10867  *
10868  * @kvm: the kvm pointer to the VM.
10869  * @id: the slot ID to setup.
10870  * @gpa: the GPA to install the slot (unused when @size == 0).
10871  * @size: the size of the slot. Set to zero to uninstall a slot.
10872  *
10873  * This function helps to setup a KVM internal memory slot.  Specify
10874  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10875  * slot.  The return code can be one of the following:
10876  *
10877  *   HVA:           on success (uninstall will return a bogus HVA)
10878  *   -errno:        on error
10879  *
10880  * The caller should always use IS_ERR() to check the return value
10881  * before use.  Note, the KVM internal memory slots are guaranteed to
10882  * remain valid and unchanged until the VM is destroyed, i.e., the
10883  * GPA->HVA translation will not change.  However, the HVA is a user
10884  * address, i.e. its accessibility is not guaranteed, and must be
10885  * accessed via __copy_{to,from}_user().
10886  */
10887 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10888                                       u32 size)
10889 {
10890         int i, r;
10891         unsigned long hva, old_npages;
10892         struct kvm_memslots *slots = kvm_memslots(kvm);
10893         struct kvm_memory_slot *slot;
10894
10895         /* Called with kvm->slots_lock held.  */
10896         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10897                 return ERR_PTR_USR(-EINVAL);
10898
10899         slot = id_to_memslot(slots, id);
10900         if (size) {
10901                 if (slot && slot->npages)
10902                         return ERR_PTR_USR(-EEXIST);
10903
10904                 /*
10905                  * MAP_SHARED to prevent internal slot pages from being moved
10906                  * by fork()/COW.
10907                  */
10908                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10909                               MAP_SHARED | MAP_ANONYMOUS, 0);
10910                 if (IS_ERR((void *)hva))
10911                         return (void __user *)hva;
10912         } else {
10913                 if (!slot || !slot->npages)
10914                         return NULL;
10915
10916                 old_npages = slot->npages;
10917                 hva = slot->userspace_addr;
10918         }
10919
10920         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10921                 struct kvm_userspace_memory_region m;
10922
10923                 m.slot = id | (i << 16);
10924                 m.flags = 0;
10925                 m.guest_phys_addr = gpa;
10926                 m.userspace_addr = hva;
10927                 m.memory_size = size;
10928                 r = __kvm_set_memory_region(kvm, &m);
10929                 if (r < 0)
10930                         return ERR_PTR_USR(r);
10931         }
10932
10933         if (!size)
10934                 vm_munmap(hva, old_npages * PAGE_SIZE);
10935
10936         return (void __user *)hva;
10937 }
10938 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10939
10940 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10941 {
10942         kvm_mmu_pre_destroy_vm(kvm);
10943 }
10944
10945 void kvm_arch_destroy_vm(struct kvm *kvm)
10946 {
10947         if (current->mm == kvm->mm) {
10948                 /*
10949                  * Free memory regions allocated on behalf of userspace,
10950                  * unless the the memory map has changed due to process exit
10951                  * or fd copying.
10952                  */
10953                 mutex_lock(&kvm->slots_lock);
10954                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10955                                         0, 0);
10956                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10957                                         0, 0);
10958                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10959                 mutex_unlock(&kvm->slots_lock);
10960         }
10961         static_call_cond(kvm_x86_vm_destroy)(kvm);
10962         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10963         kvm_pic_destroy(kvm);
10964         kvm_ioapic_destroy(kvm);
10965         kvm_free_vcpus(kvm);
10966         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10967         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10968         kvm_mmu_uninit_vm(kvm);
10969         kvm_page_track_cleanup(kvm);
10970         kvm_xen_destroy_vm(kvm);
10971         kvm_hv_destroy_vm(kvm);
10972 }
10973
10974 static void memslot_rmap_free(struct kvm_memory_slot *slot)
10975 {
10976         int i;
10977
10978         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10979                 kvfree(slot->arch.rmap[i]);
10980                 slot->arch.rmap[i] = NULL;
10981         }
10982 }
10983
10984 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10985 {
10986         int i;
10987
10988         memslot_rmap_free(slot);
10989
10990         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
10991                 kvfree(slot->arch.lpage_info[i - 1]);
10992                 slot->arch.lpage_info[i - 1] = NULL;
10993         }
10994
10995         kvm_page_track_free_memslot(slot);
10996 }
10997
10998 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
10999                               unsigned long npages)
11000 {
11001         const int sz = sizeof(*slot->arch.rmap[0]);
11002         int i;
11003
11004         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11005                 int level = i + 1;
11006                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11007                                           slot->base_gfn, level) + 1;
11008
11009                 WARN_ON(slot->arch.rmap[i]);
11010
11011                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11012                 if (!slot->arch.rmap[i]) {
11013                         memslot_rmap_free(slot);
11014                         return -ENOMEM;
11015                 }
11016         }
11017
11018         return 0;
11019 }
11020
11021 int alloc_all_memslots_rmaps(struct kvm *kvm)
11022 {
11023         struct kvm_memslots *slots;
11024         struct kvm_memory_slot *slot;
11025         int r, i;
11026
11027         /*
11028          * Check if memslots alreday have rmaps early before acquiring
11029          * the slots_arch_lock below.
11030          */
11031         if (kvm_memslots_have_rmaps(kvm))
11032                 return 0;
11033
11034         mutex_lock(&kvm->slots_arch_lock);
11035
11036         /*
11037          * Read memslots_have_rmaps again, under the slots arch lock,
11038          * before allocating the rmaps
11039          */
11040         if (kvm_memslots_have_rmaps(kvm)) {
11041                 mutex_unlock(&kvm->slots_arch_lock);
11042                 return 0;
11043         }
11044
11045         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11046                 slots = __kvm_memslots(kvm, i);
11047                 kvm_for_each_memslot(slot, slots) {
11048                         r = memslot_rmap_alloc(slot, slot->npages);
11049                         if (r) {
11050                                 mutex_unlock(&kvm->slots_arch_lock);
11051                                 return r;
11052                         }
11053                 }
11054         }
11055
11056         /*
11057          * Ensure that memslots_have_rmaps becomes true strictly after
11058          * all the rmap pointers are set.
11059          */
11060         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11061         mutex_unlock(&kvm->slots_arch_lock);
11062         return 0;
11063 }
11064
11065 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11066                                       struct kvm_memory_slot *slot,
11067                                       unsigned long npages)
11068 {
11069         int i, r;
11070
11071         /*
11072          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11073          * old arrays will be freed by __kvm_set_memory_region() if installing
11074          * the new memslot is successful.
11075          */
11076         memset(&slot->arch, 0, sizeof(slot->arch));
11077
11078         if (kvm_memslots_have_rmaps(kvm)) {
11079                 r = memslot_rmap_alloc(slot, npages);
11080                 if (r)
11081                         return r;
11082         }
11083
11084         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11085                 struct kvm_lpage_info *linfo;
11086                 unsigned long ugfn;
11087                 int lpages;
11088                 int level = i + 1;
11089
11090                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11091                                       slot->base_gfn, level) + 1;
11092
11093                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11094                 if (!linfo)
11095                         goto out_free;
11096
11097                 slot->arch.lpage_info[i - 1] = linfo;
11098
11099                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11100                         linfo[0].disallow_lpage = 1;
11101                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11102                         linfo[lpages - 1].disallow_lpage = 1;
11103                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11104                 /*
11105                  * If the gfn and userspace address are not aligned wrt each
11106                  * other, disable large page support for this slot.
11107                  */
11108                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11109                         unsigned long j;
11110
11111                         for (j = 0; j < lpages; ++j)
11112                                 linfo[j].disallow_lpage = 1;
11113                 }
11114         }
11115
11116         if (kvm_page_track_create_memslot(slot, npages))
11117                 goto out_free;
11118
11119         return 0;
11120
11121 out_free:
11122         memslot_rmap_free(slot);
11123
11124         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11125                 kvfree(slot->arch.lpage_info[i - 1]);
11126                 slot->arch.lpage_info[i - 1] = NULL;
11127         }
11128         return -ENOMEM;
11129 }
11130
11131 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11132 {
11133         struct kvm_vcpu *vcpu;
11134         int i;
11135
11136         /*
11137          * memslots->generation has been incremented.
11138          * mmio generation may have reached its maximum value.
11139          */
11140         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11141
11142         /* Force re-initialization of steal_time cache */
11143         kvm_for_each_vcpu(i, vcpu, kvm)
11144                 kvm_vcpu_kick(vcpu);
11145 }
11146
11147 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11148                                 struct kvm_memory_slot *memslot,
11149                                 const struct kvm_userspace_memory_region *mem,
11150                                 enum kvm_mr_change change)
11151 {
11152         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11153                 return kvm_alloc_memslot_metadata(kvm, memslot,
11154                                                   mem->memory_size >> PAGE_SHIFT);
11155         return 0;
11156 }
11157
11158
11159 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11160 {
11161         struct kvm_arch *ka = &kvm->arch;
11162
11163         if (!kvm_x86_ops.cpu_dirty_log_size)
11164                 return;
11165
11166         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11167             (!enable && --ka->cpu_dirty_logging_count == 0))
11168                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11169
11170         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11171 }
11172
11173 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11174                                      struct kvm_memory_slot *old,
11175                                      struct kvm_memory_slot *new,
11176                                      enum kvm_mr_change change)
11177 {
11178         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11179
11180         /*
11181          * Update CPU dirty logging if dirty logging is being toggled.  This
11182          * applies to all operations.
11183          */
11184         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11185                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11186
11187         /*
11188          * Nothing more to do for RO slots (which can't be dirtied and can't be
11189          * made writable) or CREATE/MOVE/DELETE of a slot.
11190          *
11191          * For a memslot with dirty logging disabled:
11192          * CREATE:      No dirty mappings will already exist.
11193          * MOVE/DELETE: The old mappings will already have been cleaned up by
11194          *              kvm_arch_flush_shadow_memslot()
11195          *
11196          * For a memslot with dirty logging enabled:
11197          * CREATE:      No shadow pages exist, thus nothing to write-protect
11198          *              and no dirty bits to clear.
11199          * MOVE/DELETE: The old mappings will already have been cleaned up by
11200          *              kvm_arch_flush_shadow_memslot().
11201          */
11202         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11203                 return;
11204
11205         /*
11206          * READONLY and non-flags changes were filtered out above, and the only
11207          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11208          * logging isn't being toggled on or off.
11209          */
11210         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11211                 return;
11212
11213         if (!log_dirty_pages) {
11214                 /*
11215                  * Dirty logging tracks sptes in 4k granularity, meaning that
11216                  * large sptes have to be split.  If live migration succeeds,
11217                  * the guest in the source machine will be destroyed and large
11218                  * sptes will be created in the destination.  However, if the
11219                  * guest continues to run in the source machine (for example if
11220                  * live migration fails), small sptes will remain around and
11221                  * cause bad performance.
11222                  *
11223                  * Scan sptes if dirty logging has been stopped, dropping those
11224                  * which can be collapsed into a single large-page spte.  Later
11225                  * page faults will create the large-page sptes.
11226                  */
11227                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11228         } else {
11229                 /*
11230                  * Initially-all-set does not require write protecting any page,
11231                  * because they're all assumed to be dirty.
11232                  */
11233                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11234                         return;
11235
11236                 if (kvm_x86_ops.cpu_dirty_log_size) {
11237                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11238                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11239                 } else {
11240                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11241                 }
11242         }
11243 }
11244
11245 void kvm_arch_commit_memory_region(struct kvm *kvm,
11246                                 const struct kvm_userspace_memory_region *mem,
11247                                 struct kvm_memory_slot *old,
11248                                 const struct kvm_memory_slot *new,
11249                                 enum kvm_mr_change change)
11250 {
11251         if (!kvm->arch.n_requested_mmu_pages)
11252                 kvm_mmu_change_mmu_pages(kvm,
11253                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11254
11255         /*
11256          * FIXME: const-ify all uses of struct kvm_memory_slot.
11257          */
11258         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11259
11260         /* Free the arrays associated with the old memslot. */
11261         if (change == KVM_MR_MOVE)
11262                 kvm_arch_free_memslot(kvm, old);
11263 }
11264
11265 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11266 {
11267         kvm_mmu_zap_all(kvm);
11268 }
11269
11270 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11271                                    struct kvm_memory_slot *slot)
11272 {
11273         kvm_page_track_flush_slot(kvm, slot);
11274 }
11275
11276 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11277 {
11278         return (is_guest_mode(vcpu) &&
11279                         kvm_x86_ops.guest_apic_has_interrupt &&
11280                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11281 }
11282
11283 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11284 {
11285         if (!list_empty_careful(&vcpu->async_pf.done))
11286                 return true;
11287
11288         if (kvm_apic_has_events(vcpu))
11289                 return true;
11290
11291         if (vcpu->arch.pv.pv_unhalted)
11292                 return true;
11293
11294         if (vcpu->arch.exception.pending)
11295                 return true;
11296
11297         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11298             (vcpu->arch.nmi_pending &&
11299              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11300                 return true;
11301
11302         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11303             (vcpu->arch.smi_pending &&
11304              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11305                 return true;
11306
11307         if (kvm_arch_interrupt_allowed(vcpu) &&
11308             (kvm_cpu_has_interrupt(vcpu) ||
11309             kvm_guest_apic_has_interrupt(vcpu)))
11310                 return true;
11311
11312         if (kvm_hv_has_stimer_pending(vcpu))
11313                 return true;
11314
11315         if (is_guest_mode(vcpu) &&
11316             kvm_x86_ops.nested_ops->hv_timer_pending &&
11317             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11318                 return true;
11319
11320         return false;
11321 }
11322
11323 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11324 {
11325         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11326 }
11327
11328 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11329 {
11330         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11331                 return true;
11332
11333         return false;
11334 }
11335
11336 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11337 {
11338         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11339                 return true;
11340
11341         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11342                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11343                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11344                 return true;
11345
11346         return kvm_arch_dy_has_pending_interrupt(vcpu);
11347 }
11348
11349 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11350 {
11351         if (vcpu->arch.guest_state_protected)
11352                 return true;
11353
11354         return vcpu->arch.preempted_in_kernel;
11355 }
11356
11357 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11358 {
11359         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11360 }
11361
11362 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11363 {
11364         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11365 }
11366
11367 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11368 {
11369         /* Can't read the RIP when guest state is protected, just return 0 */
11370         if (vcpu->arch.guest_state_protected)
11371                 return 0;
11372
11373         if (is_64_bit_mode(vcpu))
11374                 return kvm_rip_read(vcpu);
11375         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11376                      kvm_rip_read(vcpu));
11377 }
11378 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11379
11380 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11381 {
11382         return kvm_get_linear_rip(vcpu) == linear_rip;
11383 }
11384 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11385
11386 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11387 {
11388         unsigned long rflags;
11389
11390         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11391         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11392                 rflags &= ~X86_EFLAGS_TF;
11393         return rflags;
11394 }
11395 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11396
11397 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11398 {
11399         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11400             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11401                 rflags |= X86_EFLAGS_TF;
11402         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11403 }
11404
11405 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11406 {
11407         __kvm_set_rflags(vcpu, rflags);
11408         kvm_make_request(KVM_REQ_EVENT, vcpu);
11409 }
11410 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11411
11412 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11413 {
11414         int r;
11415
11416         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11417               work->wakeup_all)
11418                 return;
11419
11420         r = kvm_mmu_reload(vcpu);
11421         if (unlikely(r))
11422                 return;
11423
11424         if (!vcpu->arch.mmu->direct_map &&
11425               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11426                 return;
11427
11428         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11429 }
11430
11431 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11432 {
11433         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11434
11435         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11436 }
11437
11438 static inline u32 kvm_async_pf_next_probe(u32 key)
11439 {
11440         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11441 }
11442
11443 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11444 {
11445         u32 key = kvm_async_pf_hash_fn(gfn);
11446
11447         while (vcpu->arch.apf.gfns[key] != ~0)
11448                 key = kvm_async_pf_next_probe(key);
11449
11450         vcpu->arch.apf.gfns[key] = gfn;
11451 }
11452
11453 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11454 {
11455         int i;
11456         u32 key = kvm_async_pf_hash_fn(gfn);
11457
11458         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11459                      (vcpu->arch.apf.gfns[key] != gfn &&
11460                       vcpu->arch.apf.gfns[key] != ~0); i++)
11461                 key = kvm_async_pf_next_probe(key);
11462
11463         return key;
11464 }
11465
11466 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11467 {
11468         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11469 }
11470
11471 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11472 {
11473         u32 i, j, k;
11474
11475         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11476
11477         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11478                 return;
11479
11480         while (true) {
11481                 vcpu->arch.apf.gfns[i] = ~0;
11482                 do {
11483                         j = kvm_async_pf_next_probe(j);
11484                         if (vcpu->arch.apf.gfns[j] == ~0)
11485                                 return;
11486                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11487                         /*
11488                          * k lies cyclically in ]i,j]
11489                          * |    i.k.j |
11490                          * |....j i.k.| or  |.k..j i...|
11491                          */
11492                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11493                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11494                 i = j;
11495         }
11496 }
11497
11498 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11499 {
11500         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11501
11502         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11503                                       sizeof(reason));
11504 }
11505
11506 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11507 {
11508         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11509
11510         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11511                                              &token, offset, sizeof(token));
11512 }
11513
11514 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11515 {
11516         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11517         u32 val;
11518
11519         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11520                                          &val, offset, sizeof(val)))
11521                 return false;
11522
11523         return !val;
11524 }
11525
11526 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11527 {
11528         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11529                 return false;
11530
11531         if (!kvm_pv_async_pf_enabled(vcpu) ||
11532             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11533                 return false;
11534
11535         return true;
11536 }
11537
11538 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11539 {
11540         if (unlikely(!lapic_in_kernel(vcpu) ||
11541                      kvm_event_needs_reinjection(vcpu) ||
11542                      vcpu->arch.exception.pending))
11543                 return false;
11544
11545         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11546                 return false;
11547
11548         /*
11549          * If interrupts are off we cannot even use an artificial
11550          * halt state.
11551          */
11552         return kvm_arch_interrupt_allowed(vcpu);
11553 }
11554
11555 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11556                                      struct kvm_async_pf *work)
11557 {
11558         struct x86_exception fault;
11559
11560         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11561         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11562
11563         if (kvm_can_deliver_async_pf(vcpu) &&
11564             !apf_put_user_notpresent(vcpu)) {
11565                 fault.vector = PF_VECTOR;
11566                 fault.error_code_valid = true;
11567                 fault.error_code = 0;
11568                 fault.nested_page_fault = false;
11569                 fault.address = work->arch.token;
11570                 fault.async_page_fault = true;
11571                 kvm_inject_page_fault(vcpu, &fault);
11572                 return true;
11573         } else {
11574                 /*
11575                  * It is not possible to deliver a paravirtualized asynchronous
11576                  * page fault, but putting the guest in an artificial halt state
11577                  * can be beneficial nevertheless: if an interrupt arrives, we
11578                  * can deliver it timely and perhaps the guest will schedule
11579                  * another process.  When the instruction that triggered a page
11580                  * fault is retried, hopefully the page will be ready in the host.
11581                  */
11582                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11583                 return false;
11584         }
11585 }
11586
11587 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11588                                  struct kvm_async_pf *work)
11589 {
11590         struct kvm_lapic_irq irq = {
11591                 .delivery_mode = APIC_DM_FIXED,
11592                 .vector = vcpu->arch.apf.vec
11593         };
11594
11595         if (work->wakeup_all)
11596                 work->arch.token = ~0; /* broadcast wakeup */
11597         else
11598                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11599         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11600
11601         if ((work->wakeup_all || work->notpresent_injected) &&
11602             kvm_pv_async_pf_enabled(vcpu) &&
11603             !apf_put_user_ready(vcpu, work->arch.token)) {
11604                 vcpu->arch.apf.pageready_pending = true;
11605                 kvm_apic_set_irq(vcpu, &irq, NULL);
11606         }
11607
11608         vcpu->arch.apf.halted = false;
11609         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11610 }
11611
11612 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11613 {
11614         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11615         if (!vcpu->arch.apf.pageready_pending)
11616                 kvm_vcpu_kick(vcpu);
11617 }
11618
11619 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11620 {
11621         if (!kvm_pv_async_pf_enabled(vcpu))
11622                 return true;
11623         else
11624                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11625 }
11626
11627 void kvm_arch_start_assignment(struct kvm *kvm)
11628 {
11629         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11630                 static_call_cond(kvm_x86_start_assignment)(kvm);
11631 }
11632 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11633
11634 void kvm_arch_end_assignment(struct kvm *kvm)
11635 {
11636         atomic_dec(&kvm->arch.assigned_device_count);
11637 }
11638 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11639
11640 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11641 {
11642         return atomic_read(&kvm->arch.assigned_device_count);
11643 }
11644 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11645
11646 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11647 {
11648         atomic_inc(&kvm->arch.noncoherent_dma_count);
11649 }
11650 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11651
11652 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11653 {
11654         atomic_dec(&kvm->arch.noncoherent_dma_count);
11655 }
11656 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11657
11658 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11659 {
11660         return atomic_read(&kvm->arch.noncoherent_dma_count);
11661 }
11662 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11663
11664 bool kvm_arch_has_irq_bypass(void)
11665 {
11666         return true;
11667 }
11668
11669 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11670                                       struct irq_bypass_producer *prod)
11671 {
11672         struct kvm_kernel_irqfd *irqfd =
11673                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11674         int ret;
11675
11676         irqfd->producer = prod;
11677         kvm_arch_start_assignment(irqfd->kvm);
11678         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11679                                          prod->irq, irqfd->gsi, 1);
11680
11681         if (ret)
11682                 kvm_arch_end_assignment(irqfd->kvm);
11683
11684         return ret;
11685 }
11686
11687 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11688                                       struct irq_bypass_producer *prod)
11689 {
11690         int ret;
11691         struct kvm_kernel_irqfd *irqfd =
11692                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11693
11694         WARN_ON(irqfd->producer != prod);
11695         irqfd->producer = NULL;
11696
11697         /*
11698          * When producer of consumer is unregistered, we change back to
11699          * remapped mode, so we can re-use the current implementation
11700          * when the irq is masked/disabled or the consumer side (KVM
11701          * int this case doesn't want to receive the interrupts.
11702         */
11703         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11704         if (ret)
11705                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11706                        " fails: %d\n", irqfd->consumer.token, ret);
11707
11708         kvm_arch_end_assignment(irqfd->kvm);
11709 }
11710
11711 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11712                                    uint32_t guest_irq, bool set)
11713 {
11714         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11715 }
11716
11717 bool kvm_vector_hashing_enabled(void)
11718 {
11719         return vector_hashing;
11720 }
11721
11722 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11723 {
11724         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11725 }
11726 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11727
11728
11729 int kvm_spec_ctrl_test_value(u64 value)
11730 {
11731         /*
11732          * test that setting IA32_SPEC_CTRL to given value
11733          * is allowed by the host processor
11734          */
11735
11736         u64 saved_value;
11737         unsigned long flags;
11738         int ret = 0;
11739
11740         local_irq_save(flags);
11741
11742         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11743                 ret = 1;
11744         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11745                 ret = 1;
11746         else
11747                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11748
11749         local_irq_restore(flags);
11750
11751         return ret;
11752 }
11753 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11754
11755 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11756 {
11757         struct x86_exception fault;
11758         u32 access = error_code &
11759                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11760
11761         if (!(error_code & PFERR_PRESENT_MASK) ||
11762             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11763                 /*
11764                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11765                  * tables probably do not match the TLB.  Just proceed
11766                  * with the error code that the processor gave.
11767                  */
11768                 fault.vector = PF_VECTOR;
11769                 fault.error_code_valid = true;
11770                 fault.error_code = error_code;
11771                 fault.nested_page_fault = false;
11772                 fault.address = gva;
11773         }
11774         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11775 }
11776 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11777
11778 /*
11779  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11780  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11781  * indicates whether exit to userspace is needed.
11782  */
11783 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11784                               struct x86_exception *e)
11785 {
11786         if (r == X86EMUL_PROPAGATE_FAULT) {
11787                 kvm_inject_emulated_page_fault(vcpu, e);
11788                 return 1;
11789         }
11790
11791         /*
11792          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11793          * while handling a VMX instruction KVM could've handled the request
11794          * correctly by exiting to userspace and performing I/O but there
11795          * doesn't seem to be a real use-case behind such requests, just return
11796          * KVM_EXIT_INTERNAL_ERROR for now.
11797          */
11798         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11799         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11800         vcpu->run->internal.ndata = 0;
11801
11802         return 0;
11803 }
11804 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11805
11806 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11807 {
11808         bool pcid_enabled;
11809         struct x86_exception e;
11810         unsigned i;
11811         unsigned long roots_to_free = 0;
11812         struct {
11813                 u64 pcid;
11814                 u64 gla;
11815         } operand;
11816         int r;
11817
11818         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11819         if (r != X86EMUL_CONTINUE)
11820                 return kvm_handle_memory_failure(vcpu, r, &e);
11821
11822         if (operand.pcid >> 12 != 0) {
11823                 kvm_inject_gp(vcpu, 0);
11824                 return 1;
11825         }
11826
11827         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11828
11829         switch (type) {
11830         case INVPCID_TYPE_INDIV_ADDR:
11831                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11832                     is_noncanonical_address(operand.gla, vcpu)) {
11833                         kvm_inject_gp(vcpu, 0);
11834                         return 1;
11835                 }
11836                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11837                 return kvm_skip_emulated_instruction(vcpu);
11838
11839         case INVPCID_TYPE_SINGLE_CTXT:
11840                 if (!pcid_enabled && (operand.pcid != 0)) {
11841                         kvm_inject_gp(vcpu, 0);
11842                         return 1;
11843                 }
11844
11845                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11846                         kvm_mmu_sync_roots(vcpu);
11847                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11848                 }
11849
11850                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11851                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11852                             == operand.pcid)
11853                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11854
11855                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11856                 /*
11857                  * If neither the current cr3 nor any of the prev_roots use the
11858                  * given PCID, then nothing needs to be done here because a
11859                  * resync will happen anyway before switching to any other CR3.
11860                  */
11861
11862                 return kvm_skip_emulated_instruction(vcpu);
11863
11864         case INVPCID_TYPE_ALL_NON_GLOBAL:
11865                 /*
11866                  * Currently, KVM doesn't mark global entries in the shadow
11867                  * page tables, so a non-global flush just degenerates to a
11868                  * global flush. If needed, we could optimize this later by
11869                  * keeping track of global entries in shadow page tables.
11870                  */
11871
11872                 fallthrough;
11873         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11874                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11875                 return kvm_skip_emulated_instruction(vcpu);
11876
11877         default:
11878                 BUG(); /* We have already checked above that type <= 3 */
11879         }
11880 }
11881 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11882
11883 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11884 {
11885         struct kvm_run *run = vcpu->run;
11886         struct kvm_mmio_fragment *frag;
11887         unsigned int len;
11888
11889         BUG_ON(!vcpu->mmio_needed);
11890
11891         /* Complete previous fragment */
11892         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11893         len = min(8u, frag->len);
11894         if (!vcpu->mmio_is_write)
11895                 memcpy(frag->data, run->mmio.data, len);
11896
11897         if (frag->len <= 8) {
11898                 /* Switch to the next fragment. */
11899                 frag++;
11900                 vcpu->mmio_cur_fragment++;
11901         } else {
11902                 /* Go forward to the next mmio piece. */
11903                 frag->data += len;
11904                 frag->gpa += len;
11905                 frag->len -= len;
11906         }
11907
11908         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11909                 vcpu->mmio_needed = 0;
11910
11911                 // VMG change, at this point, we're always done
11912                 // RIP has already been advanced
11913                 return 1;
11914         }
11915
11916         // More MMIO is needed
11917         run->mmio.phys_addr = frag->gpa;
11918         run->mmio.len = min(8u, frag->len);
11919         run->mmio.is_write = vcpu->mmio_is_write;
11920         if (run->mmio.is_write)
11921                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11922         run->exit_reason = KVM_EXIT_MMIO;
11923
11924         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11925
11926         return 0;
11927 }
11928
11929 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11930                           void *data)
11931 {
11932         int handled;
11933         struct kvm_mmio_fragment *frag;
11934
11935         if (!data)
11936                 return -EINVAL;
11937
11938         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11939         if (handled == bytes)
11940                 return 1;
11941
11942         bytes -= handled;
11943         gpa += handled;
11944         data += handled;
11945
11946         /*TODO: Check if need to increment number of frags */
11947         frag = vcpu->mmio_fragments;
11948         vcpu->mmio_nr_fragments = 1;
11949         frag->len = bytes;
11950         frag->gpa = gpa;
11951         frag->data = data;
11952
11953         vcpu->mmio_needed = 1;
11954         vcpu->mmio_cur_fragment = 0;
11955
11956         vcpu->run->mmio.phys_addr = gpa;
11957         vcpu->run->mmio.len = min(8u, frag->len);
11958         vcpu->run->mmio.is_write = 1;
11959         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11960         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11961
11962         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11963
11964         return 0;
11965 }
11966 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11967
11968 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11969                          void *data)
11970 {
11971         int handled;
11972         struct kvm_mmio_fragment *frag;
11973
11974         if (!data)
11975                 return -EINVAL;
11976
11977         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11978         if (handled == bytes)
11979                 return 1;
11980
11981         bytes -= handled;
11982         gpa += handled;
11983         data += handled;
11984
11985         /*TODO: Check if need to increment number of frags */
11986         frag = vcpu->mmio_fragments;
11987         vcpu->mmio_nr_fragments = 1;
11988         frag->len = bytes;
11989         frag->gpa = gpa;
11990         frag->data = data;
11991
11992         vcpu->mmio_needed = 1;
11993         vcpu->mmio_cur_fragment = 0;
11994
11995         vcpu->run->mmio.phys_addr = gpa;
11996         vcpu->run->mmio.len = min(8u, frag->len);
11997         vcpu->run->mmio.is_write = 0;
11998         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11999
12000         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12001
12002         return 0;
12003 }
12004 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12005
12006 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12007 {
12008         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12009                vcpu->arch.pio.count * vcpu->arch.pio.size);
12010         vcpu->arch.pio.count = 0;
12011
12012         return 1;
12013 }
12014
12015 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12016                            unsigned int port, void *data,  unsigned int count)
12017 {
12018         int ret;
12019
12020         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12021                                         data, count);
12022         if (ret)
12023                 return ret;
12024
12025         vcpu->arch.pio.count = 0;
12026
12027         return 0;
12028 }
12029
12030 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12031                           unsigned int port, void *data, unsigned int count)
12032 {
12033         int ret;
12034
12035         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12036                                        data, count);
12037         if (ret) {
12038                 vcpu->arch.pio.count = 0;
12039         } else {
12040                 vcpu->arch.guest_ins_data = data;
12041                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12042         }
12043
12044         return 0;
12045 }
12046
12047 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12048                          unsigned int port, void *data,  unsigned int count,
12049                          int in)
12050 {
12051         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12052                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12053 }
12054 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12055
12056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12064 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12065 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12066 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12067 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12068 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12069 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12070 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12071 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12072 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12073 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12074 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12075 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12079 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);