arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, lpages),
 237         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 238         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 239         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 240 };
 241 static_assert(ARRAY_SIZE(kvm_vm_stats_desc) ==
 242                 sizeof(struct kvm_vm_stat) / sizeof(u64));
 243
 244 const struct kvm_stats_header kvm_vm_stats_header = {
 245         .name_size = KVM_STATS_NAME_SIZE,
 246         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 247         .id_offset = sizeof(struct kvm_stats_header),
 248         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 249         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 250                        sizeof(kvm_vm_stats_desc),
 251 };
 252
 253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 254         KVM_GENERIC_VCPU_STATS(),
 255         STATS_DESC_COUNTER(VCPU, pf_fixed),
 256         STATS_DESC_COUNTER(VCPU, pf_guest),
 257         STATS_DESC_COUNTER(VCPU, tlb_flush),
 258         STATS_DESC_COUNTER(VCPU, invlpg),
 259         STATS_DESC_COUNTER(VCPU, exits),
 260         STATS_DESC_COUNTER(VCPU, io_exits),
 261         STATS_DESC_COUNTER(VCPU, mmio_exits),
 262         STATS_DESC_COUNTER(VCPU, signal_exits),
 263         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 264         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 265         STATS_DESC_COUNTER(VCPU, l1d_flush),
 266         STATS_DESC_COUNTER(VCPU, halt_exits),
 267         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 268         STATS_DESC_COUNTER(VCPU, irq_exits),
 269         STATS_DESC_COUNTER(VCPU, host_state_reload),
 270         STATS_DESC_COUNTER(VCPU, fpu_reload),
 271         STATS_DESC_COUNTER(VCPU, insn_emulation),
 272         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 273         STATS_DESC_COUNTER(VCPU, hypercalls),
 274         STATS_DESC_COUNTER(VCPU, irq_injections),
 275         STATS_DESC_COUNTER(VCPU, nmi_injections),
 276         STATS_DESC_COUNTER(VCPU, req_event),
 277         STATS_DESC_COUNTER(VCPU, nested_run),
 278         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 279         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 280         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 281 };
 282 static_assert(ARRAY_SIZE(kvm_vcpu_stats_desc) ==
 283                 sizeof(struct kvm_vcpu_stat) / sizeof(u64));
 284
 285 const struct kvm_stats_header kvm_vcpu_stats_header = {
 286         .name_size = KVM_STATS_NAME_SIZE,
 287         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 288         .id_offset = sizeof(struct kvm_stats_header),
 289         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 290         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 291                        sizeof(kvm_vcpu_stats_desc),
 292 };
 293
 294 u64 __read_mostly host_xcr0;
 295 u64 __read_mostly supported_xcr0;
 296 EXPORT_SYMBOL_GPL(supported_xcr0);
 297
 298 static struct kmem_cache *x86_fpu_cache;
 299
 300 static struct kmem_cache *x86_emulator_cache;
 301
 302 /*
 303  * When called, it means the previous get/set msr reached an invalid msr.
 304  * Return true if we want to ignore/silent this failed msr access.
 305  */
 306 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 307 {
 308         const char *op = write ? "wrmsr" : "rdmsr";
 309
 310         if (ignore_msrs) {
 311                 if (report_ignored_msrs)
 312                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 313                                       op, msr, data);
 314                 /* Mask the error */
 315                 return true;
 316         } else {
 317                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 318                                       op, msr, data);
 319                 return false;
 320         }
 321 }
 322
 323 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 324 {
 325         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 326         unsigned int size = sizeof(struct x86_emulate_ctxt);
 327
 328         return kmem_cache_create_usercopy("x86_emulator", size,
 329                                           __alignof__(struct x86_emulate_ctxt),
 330                                           SLAB_ACCOUNT, useroffset,
 331                                           size - useroffset, NULL);
 332 }
 333
 334 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 335
 336 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 337 {
 338         int i;
 339         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 340                 vcpu->arch.apf.gfns[i] = ~0;
 341 }
 342
 343 static void kvm_on_user_return(struct user_return_notifier *urn)
 344 {
 345         unsigned slot;
 346         struct kvm_user_return_msrs *msrs
 347                 = container_of(urn, struct kvm_user_return_msrs, urn);
 348         struct kvm_user_return_msr_values *values;
 349         unsigned long flags;
 350
 351         /*
 352          * Disabling irqs at this point since the following code could be
 353          * interrupted and executed through kvm_arch_hardware_disable()
 354          */
 355         local_irq_save(flags);
 356         if (msrs->registered) {
 357                 msrs->registered = false;
 358                 user_return_notifier_unregister(urn);
 359         }
 360         local_irq_restore(flags);
 361         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 362                 values = &msrs->values[slot];
 363                 if (values->host != values->curr) {
 364                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 365                         values->curr = values->host;
 366                 }
 367         }
 368 }
 369
 370 static int kvm_probe_user_return_msr(u32 msr)
 371 {
 372         u64 val;
 373         int ret;
 374
 375         preempt_disable();
 376         ret = rdmsrl_safe(msr, &val);
 377         if (ret)
 378                 goto out;
 379         ret = wrmsrl_safe(msr, val);
 380 out:
 381         preempt_enable();
 382         return ret;
 383 }
 384
 385 int kvm_add_user_return_msr(u32 msr)
 386 {
 387         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 388
 389         if (kvm_probe_user_return_msr(msr))
 390                 return -1;
 391
 392         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 393         return kvm_nr_uret_msrs++;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 396
 397 int kvm_find_user_return_msr(u32 msr)
 398 {
 399         int i;
 400
 401         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 402                 if (kvm_uret_msrs_list[i] == msr)
 403                         return i;
 404         }
 405         return -1;
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 408
 409 static void kvm_user_return_msr_cpu_online(void)
 410 {
 411         unsigned int cpu = smp_processor_id();
 412         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 413         u64 value;
 414         int i;
 415
 416         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 417                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 418                 msrs->values[i].host = value;
 419                 msrs->values[i].curr = value;
 420         }
 421 }
 422
 423 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 424 {
 425         unsigned int cpu = smp_processor_id();
 426         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 427         int err;
 428
 429         value = (value & mask) | (msrs->values[slot].host & ~mask);
 430         if (value == msrs->values[slot].curr)
 431                 return 0;
 432         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 433         if (err)
 434                 return 1;
 435
 436         msrs->values[slot].curr = value;
 437         if (!msrs->registered) {
 438                 msrs->urn.on_user_return = kvm_on_user_return;
 439                 user_return_notifier_register(&msrs->urn);
 440                 msrs->registered = true;
 441         }
 442         return 0;
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 445
 446 static void drop_user_return_notifiers(void)
 447 {
 448         unsigned int cpu = smp_processor_id();
 449         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 450
 451         if (msrs->registered)
 452                 kvm_on_user_return(&msrs->urn);
 453 }
 454
 455 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 456 {
 457         return vcpu->arch.apic_base;
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 460
 461 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 462 {
 463         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 466
 467 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 468 {
 469         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 470         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 471         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 472                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 473
 474         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 475                 return 1;
 476         if (!msr_info->host_initiated) {
 477                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 478                         return 1;
 479                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 480                         return 1;
 481         }
 482
 483         kvm_lapic_set_base(vcpu, msr_info->data);
 484         kvm_recalculate_apic_map(vcpu->kvm);
 485         return 0;
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 488
 489 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 490 {
 491         /* Fault while not rebooting.  We want the trace. */
 492         BUG_ON(!kvm_rebooting);
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 495
 496 #define EXCPT_BENIGN            0
 497 #define EXCPT_CONTRIBUTORY      1
 498 #define EXCPT_PF                2
 499
 500 static int exception_class(int vector)
 501 {
 502         switch (vector) {
 503         case PF_VECTOR:
 504                 return EXCPT_PF;
 505         case DE_VECTOR:
 506         case TS_VECTOR:
 507         case NP_VECTOR:
 508         case SS_VECTOR:
 509         case GP_VECTOR:
 510                 return EXCPT_CONTRIBUTORY;
 511         default:
 512                 break;
 513         }
 514         return EXCPT_BENIGN;
 515 }
 516
 517 #define EXCPT_FAULT             0
 518 #define EXCPT_TRAP              1
 519 #define EXCPT_ABORT             2
 520 #define EXCPT_INTERRUPT         3
 521
 522 static int exception_type(int vector)
 523 {
 524         unsigned int mask;
 525
 526         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 527                 return EXCPT_INTERRUPT;
 528
 529         mask = 1 << vector;
 530
 531         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 532         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 533                 return EXCPT_TRAP;
 534
 535         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 536                 return EXCPT_ABORT;
 537
 538         /* Reserved exceptions will result in fault */
 539         return EXCPT_FAULT;
 540 }
 541
 542 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 543 {
 544         unsigned nr = vcpu->arch.exception.nr;
 545         bool has_payload = vcpu->arch.exception.has_payload;
 546         unsigned long payload = vcpu->arch.exception.payload;
 547
 548         if (!has_payload)
 549                 return;
 550
 551         switch (nr) {
 552         case DB_VECTOR:
 553                 /*
 554                  * "Certain debug exceptions may clear bit 0-3.  The
 555                  * remaining contents of the DR6 register are never
 556                  * cleared by the processor".
 557                  */
 558                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 559                 /*
 560                  * In order to reflect the #DB exception payload in guest
 561                  * dr6, three components need to be considered: active low
 562                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 563                  * DR6_BS and DR6_BT)
 564                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 565                  * In the target guest dr6:
 566                  * FIXED_1 bits should always be set.
 567                  * Active low bits should be cleared if 1-setting in payload.
 568                  * Active high bits should be set if 1-setting in payload.
 569                  *
 570                  * Note, the payload is compatible with the pending debug
 571                  * exceptions/exit qualification under VMX, that active_low bits
 572                  * are active high in payload.
 573                  * So they need to be flipped for DR6.
 574                  */
 575                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 576                 vcpu->arch.dr6 |= payload;
 577                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 578
 579                 /*
 580                  * The #DB payload is defined as compatible with the 'pending
 581                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 582                  * defined in the 'pending debug exceptions' field (enabled
 583                  * breakpoint), it is reserved and must be zero in DR6.
 584                  */
 585                 vcpu->arch.dr6 &= ~BIT(12);
 586                 break;
 587         case PF_VECTOR:
 588                 vcpu->arch.cr2 = payload;
 589                 break;
 590         }
 591
 592         vcpu->arch.exception.has_payload = false;
 593         vcpu->arch.exception.payload = 0;
 594 }
 595 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 596
 597 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 598                 unsigned nr, bool has_error, u32 error_code,
 599                 bool has_payload, unsigned long payload, bool reinject)
 600 {
 601         u32 prev_nr;
 602         int class1, class2;
 603
 604         kvm_make_request(KVM_REQ_EVENT, vcpu);
 605
 606         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 607         queue:
 608                 if (reinject) {
 609                         /*
 610                          * On vmentry, vcpu->arch.exception.pending is only
 611                          * true if an event injection was blocked by
 612                          * nested_run_pending.  In that case, however,
 613                          * vcpu_enter_guest requests an immediate exit,
 614                          * and the guest shouldn't proceed far enough to
 615                          * need reinjection.
 616                          */
 617                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 618                         vcpu->arch.exception.injected = true;
 619                         if (WARN_ON_ONCE(has_payload)) {
 620                                 /*
 621                                  * A reinjected event has already
 622                                  * delivered its payload.
 623                                  */
 624                                 has_payload = false;
 625                                 payload = 0;
 626                         }
 627                 } else {
 628                         vcpu->arch.exception.pending = true;
 629                         vcpu->arch.exception.injected = false;
 630                 }
 631                 vcpu->arch.exception.has_error_code = has_error;
 632                 vcpu->arch.exception.nr = nr;
 633                 vcpu->arch.exception.error_code = error_code;
 634                 vcpu->arch.exception.has_payload = has_payload;
 635                 vcpu->arch.exception.payload = payload;
 636                 if (!is_guest_mode(vcpu))
 637                         kvm_deliver_exception_payload(vcpu);
 638                 return;
 639         }
 640
 641         /* to check exception */
 642         prev_nr = vcpu->arch.exception.nr;
 643         if (prev_nr == DF_VECTOR) {
 644                 /* triple fault -> shutdown */
 645                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 646                 return;
 647         }
 648         class1 = exception_class(prev_nr);
 649         class2 = exception_class(nr);
 650         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 651                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 652                 /*
 653                  * Generate double fault per SDM Table 5-5.  Set
 654                  * exception.pending = true so that the double fault
 655                  * can trigger a nested vmexit.
 656                  */
 657                 vcpu->arch.exception.pending = true;
 658                 vcpu->arch.exception.injected = false;
 659                 vcpu->arch.exception.has_error_code = true;
 660                 vcpu->arch.exception.nr = DF_VECTOR;
 661                 vcpu->arch.exception.error_code = 0;
 662                 vcpu->arch.exception.has_payload = false;
 663                 vcpu->arch.exception.payload = 0;
 664         } else
 665                 /* replace previous exception with a new one in a hope
 666                    that instruction re-execution will regenerate lost
 667                    exception */
 668                 goto queue;
 669 }
 670
 671 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 672 {
 673         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 674 }
 675 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 676
 677 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 678 {
 679         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 682
 683 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 684                            unsigned long payload)
 685 {
 686         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 689
 690 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 691                                     u32 error_code, unsigned long payload)
 692 {
 693         kvm_multiple_exception(vcpu, nr, true, error_code,
 694                                true, payload, false);
 695 }
 696
 697 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 698 {
 699         if (err)
 700                 kvm_inject_gp(vcpu, 0);
 701         else
 702                 return kvm_skip_emulated_instruction(vcpu);
 703
 704         return 1;
 705 }
 706 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 707
 708 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 709 {
 710         ++vcpu->stat.pf_guest;
 711         vcpu->arch.exception.nested_apf =
 712                 is_guest_mode(vcpu) && fault->async_page_fault;
 713         if (vcpu->arch.exception.nested_apf) {
 714                 vcpu->arch.apf.nested_apf_token = fault->address;
 715                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 716         } else {
 717                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 718                                         fault->address);
 719         }
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 722
 723 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 724                                     struct x86_exception *fault)
 725 {
 726         struct kvm_mmu *fault_mmu;
 727         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 728
 729         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 730                                                vcpu->arch.walk_mmu;
 731
 732         /*
 733          * Invalidate the TLB entry for the faulting address, if it exists,
 734          * else the access will fault indefinitely (and to emulate hardware).
 735          */
 736         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 737             !(fault->error_code & PFERR_RSVD_MASK))
 738                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 739                                        fault_mmu->root_hpa);
 740
 741         fault_mmu->inject_page_fault(vcpu, fault);
 742         return fault->nested_page_fault;
 743 }
 744 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 745
 746 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 747 {
 748         atomic_inc(&vcpu->arch.nmi_queued);
 749         kvm_make_request(KVM_REQ_NMI, vcpu);
 750 }
 751 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 752
 753 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 754 {
 755         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 756 }
 757 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 758
 759 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 760 {
 761         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 762 }
 763 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 764
 765 /*
 766  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 767  * a #GP and return false.
 768  */
 769 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 770 {
 771         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 772                 return true;
 773         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 774         return false;
 775 }
 776 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 777
 778 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 779 {
 780         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 781                 return true;
 782
 783         kvm_queue_exception(vcpu, UD_VECTOR);
 784         return false;
 785 }
 786 EXPORT_SYMBOL_GPL(kvm_require_dr);
 787
 788 /*
 789  * This function will be used to read from the physical memory of the currently
 790  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 791  * can read from guest physical or from the guest's guest physical memory.
 792  */
 793 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 794                             gfn_t ngfn, void *data, int offset, int len,
 795                             u32 access)
 796 {
 797         struct x86_exception exception;
 798         gfn_t real_gfn;
 799         gpa_t ngpa;
 800
 801         ngpa     = gfn_to_gpa(ngfn);
 802         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 803         if (real_gfn == UNMAPPED_GVA)
 804                 return -EFAULT;
 805
 806         real_gfn = gpa_to_gfn(real_gfn);
 807
 808         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 809 }
 810 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 811
 812 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 813 {
 814         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 815 }
 816
 817 /*
 818  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 819  */
 820 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 821 {
 822         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 823         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 824         int i;
 825         int ret;
 826         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 827
 828         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 829                                       offset * sizeof(u64), sizeof(pdpte),
 830                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 831         if (ret < 0) {
 832                 ret = 0;
 833                 goto out;
 834         }
 835         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 836                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 837                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 838                         ret = 0;
 839                         goto out;
 840                 }
 841         }
 842         ret = 1;
 843
 844         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 845         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 846         vcpu->arch.pdptrs_from_userspace = false;
 847
 848 out:
 849
 850         return ret;
 851 }
 852 EXPORT_SYMBOL_GPL(load_pdptrs);
 853
 854 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 855 {
 856         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 857                 kvm_clear_async_pf_completion_queue(vcpu);
 858                 kvm_async_pf_hash_reset(vcpu);
 859         }
 860
 861         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 862                 kvm_mmu_reset_context(vcpu);
 863
 864         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 865             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 866             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 867                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 868 }
 869 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 870
 871 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 872 {
 873         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 874         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 875
 876         cr0 |= X86_CR0_ET;
 877
 878 #ifdef CONFIG_X86_64
 879         if (cr0 & 0xffffffff00000000UL)
 880                 return 1;
 881 #endif
 882
 883         cr0 &= ~CR0_RESERVED_BITS;
 884
 885         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 886                 return 1;
 887
 888         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 889                 return 1;
 890
 891 #ifdef CONFIG_X86_64
 892         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 893             (cr0 & X86_CR0_PG)) {
 894                 int cs_db, cs_l;
 895
 896                 if (!is_pae(vcpu))
 897                         return 1;
 898                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 899                 if (cs_l)
 900                         return 1;
 901         }
 902 #endif
 903         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 904             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 905             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 906                 return 1;
 907
 908         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 909                 return 1;
 910
 911         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 912
 913         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 914
 915         return 0;
 916 }
 917 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 918
 919 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 920 {
 921         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 922 }
 923 EXPORT_SYMBOL_GPL(kvm_lmsw);
 924
 925 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 926 {
 927         if (vcpu->arch.guest_state_protected)
 928                 return;
 929
 930         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 931
 932                 if (vcpu->arch.xcr0 != host_xcr0)
 933                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 934
 935                 if (vcpu->arch.xsaves_enabled &&
 936                     vcpu->arch.ia32_xss != host_xss)
 937                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 938         }
 939
 940         if (static_cpu_has(X86_FEATURE_PKU) &&
 941             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 942              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 943             vcpu->arch.pkru != vcpu->arch.host_pkru)
 944                 write_pkru(vcpu->arch.pkru);
 945 }
 946 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 947
 948 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 949 {
 950         if (vcpu->arch.guest_state_protected)
 951                 return;
 952
 953         if (static_cpu_has(X86_FEATURE_PKU) &&
 954             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 955              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 956                 vcpu->arch.pkru = rdpkru();
 957                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 958                         write_pkru(vcpu->arch.host_pkru);
 959         }
 960
 961         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 962
 963                 if (vcpu->arch.xcr0 != host_xcr0)
 964                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 965
 966                 if (vcpu->arch.xsaves_enabled &&
 967                     vcpu->arch.ia32_xss != host_xss)
 968                         wrmsrl(MSR_IA32_XSS, host_xss);
 969         }
 970
 971 }
 972 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 973
 974 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 975 {
 976         u64 xcr0 = xcr;
 977         u64 old_xcr0 = vcpu->arch.xcr0;
 978         u64 valid_bits;
 979
 980         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 981         if (index != XCR_XFEATURE_ENABLED_MASK)
 982                 return 1;
 983         if (!(xcr0 & XFEATURE_MASK_FP))
 984                 return 1;
 985         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 986                 return 1;
 987
 988         /*
 989          * Do not allow the guest to set bits that we do not support
 990          * saving.  However, xcr0 bit 0 is always set, even if the
 991          * emulated CPU does not support XSAVE (see fx_init).
 992          */
 993         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 994         if (xcr0 & ~valid_bits)
 995                 return 1;
 996
 997         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 998             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 999                 return 1;
1000
1001         if (xcr0 & XFEATURE_MASK_AVX512) {
1002                 if (!(xcr0 & XFEATURE_MASK_YMM))
1003                         return 1;
1004                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1005                         return 1;
1006         }
1007         vcpu->arch.xcr0 = xcr0;
1008
1009         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1010                 kvm_update_cpuid_runtime(vcpu);
1011         return 0;
1012 }
1013
1014 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1015 {
1016         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1017             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1018                 kvm_inject_gp(vcpu, 0);
1019                 return 1;
1020         }
1021
1022         return kvm_skip_emulated_instruction(vcpu);
1023 }
1024 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1025
1026 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1027 {
1028         if (cr4 & cr4_reserved_bits)
1029                 return false;
1030
1031         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1032                 return false;
1033
1034         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1035 }
1036 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1037
1038 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1039 {
1040         if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) ||
1041             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1042                 kvm_mmu_reset_context(vcpu);
1043 }
1044 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1045
1046 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1047 {
1048         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1049         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1050                                    X86_CR4_SMEP;
1051
1052         if (!kvm_is_valid_cr4(vcpu, cr4))
1053                 return 1;
1054
1055         if (is_long_mode(vcpu)) {
1056                 if (!(cr4 & X86_CR4_PAE))
1057                         return 1;
1058                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1059                         return 1;
1060         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1061                    && ((cr4 ^ old_cr4) & pdptr_bits)
1062                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1063                                    kvm_read_cr3(vcpu)))
1064                 return 1;
1065
1066         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1067                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1068                         return 1;
1069
1070                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1071                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1072                         return 1;
1073         }
1074
1075         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1076
1077         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1078
1079         return 0;
1080 }
1081 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1082
1083 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1084 {
1085         struct kvm_mmu *mmu = vcpu->arch.mmu;
1086         unsigned long roots_to_free = 0;
1087         int i;
1088
1089         /*
1090          * If neither the current CR3 nor any of the prev_roots use the given
1091          * PCID, then nothing needs to be done here because a resync will
1092          * happen anyway before switching to any other CR3.
1093          */
1094         if (kvm_get_active_pcid(vcpu) == pcid) {
1095                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1096                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1097         }
1098
1099         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1100                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1101                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1102
1103         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1104 }
1105
1106 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1107 {
1108         bool skip_tlb_flush = false;
1109         unsigned long pcid = 0;
1110 #ifdef CONFIG_X86_64
1111         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1112
1113         if (pcid_enabled) {
1114                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1115                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1116                 pcid = cr3 & X86_CR3_PCID_MASK;
1117         }
1118 #endif
1119
1120         /* PDPTRs are always reloaded for PAE paging. */
1121         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1122                 goto handle_tlb_flush;
1123
1124         /*
1125          * Do not condition the GPA check on long mode, this helper is used to
1126          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1127          * the current vCPU mode is accurate.
1128          */
1129         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1130                 return 1;
1131
1132         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1133                 return 1;
1134
1135         if (cr3 != kvm_read_cr3(vcpu))
1136                 kvm_mmu_new_pgd(vcpu, cr3);
1137
1138         vcpu->arch.cr3 = cr3;
1139         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1140
1141 handle_tlb_flush:
1142         /*
1143          * A load of CR3 that flushes the TLB flushes only the current PCID,
1144          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1145          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1146          * and it's impossible to use a non-zero PCID when PCID is disabled,
1147          * i.e. only PCID=0 can be relevant.
1148          */
1149         if (!skip_tlb_flush)
1150                 kvm_invalidate_pcid(vcpu, pcid);
1151
1152         return 0;
1153 }
1154 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1155
1156 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1157 {
1158         if (cr8 & CR8_RESERVED_BITS)
1159                 return 1;
1160         if (lapic_in_kernel(vcpu))
1161                 kvm_lapic_set_tpr(vcpu, cr8);
1162         else
1163                 vcpu->arch.cr8 = cr8;
1164         return 0;
1165 }
1166 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1167
1168 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1169 {
1170         if (lapic_in_kernel(vcpu))
1171                 return kvm_lapic_get_cr8(vcpu);
1172         else
1173                 return vcpu->arch.cr8;
1174 }
1175 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1176
1177 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1178 {
1179         int i;
1180
1181         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1182                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1183                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1184                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1185         }
1186 }
1187
1188 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1189 {
1190         unsigned long dr7;
1191
1192         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1193                 dr7 = vcpu->arch.guest_debug_dr7;
1194         else
1195                 dr7 = vcpu->arch.dr7;
1196         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1197         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1198         if (dr7 & DR7_BP_EN_MASK)
1199                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1200 }
1201 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1202
1203 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1204 {
1205         u64 fixed = DR6_FIXED_1;
1206
1207         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1208                 fixed |= DR6_RTM;
1209
1210         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1211                 fixed |= DR6_BUS_LOCK;
1212         return fixed;
1213 }
1214
1215 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1216 {
1217         size_t size = ARRAY_SIZE(vcpu->arch.db);
1218
1219         switch (dr) {
1220         case 0 ... 3:
1221                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1222                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1223                         vcpu->arch.eff_db[dr] = val;
1224                 break;
1225         case 4:
1226         case 6:
1227                 if (!kvm_dr6_valid(val))
1228                         return 1; /* #GP */
1229                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1230                 break;
1231         case 5:
1232         default: /* 7 */
1233                 if (!kvm_dr7_valid(val))
1234                         return 1; /* #GP */
1235                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1236                 kvm_update_dr7(vcpu);
1237                 break;
1238         }
1239
1240         return 0;
1241 }
1242 EXPORT_SYMBOL_GPL(kvm_set_dr);
1243
1244 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1245 {
1246         size_t size = ARRAY_SIZE(vcpu->arch.db);
1247
1248         switch (dr) {
1249         case 0 ... 3:
1250                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1251                 break;
1252         case 4:
1253         case 6:
1254                 *val = vcpu->arch.dr6;
1255                 break;
1256         case 5:
1257         default: /* 7 */
1258                 *val = vcpu->arch.dr7;
1259                 break;
1260         }
1261 }
1262 EXPORT_SYMBOL_GPL(kvm_get_dr);
1263
1264 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1265 {
1266         u32 ecx = kvm_rcx_read(vcpu);
1267         u64 data;
1268
1269         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1270                 kvm_inject_gp(vcpu, 0);
1271                 return 1;
1272         }
1273
1274         kvm_rax_write(vcpu, (u32)data);
1275         kvm_rdx_write(vcpu, data >> 32);
1276         return kvm_skip_emulated_instruction(vcpu);
1277 }
1278 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1279
1280 /*
1281  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1282  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1283  *
1284  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1285  * extract the supported MSRs from the related const lists.
1286  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1287  * capabilities of the host cpu. This capabilities test skips MSRs that are
1288  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1289  * may depend on host virtualization features rather than host cpu features.
1290  */
1291
1292 static const u32 msrs_to_save_all[] = {
1293         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1294         MSR_STAR,
1295 #ifdef CONFIG_X86_64
1296         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1297 #endif
1298         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1299         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1300         MSR_IA32_SPEC_CTRL,
1301         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1302         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1303         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1304         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1305         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1306         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1307         MSR_IA32_UMWAIT_CONTROL,
1308
1309         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1310         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1311         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1312         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1313         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1314         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1315         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1316         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1317         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1318         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1319         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1320         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1321         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1322         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1323         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1324         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1325         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1326         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1327         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1328         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1329         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1330         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1331 };
1332
1333 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1334 static unsigned num_msrs_to_save;
1335
1336 static const u32 emulated_msrs_all[] = {
1337         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1338         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1339         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1340         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1341         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1342         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1343         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1344         HV_X64_MSR_RESET,
1345         HV_X64_MSR_VP_INDEX,
1346         HV_X64_MSR_VP_RUNTIME,
1347         HV_X64_MSR_SCONTROL,
1348         HV_X64_MSR_STIMER0_CONFIG,
1349         HV_X64_MSR_VP_ASSIST_PAGE,
1350         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1351         HV_X64_MSR_TSC_EMULATION_STATUS,
1352         HV_X64_MSR_SYNDBG_OPTIONS,
1353         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1354         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1355         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1356
1357         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1358         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1359
1360         MSR_IA32_TSC_ADJUST,
1361         MSR_IA32_TSC_DEADLINE,
1362         MSR_IA32_ARCH_CAPABILITIES,
1363         MSR_IA32_PERF_CAPABILITIES,
1364         MSR_IA32_MISC_ENABLE,
1365         MSR_IA32_MCG_STATUS,
1366         MSR_IA32_MCG_CTL,
1367         MSR_IA32_MCG_EXT_CTL,
1368         MSR_IA32_SMBASE,
1369         MSR_SMI_COUNT,
1370         MSR_PLATFORM_INFO,
1371         MSR_MISC_FEATURES_ENABLES,
1372         MSR_AMD64_VIRT_SPEC_CTRL,
1373         MSR_IA32_POWER_CTL,
1374         MSR_IA32_UCODE_REV,
1375
1376         /*
1377          * The following list leaves out MSRs whose values are determined
1378          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1379          * We always support the "true" VMX control MSRs, even if the host
1380          * processor does not, so I am putting these registers here rather
1381          * than in msrs_to_save_all.
1382          */
1383         MSR_IA32_VMX_BASIC,
1384         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1385         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1386         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1387         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1388         MSR_IA32_VMX_MISC,
1389         MSR_IA32_VMX_CR0_FIXED0,
1390         MSR_IA32_VMX_CR4_FIXED0,
1391         MSR_IA32_VMX_VMCS_ENUM,
1392         MSR_IA32_VMX_PROCBASED_CTLS2,
1393         MSR_IA32_VMX_EPT_VPID_CAP,
1394         MSR_IA32_VMX_VMFUNC,
1395
1396         MSR_K7_HWCR,
1397         MSR_KVM_POLL_CONTROL,
1398 };
1399
1400 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1401 static unsigned num_emulated_msrs;
1402
1403 /*
1404  * List of msr numbers which are used to expose MSR-based features that
1405  * can be used by a hypervisor to validate requested CPU features.
1406  */
1407 static const u32 msr_based_features_all[] = {
1408         MSR_IA32_VMX_BASIC,
1409         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1410         MSR_IA32_VMX_PINBASED_CTLS,
1411         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1412         MSR_IA32_VMX_PROCBASED_CTLS,
1413         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1414         MSR_IA32_VMX_EXIT_CTLS,
1415         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1416         MSR_IA32_VMX_ENTRY_CTLS,
1417         MSR_IA32_VMX_MISC,
1418         MSR_IA32_VMX_CR0_FIXED0,
1419         MSR_IA32_VMX_CR0_FIXED1,
1420         MSR_IA32_VMX_CR4_FIXED0,
1421         MSR_IA32_VMX_CR4_FIXED1,
1422         MSR_IA32_VMX_VMCS_ENUM,
1423         MSR_IA32_VMX_PROCBASED_CTLS2,
1424         MSR_IA32_VMX_EPT_VPID_CAP,
1425         MSR_IA32_VMX_VMFUNC,
1426
1427         MSR_F10H_DECFG,
1428         MSR_IA32_UCODE_REV,
1429         MSR_IA32_ARCH_CAPABILITIES,
1430         MSR_IA32_PERF_CAPABILITIES,
1431 };
1432
1433 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1434 static unsigned int num_msr_based_features;
1435
1436 static u64 kvm_get_arch_capabilities(void)
1437 {
1438         u64 data = 0;
1439
1440         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1441                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1442
1443         /*
1444          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1445          * the nested hypervisor runs with NX huge pages.  If it is not,
1446          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1447          * L1 guests, so it need not worry about its own (L2) guests.
1448          */
1449         data |= ARCH_CAP_PSCHANGE_MC_NO;
1450
1451         /*
1452          * If we're doing cache flushes (either "always" or "cond")
1453          * we will do one whenever the guest does a vmlaunch/vmresume.
1454          * If an outer hypervisor is doing the cache flush for us
1455          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1456          * capability to the guest too, and if EPT is disabled we're not
1457          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1458          * require a nested hypervisor to do a flush of its own.
1459          */
1460         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1461                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1462
1463         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1464                 data |= ARCH_CAP_RDCL_NO;
1465         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1466                 data |= ARCH_CAP_SSB_NO;
1467         if (!boot_cpu_has_bug(X86_BUG_MDS))
1468                 data |= ARCH_CAP_MDS_NO;
1469
1470         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1471                 /*
1472                  * If RTM=0 because the kernel has disabled TSX, the host might
1473                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1474                  * and therefore knows that there cannot be TAA) but keep
1475                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1476                  * and we want to allow migrating those guests to tsx=off hosts.
1477                  */
1478                 data &= ~ARCH_CAP_TAA_NO;
1479         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1480                 data |= ARCH_CAP_TAA_NO;
1481         } else {
1482                 /*
1483                  * Nothing to do here; we emulate TSX_CTRL if present on the
1484                  * host so the guest can choose between disabling TSX or
1485                  * using VERW to clear CPU buffers.
1486                  */
1487         }
1488
1489         return data;
1490 }
1491
1492 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1493 {
1494         switch (msr->index) {
1495         case MSR_IA32_ARCH_CAPABILITIES:
1496                 msr->data = kvm_get_arch_capabilities();
1497                 break;
1498         case MSR_IA32_UCODE_REV:
1499                 rdmsrl_safe(msr->index, &msr->data);
1500                 break;
1501         default:
1502                 return static_call(kvm_x86_get_msr_feature)(msr);
1503         }
1504         return 0;
1505 }
1506
1507 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1508 {
1509         struct kvm_msr_entry msr;
1510         int r;
1511
1512         msr.index = index;
1513         r = kvm_get_msr_feature(&msr);
1514
1515         if (r == KVM_MSR_RET_INVALID) {
1516                 /* Unconditionally clear the output for simplicity */
1517                 *data = 0;
1518                 if (kvm_msr_ignored_check(index, 0, false))
1519                         r = 0;
1520         }
1521
1522         if (r)
1523                 return r;
1524
1525         *data = msr.data;
1526
1527         return 0;
1528 }
1529
1530 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1531 {
1532         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1533                 return false;
1534
1535         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1536                 return false;
1537
1538         if (efer & (EFER_LME | EFER_LMA) &&
1539             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1540                 return false;
1541
1542         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1543                 return false;
1544
1545         return true;
1546
1547 }
1548 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1549 {
1550         if (efer & efer_reserved_bits)
1551                 return false;
1552
1553         return __kvm_valid_efer(vcpu, efer);
1554 }
1555 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1556
1557 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1558 {
1559         u64 old_efer = vcpu->arch.efer;
1560         u64 efer = msr_info->data;
1561         int r;
1562
1563         if (efer & efer_reserved_bits)
1564                 return 1;
1565
1566         if (!msr_info->host_initiated) {
1567                 if (!__kvm_valid_efer(vcpu, efer))
1568                         return 1;
1569
1570                 if (is_paging(vcpu) &&
1571                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1572                         return 1;
1573         }
1574
1575         efer &= ~EFER_LMA;
1576         efer |= vcpu->arch.efer & EFER_LMA;
1577
1578         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1579         if (r) {
1580                 WARN_ON(r > 0);
1581                 return r;
1582         }
1583
1584         /* Update reserved bits */
1585         if ((efer ^ old_efer) & EFER_NX)
1586                 kvm_mmu_reset_context(vcpu);
1587
1588         return 0;
1589 }
1590
1591 void kvm_enable_efer_bits(u64 mask)
1592 {
1593        efer_reserved_bits &= ~mask;
1594 }
1595 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1596
1597 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1598 {
1599         struct kvm_x86_msr_filter *msr_filter;
1600         struct msr_bitmap_range *ranges;
1601         struct kvm *kvm = vcpu->kvm;
1602         bool allowed;
1603         int idx;
1604         u32 i;
1605
1606         /* x2APIC MSRs do not support filtering. */
1607         if (index >= 0x800 && index <= 0x8ff)
1608                 return true;
1609
1610         idx = srcu_read_lock(&kvm->srcu);
1611
1612         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1613         if (!msr_filter) {
1614                 allowed = true;
1615                 goto out;
1616         }
1617
1618         allowed = msr_filter->default_allow;
1619         ranges = msr_filter->ranges;
1620
1621         for (i = 0; i < msr_filter->count; i++) {
1622                 u32 start = ranges[i].base;
1623                 u32 end = start + ranges[i].nmsrs;
1624                 u32 flags = ranges[i].flags;
1625                 unsigned long *bitmap = ranges[i].bitmap;
1626
1627                 if ((index >= start) && (index < end) && (flags & type)) {
1628                         allowed = !!test_bit(index - start, bitmap);
1629                         break;
1630                 }
1631         }
1632
1633 out:
1634         srcu_read_unlock(&kvm->srcu, idx);
1635
1636         return allowed;
1637 }
1638 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1639
1640 /*
1641  * Write @data into the MSR specified by @index.  Select MSR specific fault
1642  * checks are bypassed if @host_initiated is %true.
1643  * Returns 0 on success, non-0 otherwise.
1644  * Assumes vcpu_load() was already called.
1645  */
1646 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1647                          bool host_initiated)
1648 {
1649         struct msr_data msr;
1650
1651         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1652                 return KVM_MSR_RET_FILTERED;
1653
1654         switch (index) {
1655         case MSR_FS_BASE:
1656         case MSR_GS_BASE:
1657         case MSR_KERNEL_GS_BASE:
1658         case MSR_CSTAR:
1659         case MSR_LSTAR:
1660                 if (is_noncanonical_address(data, vcpu))
1661                         return 1;
1662                 break;
1663         case MSR_IA32_SYSENTER_EIP:
1664         case MSR_IA32_SYSENTER_ESP:
1665                 /*
1666                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1667                  * non-canonical address is written on Intel but not on
1668                  * AMD (which ignores the top 32-bits, because it does
1669                  * not implement 64-bit SYSENTER).
1670                  *
1671                  * 64-bit code should hence be able to write a non-canonical
1672                  * value on AMD.  Making the address canonical ensures that
1673                  * vmentry does not fail on Intel after writing a non-canonical
1674                  * value, and that something deterministic happens if the guest
1675                  * invokes 64-bit SYSENTER.
1676                  */
1677                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1678                 break;
1679         case MSR_TSC_AUX:
1680                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1681                         return 1;
1682
1683                 if (!host_initiated &&
1684                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1685                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1686                         return 1;
1687
1688                 /*
1689                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1690                  * incomplete and conflicting architectural behavior.  Current
1691                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1692                  * reserved and always read as zeros.  Enforce Intel's reserved
1693                  * bits check if and only if the guest CPU is Intel, and clear
1694                  * the bits in all other cases.  This ensures cross-vendor
1695                  * migration will provide consistent behavior for the guest.
1696                  */
1697                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1698                         return 1;
1699
1700                 data = (u32)data;
1701                 break;
1702         }
1703
1704         msr.data = data;
1705         msr.index = index;
1706         msr.host_initiated = host_initiated;
1707
1708         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1709 }
1710
1711 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1712                                      u32 index, u64 data, bool host_initiated)
1713 {
1714         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1715
1716         if (ret == KVM_MSR_RET_INVALID)
1717                 if (kvm_msr_ignored_check(index, data, true))
1718                         ret = 0;
1719
1720         return ret;
1721 }
1722
1723 /*
1724  * Read the MSR specified by @index into @data.  Select MSR specific fault
1725  * checks are bypassed if @host_initiated is %true.
1726  * Returns 0 on success, non-0 otherwise.
1727  * Assumes vcpu_load() was already called.
1728  */
1729 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1730                   bool host_initiated)
1731 {
1732         struct msr_data msr;
1733         int ret;
1734
1735         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1736                 return KVM_MSR_RET_FILTERED;
1737
1738         switch (index) {
1739         case MSR_TSC_AUX:
1740                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1741                         return 1;
1742
1743                 if (!host_initiated &&
1744                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1745                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1746                         return 1;
1747                 break;
1748         }
1749
1750         msr.index = index;
1751         msr.host_initiated = host_initiated;
1752
1753         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1754         if (!ret)
1755                 *data = msr.data;
1756         return ret;
1757 }
1758
1759 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1760                                      u32 index, u64 *data, bool host_initiated)
1761 {
1762         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1763
1764         if (ret == KVM_MSR_RET_INVALID) {
1765                 /* Unconditionally clear *data for simplicity */
1766                 *data = 0;
1767                 if (kvm_msr_ignored_check(index, 0, false))
1768                         ret = 0;
1769         }
1770
1771         return ret;
1772 }
1773
1774 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1775 {
1776         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1777 }
1778 EXPORT_SYMBOL_GPL(kvm_get_msr);
1779
1780 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1781 {
1782         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1783 }
1784 EXPORT_SYMBOL_GPL(kvm_set_msr);
1785
1786 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1787 {
1788         int err = vcpu->run->msr.error;
1789         if (!err) {
1790                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1791                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1792         }
1793
1794         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1795 }
1796
1797 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1798 {
1799         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1800 }
1801
1802 static u64 kvm_msr_reason(int r)
1803 {
1804         switch (r) {
1805         case KVM_MSR_RET_INVALID:
1806                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1807         case KVM_MSR_RET_FILTERED:
1808                 return KVM_MSR_EXIT_REASON_FILTER;
1809         default:
1810                 return KVM_MSR_EXIT_REASON_INVAL;
1811         }
1812 }
1813
1814 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1815                               u32 exit_reason, u64 data,
1816                               int (*completion)(struct kvm_vcpu *vcpu),
1817                               int r)
1818 {
1819         u64 msr_reason = kvm_msr_reason(r);
1820
1821         /* Check if the user wanted to know about this MSR fault */
1822         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1823                 return 0;
1824
1825         vcpu->run->exit_reason = exit_reason;
1826         vcpu->run->msr.error = 0;
1827         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1828         vcpu->run->msr.reason = msr_reason;
1829         vcpu->run->msr.index = index;
1830         vcpu->run->msr.data = data;
1831         vcpu->arch.complete_userspace_io = completion;
1832
1833         return 1;
1834 }
1835
1836 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1837 {
1838         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1839                                    complete_emulated_rdmsr, r);
1840 }
1841
1842 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1843 {
1844         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1845                                    complete_emulated_wrmsr, r);
1846 }
1847
1848 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1849 {
1850         u32 ecx = kvm_rcx_read(vcpu);
1851         u64 data;
1852         int r;
1853
1854         r = kvm_get_msr(vcpu, ecx, &data);
1855
1856         /* MSR read failed? See if we should ask user space */
1857         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1858                 /* Bounce to user space */
1859                 return 0;
1860         }
1861
1862         if (!r) {
1863                 trace_kvm_msr_read(ecx, data);
1864
1865                 kvm_rax_write(vcpu, data & -1u);
1866                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1867         } else {
1868                 trace_kvm_msr_read_ex(ecx);
1869         }
1870
1871         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1872 }
1873 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1874
1875 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1876 {
1877         u32 ecx = kvm_rcx_read(vcpu);
1878         u64 data = kvm_read_edx_eax(vcpu);
1879         int r;
1880
1881         r = kvm_set_msr(vcpu, ecx, data);
1882
1883         /* MSR write failed? See if we should ask user space */
1884         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1885                 /* Bounce to user space */
1886                 return 0;
1887
1888         /* Signal all other negative errors to userspace */
1889         if (r < 0)
1890                 return r;
1891
1892         if (!r)
1893                 trace_kvm_msr_write(ecx, data);
1894         else
1895                 trace_kvm_msr_write_ex(ecx, data);
1896
1897         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1898 }
1899 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1900
1901 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1902 {
1903         return kvm_skip_emulated_instruction(vcpu);
1904 }
1905 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1906
1907 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1908 {
1909         /* Treat an INVD instruction as a NOP and just skip it. */
1910         return kvm_emulate_as_nop(vcpu);
1911 }
1912 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1913
1914 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1915 {
1916         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1917         return kvm_emulate_as_nop(vcpu);
1918 }
1919 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1920
1921 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1922 {
1923         kvm_queue_exception(vcpu, UD_VECTOR);
1924         return 1;
1925 }
1926 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1927
1928 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1929 {
1930         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1931         return kvm_emulate_as_nop(vcpu);
1932 }
1933 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1934
1935 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1936 {
1937         xfer_to_guest_mode_prepare();
1938         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1939                 xfer_to_guest_mode_work_pending();
1940 }
1941
1942 /*
1943  * The fast path for frequent and performance sensitive wrmsr emulation,
1944  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1945  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1946  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1947  * other cases which must be called after interrupts are enabled on the host.
1948  */
1949 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1950 {
1951         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1952                 return 1;
1953
1954         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1955                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1956                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1957                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1958
1959                 data &= ~(1 << 12);
1960                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1961                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1962                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1963                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1964                 return 0;
1965         }
1966
1967         return 1;
1968 }
1969
1970 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1971 {
1972         if (!kvm_can_use_hv_timer(vcpu))
1973                 return 1;
1974
1975         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1976         return 0;
1977 }
1978
1979 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1980 {
1981         u32 msr = kvm_rcx_read(vcpu);
1982         u64 data;
1983         fastpath_t ret = EXIT_FASTPATH_NONE;
1984
1985         switch (msr) {
1986         case APIC_BASE_MSR + (APIC_ICR >> 4):
1987                 data = kvm_read_edx_eax(vcpu);
1988                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1989                         kvm_skip_emulated_instruction(vcpu);
1990                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1991                 }
1992                 break;
1993         case MSR_IA32_TSC_DEADLINE:
1994                 data = kvm_read_edx_eax(vcpu);
1995                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1996                         kvm_skip_emulated_instruction(vcpu);
1997                         ret = EXIT_FASTPATH_REENTER_GUEST;
1998                 }
1999                 break;
2000         default:
2001                 break;
2002         }
2003
2004         if (ret != EXIT_FASTPATH_NONE)
2005                 trace_kvm_msr_write(msr, data);
2006
2007         return ret;
2008 }
2009 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2010
2011 /*
2012  * Adapt set_msr() to msr_io()'s calling convention
2013  */
2014 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2015 {
2016         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2017 }
2018
2019 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2020 {
2021         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2022 }
2023
2024 #ifdef CONFIG_X86_64
2025 struct pvclock_clock {
2026         int vclock_mode;
2027         u64 cycle_last;
2028         u64 mask;
2029         u32 mult;
2030         u32 shift;
2031         u64 base_cycles;
2032         u64 offset;
2033 };
2034
2035 struct pvclock_gtod_data {
2036         seqcount_t      seq;
2037
2038         struct pvclock_clock clock; /* extract of a clocksource struct */
2039         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2040
2041         ktime_t         offs_boot;
2042         u64             wall_time_sec;
2043 };
2044
2045 static struct pvclock_gtod_data pvclock_gtod_data;
2046
2047 static void update_pvclock_gtod(struct timekeeper *tk)
2048 {
2049         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2050
2051         write_seqcount_begin(&vdata->seq);
2052
2053         /* copy pvclock gtod data */
2054         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2055         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2056         vdata->clock.mask               = tk->tkr_mono.mask;
2057         vdata->clock.mult               = tk->tkr_mono.mult;
2058         vdata->clock.shift              = tk->tkr_mono.shift;
2059         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2060         vdata->clock.offset             = tk->tkr_mono.base;
2061
2062         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2063         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2064         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2065         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2066         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2067         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2068         vdata->raw_clock.offset         = tk->tkr_raw.base;
2069
2070         vdata->wall_time_sec            = tk->xtime_sec;
2071
2072         vdata->offs_boot                = tk->offs_boot;
2073
2074         write_seqcount_end(&vdata->seq);
2075 }
2076
2077 static s64 get_kvmclock_base_ns(void)
2078 {
2079         /* Count up from boot time, but with the frequency of the raw clock.  */
2080         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2081 }
2082 #else
2083 static s64 get_kvmclock_base_ns(void)
2084 {
2085         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2086         return ktime_get_boottime_ns();
2087 }
2088 #endif
2089
2090 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2091 {
2092         int version;
2093         int r;
2094         struct pvclock_wall_clock wc;
2095         u32 wc_sec_hi;
2096         u64 wall_nsec;
2097
2098         if (!wall_clock)
2099                 return;
2100
2101         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2102         if (r)
2103                 return;
2104
2105         if (version & 1)
2106                 ++version;  /* first time write, random junk */
2107
2108         ++version;
2109
2110         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2111                 return;
2112
2113         /*
2114          * The guest calculates current wall clock time by adding
2115          * system time (updated by kvm_guest_time_update below) to the
2116          * wall clock specified here.  We do the reverse here.
2117          */
2118         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2119
2120         wc.nsec = do_div(wall_nsec, 1000000000);
2121         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2122         wc.version = version;
2123
2124         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2125
2126         if (sec_hi_ofs) {
2127                 wc_sec_hi = wall_nsec >> 32;
2128                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2129                                 &wc_sec_hi, sizeof(wc_sec_hi));
2130         }
2131
2132         version++;
2133         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2134 }
2135
2136 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2137                                   bool old_msr, bool host_initiated)
2138 {
2139         struct kvm_arch *ka = &vcpu->kvm->arch;
2140
2141         if (vcpu->vcpu_id == 0 && !host_initiated) {
2142                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2143                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2144
2145                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2146         }
2147
2148         vcpu->arch.time = system_time;
2149         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2150
2151         /* we verify if the enable bit is set... */
2152         vcpu->arch.pv_time_enabled = false;
2153         if (!(system_time & 1))
2154                 return;
2155
2156         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2157                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2158                                        sizeof(struct pvclock_vcpu_time_info)))
2159                 vcpu->arch.pv_time_enabled = true;
2160
2161         return;
2162 }
2163
2164 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2165 {
2166         do_shl32_div32(dividend, divisor);
2167         return dividend;
2168 }
2169
2170 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2171                                s8 *pshift, u32 *pmultiplier)
2172 {
2173         uint64_t scaled64;
2174         int32_t  shift = 0;
2175         uint64_t tps64;
2176         uint32_t tps32;
2177
2178         tps64 = base_hz;
2179         scaled64 = scaled_hz;
2180         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2181                 tps64 >>= 1;
2182                 shift--;
2183         }
2184
2185         tps32 = (uint32_t)tps64;
2186         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2187                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2188                         scaled64 >>= 1;
2189                 else
2190                         tps32 <<= 1;
2191                 shift++;
2192         }
2193
2194         *pshift = shift;
2195         *pmultiplier = div_frac(scaled64, tps32);
2196 }
2197
2198 #ifdef CONFIG_X86_64
2199 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2200 #endif
2201
2202 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2203 static unsigned long max_tsc_khz;
2204
2205 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2206 {
2207         u64 v = (u64)khz * (1000000 + ppm);
2208         do_div(v, 1000000);
2209         return v;
2210 }
2211
2212 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2213
2214 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2215 {
2216         u64 ratio;
2217
2218         /* Guest TSC same frequency as host TSC? */
2219         if (!scale) {
2220                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2221                 return 0;
2222         }
2223
2224         /* TSC scaling supported? */
2225         if (!kvm_has_tsc_control) {
2226                 if (user_tsc_khz > tsc_khz) {
2227                         vcpu->arch.tsc_catchup = 1;
2228                         vcpu->arch.tsc_always_catchup = 1;
2229                         return 0;
2230                 } else {
2231                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2232                         return -1;
2233                 }
2234         }
2235
2236         /* TSC scaling required  - calculate ratio */
2237         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2238                                 user_tsc_khz, tsc_khz);
2239
2240         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2241                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2242                                     user_tsc_khz);
2243                 return -1;
2244         }
2245
2246         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2247         return 0;
2248 }
2249
2250 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2251 {
2252         u32 thresh_lo, thresh_hi;
2253         int use_scaling = 0;
2254
2255         /* tsc_khz can be zero if TSC calibration fails */
2256         if (user_tsc_khz == 0) {
2257                 /* set tsc_scaling_ratio to a safe value */
2258                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2259                 return -1;
2260         }
2261
2262         /* Compute a scale to convert nanoseconds in TSC cycles */
2263         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2264                            &vcpu->arch.virtual_tsc_shift,
2265                            &vcpu->arch.virtual_tsc_mult);
2266         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2267
2268         /*
2269          * Compute the variation in TSC rate which is acceptable
2270          * within the range of tolerance and decide if the
2271          * rate being applied is within that bounds of the hardware
2272          * rate.  If so, no scaling or compensation need be done.
2273          */
2274         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2275         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2276         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2277                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2278                 use_scaling = 1;
2279         }
2280         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2281 }
2282
2283 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2284 {
2285         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2286                                       vcpu->arch.virtual_tsc_mult,
2287                                       vcpu->arch.virtual_tsc_shift);
2288         tsc += vcpu->arch.this_tsc_write;
2289         return tsc;
2290 }
2291
2292 static inline int gtod_is_based_on_tsc(int mode)
2293 {
2294         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2295 }
2296
2297 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2298 {
2299 #ifdef CONFIG_X86_64
2300         bool vcpus_matched;
2301         struct kvm_arch *ka = &vcpu->kvm->arch;
2302         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2303
2304         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2305                          atomic_read(&vcpu->kvm->online_vcpus));
2306
2307         /*
2308          * Once the masterclock is enabled, always perform request in
2309          * order to update it.
2310          *
2311          * In order to enable masterclock, the host clocksource must be TSC
2312          * and the vcpus need to have matched TSCs.  When that happens,
2313          * perform request to enable masterclock.
2314          */
2315         if (ka->use_master_clock ||
2316             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2317                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2318
2319         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2320                             atomic_read(&vcpu->kvm->online_vcpus),
2321                             ka->use_master_clock, gtod->clock.vclock_mode);
2322 #endif
2323 }
2324
2325 /*
2326  * Multiply tsc by a fixed point number represented by ratio.
2327  *
2328  * The most significant 64-N bits (mult) of ratio represent the
2329  * integral part of the fixed point number; the remaining N bits
2330  * (frac) represent the fractional part, ie. ratio represents a fixed
2331  * point number (mult + frac * 2^(-N)).
2332  *
2333  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2334  */
2335 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2336 {
2337         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2338 }
2339
2340 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2341 {
2342         u64 _tsc = tsc;
2343
2344         if (ratio != kvm_default_tsc_scaling_ratio)
2345                 _tsc = __scale_tsc(ratio, tsc);
2346
2347         return _tsc;
2348 }
2349 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2350
2351 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2352 {
2353         u64 tsc;
2354
2355         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2356
2357         return target_tsc - tsc;
2358 }
2359
2360 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2361 {
2362         return vcpu->arch.l1_tsc_offset +
2363                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2364 }
2365 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2366
2367 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2368 {
2369         u64 nested_offset;
2370
2371         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2372                 nested_offset = l1_offset;
2373         else
2374                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2375                                                 kvm_tsc_scaling_ratio_frac_bits);
2376
2377         nested_offset += l2_offset;
2378         return nested_offset;
2379 }
2380 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2381
2382 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2383 {
2384         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2385                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2386                                        kvm_tsc_scaling_ratio_frac_bits);
2387
2388         return l1_multiplier;
2389 }
2390 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2391
2392 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2393 {
2394         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2395                                    vcpu->arch.l1_tsc_offset,
2396                                    l1_offset);
2397
2398         vcpu->arch.l1_tsc_offset = l1_offset;
2399
2400         /*
2401          * If we are here because L1 chose not to trap WRMSR to TSC then
2402          * according to the spec this should set L1's TSC (as opposed to
2403          * setting L1's offset for L2).
2404          */
2405         if (is_guest_mode(vcpu))
2406                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2407                         l1_offset,
2408                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2409                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2410         else
2411                 vcpu->arch.tsc_offset = l1_offset;
2412
2413         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2414 }
2415
2416 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2417 {
2418         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2419
2420         /* Userspace is changing the multiplier while L2 is active */
2421         if (is_guest_mode(vcpu))
2422                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2423                         l1_multiplier,
2424                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2425         else
2426                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2427
2428         if (kvm_has_tsc_control)
2429                 static_call(kvm_x86_write_tsc_multiplier)(
2430                         vcpu, vcpu->arch.tsc_scaling_ratio);
2431 }
2432
2433 static inline bool kvm_check_tsc_unstable(void)
2434 {
2435 #ifdef CONFIG_X86_64
2436         /*
2437          * TSC is marked unstable when we're running on Hyper-V,
2438          * 'TSC page' clocksource is good.
2439          */
2440         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2441                 return false;
2442 #endif
2443         return check_tsc_unstable();
2444 }
2445
2446 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2447 {
2448         struct kvm *kvm = vcpu->kvm;
2449         u64 offset, ns, elapsed;
2450         unsigned long flags;
2451         bool matched;
2452         bool already_matched;
2453         bool synchronizing = false;
2454
2455         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2456         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2457         ns = get_kvmclock_base_ns();
2458         elapsed = ns - kvm->arch.last_tsc_nsec;
2459
2460         if (vcpu->arch.virtual_tsc_khz) {
2461                 if (data == 0) {
2462                         /*
2463                          * detection of vcpu initialization -- need to sync
2464                          * with other vCPUs. This particularly helps to keep
2465                          * kvm_clock stable after CPU hotplug
2466                          */
2467                         synchronizing = true;
2468                 } else {
2469                         u64 tsc_exp = kvm->arch.last_tsc_write +
2470                                                 nsec_to_cycles(vcpu, elapsed);
2471                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2472                         /*
2473                          * Special case: TSC write with a small delta (1 second)
2474                          * of virtual cycle time against real time is
2475                          * interpreted as an attempt to synchronize the CPU.
2476                          */
2477                         synchronizing = data < tsc_exp + tsc_hz &&
2478                                         data + tsc_hz > tsc_exp;
2479                 }
2480         }
2481
2482         /*
2483          * For a reliable TSC, we can match TSC offsets, and for an unstable
2484          * TSC, we add elapsed time in this computation.  We could let the
2485          * compensation code attempt to catch up if we fall behind, but
2486          * it's better to try to match offsets from the beginning.
2487          */
2488         if (synchronizing &&
2489             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2490                 if (!kvm_check_tsc_unstable()) {
2491                         offset = kvm->arch.cur_tsc_offset;
2492                 } else {
2493                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2494                         data += delta;
2495                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2496                 }
2497                 matched = true;
2498                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2499         } else {
2500                 /*
2501                  * We split periods of matched TSC writes into generations.
2502                  * For each generation, we track the original measured
2503                  * nanosecond time, offset, and write, so if TSCs are in
2504                  * sync, we can match exact offset, and if not, we can match
2505                  * exact software computation in compute_guest_tsc()
2506                  *
2507                  * These values are tracked in kvm->arch.cur_xxx variables.
2508                  */
2509                 kvm->arch.cur_tsc_generation++;
2510                 kvm->arch.cur_tsc_nsec = ns;
2511                 kvm->arch.cur_tsc_write = data;
2512                 kvm->arch.cur_tsc_offset = offset;
2513                 matched = false;
2514         }
2515
2516         /*
2517          * We also track th most recent recorded KHZ, write and time to
2518          * allow the matching interval to be extended at each write.
2519          */
2520         kvm->arch.last_tsc_nsec = ns;
2521         kvm->arch.last_tsc_write = data;
2522         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2523
2524         vcpu->arch.last_guest_tsc = data;
2525
2526         /* Keep track of which generation this VCPU has synchronized to */
2527         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2528         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2529         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2530
2531         kvm_vcpu_write_tsc_offset(vcpu, offset);
2532         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2533
2534         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2535         if (!matched) {
2536                 kvm->arch.nr_vcpus_matched_tsc = 0;
2537         } else if (!already_matched) {
2538                 kvm->arch.nr_vcpus_matched_tsc++;
2539         }
2540
2541         kvm_track_tsc_matching(vcpu);
2542         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2543 }
2544
2545 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2546                                            s64 adjustment)
2547 {
2548         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2549         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2550 }
2551
2552 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2553 {
2554         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2555                 WARN_ON(adjustment < 0);
2556         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2557                                    vcpu->arch.l1_tsc_scaling_ratio);
2558         adjust_tsc_offset_guest(vcpu, adjustment);
2559 }
2560
2561 #ifdef CONFIG_X86_64
2562
2563 static u64 read_tsc(void)
2564 {
2565         u64 ret = (u64)rdtsc_ordered();
2566         u64 last = pvclock_gtod_data.clock.cycle_last;
2567
2568         if (likely(ret >= last))
2569                 return ret;
2570
2571         /*
2572          * GCC likes to generate cmov here, but this branch is extremely
2573          * predictable (it's just a function of time and the likely is
2574          * very likely) and there's a data dependence, so force GCC
2575          * to generate a branch instead.  I don't barrier() because
2576          * we don't actually need a barrier, and if this function
2577          * ever gets inlined it will generate worse code.
2578          */
2579         asm volatile ("");
2580         return last;
2581 }
2582
2583 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2584                           int *mode)
2585 {
2586         long v;
2587         u64 tsc_pg_val;
2588
2589         switch (clock->vclock_mode) {
2590         case VDSO_CLOCKMODE_HVCLOCK:
2591                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2592                                                   tsc_timestamp);
2593                 if (tsc_pg_val != U64_MAX) {
2594                         /* TSC page valid */
2595                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2596                         v = (tsc_pg_val - clock->cycle_last) &
2597                                 clock->mask;
2598                 } else {
2599                         /* TSC page invalid */
2600                         *mode = VDSO_CLOCKMODE_NONE;
2601                 }
2602                 break;
2603         case VDSO_CLOCKMODE_TSC:
2604                 *mode = VDSO_CLOCKMODE_TSC;
2605                 *tsc_timestamp = read_tsc();
2606                 v = (*tsc_timestamp - clock->cycle_last) &
2607                         clock->mask;
2608                 break;
2609         default:
2610                 *mode = VDSO_CLOCKMODE_NONE;
2611         }
2612
2613         if (*mode == VDSO_CLOCKMODE_NONE)
2614                 *tsc_timestamp = v = 0;
2615
2616         return v * clock->mult;
2617 }
2618
2619 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2620 {
2621         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2622         unsigned long seq;
2623         int mode;
2624         u64 ns;
2625
2626         do {
2627                 seq = read_seqcount_begin(&gtod->seq);
2628                 ns = gtod->raw_clock.base_cycles;
2629                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2630                 ns >>= gtod->raw_clock.shift;
2631                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2632         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2633         *t = ns;
2634
2635         return mode;
2636 }
2637
2638 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2639 {
2640         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2641         unsigned long seq;
2642         int mode;
2643         u64 ns;
2644
2645         do {
2646                 seq = read_seqcount_begin(&gtod->seq);
2647                 ts->tv_sec = gtod->wall_time_sec;
2648                 ns = gtod->clock.base_cycles;
2649                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2650                 ns >>= gtod->clock.shift;
2651         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2652
2653         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2654         ts->tv_nsec = ns;
2655
2656         return mode;
2657 }
2658
2659 /* returns true if host is using TSC based clocksource */
2660 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2661 {
2662         /* checked again under seqlock below */
2663         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2664                 return false;
2665
2666         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2667                                                       tsc_timestamp));
2668 }
2669
2670 /* returns true if host is using TSC based clocksource */
2671 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2672                                            u64 *tsc_timestamp)
2673 {
2674         /* checked again under seqlock below */
2675         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2676                 return false;
2677
2678         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2679 }
2680 #endif
2681
2682 /*
2683  *
2684  * Assuming a stable TSC across physical CPUS, and a stable TSC
2685  * across virtual CPUs, the following condition is possible.
2686  * Each numbered line represents an event visible to both
2687  * CPUs at the next numbered event.
2688  *
2689  * "timespecX" represents host monotonic time. "tscX" represents
2690  * RDTSC value.
2691  *
2692  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2693  *
2694  * 1.  read timespec0,tsc0
2695  * 2.                                   | timespec1 = timespec0 + N
2696  *                                      | tsc1 = tsc0 + M
2697  * 3. transition to guest               | transition to guest
2698  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2699  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2700  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2701  *
2702  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2703  *
2704  *      - ret0 < ret1
2705  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2706  *              ...
2707  *      - 0 < N - M => M < N
2708  *
2709  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2710  * always the case (the difference between two distinct xtime instances
2711  * might be smaller then the difference between corresponding TSC reads,
2712  * when updating guest vcpus pvclock areas).
2713  *
2714  * To avoid that problem, do not allow visibility of distinct
2715  * system_timestamp/tsc_timestamp values simultaneously: use a master
2716  * copy of host monotonic time values. Update that master copy
2717  * in lockstep.
2718  *
2719  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2720  *
2721  */
2722
2723 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2724 {
2725 #ifdef CONFIG_X86_64
2726         struct kvm_arch *ka = &kvm->arch;
2727         int vclock_mode;
2728         bool host_tsc_clocksource, vcpus_matched;
2729
2730         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2731                         atomic_read(&kvm->online_vcpus));
2732
2733         /*
2734          * If the host uses TSC clock, then passthrough TSC as stable
2735          * to the guest.
2736          */
2737         host_tsc_clocksource = kvm_get_time_and_clockread(
2738                                         &ka->master_kernel_ns,
2739                                         &ka->master_cycle_now);
2740
2741         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2742                                 && !ka->backwards_tsc_observed
2743                                 && !ka->boot_vcpu_runs_old_kvmclock;
2744
2745         if (ka->use_master_clock)
2746                 atomic_set(&kvm_guest_has_master_clock, 1);
2747
2748         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2749         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2750                                         vcpus_matched);
2751 #endif
2752 }
2753
2754 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2755 {
2756         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2757 }
2758
2759 static void kvm_gen_update_masterclock(struct kvm *kvm)
2760 {
2761 #ifdef CONFIG_X86_64
2762         int i;
2763         struct kvm_vcpu *vcpu;
2764         struct kvm_arch *ka = &kvm->arch;
2765         unsigned long flags;
2766
2767         kvm_hv_invalidate_tsc_page(kvm);
2768
2769         kvm_make_mclock_inprogress_request(kvm);
2770
2771         /* no guest entries from this point */
2772         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2773         pvclock_update_vm_gtod_copy(kvm);
2774         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2775
2776         kvm_for_each_vcpu(i, vcpu, kvm)
2777                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2778
2779         /* guest entries allowed */
2780         kvm_for_each_vcpu(i, vcpu, kvm)
2781                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2782 #endif
2783 }
2784
2785 u64 get_kvmclock_ns(struct kvm *kvm)
2786 {
2787         struct kvm_arch *ka = &kvm->arch;
2788         struct pvclock_vcpu_time_info hv_clock;
2789         unsigned long flags;
2790         u64 ret;
2791
2792         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2793         if (!ka->use_master_clock) {
2794                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2795                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2796         }
2797
2798         hv_clock.tsc_timestamp = ka->master_cycle_now;
2799         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2800         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2801
2802         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2803         get_cpu();
2804
2805         if (__this_cpu_read(cpu_tsc_khz)) {
2806                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2807                                    &hv_clock.tsc_shift,
2808                                    &hv_clock.tsc_to_system_mul);
2809                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2810         } else
2811                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2812
2813         put_cpu();
2814
2815         return ret;
2816 }
2817
2818 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2819                                    struct gfn_to_hva_cache *cache,
2820                                    unsigned int offset)
2821 {
2822         struct kvm_vcpu_arch *vcpu = &v->arch;
2823         struct pvclock_vcpu_time_info guest_hv_clock;
2824
2825         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2826                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2827                 return;
2828
2829         /* This VCPU is paused, but it's legal for a guest to read another
2830          * VCPU's kvmclock, so we really have to follow the specification where
2831          * it says that version is odd if data is being modified, and even after
2832          * it is consistent.
2833          *
2834          * Version field updates must be kept separate.  This is because
2835          * kvm_write_guest_cached might use a "rep movs" instruction, and
2836          * writes within a string instruction are weakly ordered.  So there
2837          * are three writes overall.
2838          *
2839          * As a small optimization, only write the version field in the first
2840          * and third write.  The vcpu->pv_time cache is still valid, because the
2841          * version field is the first in the struct.
2842          */
2843         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2844
2845         if (guest_hv_clock.version & 1)
2846                 ++guest_hv_clock.version;  /* first time write, random junk */
2847
2848         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2849         kvm_write_guest_offset_cached(v->kvm, cache,
2850                                       &vcpu->hv_clock, offset,
2851                                       sizeof(vcpu->hv_clock.version));
2852
2853         smp_wmb();
2854
2855         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2856         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2857
2858         if (vcpu->pvclock_set_guest_stopped_request) {
2859                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2860                 vcpu->pvclock_set_guest_stopped_request = false;
2861         }
2862
2863         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2864
2865         kvm_write_guest_offset_cached(v->kvm, cache,
2866                                       &vcpu->hv_clock, offset,
2867                                       sizeof(vcpu->hv_clock));
2868
2869         smp_wmb();
2870
2871         vcpu->hv_clock.version++;
2872         kvm_write_guest_offset_cached(v->kvm, cache,
2873                                      &vcpu->hv_clock, offset,
2874                                      sizeof(vcpu->hv_clock.version));
2875 }
2876
2877 static int kvm_guest_time_update(struct kvm_vcpu *v)
2878 {
2879         unsigned long flags, tgt_tsc_khz;
2880         struct kvm_vcpu_arch *vcpu = &v->arch;
2881         struct kvm_arch *ka = &v->kvm->arch;
2882         s64 kernel_ns;
2883         u64 tsc_timestamp, host_tsc;
2884         u8 pvclock_flags;
2885         bool use_master_clock;
2886
2887         kernel_ns = 0;
2888         host_tsc = 0;
2889
2890         /*
2891          * If the host uses TSC clock, then passthrough TSC as stable
2892          * to the guest.
2893          */
2894         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2895         use_master_clock = ka->use_master_clock;
2896         if (use_master_clock) {
2897                 host_tsc = ka->master_cycle_now;
2898                 kernel_ns = ka->master_kernel_ns;
2899         }
2900         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2901
2902         /* Keep irq disabled to prevent changes to the clock */
2903         local_irq_save(flags);
2904         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2905         if (unlikely(tgt_tsc_khz == 0)) {
2906                 local_irq_restore(flags);
2907                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2908                 return 1;
2909         }
2910         if (!use_master_clock) {
2911                 host_tsc = rdtsc();
2912                 kernel_ns = get_kvmclock_base_ns();
2913         }
2914
2915         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2916
2917         /*
2918          * We may have to catch up the TSC to match elapsed wall clock
2919          * time for two reasons, even if kvmclock is used.
2920          *   1) CPU could have been running below the maximum TSC rate
2921          *   2) Broken TSC compensation resets the base at each VCPU
2922          *      entry to avoid unknown leaps of TSC even when running
2923          *      again on the same CPU.  This may cause apparent elapsed
2924          *      time to disappear, and the guest to stand still or run
2925          *      very slowly.
2926          */
2927         if (vcpu->tsc_catchup) {
2928                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2929                 if (tsc > tsc_timestamp) {
2930                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2931                         tsc_timestamp = tsc;
2932                 }
2933         }
2934
2935         local_irq_restore(flags);
2936
2937         /* With all the info we got, fill in the values */
2938
2939         if (kvm_has_tsc_control)
2940                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2941                                             v->arch.l1_tsc_scaling_ratio);
2942
2943         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2944                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2945                                    &vcpu->hv_clock.tsc_shift,
2946                                    &vcpu->hv_clock.tsc_to_system_mul);
2947                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2948         }
2949
2950         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2951         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2952         vcpu->last_guest_tsc = tsc_timestamp;
2953
2954         /* If the host uses TSC clocksource, then it is stable */
2955         pvclock_flags = 0;
2956         if (use_master_clock)
2957                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2958
2959         vcpu->hv_clock.flags = pvclock_flags;
2960
2961         if (vcpu->pv_time_enabled)
2962                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2963         if (vcpu->xen.vcpu_info_set)
2964                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2965                                        offsetof(struct compat_vcpu_info, time));
2966         if (vcpu->xen.vcpu_time_info_set)
2967                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2968         if (v == kvm_get_vcpu(v->kvm, 0))
2969                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2970         return 0;
2971 }
2972
2973 /*
2974  * kvmclock updates which are isolated to a given vcpu, such as
2975  * vcpu->cpu migration, should not allow system_timestamp from
2976  * the rest of the vcpus to remain static. Otherwise ntp frequency
2977  * correction applies to one vcpu's system_timestamp but not
2978  * the others.
2979  *
2980  * So in those cases, request a kvmclock update for all vcpus.
2981  * We need to rate-limit these requests though, as they can
2982  * considerably slow guests that have a large number of vcpus.
2983  * The time for a remote vcpu to update its kvmclock is bound
2984  * by the delay we use to rate-limit the updates.
2985  */
2986
2987 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2988
2989 static void kvmclock_update_fn(struct work_struct *work)
2990 {
2991         int i;
2992         struct delayed_work *dwork = to_delayed_work(work);
2993         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2994                                            kvmclock_update_work);
2995         struct kvm *kvm = container_of(ka, struct kvm, arch);
2996         struct kvm_vcpu *vcpu;
2997
2998         kvm_for_each_vcpu(i, vcpu, kvm) {
2999                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3000                 kvm_vcpu_kick(vcpu);
3001         }
3002 }
3003
3004 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3005 {
3006         struct kvm *kvm = v->kvm;
3007
3008         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3009         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3010                                         KVMCLOCK_UPDATE_DELAY);
3011 }
3012
3013 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3014
3015 static void kvmclock_sync_fn(struct work_struct *work)
3016 {
3017         struct delayed_work *dwork = to_delayed_work(work);
3018         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3019                                            kvmclock_sync_work);
3020         struct kvm *kvm = container_of(ka, struct kvm, arch);
3021
3022         if (!kvmclock_periodic_sync)
3023                 return;
3024
3025         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3026         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3027                                         KVMCLOCK_SYNC_PERIOD);
3028 }
3029
3030 /*
3031  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3032  */
3033 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3034 {
3035         /* McStatusWrEn enabled? */
3036         if (guest_cpuid_is_amd_or_hygon(vcpu))
3037                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3038
3039         return false;
3040 }
3041
3042 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3043 {
3044         u64 mcg_cap = vcpu->arch.mcg_cap;
3045         unsigned bank_num = mcg_cap & 0xff;
3046         u32 msr = msr_info->index;
3047         u64 data = msr_info->data;
3048
3049         switch (msr) {
3050         case MSR_IA32_MCG_STATUS:
3051                 vcpu->arch.mcg_status = data;
3052                 break;
3053         case MSR_IA32_MCG_CTL:
3054                 if (!(mcg_cap & MCG_CTL_P) &&
3055                     (data || !msr_info->host_initiated))
3056                         return 1;
3057                 if (data != 0 && data != ~(u64)0)
3058                         return 1;
3059                 vcpu->arch.mcg_ctl = data;
3060                 break;
3061         default:
3062                 if (msr >= MSR_IA32_MC0_CTL &&
3063                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3064                         u32 offset = array_index_nospec(
3065                                 msr - MSR_IA32_MC0_CTL,
3066                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3067
3068                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3069                          * some Linux kernels though clear bit 10 in bank 4 to
3070                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3071                          * this to avoid an uncatched #GP in the guest
3072                          */
3073                         if ((offset & 0x3) == 0 &&
3074                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3075                                 return -1;
3076
3077                         /* MCi_STATUS */
3078                         if (!msr_info->host_initiated &&
3079                             (offset & 0x3) == 1 && data != 0) {
3080                                 if (!can_set_mci_status(vcpu))
3081                                         return -1;
3082                         }
3083
3084                         vcpu->arch.mce_banks[offset] = data;
3085                         break;
3086                 }
3087                 return 1;
3088         }
3089         return 0;
3090 }
3091
3092 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3093 {
3094         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3095
3096         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3097 }
3098
3099 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3100 {
3101         gpa_t gpa = data & ~0x3f;
3102
3103         /* Bits 4:5 are reserved, Should be zero */
3104         if (data & 0x30)
3105                 return 1;
3106
3107         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3108             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3109                 return 1;
3110
3111         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3112             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3113                 return 1;
3114
3115         if (!lapic_in_kernel(vcpu))
3116                 return data ? 1 : 0;
3117
3118         vcpu->arch.apf.msr_en_val = data;
3119
3120         if (!kvm_pv_async_pf_enabled(vcpu)) {
3121                 kvm_clear_async_pf_completion_queue(vcpu);
3122                 kvm_async_pf_hash_reset(vcpu);
3123                 return 0;
3124         }
3125
3126         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3127                                         sizeof(u64)))
3128                 return 1;
3129
3130         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3131         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3132
3133         kvm_async_pf_wakeup_all(vcpu);
3134
3135         return 0;
3136 }
3137
3138 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3139 {
3140         /* Bits 8-63 are reserved */
3141         if (data >> 8)
3142                 return 1;
3143
3144         if (!lapic_in_kernel(vcpu))
3145                 return 1;
3146
3147         vcpu->arch.apf.msr_int_val = data;
3148
3149         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3150
3151         return 0;
3152 }
3153
3154 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3155 {
3156         vcpu->arch.pv_time_enabled = false;
3157         vcpu->arch.time = 0;
3158 }
3159
3160 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3161 {
3162         ++vcpu->stat.tlb_flush;
3163         static_call(kvm_x86_tlb_flush_all)(vcpu);
3164 }
3165
3166 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3167 {
3168         ++vcpu->stat.tlb_flush;
3169
3170         if (!tdp_enabled) {
3171                /*
3172                  * A TLB flush on behalf of the guest is equivalent to
3173                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3174                  * a forced sync of the shadow page tables.  Unload the
3175                  * entire MMU here and the subsequent load will sync the
3176                  * shadow page tables, and also flush the TLB.
3177                  */
3178                 kvm_mmu_unload(vcpu);
3179                 return;
3180         }
3181
3182         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3183 }
3184
3185 static void record_steal_time(struct kvm_vcpu *vcpu)
3186 {
3187         struct kvm_host_map map;
3188         struct kvm_steal_time *st;
3189
3190         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3191                 kvm_xen_runstate_set_running(vcpu);
3192                 return;
3193         }
3194
3195         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3196                 return;
3197
3198         /* -EAGAIN is returned in atomic context so we can just return. */
3199         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3200                         &map, &vcpu->arch.st.cache, false))
3201                 return;
3202
3203         st = map.hva +
3204                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3205
3206         /*
3207          * Doing a TLB flush here, on the guest's behalf, can avoid
3208          * expensive IPIs.
3209          */
3210         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3211                 u8 st_preempted = xchg(&st->preempted, 0);
3212
3213                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3214                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3215                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3216                         kvm_vcpu_flush_tlb_guest(vcpu);
3217         } else {
3218                 st->preempted = 0;
3219         }
3220
3221         vcpu->arch.st.preempted = 0;
3222
3223         if (st->version & 1)
3224                 st->version += 1;  /* first time write, random junk */
3225
3226         st->version += 1;
3227
3228         smp_wmb();
3229
3230         st->steal += current->sched_info.run_delay -
3231                 vcpu->arch.st.last_steal;
3232         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3233
3234         smp_wmb();
3235
3236         st->version += 1;
3237
3238         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3239 }
3240
3241 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3242 {
3243         bool pr = false;
3244         u32 msr = msr_info->index;
3245         u64 data = msr_info->data;
3246
3247         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3248                 return kvm_xen_write_hypercall_page(vcpu, data);
3249
3250         switch (msr) {
3251         case MSR_AMD64_NB_CFG:
3252         case MSR_IA32_UCODE_WRITE:
3253         case MSR_VM_HSAVE_PA:
3254         case MSR_AMD64_PATCH_LOADER:
3255         case MSR_AMD64_BU_CFG2:
3256         case MSR_AMD64_DC_CFG:
3257         case MSR_F15H_EX_CFG:
3258                 break;
3259
3260         case MSR_IA32_UCODE_REV:
3261                 if (msr_info->host_initiated)
3262                         vcpu->arch.microcode_version = data;
3263                 break;
3264         case MSR_IA32_ARCH_CAPABILITIES:
3265                 if (!msr_info->host_initiated)
3266                         return 1;
3267                 vcpu->arch.arch_capabilities = data;
3268                 break;
3269         case MSR_IA32_PERF_CAPABILITIES: {
3270                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3271
3272                 if (!msr_info->host_initiated)
3273                         return 1;
3274                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3275                         return 1;
3276                 if (data & ~msr_ent.data)
3277                         return 1;
3278
3279                 vcpu->arch.perf_capabilities = data;
3280
3281                 return 0;
3282                 }
3283         case MSR_EFER:
3284                 return set_efer(vcpu, msr_info);
3285         case MSR_K7_HWCR:
3286                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3287                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3288                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3289
3290                 /* Handle McStatusWrEn */
3291                 if (data == BIT_ULL(18)) {
3292                         vcpu->arch.msr_hwcr = data;
3293                 } else if (data != 0) {
3294                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3295                                     data);
3296                         return 1;
3297                 }
3298                 break;
3299         case MSR_FAM10H_MMIO_CONF_BASE:
3300                 if (data != 0) {
3301                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3302                                     "0x%llx\n", data);
3303                         return 1;
3304                 }
3305                 break;
3306         case 0x200 ... 0x2ff:
3307                 return kvm_mtrr_set_msr(vcpu, msr, data);
3308         case MSR_IA32_APICBASE:
3309                 return kvm_set_apic_base(vcpu, msr_info);
3310         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3311                 return kvm_x2apic_msr_write(vcpu, msr, data);
3312         case MSR_IA32_TSC_DEADLINE:
3313                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3314                 break;
3315         case MSR_IA32_TSC_ADJUST:
3316                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3317                         if (!msr_info->host_initiated) {
3318                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3319                                 adjust_tsc_offset_guest(vcpu, adj);
3320                         }
3321                         vcpu->arch.ia32_tsc_adjust_msr = data;
3322                 }
3323                 break;
3324         case MSR_IA32_MISC_ENABLE:
3325                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3326                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3327                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3328                                 return 1;
3329                         vcpu->arch.ia32_misc_enable_msr = data;
3330                         kvm_update_cpuid_runtime(vcpu);
3331                 } else {
3332                         vcpu->arch.ia32_misc_enable_msr = data;
3333                 }
3334                 break;
3335         case MSR_IA32_SMBASE:
3336                 if (!msr_info->host_initiated)
3337                         return 1;
3338                 vcpu->arch.smbase = data;
3339                 break;
3340         case MSR_IA32_POWER_CTL:
3341                 vcpu->arch.msr_ia32_power_ctl = data;
3342                 break;
3343         case MSR_IA32_TSC:
3344                 if (msr_info->host_initiated) {
3345                         kvm_synchronize_tsc(vcpu, data);
3346                 } else {
3347                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3348                         adjust_tsc_offset_guest(vcpu, adj);
3349                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3350                 }
3351                 break;
3352         case MSR_IA32_XSS:
3353                 if (!msr_info->host_initiated &&
3354                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3355                         return 1;
3356                 /*
3357                  * KVM supports exposing PT to the guest, but does not support
3358                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3359                  * XSAVES/XRSTORS to save/restore PT MSRs.
3360                  */
3361                 if (data & ~supported_xss)
3362                         return 1;
3363                 vcpu->arch.ia32_xss = data;
3364                 break;
3365         case MSR_SMI_COUNT:
3366                 if (!msr_info->host_initiated)
3367                         return 1;
3368                 vcpu->arch.smi_count = data;
3369                 break;
3370         case MSR_KVM_WALL_CLOCK_NEW:
3371                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3372                         return 1;
3373
3374                 vcpu->kvm->arch.wall_clock = data;
3375                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3376                 break;
3377         case MSR_KVM_WALL_CLOCK:
3378                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3379                         return 1;
3380
3381                 vcpu->kvm->arch.wall_clock = data;
3382                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3383                 break;
3384         case MSR_KVM_SYSTEM_TIME_NEW:
3385                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3386                         return 1;
3387
3388                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3389                 break;
3390         case MSR_KVM_SYSTEM_TIME:
3391                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3392                         return 1;
3393
3394                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3395                 break;
3396         case MSR_KVM_ASYNC_PF_EN:
3397                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3398                         return 1;
3399
3400                 if (kvm_pv_enable_async_pf(vcpu, data))
3401                         return 1;
3402                 break;
3403         case MSR_KVM_ASYNC_PF_INT:
3404                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3405                         return 1;
3406
3407                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3408                         return 1;
3409                 break;
3410         case MSR_KVM_ASYNC_PF_ACK:
3411                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3412                         return 1;
3413                 if (data & 0x1) {
3414                         vcpu->arch.apf.pageready_pending = false;
3415                         kvm_check_async_pf_completion(vcpu);
3416                 }
3417                 break;
3418         case MSR_KVM_STEAL_TIME:
3419                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3420                         return 1;
3421
3422                 if (unlikely(!sched_info_on()))
3423                         return 1;
3424
3425                 if (data & KVM_STEAL_RESERVED_MASK)
3426                         return 1;
3427
3428                 vcpu->arch.st.msr_val = data;
3429
3430                 if (!(data & KVM_MSR_ENABLED))
3431                         break;
3432
3433                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3434
3435                 break;
3436         case MSR_KVM_PV_EOI_EN:
3437                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3438                         return 1;
3439
3440                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3441                         return 1;
3442                 break;
3443
3444         case MSR_KVM_POLL_CONTROL:
3445                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3446                         return 1;
3447
3448                 /* only enable bit supported */
3449                 if (data & (-1ULL << 1))
3450                         return 1;
3451
3452                 vcpu->arch.msr_kvm_poll_control = data;
3453                 break;
3454
3455         case MSR_IA32_MCG_CTL:
3456         case MSR_IA32_MCG_STATUS:
3457         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3458                 return set_msr_mce(vcpu, msr_info);
3459
3460         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3461         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3462                 pr = true;
3463                 fallthrough;
3464         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3465         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3466                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3467                         return kvm_pmu_set_msr(vcpu, msr_info);
3468
3469                 if (pr || data != 0)
3470                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3471                                     "0x%x data 0x%llx\n", msr, data);
3472                 break;
3473         case MSR_K7_CLK_CTL:
3474                 /*
3475                  * Ignore all writes to this no longer documented MSR.
3476                  * Writes are only relevant for old K7 processors,
3477                  * all pre-dating SVM, but a recommended workaround from
3478                  * AMD for these chips. It is possible to specify the
3479                  * affected processor models on the command line, hence
3480                  * the need to ignore the workaround.
3481                  */
3482                 break;
3483         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3484         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3485         case HV_X64_MSR_SYNDBG_OPTIONS:
3486         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3487         case HV_X64_MSR_CRASH_CTL:
3488         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3489         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3490         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3491         case HV_X64_MSR_TSC_EMULATION_STATUS:
3492                 return kvm_hv_set_msr_common(vcpu, msr, data,
3493                                              msr_info->host_initiated);
3494         case MSR_IA32_BBL_CR_CTL3:
3495                 /* Drop writes to this legacy MSR -- see rdmsr
3496                  * counterpart for further detail.
3497                  */
3498                 if (report_ignored_msrs)
3499                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3500                                 msr, data);
3501                 break;
3502         case MSR_AMD64_OSVW_ID_LENGTH:
3503                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3504                         return 1;
3505                 vcpu->arch.osvw.length = data;
3506                 break;
3507         case MSR_AMD64_OSVW_STATUS:
3508                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3509                         return 1;
3510                 vcpu->arch.osvw.status = data;
3511                 break;
3512         case MSR_PLATFORM_INFO:
3513                 if (!msr_info->host_initiated ||
3514                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3515                      cpuid_fault_enabled(vcpu)))
3516                         return 1;
3517                 vcpu->arch.msr_platform_info = data;
3518                 break;
3519         case MSR_MISC_FEATURES_ENABLES:
3520                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3521                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3522                      !supports_cpuid_fault(vcpu)))
3523                         return 1;
3524                 vcpu->arch.msr_misc_features_enables = data;
3525                 break;
3526         default:
3527                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3528                         return kvm_pmu_set_msr(vcpu, msr_info);
3529                 return KVM_MSR_RET_INVALID;
3530         }
3531         return 0;
3532 }
3533 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3534
3535 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3536 {
3537         u64 data;
3538         u64 mcg_cap = vcpu->arch.mcg_cap;
3539         unsigned bank_num = mcg_cap & 0xff;
3540
3541         switch (msr) {
3542         case MSR_IA32_P5_MC_ADDR:
3543         case MSR_IA32_P5_MC_TYPE:
3544                 data = 0;
3545                 break;
3546         case MSR_IA32_MCG_CAP:
3547                 data = vcpu->arch.mcg_cap;
3548                 break;
3549         case MSR_IA32_MCG_CTL:
3550                 if (!(mcg_cap & MCG_CTL_P) && !host)
3551                         return 1;
3552                 data = vcpu->arch.mcg_ctl;
3553                 break;
3554         case MSR_IA32_MCG_STATUS:
3555                 data = vcpu->arch.mcg_status;
3556                 break;
3557         default:
3558                 if (msr >= MSR_IA32_MC0_CTL &&
3559                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3560                         u32 offset = array_index_nospec(
3561                                 msr - MSR_IA32_MC0_CTL,
3562                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3563
3564                         data = vcpu->arch.mce_banks[offset];
3565                         break;
3566                 }
3567                 return 1;
3568         }
3569         *pdata = data;
3570         return 0;
3571 }
3572
3573 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3574 {
3575         switch (msr_info->index) {
3576         case MSR_IA32_PLATFORM_ID:
3577         case MSR_IA32_EBL_CR_POWERON:
3578         case MSR_IA32_LASTBRANCHFROMIP:
3579         case MSR_IA32_LASTBRANCHTOIP:
3580         case MSR_IA32_LASTINTFROMIP:
3581         case MSR_IA32_LASTINTTOIP:
3582         case MSR_AMD64_SYSCFG:
3583         case MSR_K8_TSEG_ADDR:
3584         case MSR_K8_TSEG_MASK:
3585         case MSR_VM_HSAVE_PA:
3586         case MSR_K8_INT_PENDING_MSG:
3587         case MSR_AMD64_NB_CFG:
3588         case MSR_FAM10H_MMIO_CONF_BASE:
3589         case MSR_AMD64_BU_CFG2:
3590         case MSR_IA32_PERF_CTL:
3591         case MSR_AMD64_DC_CFG:
3592         case MSR_F15H_EX_CFG:
3593         /*
3594          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3595          * limit) MSRs. Just return 0, as we do not want to expose the host
3596          * data here. Do not conditionalize this on CPUID, as KVM does not do
3597          * so for existing CPU-specific MSRs.
3598          */
3599         case MSR_RAPL_POWER_UNIT:
3600         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3601         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3602         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3603         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3604                 msr_info->data = 0;
3605                 break;
3606         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3607                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3608                         return kvm_pmu_get_msr(vcpu, msr_info);
3609                 if (!msr_info->host_initiated)
3610                         return 1;
3611                 msr_info->data = 0;
3612                 break;
3613         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3614         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3615         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3616         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3617                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3618                         return kvm_pmu_get_msr(vcpu, msr_info);
3619                 msr_info->data = 0;
3620                 break;
3621         case MSR_IA32_UCODE_REV:
3622                 msr_info->data = vcpu->arch.microcode_version;
3623                 break;
3624         case MSR_IA32_ARCH_CAPABILITIES:
3625                 if (!msr_info->host_initiated &&
3626                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3627                         return 1;
3628                 msr_info->data = vcpu->arch.arch_capabilities;
3629                 break;
3630         case MSR_IA32_PERF_CAPABILITIES:
3631                 if (!msr_info->host_initiated &&
3632                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3633                         return 1;
3634                 msr_info->data = vcpu->arch.perf_capabilities;
3635                 break;
3636         case MSR_IA32_POWER_CTL:
3637                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3638                 break;
3639         case MSR_IA32_TSC: {
3640                 /*
3641                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3642                  * even when not intercepted. AMD manual doesn't explicitly
3643                  * state this but appears to behave the same.
3644                  *
3645                  * On userspace reads and writes, however, we unconditionally
3646                  * return L1's TSC value to ensure backwards-compatible
3647                  * behavior for migration.
3648                  */
3649                 u64 offset, ratio;
3650
3651                 if (msr_info->host_initiated) {
3652                         offset = vcpu->arch.l1_tsc_offset;
3653                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3654                 } else {
3655                         offset = vcpu->arch.tsc_offset;
3656                         ratio = vcpu->arch.tsc_scaling_ratio;
3657                 }
3658
3659                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3660                 break;
3661         }
3662         case MSR_MTRRcap:
3663         case 0x200 ... 0x2ff:
3664                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3665         case 0xcd: /* fsb frequency */
3666                 msr_info->data = 3;
3667                 break;
3668                 /*
3669                  * MSR_EBC_FREQUENCY_ID
3670                  * Conservative value valid for even the basic CPU models.
3671                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3672                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3673                  * and 266MHz for model 3, or 4. Set Core Clock
3674                  * Frequency to System Bus Frequency Ratio to 1 (bits
3675                  * 31:24) even though these are only valid for CPU
3676                  * models > 2, however guests may end up dividing or
3677                  * multiplying by zero otherwise.
3678                  */
3679         case MSR_EBC_FREQUENCY_ID:
3680                 msr_info->data = 1 << 24;
3681                 break;
3682         case MSR_IA32_APICBASE:
3683                 msr_info->data = kvm_get_apic_base(vcpu);
3684                 break;
3685         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3686                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3687         case MSR_IA32_TSC_DEADLINE:
3688                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3689                 break;
3690         case MSR_IA32_TSC_ADJUST:
3691                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3692                 break;
3693         case MSR_IA32_MISC_ENABLE:
3694                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3695                 break;
3696         case MSR_IA32_SMBASE:
3697                 if (!msr_info->host_initiated)
3698                         return 1;
3699                 msr_info->data = vcpu->arch.smbase;
3700                 break;
3701         case MSR_SMI_COUNT:
3702                 msr_info->data = vcpu->arch.smi_count;
3703                 break;
3704         case MSR_IA32_PERF_STATUS:
3705                 /* TSC increment by tick */
3706                 msr_info->data = 1000ULL;
3707                 /* CPU multiplier */
3708                 msr_info->data |= (((uint64_t)4ULL) << 40);
3709                 break;
3710         case MSR_EFER:
3711                 msr_info->data = vcpu->arch.efer;
3712                 break;
3713         case MSR_KVM_WALL_CLOCK:
3714                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3715                         return 1;
3716
3717                 msr_info->data = vcpu->kvm->arch.wall_clock;
3718                 break;
3719         case MSR_KVM_WALL_CLOCK_NEW:
3720                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3721                         return 1;
3722
3723                 msr_info->data = vcpu->kvm->arch.wall_clock;
3724                 break;
3725         case MSR_KVM_SYSTEM_TIME:
3726                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3727                         return 1;
3728
3729                 msr_info->data = vcpu->arch.time;
3730                 break;
3731         case MSR_KVM_SYSTEM_TIME_NEW:
3732                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3733                         return 1;
3734
3735                 msr_info->data = vcpu->arch.time;
3736                 break;
3737         case MSR_KVM_ASYNC_PF_EN:
3738                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3739                         return 1;
3740
3741                 msr_info->data = vcpu->arch.apf.msr_en_val;
3742                 break;
3743         case MSR_KVM_ASYNC_PF_INT:
3744                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3745                         return 1;
3746
3747                 msr_info->data = vcpu->arch.apf.msr_int_val;
3748                 break;
3749         case MSR_KVM_ASYNC_PF_ACK:
3750                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3751                         return 1;
3752
3753                 msr_info->data = 0;
3754                 break;
3755         case MSR_KVM_STEAL_TIME:
3756                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3757                         return 1;
3758
3759                 msr_info->data = vcpu->arch.st.msr_val;
3760                 break;
3761         case MSR_KVM_PV_EOI_EN:
3762                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3763                         return 1;
3764
3765                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3766                 break;
3767         case MSR_KVM_POLL_CONTROL:
3768                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3769                         return 1;
3770
3771                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3772                 break;
3773         case MSR_IA32_P5_MC_ADDR:
3774         case MSR_IA32_P5_MC_TYPE:
3775         case MSR_IA32_MCG_CAP:
3776         case MSR_IA32_MCG_CTL:
3777         case MSR_IA32_MCG_STATUS:
3778         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3779                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3780                                    msr_info->host_initiated);
3781         case MSR_IA32_XSS:
3782                 if (!msr_info->host_initiated &&
3783                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3784                         return 1;
3785                 msr_info->data = vcpu->arch.ia32_xss;
3786                 break;
3787         case MSR_K7_CLK_CTL:
3788                 /*
3789                  * Provide expected ramp-up count for K7. All other
3790                  * are set to zero, indicating minimum divisors for
3791                  * every field.
3792                  *
3793                  * This prevents guest kernels on AMD host with CPU
3794                  * type 6, model 8 and higher from exploding due to
3795                  * the rdmsr failing.
3796                  */
3797                 msr_info->data = 0x20000000;
3798                 break;
3799         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3800         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3801         case HV_X64_MSR_SYNDBG_OPTIONS:
3802         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3803         case HV_X64_MSR_CRASH_CTL:
3804         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3805         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3806         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3807         case HV_X64_MSR_TSC_EMULATION_STATUS:
3808                 return kvm_hv_get_msr_common(vcpu,
3809                                              msr_info->index, &msr_info->data,
3810                                              msr_info->host_initiated);
3811         case MSR_IA32_BBL_CR_CTL3:
3812                 /* This legacy MSR exists but isn't fully documented in current
3813                  * silicon.  It is however accessed by winxp in very narrow
3814                  * scenarios where it sets bit #19, itself documented as
3815                  * a "reserved" bit.  Best effort attempt to source coherent
3816                  * read data here should the balance of the register be
3817                  * interpreted by the guest:
3818                  *
3819                  * L2 cache control register 3: 64GB range, 256KB size,
3820                  * enabled, latency 0x1, configured
3821                  */
3822                 msr_info->data = 0xbe702111;
3823                 break;
3824         case MSR_AMD64_OSVW_ID_LENGTH:
3825                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3826                         return 1;
3827                 msr_info->data = vcpu->arch.osvw.length;
3828                 break;
3829         case MSR_AMD64_OSVW_STATUS:
3830                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3831                         return 1;
3832                 msr_info->data = vcpu->arch.osvw.status;
3833                 break;
3834         case MSR_PLATFORM_INFO:
3835                 if (!msr_info->host_initiated &&
3836                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3837                         return 1;
3838                 msr_info->data = vcpu->arch.msr_platform_info;
3839                 break;
3840         case MSR_MISC_FEATURES_ENABLES:
3841                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3842                 break;
3843         case MSR_K7_HWCR:
3844                 msr_info->data = vcpu->arch.msr_hwcr;
3845                 break;
3846         default:
3847                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3848                         return kvm_pmu_get_msr(vcpu, msr_info);
3849                 return KVM_MSR_RET_INVALID;
3850         }
3851         return 0;
3852 }
3853 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3854
3855 /*
3856  * Read or write a bunch of msrs. All parameters are kernel addresses.
3857  *
3858  * @return number of msrs set successfully.
3859  */
3860 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3861                     struct kvm_msr_entry *entries,
3862                     int (*do_msr)(struct kvm_vcpu *vcpu,
3863                                   unsigned index, u64 *data))
3864 {
3865         int i;
3866
3867         for (i = 0; i < msrs->nmsrs; ++i)
3868                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3869                         break;
3870
3871         return i;
3872 }
3873
3874 /*
3875  * Read or write a bunch of msrs. Parameters are user addresses.
3876  *
3877  * @return number of msrs set successfully.
3878  */
3879 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3880                   int (*do_msr)(struct kvm_vcpu *vcpu,
3881                                 unsigned index, u64 *data),
3882                   int writeback)
3883 {
3884         struct kvm_msrs msrs;
3885         struct kvm_msr_entry *entries;
3886         int r, n;
3887         unsigned size;
3888
3889         r = -EFAULT;
3890         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3891                 goto out;
3892
3893         r = -E2BIG;
3894         if (msrs.nmsrs >= MAX_IO_MSRS)
3895                 goto out;
3896
3897         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3898         entries = memdup_user(user_msrs->entries, size);
3899         if (IS_ERR(entries)) {
3900                 r = PTR_ERR(entries);
3901                 goto out;
3902         }
3903
3904         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3905         if (r < 0)
3906                 goto out_free;
3907
3908         r = -EFAULT;
3909         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3910                 goto out_free;
3911
3912         r = n;
3913
3914 out_free:
3915         kfree(entries);
3916 out:
3917         return r;
3918 }
3919
3920 static inline bool kvm_can_mwait_in_guest(void)
3921 {
3922         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3923                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3924                 boot_cpu_has(X86_FEATURE_ARAT);
3925 }
3926
3927 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3928                                             struct kvm_cpuid2 __user *cpuid_arg)
3929 {
3930         struct kvm_cpuid2 cpuid;
3931         int r;
3932
3933         r = -EFAULT;
3934         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3935                 return r;
3936
3937         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3938         if (r)
3939                 return r;
3940
3941         r = -EFAULT;
3942         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3943                 return r;
3944
3945         return 0;
3946 }
3947
3948 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3949 {
3950         int r = 0;
3951
3952         switch (ext) {
3953         case KVM_CAP_IRQCHIP:
3954         case KVM_CAP_HLT:
3955         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3956         case KVM_CAP_SET_TSS_ADDR:
3957         case KVM_CAP_EXT_CPUID:
3958         case KVM_CAP_EXT_EMUL_CPUID:
3959         case KVM_CAP_CLOCKSOURCE:
3960         case KVM_CAP_PIT:
3961         case KVM_CAP_NOP_IO_DELAY:
3962         case KVM_CAP_MP_STATE:
3963         case KVM_CAP_SYNC_MMU:
3964         case KVM_CAP_USER_NMI:
3965         case KVM_CAP_REINJECT_CONTROL:
3966         case KVM_CAP_IRQ_INJECT_STATUS:
3967         case KVM_CAP_IOEVENTFD:
3968         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3969         case KVM_CAP_PIT2:
3970         case KVM_CAP_PIT_STATE2:
3971         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3972         case KVM_CAP_VCPU_EVENTS:
3973         case KVM_CAP_HYPERV:
3974         case KVM_CAP_HYPERV_VAPIC:
3975         case KVM_CAP_HYPERV_SPIN:
3976         case KVM_CAP_HYPERV_SYNIC:
3977         case KVM_CAP_HYPERV_SYNIC2:
3978         case KVM_CAP_HYPERV_VP_INDEX:
3979         case KVM_CAP_HYPERV_EVENTFD:
3980         case KVM_CAP_HYPERV_TLBFLUSH:
3981         case KVM_CAP_HYPERV_SEND_IPI:
3982         case KVM_CAP_HYPERV_CPUID:
3983         case KVM_CAP_HYPERV_ENFORCE_CPUID:
3984         case KVM_CAP_SYS_HYPERV_CPUID:
3985         case KVM_CAP_PCI_SEGMENT:
3986         case KVM_CAP_DEBUGREGS:
3987         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3988         case KVM_CAP_XSAVE:
3989         case KVM_CAP_ASYNC_PF:
3990         case KVM_CAP_ASYNC_PF_INT:
3991         case KVM_CAP_GET_TSC_KHZ:
3992         case KVM_CAP_KVMCLOCK_CTRL:
3993         case KVM_CAP_READONLY_MEM:
3994         case KVM_CAP_HYPERV_TIME:
3995         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3996         case KVM_CAP_TSC_DEADLINE_TIMER:
3997         case KVM_CAP_DISABLE_QUIRKS:
3998         case KVM_CAP_SET_BOOT_CPU_ID:
3999         case KVM_CAP_SPLIT_IRQCHIP:
4000         case KVM_CAP_IMMEDIATE_EXIT:
4001         case KVM_CAP_PMU_EVENT_FILTER:
4002         case KVM_CAP_GET_MSR_FEATURES:
4003         case KVM_CAP_MSR_PLATFORM_INFO:
4004         case KVM_CAP_EXCEPTION_PAYLOAD:
4005         case KVM_CAP_SET_GUEST_DEBUG:
4006         case KVM_CAP_LAST_CPU:
4007         case KVM_CAP_X86_USER_SPACE_MSR:
4008         case KVM_CAP_X86_MSR_FILTER:
4009         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4010 #ifdef CONFIG_X86_SGX_KVM
4011         case KVM_CAP_SGX_ATTRIBUTE:
4012 #endif
4013         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4014         case KVM_CAP_SREGS2:
4015         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4016                 r = 1;
4017                 break;
4018         case KVM_CAP_EXIT_HYPERCALL:
4019                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4020                 break;
4021         case KVM_CAP_SET_GUEST_DEBUG2:
4022                 return KVM_GUESTDBG_VALID_MASK;
4023 #ifdef CONFIG_KVM_XEN
4024         case KVM_CAP_XEN_HVM:
4025                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4026                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4027                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4028                 if (sched_info_on())
4029                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4030                 break;
4031 #endif
4032         case KVM_CAP_SYNC_REGS:
4033                 r = KVM_SYNC_X86_VALID_FIELDS;
4034                 break;
4035         case KVM_CAP_ADJUST_CLOCK:
4036                 r = KVM_CLOCK_TSC_STABLE;
4037                 break;
4038         case KVM_CAP_X86_DISABLE_EXITS:
4039                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4040                       KVM_X86_DISABLE_EXITS_CSTATE;
4041                 if(kvm_can_mwait_in_guest())
4042                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4043                 break;
4044         case KVM_CAP_X86_SMM:
4045                 /* SMBASE is usually relocated above 1M on modern chipsets,
4046                  * and SMM handlers might indeed rely on 4G segment limits,
4047                  * so do not report SMM to be available if real mode is
4048                  * emulated via vm86 mode.  Still, do not go to great lengths
4049                  * to avoid userspace's usage of the feature, because it is a
4050                  * fringe case that is not enabled except via specific settings
4051                  * of the module parameters.
4052                  */
4053                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4054                 break;
4055         case KVM_CAP_VAPIC:
4056                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4057                 break;
4058         case KVM_CAP_NR_VCPUS:
4059                 r = KVM_SOFT_MAX_VCPUS;
4060                 break;
4061         case KVM_CAP_MAX_VCPUS:
4062                 r = KVM_MAX_VCPUS;
4063                 break;
4064         case KVM_CAP_MAX_VCPU_ID:
4065                 r = KVM_MAX_VCPU_ID;
4066                 break;
4067         case KVM_CAP_PV_MMU:    /* obsolete */
4068                 r = 0;
4069                 break;
4070         case KVM_CAP_MCE:
4071                 r = KVM_MAX_MCE_BANKS;
4072                 break;
4073         case KVM_CAP_XCRS:
4074                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4075                 break;
4076         case KVM_CAP_TSC_CONTROL:
4077                 r = kvm_has_tsc_control;
4078                 break;
4079         case KVM_CAP_X2APIC_API:
4080                 r = KVM_X2APIC_API_VALID_FLAGS;
4081                 break;
4082         case KVM_CAP_NESTED_STATE:
4083                 r = kvm_x86_ops.nested_ops->get_state ?
4084                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4085                 break;
4086         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4087                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4088                 break;
4089         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4090                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4091                 break;
4092         case KVM_CAP_SMALLER_MAXPHYADDR:
4093                 r = (int) allow_smaller_maxphyaddr;
4094                 break;
4095         case KVM_CAP_STEAL_TIME:
4096                 r = sched_info_on();
4097                 break;
4098         case KVM_CAP_X86_BUS_LOCK_EXIT:
4099                 if (kvm_has_bus_lock_exit)
4100                         r = KVM_BUS_LOCK_DETECTION_OFF |
4101                             KVM_BUS_LOCK_DETECTION_EXIT;
4102                 else
4103                         r = 0;
4104                 break;
4105         default:
4106                 break;
4107         }
4108         return r;
4109
4110 }
4111
4112 long kvm_arch_dev_ioctl(struct file *filp,
4113                         unsigned int ioctl, unsigned long arg)
4114 {
4115         void __user *argp = (void __user *)arg;
4116         long r;
4117
4118         switch (ioctl) {
4119         case KVM_GET_MSR_INDEX_LIST: {
4120                 struct kvm_msr_list __user *user_msr_list = argp;
4121                 struct kvm_msr_list msr_list;
4122                 unsigned n;
4123
4124                 r = -EFAULT;
4125                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4126                         goto out;
4127                 n = msr_list.nmsrs;
4128                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4129                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4130                         goto out;
4131                 r = -E2BIG;
4132                 if (n < msr_list.nmsrs)
4133                         goto out;
4134                 r = -EFAULT;
4135                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4136                                  num_msrs_to_save * sizeof(u32)))
4137                         goto out;
4138                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4139                                  &emulated_msrs,
4140                                  num_emulated_msrs * sizeof(u32)))
4141                         goto out;
4142                 r = 0;
4143                 break;
4144         }
4145         case KVM_GET_SUPPORTED_CPUID:
4146         case KVM_GET_EMULATED_CPUID: {
4147                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4148                 struct kvm_cpuid2 cpuid;
4149
4150                 r = -EFAULT;
4151                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4152                         goto out;
4153
4154                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4155                                             ioctl);
4156                 if (r)
4157                         goto out;
4158
4159                 r = -EFAULT;
4160                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4161                         goto out;
4162                 r = 0;
4163                 break;
4164         }
4165         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4166                 r = -EFAULT;
4167                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4168                                  sizeof(kvm_mce_cap_supported)))
4169                         goto out;
4170                 r = 0;
4171                 break;
4172         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4173                 struct kvm_msr_list __user *user_msr_list = argp;
4174                 struct kvm_msr_list msr_list;
4175                 unsigned int n;
4176
4177                 r = -EFAULT;
4178                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4179                         goto out;
4180                 n = msr_list.nmsrs;
4181                 msr_list.nmsrs = num_msr_based_features;
4182                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4183                         goto out;
4184                 r = -E2BIG;
4185                 if (n < msr_list.nmsrs)
4186                         goto out;
4187                 r = -EFAULT;
4188                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4189                                  num_msr_based_features * sizeof(u32)))
4190                         goto out;
4191                 r = 0;
4192                 break;
4193         }
4194         case KVM_GET_MSRS:
4195                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4196                 break;
4197         case KVM_GET_SUPPORTED_HV_CPUID:
4198                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4199                 break;
4200         default:
4201                 r = -EINVAL;
4202                 break;
4203         }
4204 out:
4205         return r;
4206 }
4207
4208 static void wbinvd_ipi(void *garbage)
4209 {
4210         wbinvd();
4211 }
4212
4213 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4214 {
4215         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4216 }
4217
4218 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4219 {
4220         /* Address WBINVD may be executed by guest */
4221         if (need_emulate_wbinvd(vcpu)) {
4222                 if (static_call(kvm_x86_has_wbinvd_exit)())
4223                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4224                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4225                         smp_call_function_single(vcpu->cpu,
4226                                         wbinvd_ipi, NULL, 1);
4227         }
4228
4229         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4230
4231         /* Save host pkru register if supported */
4232         vcpu->arch.host_pkru = read_pkru();
4233
4234         /* Apply any externally detected TSC adjustments (due to suspend) */
4235         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4236                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4237                 vcpu->arch.tsc_offset_adjustment = 0;
4238                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4239         }
4240
4241         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4242                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4243                                 rdtsc() - vcpu->arch.last_host_tsc;
4244                 if (tsc_delta < 0)
4245                         mark_tsc_unstable("KVM discovered backwards TSC");
4246
4247                 if (kvm_check_tsc_unstable()) {
4248                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4249                                                 vcpu->arch.last_guest_tsc);
4250                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4251                         vcpu->arch.tsc_catchup = 1;
4252                 }
4253
4254                 if (kvm_lapic_hv_timer_in_use(vcpu))
4255                         kvm_lapic_restart_hv_timer(vcpu);
4256
4257                 /*
4258                  * On a host with synchronized TSC, there is no need to update
4259                  * kvmclock on vcpu->cpu migration
4260                  */
4261                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4262                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4263                 if (vcpu->cpu != cpu)
4264                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4265                 vcpu->cpu = cpu;
4266         }
4267
4268         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4269 }
4270
4271 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4272 {
4273         struct kvm_host_map map;
4274         struct kvm_steal_time *st;
4275
4276         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4277                 return;
4278
4279         if (vcpu->arch.st.preempted)
4280                 return;
4281
4282         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4283                         &vcpu->arch.st.cache, true))
4284                 return;
4285
4286         st = map.hva +
4287                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4288
4289         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4290
4291         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4292 }
4293
4294 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4295 {
4296         int idx;
4297
4298         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4299                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4300
4301         /*
4302          * Take the srcu lock as memslots will be accessed to check the gfn
4303          * cache generation against the memslots generation.
4304          */
4305         idx = srcu_read_lock(&vcpu->kvm->srcu);
4306         if (kvm_xen_msr_enabled(vcpu->kvm))
4307                 kvm_xen_runstate_set_preempted(vcpu);
4308         else
4309                 kvm_steal_time_set_preempted(vcpu);
4310         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4311
4312         static_call(kvm_x86_vcpu_put)(vcpu);
4313         vcpu->arch.last_host_tsc = rdtsc();
4314         /*
4315          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4316          * on every vmexit, but if not, we might have a stale dr6 from the
4317          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4318          */
4319         set_debugreg(0, 6);
4320 }
4321
4322 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4323                                     struct kvm_lapic_state *s)
4324 {
4325         if (vcpu->arch.apicv_active)
4326                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4327
4328         return kvm_apic_get_state(vcpu, s);
4329 }
4330
4331 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4332                                     struct kvm_lapic_state *s)
4333 {
4334         int r;
4335
4336         r = kvm_apic_set_state(vcpu, s);
4337         if (r)
4338                 return r;
4339         update_cr8_intercept(vcpu);
4340
4341         return 0;
4342 }
4343
4344 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4345 {
4346         /*
4347          * We can accept userspace's request for interrupt injection
4348          * as long as we have a place to store the interrupt number.
4349          * The actual injection will happen when the CPU is able to
4350          * deliver the interrupt.
4351          */
4352         if (kvm_cpu_has_extint(vcpu))
4353                 return false;
4354
4355         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4356         return (!lapic_in_kernel(vcpu) ||
4357                 kvm_apic_accept_pic_intr(vcpu));
4358 }
4359
4360 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4361 {
4362         /*
4363          * Do not cause an interrupt window exit if an exception
4364          * is pending or an event needs reinjection; userspace
4365          * might want to inject the interrupt manually using KVM_SET_REGS
4366          * or KVM_SET_SREGS.  For that to work, we must be at an
4367          * instruction boundary and with no events half-injected.
4368          */
4369         return (kvm_arch_interrupt_allowed(vcpu) &&
4370                 kvm_cpu_accept_dm_intr(vcpu) &&
4371                 !kvm_event_needs_reinjection(vcpu) &&
4372                 !vcpu->arch.exception.pending);
4373 }
4374
4375 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4376                                     struct kvm_interrupt *irq)
4377 {
4378         if (irq->irq >= KVM_NR_INTERRUPTS)
4379                 return -EINVAL;
4380
4381         if (!irqchip_in_kernel(vcpu->kvm)) {
4382                 kvm_queue_interrupt(vcpu, irq->irq, false);
4383                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4384                 return 0;
4385         }
4386
4387         /*
4388          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4389          * fail for in-kernel 8259.
4390          */
4391         if (pic_in_kernel(vcpu->kvm))
4392                 return -ENXIO;
4393
4394         if (vcpu->arch.pending_external_vector != -1)
4395                 return -EEXIST;
4396
4397         vcpu->arch.pending_external_vector = irq->irq;
4398         kvm_make_request(KVM_REQ_EVENT, vcpu);
4399         return 0;
4400 }
4401
4402 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4403 {
4404         kvm_inject_nmi(vcpu);
4405
4406         return 0;
4407 }
4408
4409 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4410 {
4411         kvm_make_request(KVM_REQ_SMI, vcpu);
4412
4413         return 0;
4414 }
4415
4416 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4417                                            struct kvm_tpr_access_ctl *tac)
4418 {
4419         if (tac->flags)
4420                 return -EINVAL;
4421         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4422         return 0;
4423 }
4424
4425 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4426                                         u64 mcg_cap)
4427 {
4428         int r;
4429         unsigned bank_num = mcg_cap & 0xff, bank;
4430
4431         r = -EINVAL;
4432         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4433                 goto out;
4434         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4435                 goto out;
4436         r = 0;
4437         vcpu->arch.mcg_cap = mcg_cap;
4438         /* Init IA32_MCG_CTL to all 1s */
4439         if (mcg_cap & MCG_CTL_P)
4440                 vcpu->arch.mcg_ctl = ~(u64)0;
4441         /* Init IA32_MCi_CTL to all 1s */
4442         for (bank = 0; bank < bank_num; bank++)
4443                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4444
4445         static_call(kvm_x86_setup_mce)(vcpu);
4446 out:
4447         return r;
4448 }
4449
4450 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4451                                       struct kvm_x86_mce *mce)
4452 {
4453         u64 mcg_cap = vcpu->arch.mcg_cap;
4454         unsigned bank_num = mcg_cap & 0xff;
4455         u64 *banks = vcpu->arch.mce_banks;
4456
4457         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4458                 return -EINVAL;
4459         /*
4460          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4461          * reporting is disabled
4462          */
4463         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4464             vcpu->arch.mcg_ctl != ~(u64)0)
4465                 return 0;
4466         banks += 4 * mce->bank;
4467         /*
4468          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4469          * reporting is disabled for the bank
4470          */
4471         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4472                 return 0;
4473         if (mce->status & MCI_STATUS_UC) {
4474                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4475                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4476                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4477                         return 0;
4478                 }
4479                 if (banks[1] & MCI_STATUS_VAL)
4480                         mce->status |= MCI_STATUS_OVER;
4481                 banks[2] = mce->addr;
4482                 banks[3] = mce->misc;
4483                 vcpu->arch.mcg_status = mce->mcg_status;
4484                 banks[1] = mce->status;
4485                 kvm_queue_exception(vcpu, MC_VECTOR);
4486         } else if (!(banks[1] & MCI_STATUS_VAL)
4487                    || !(banks[1] & MCI_STATUS_UC)) {
4488                 if (banks[1] & MCI_STATUS_VAL)
4489                         mce->status |= MCI_STATUS_OVER;
4490                 banks[2] = mce->addr;
4491                 banks[3] = mce->misc;
4492                 banks[1] = mce->status;
4493         } else
4494                 banks[1] |= MCI_STATUS_OVER;
4495         return 0;
4496 }
4497
4498 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4499                                                struct kvm_vcpu_events *events)
4500 {
4501         process_nmi(vcpu);
4502
4503         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4504                 process_smi(vcpu);
4505
4506         /*
4507          * In guest mode, payload delivery should be deferred,
4508          * so that the L1 hypervisor can intercept #PF before
4509          * CR2 is modified (or intercept #DB before DR6 is
4510          * modified under nVMX). Unless the per-VM capability,
4511          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4512          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4513          * opportunistically defer the exception payload, deliver it if the
4514          * capability hasn't been requested before processing a
4515          * KVM_GET_VCPU_EVENTS.
4516          */
4517         if (!vcpu->kvm->arch.exception_payload_enabled &&
4518             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4519                 kvm_deliver_exception_payload(vcpu);
4520
4521         /*
4522          * The API doesn't provide the instruction length for software
4523          * exceptions, so don't report them. As long as the guest RIP
4524          * isn't advanced, we should expect to encounter the exception
4525          * again.
4526          */
4527         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4528                 events->exception.injected = 0;
4529                 events->exception.pending = 0;
4530         } else {
4531                 events->exception.injected = vcpu->arch.exception.injected;
4532                 events->exception.pending = vcpu->arch.exception.pending;
4533                 /*
4534                  * For ABI compatibility, deliberately conflate
4535                  * pending and injected exceptions when
4536                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4537                  */
4538                 if (!vcpu->kvm->arch.exception_payload_enabled)
4539                         events->exception.injected |=
4540                                 vcpu->arch.exception.pending;
4541         }
4542         events->exception.nr = vcpu->arch.exception.nr;
4543         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4544         events->exception.error_code = vcpu->arch.exception.error_code;
4545         events->exception_has_payload = vcpu->arch.exception.has_payload;
4546         events->exception_payload = vcpu->arch.exception.payload;
4547
4548         events->interrupt.injected =
4549                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4550         events->interrupt.nr = vcpu->arch.interrupt.nr;
4551         events->interrupt.soft = 0;
4552         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4553
4554         events->nmi.injected = vcpu->arch.nmi_injected;
4555         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4556         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4557         events->nmi.pad = 0;
4558
4559         events->sipi_vector = 0; /* never valid when reporting to user space */
4560
4561         events->smi.smm = is_smm(vcpu);
4562         events->smi.pending = vcpu->arch.smi_pending;
4563         events->smi.smm_inside_nmi =
4564                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4565         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4566
4567         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4568                          | KVM_VCPUEVENT_VALID_SHADOW
4569                          | KVM_VCPUEVENT_VALID_SMM);
4570         if (vcpu->kvm->arch.exception_payload_enabled)
4571                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4572
4573         memset(&events->reserved, 0, sizeof(events->reserved));
4574 }
4575
4576 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4577
4578 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4579                                               struct kvm_vcpu_events *events)
4580 {
4581         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4582                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4583                               | KVM_VCPUEVENT_VALID_SHADOW
4584                               | KVM_VCPUEVENT_VALID_SMM
4585                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4586                 return -EINVAL;
4587
4588         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4589                 if (!vcpu->kvm->arch.exception_payload_enabled)
4590                         return -EINVAL;
4591                 if (events->exception.pending)
4592                         events->exception.injected = 0;
4593                 else
4594                         events->exception_has_payload = 0;
4595         } else {
4596                 events->exception.pending = 0;
4597                 events->exception_has_payload = 0;
4598         }
4599
4600         if ((events->exception.injected || events->exception.pending) &&
4601             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4602                 return -EINVAL;
4603
4604         /* INITs are latched while in SMM */
4605         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4606             (events->smi.smm || events->smi.pending) &&
4607             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4608                 return -EINVAL;
4609
4610         process_nmi(vcpu);
4611         vcpu->arch.exception.injected = events->exception.injected;
4612         vcpu->arch.exception.pending = events->exception.pending;
4613         vcpu->arch.exception.nr = events->exception.nr;
4614         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4615         vcpu->arch.exception.error_code = events->exception.error_code;
4616         vcpu->arch.exception.has_payload = events->exception_has_payload;
4617         vcpu->arch.exception.payload = events->exception_payload;
4618
4619         vcpu->arch.interrupt.injected = events->interrupt.injected;
4620         vcpu->arch.interrupt.nr = events->interrupt.nr;
4621         vcpu->arch.interrupt.soft = events->interrupt.soft;
4622         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4623                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4624                                                 events->interrupt.shadow);
4625
4626         vcpu->arch.nmi_injected = events->nmi.injected;
4627         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4628                 vcpu->arch.nmi_pending = events->nmi.pending;
4629         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4630
4631         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4632             lapic_in_kernel(vcpu))
4633                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4634
4635         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4636                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4637                         kvm_smm_changed(vcpu, events->smi.smm);
4638
4639                 vcpu->arch.smi_pending = events->smi.pending;
4640
4641                 if (events->smi.smm) {
4642                         if (events->smi.smm_inside_nmi)
4643                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4644                         else
4645                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4646                 }
4647
4648                 if (lapic_in_kernel(vcpu)) {
4649                         if (events->smi.latched_init)
4650                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4651                         else
4652                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4653                 }
4654         }
4655
4656         kvm_make_request(KVM_REQ_EVENT, vcpu);
4657
4658         return 0;
4659 }
4660
4661 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4662                                              struct kvm_debugregs *dbgregs)
4663 {
4664         unsigned long val;
4665
4666         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4667         kvm_get_dr(vcpu, 6, &val);
4668         dbgregs->dr6 = val;
4669         dbgregs->dr7 = vcpu->arch.dr7;
4670         dbgregs->flags = 0;
4671         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4672 }
4673
4674 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4675                                             struct kvm_debugregs *dbgregs)
4676 {
4677         if (dbgregs->flags)
4678                 return -EINVAL;
4679
4680         if (!kvm_dr6_valid(dbgregs->dr6))
4681                 return -EINVAL;
4682         if (!kvm_dr7_valid(dbgregs->dr7))
4683                 return -EINVAL;
4684
4685         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4686         kvm_update_dr0123(vcpu);
4687         vcpu->arch.dr6 = dbgregs->dr6;
4688         vcpu->arch.dr7 = dbgregs->dr7;
4689         kvm_update_dr7(vcpu);
4690
4691         return 0;
4692 }
4693
4694 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4695
4696 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4697 {
4698         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4699         u64 xstate_bv = xsave->header.xfeatures;
4700         u64 valid;
4701
4702         /*
4703          * Copy legacy XSAVE area, to avoid complications with CPUID
4704          * leaves 0 and 1 in the loop below.
4705          */
4706         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4707
4708         /* Set XSTATE_BV */
4709         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4710         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4711
4712         /*
4713          * Copy each region from the possibly compacted offset to the
4714          * non-compacted offset.
4715          */
4716         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4717         while (valid) {
4718                 u32 size, offset, ecx, edx;
4719                 u64 xfeature_mask = valid & -valid;
4720                 int xfeature_nr = fls64(xfeature_mask) - 1;
4721                 void *src;
4722
4723                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4724                             &size, &offset, &ecx, &edx);
4725
4726                 if (xfeature_nr == XFEATURE_PKRU) {
4727                         memcpy(dest + offset, &vcpu->arch.pkru,
4728                                sizeof(vcpu->arch.pkru));
4729                 } else {
4730                         src = get_xsave_addr(xsave, xfeature_nr);
4731                         if (src)
4732                                 memcpy(dest + offset, src, size);
4733                 }
4734
4735                 valid -= xfeature_mask;
4736         }
4737 }
4738
4739 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4740 {
4741         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4742         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4743         u64 valid;
4744
4745         /*
4746          * Copy legacy XSAVE area, to avoid complications with CPUID
4747          * leaves 0 and 1 in the loop below.
4748          */
4749         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4750
4751         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4752         xsave->header.xfeatures = xstate_bv;
4753         if (boot_cpu_has(X86_FEATURE_XSAVES))
4754                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4755
4756         /*
4757          * Copy each region from the non-compacted offset to the
4758          * possibly compacted offset.
4759          */
4760         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4761         while (valid) {
4762                 u32 size, offset, ecx, edx;
4763                 u64 xfeature_mask = valid & -valid;
4764                 int xfeature_nr = fls64(xfeature_mask) - 1;
4765
4766                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4767                             &size, &offset, &ecx, &edx);
4768
4769                 if (xfeature_nr == XFEATURE_PKRU) {
4770                         memcpy(&vcpu->arch.pkru, src + offset,
4771                                sizeof(vcpu->arch.pkru));
4772                 } else {
4773                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4774
4775                         if (dest)
4776                                 memcpy(dest, src + offset, size);
4777                 }
4778
4779                 valid -= xfeature_mask;
4780         }
4781 }
4782
4783 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4784                                          struct kvm_xsave *guest_xsave)
4785 {
4786         if (!vcpu->arch.guest_fpu)
4787                 return;
4788
4789         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4790                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4791                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4792         } else {
4793                 memcpy(guest_xsave->region,
4794                         &vcpu->arch.guest_fpu->state.fxsave,
4795                         sizeof(struct fxregs_state));
4796                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4797                         XFEATURE_MASK_FPSSE;
4798         }
4799 }
4800
4801 #define XSAVE_MXCSR_OFFSET 24
4802
4803 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4804                                         struct kvm_xsave *guest_xsave)
4805 {
4806         u64 xstate_bv;
4807         u32 mxcsr;
4808
4809         if (!vcpu->arch.guest_fpu)
4810                 return 0;
4811
4812         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4813         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4814
4815         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4816                 /*
4817                  * Here we allow setting states that are not present in
4818                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4819                  * with old userspace.
4820                  */
4821                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4822                         return -EINVAL;
4823                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4824         } else {
4825                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4826                         mxcsr & ~mxcsr_feature_mask)
4827                         return -EINVAL;
4828                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4829                         guest_xsave->region, sizeof(struct fxregs_state));
4830         }
4831         return 0;
4832 }
4833
4834 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4835                                         struct kvm_xcrs *guest_xcrs)
4836 {
4837         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4838                 guest_xcrs->nr_xcrs = 0;
4839                 return;
4840         }
4841
4842         guest_xcrs->nr_xcrs = 1;
4843         guest_xcrs->flags = 0;
4844         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4845         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4846 }
4847
4848 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4849                                        struct kvm_xcrs *guest_xcrs)
4850 {
4851         int i, r = 0;
4852
4853         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4854                 return -EINVAL;
4855
4856         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4857                 return -EINVAL;
4858
4859         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4860                 /* Only support XCR0 currently */
4861                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4862                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4863                                 guest_xcrs->xcrs[i].value);
4864                         break;
4865                 }
4866         if (r)
4867                 r = -EINVAL;
4868         return r;
4869 }
4870
4871 /*
4872  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4873  * stopped by the hypervisor.  This function will be called from the host only.
4874  * EINVAL is returned when the host attempts to set the flag for a guest that
4875  * does not support pv clocks.
4876  */
4877 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4878 {
4879         if (!vcpu->arch.pv_time_enabled)
4880                 return -EINVAL;
4881         vcpu->arch.pvclock_set_guest_stopped_request = true;
4882         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4883         return 0;
4884 }
4885
4886 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4887                                      struct kvm_enable_cap *cap)
4888 {
4889         int r;
4890         uint16_t vmcs_version;
4891         void __user *user_ptr;
4892
4893         if (cap->flags)
4894                 return -EINVAL;
4895
4896         switch (cap->cap) {
4897         case KVM_CAP_HYPERV_SYNIC2:
4898                 if (cap->args[0])
4899                         return -EINVAL;
4900                 fallthrough;
4901
4902         case KVM_CAP_HYPERV_SYNIC:
4903                 if (!irqchip_in_kernel(vcpu->kvm))
4904                         return -EINVAL;
4905                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4906                                              KVM_CAP_HYPERV_SYNIC2);
4907         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4908                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4909                         return -ENOTTY;
4910                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4911                 if (!r) {
4912                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4913                         if (copy_to_user(user_ptr, &vmcs_version,
4914                                          sizeof(vmcs_version)))
4915                                 r = -EFAULT;
4916                 }
4917                 return r;
4918         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4919                 if (!kvm_x86_ops.enable_direct_tlbflush)
4920                         return -ENOTTY;
4921
4922                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4923
4924         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4925                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4926
4927         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4928                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4929                 if (vcpu->arch.pv_cpuid.enforce)
4930                         kvm_update_pv_runtime(vcpu);
4931
4932                 return 0;
4933         default:
4934                 return -EINVAL;
4935         }
4936 }
4937
4938 long kvm_arch_vcpu_ioctl(struct file *filp,
4939                          unsigned int ioctl, unsigned long arg)
4940 {
4941         struct kvm_vcpu *vcpu = filp->private_data;
4942         void __user *argp = (void __user *)arg;
4943         int r;
4944         union {
4945                 struct kvm_sregs2 *sregs2;
4946                 struct kvm_lapic_state *lapic;
4947                 struct kvm_xsave *xsave;
4948                 struct kvm_xcrs *xcrs;
4949                 void *buffer;
4950         } u;
4951
4952         vcpu_load(vcpu);
4953
4954         u.buffer = NULL;
4955         switch (ioctl) {
4956         case KVM_GET_LAPIC: {
4957                 r = -EINVAL;
4958                 if (!lapic_in_kernel(vcpu))
4959                         goto out;
4960                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4961                                 GFP_KERNEL_ACCOUNT);
4962
4963                 r = -ENOMEM;
4964                 if (!u.lapic)
4965                         goto out;
4966                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4967                 if (r)
4968                         goto out;
4969                 r = -EFAULT;
4970                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4971                         goto out;
4972                 r = 0;
4973                 break;
4974         }
4975         case KVM_SET_LAPIC: {
4976                 r = -EINVAL;
4977                 if (!lapic_in_kernel(vcpu))
4978                         goto out;
4979                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4980                 if (IS_ERR(u.lapic)) {
4981                         r = PTR_ERR(u.lapic);
4982                         goto out_nofree;
4983                 }
4984
4985                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4986                 break;
4987         }
4988         case KVM_INTERRUPT: {
4989                 struct kvm_interrupt irq;
4990
4991                 r = -EFAULT;
4992                 if (copy_from_user(&irq, argp, sizeof(irq)))
4993                         goto out;
4994                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4995                 break;
4996         }
4997         case KVM_NMI: {
4998                 r = kvm_vcpu_ioctl_nmi(vcpu);
4999                 break;
5000         }
5001         case KVM_SMI: {
5002                 r = kvm_vcpu_ioctl_smi(vcpu);
5003                 break;
5004         }
5005         case KVM_SET_CPUID: {
5006                 struct kvm_cpuid __user *cpuid_arg = argp;
5007                 struct kvm_cpuid cpuid;
5008
5009                 r = -EFAULT;
5010                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5011                         goto out;
5012                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5013                 break;
5014         }
5015         case KVM_SET_CPUID2: {
5016                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5017                 struct kvm_cpuid2 cpuid;
5018
5019                 r = -EFAULT;
5020                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5021                         goto out;
5022                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5023                                               cpuid_arg->entries);
5024                 break;
5025         }
5026         case KVM_GET_CPUID2: {
5027                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5028                 struct kvm_cpuid2 cpuid;
5029
5030                 r = -EFAULT;
5031                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5032                         goto out;
5033                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5034                                               cpuid_arg->entries);
5035                 if (r)
5036                         goto out;
5037                 r = -EFAULT;
5038                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5039                         goto out;
5040                 r = 0;
5041                 break;
5042         }
5043         case KVM_GET_MSRS: {
5044                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5045                 r = msr_io(vcpu, argp, do_get_msr, 1);
5046                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5047                 break;
5048         }
5049         case KVM_SET_MSRS: {
5050                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5051                 r = msr_io(vcpu, argp, do_set_msr, 0);
5052                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5053                 break;
5054         }
5055         case KVM_TPR_ACCESS_REPORTING: {
5056                 struct kvm_tpr_access_ctl tac;
5057
5058                 r = -EFAULT;
5059                 if (copy_from_user(&tac, argp, sizeof(tac)))
5060                         goto out;
5061                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5062                 if (r)
5063                         goto out;
5064                 r = -EFAULT;
5065                 if (copy_to_user(argp, &tac, sizeof(tac)))
5066                         goto out;
5067                 r = 0;
5068                 break;
5069         };
5070         case KVM_SET_VAPIC_ADDR: {
5071                 struct kvm_vapic_addr va;
5072                 int idx;
5073
5074                 r = -EINVAL;
5075                 if (!lapic_in_kernel(vcpu))
5076                         goto out;
5077                 r = -EFAULT;
5078                 if (copy_from_user(&va, argp, sizeof(va)))
5079                         goto out;
5080                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5081                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5082                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5083                 break;
5084         }
5085         case KVM_X86_SETUP_MCE: {
5086                 u64 mcg_cap;
5087
5088                 r = -EFAULT;
5089                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5090                         goto out;
5091                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5092                 break;
5093         }
5094         case KVM_X86_SET_MCE: {
5095                 struct kvm_x86_mce mce;
5096
5097                 r = -EFAULT;
5098                 if (copy_from_user(&mce, argp, sizeof(mce)))
5099                         goto out;
5100                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5101                 break;
5102         }
5103         case KVM_GET_VCPU_EVENTS: {
5104                 struct kvm_vcpu_events events;
5105
5106                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5107
5108                 r = -EFAULT;
5109                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5110                         break;
5111                 r = 0;
5112                 break;
5113         }
5114         case KVM_SET_VCPU_EVENTS: {
5115                 struct kvm_vcpu_events events;
5116
5117                 r = -EFAULT;
5118                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5119                         break;
5120
5121                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5122                 break;
5123         }
5124         case KVM_GET_DEBUGREGS: {
5125                 struct kvm_debugregs dbgregs;
5126
5127                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5128
5129                 r = -EFAULT;
5130                 if (copy_to_user(argp, &dbgregs,
5131                                  sizeof(struct kvm_debugregs)))
5132                         break;
5133                 r = 0;
5134                 break;
5135         }
5136         case KVM_SET_DEBUGREGS: {
5137                 struct kvm_debugregs dbgregs;
5138
5139                 r = -EFAULT;
5140                 if (copy_from_user(&dbgregs, argp,
5141                                    sizeof(struct kvm_debugregs)))
5142                         break;
5143
5144                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5145                 break;
5146         }
5147         case KVM_GET_XSAVE: {
5148                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5149                 r = -ENOMEM;
5150                 if (!u.xsave)
5151                         break;
5152
5153                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5154
5155                 r = -EFAULT;
5156                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5157                         break;
5158                 r = 0;
5159                 break;
5160         }
5161         case KVM_SET_XSAVE: {
5162                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5163                 if (IS_ERR(u.xsave)) {
5164                         r = PTR_ERR(u.xsave);
5165                         goto out_nofree;
5166                 }
5167
5168                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5169                 break;
5170         }
5171         case KVM_GET_XCRS: {
5172                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5173                 r = -ENOMEM;
5174                 if (!u.xcrs)
5175                         break;
5176
5177                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5178
5179                 r = -EFAULT;
5180                 if (copy_to_user(argp, u.xcrs,
5181                                  sizeof(struct kvm_xcrs)))
5182                         break;
5183                 r = 0;
5184                 break;
5185         }
5186         case KVM_SET_XCRS: {
5187                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5188                 if (IS_ERR(u.xcrs)) {
5189                         r = PTR_ERR(u.xcrs);
5190                         goto out_nofree;
5191                 }
5192
5193                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5194                 break;
5195         }
5196         case KVM_SET_TSC_KHZ: {
5197                 u32 user_tsc_khz;
5198
5199                 r = -EINVAL;
5200                 user_tsc_khz = (u32)arg;
5201
5202                 if (kvm_has_tsc_control &&
5203                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5204                         goto out;
5205
5206                 if (user_tsc_khz == 0)
5207                         user_tsc_khz = tsc_khz;
5208
5209                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5210                         r = 0;
5211
5212                 goto out;
5213         }
5214         case KVM_GET_TSC_KHZ: {
5215                 r = vcpu->arch.virtual_tsc_khz;
5216                 goto out;
5217         }
5218         case KVM_KVMCLOCK_CTRL: {
5219                 r = kvm_set_guest_paused(vcpu);
5220                 goto out;
5221         }
5222         case KVM_ENABLE_CAP: {
5223                 struct kvm_enable_cap cap;
5224
5225                 r = -EFAULT;
5226                 if (copy_from_user(&cap, argp, sizeof(cap)))
5227                         goto out;
5228                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5229                 break;
5230         }
5231         case KVM_GET_NESTED_STATE: {
5232                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5233                 u32 user_data_size;
5234
5235                 r = -EINVAL;
5236                 if (!kvm_x86_ops.nested_ops->get_state)
5237                         break;
5238
5239                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5240                 r = -EFAULT;
5241                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5242                         break;
5243
5244                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5245                                                      user_data_size);
5246                 if (r < 0)
5247                         break;
5248
5249                 if (r > user_data_size) {
5250                         if (put_user(r, &user_kvm_nested_state->size))
5251                                 r = -EFAULT;
5252                         else
5253                                 r = -E2BIG;
5254                         break;
5255                 }
5256
5257                 r = 0;
5258                 break;
5259         }
5260         case KVM_SET_NESTED_STATE: {
5261                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5262                 struct kvm_nested_state kvm_state;
5263                 int idx;
5264
5265                 r = -EINVAL;
5266                 if (!kvm_x86_ops.nested_ops->set_state)
5267                         break;
5268
5269                 r = -EFAULT;
5270                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5271                         break;
5272
5273                 r = -EINVAL;
5274                 if (kvm_state.size < sizeof(kvm_state))
5275                         break;
5276
5277                 if (kvm_state.flags &
5278                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5279                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5280                       | KVM_STATE_NESTED_GIF_SET))
5281                         break;
5282
5283                 /* nested_run_pending implies guest_mode.  */
5284                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5285                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5286                         break;
5287
5288                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5289                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5290                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5291                 break;
5292         }
5293         case KVM_GET_SUPPORTED_HV_CPUID:
5294                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5295                 break;
5296 #ifdef CONFIG_KVM_XEN
5297         case KVM_XEN_VCPU_GET_ATTR: {
5298                 struct kvm_xen_vcpu_attr xva;
5299
5300                 r = -EFAULT;
5301                 if (copy_from_user(&xva, argp, sizeof(xva)))
5302                         goto out;
5303                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5304                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5305                         r = -EFAULT;
5306                 break;
5307         }
5308         case KVM_XEN_VCPU_SET_ATTR: {
5309                 struct kvm_xen_vcpu_attr xva;
5310
5311                 r = -EFAULT;
5312                 if (copy_from_user(&xva, argp, sizeof(xva)))
5313                         goto out;
5314                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5315                 break;
5316         }
5317 #endif
5318         case KVM_GET_SREGS2: {
5319                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5320                 r = -ENOMEM;
5321                 if (!u.sregs2)
5322                         goto out;
5323                 __get_sregs2(vcpu, u.sregs2);
5324                 r = -EFAULT;
5325                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5326                         goto out;
5327                 r = 0;
5328                 break;
5329         }
5330         case KVM_SET_SREGS2: {
5331                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5332                 if (IS_ERR(u.sregs2)) {
5333                         r = PTR_ERR(u.sregs2);
5334                         u.sregs2 = NULL;
5335                         goto out;
5336                 }
5337                 r = __set_sregs2(vcpu, u.sregs2);
5338                 break;
5339         }
5340         default:
5341                 r = -EINVAL;
5342         }
5343 out:
5344         kfree(u.buffer);
5345 out_nofree:
5346         vcpu_put(vcpu);
5347         return r;
5348 }
5349
5350 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5351 {
5352         return VM_FAULT_SIGBUS;
5353 }
5354
5355 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5356 {
5357         int ret;
5358
5359         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5360                 return -EINVAL;
5361         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5362         return ret;
5363 }
5364
5365 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5366                                               u64 ident_addr)
5367 {
5368         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5369 }
5370
5371 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5372                                          unsigned long kvm_nr_mmu_pages)
5373 {
5374         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5375                 return -EINVAL;
5376
5377         mutex_lock(&kvm->slots_lock);
5378
5379         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5380         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5381
5382         mutex_unlock(&kvm->slots_lock);
5383         return 0;
5384 }
5385
5386 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5387 {
5388         return kvm->arch.n_max_mmu_pages;
5389 }
5390
5391 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5392 {
5393         struct kvm_pic *pic = kvm->arch.vpic;
5394         int r;
5395
5396         r = 0;
5397         switch (chip->chip_id) {
5398         case KVM_IRQCHIP_PIC_MASTER:
5399                 memcpy(&chip->chip.pic, &pic->pics[0],
5400                         sizeof(struct kvm_pic_state));
5401                 break;
5402         case KVM_IRQCHIP_PIC_SLAVE:
5403                 memcpy(&chip->chip.pic, &pic->pics[1],
5404                         sizeof(struct kvm_pic_state));
5405                 break;
5406         case KVM_IRQCHIP_IOAPIC:
5407                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5408                 break;
5409         default:
5410                 r = -EINVAL;
5411                 break;
5412         }
5413         return r;
5414 }
5415
5416 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5417 {
5418         struct kvm_pic *pic = kvm->arch.vpic;
5419         int r;
5420
5421         r = 0;
5422         switch (chip->chip_id) {
5423         case KVM_IRQCHIP_PIC_MASTER:
5424                 spin_lock(&pic->lock);
5425                 memcpy(&pic->pics[0], &chip->chip.pic,
5426                         sizeof(struct kvm_pic_state));
5427                 spin_unlock(&pic->lock);
5428                 break;
5429         case KVM_IRQCHIP_PIC_SLAVE:
5430                 spin_lock(&pic->lock);
5431                 memcpy(&pic->pics[1], &chip->chip.pic,
5432                         sizeof(struct kvm_pic_state));
5433                 spin_unlock(&pic->lock);
5434                 break;
5435         case KVM_IRQCHIP_IOAPIC:
5436                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5437                 break;
5438         default:
5439                 r = -EINVAL;
5440                 break;
5441         }
5442         kvm_pic_update_irq(pic);
5443         return r;
5444 }
5445
5446 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5447 {
5448         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5449
5450         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5451
5452         mutex_lock(&kps->lock);
5453         memcpy(ps, &kps->channels, sizeof(*ps));
5454         mutex_unlock(&kps->lock);
5455         return 0;
5456 }
5457
5458 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5459 {
5460         int i;
5461         struct kvm_pit *pit = kvm->arch.vpit;
5462
5463         mutex_lock(&pit->pit_state.lock);
5464         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5465         for (i = 0; i < 3; i++)
5466                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5467         mutex_unlock(&pit->pit_state.lock);
5468         return 0;
5469 }
5470
5471 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5472 {
5473         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5474         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5475                 sizeof(ps->channels));
5476         ps->flags = kvm->arch.vpit->pit_state.flags;
5477         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5478         memset(&ps->reserved, 0, sizeof(ps->reserved));
5479         return 0;
5480 }
5481
5482 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5483 {
5484         int start = 0;
5485         int i;
5486         u32 prev_legacy, cur_legacy;
5487         struct kvm_pit *pit = kvm->arch.vpit;
5488
5489         mutex_lock(&pit->pit_state.lock);
5490         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5491         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5492         if (!prev_legacy && cur_legacy)
5493                 start = 1;
5494         memcpy(&pit->pit_state.channels, &ps->channels,
5495                sizeof(pit->pit_state.channels));
5496         pit->pit_state.flags = ps->flags;
5497         for (i = 0; i < 3; i++)
5498                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5499                                    start && i == 0);
5500         mutex_unlock(&pit->pit_state.lock);
5501         return 0;
5502 }
5503
5504 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5505                                  struct kvm_reinject_control *control)
5506 {
5507         struct kvm_pit *pit = kvm->arch.vpit;
5508
5509         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5510          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5511          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5512          */
5513         mutex_lock(&pit->pit_state.lock);
5514         kvm_pit_set_reinject(pit, control->pit_reinject);
5515         mutex_unlock(&pit->pit_state.lock);
5516
5517         return 0;
5518 }
5519
5520 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5521 {
5522
5523         /*
5524          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5525          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5526          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5527          * VM-Exit.
5528          */
5529         struct kvm_vcpu *vcpu;
5530         int i;
5531
5532         kvm_for_each_vcpu(i, vcpu, kvm)
5533                 kvm_vcpu_kick(vcpu);
5534 }
5535
5536 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5537                         bool line_status)
5538 {
5539         if (!irqchip_in_kernel(kvm))
5540                 return -ENXIO;
5541
5542         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5543                                         irq_event->irq, irq_event->level,
5544                                         line_status);
5545         return 0;
5546 }
5547
5548 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5549                             struct kvm_enable_cap *cap)
5550 {
5551         int r;
5552
5553         if (cap->flags)
5554                 return -EINVAL;
5555
5556         switch (cap->cap) {
5557         case KVM_CAP_DISABLE_QUIRKS:
5558                 kvm->arch.disabled_quirks = cap->args[0];
5559                 r = 0;
5560                 break;
5561         case KVM_CAP_SPLIT_IRQCHIP: {
5562                 mutex_lock(&kvm->lock);
5563                 r = -EINVAL;
5564                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5565                         goto split_irqchip_unlock;
5566                 r = -EEXIST;
5567                 if (irqchip_in_kernel(kvm))
5568                         goto split_irqchip_unlock;
5569                 if (kvm->created_vcpus)
5570                         goto split_irqchip_unlock;
5571                 r = kvm_setup_empty_irq_routing(kvm);
5572                 if (r)
5573                         goto split_irqchip_unlock;
5574                 /* Pairs with irqchip_in_kernel. */
5575                 smp_wmb();
5576                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5577                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5578                 r = 0;
5579 split_irqchip_unlock:
5580                 mutex_unlock(&kvm->lock);
5581                 break;
5582         }
5583         case KVM_CAP_X2APIC_API:
5584                 r = -EINVAL;
5585                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5586                         break;
5587
5588                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5589                         kvm->arch.x2apic_format = true;
5590                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5591                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5592
5593                 r = 0;
5594                 break;
5595         case KVM_CAP_X86_DISABLE_EXITS:
5596                 r = -EINVAL;
5597                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5598                         break;
5599
5600                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5601                         kvm_can_mwait_in_guest())
5602                         kvm->arch.mwait_in_guest = true;
5603                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5604                         kvm->arch.hlt_in_guest = true;
5605                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5606                         kvm->arch.pause_in_guest = true;
5607                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5608                         kvm->arch.cstate_in_guest = true;
5609                 r = 0;
5610                 break;
5611         case KVM_CAP_MSR_PLATFORM_INFO:
5612                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5613                 r = 0;
5614                 break;
5615         case KVM_CAP_EXCEPTION_PAYLOAD:
5616                 kvm->arch.exception_payload_enabled = cap->args[0];
5617                 r = 0;
5618                 break;
5619         case KVM_CAP_X86_USER_SPACE_MSR:
5620                 kvm->arch.user_space_msr_mask = cap->args[0];
5621                 r = 0;
5622                 break;
5623         case KVM_CAP_X86_BUS_LOCK_EXIT:
5624                 r = -EINVAL;
5625                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5626                         break;
5627
5628                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5629                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5630                         break;
5631
5632                 if (kvm_has_bus_lock_exit &&
5633                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5634                         kvm->arch.bus_lock_detection_enabled = true;
5635                 r = 0;
5636                 break;
5637 #ifdef CONFIG_X86_SGX_KVM
5638         case KVM_CAP_SGX_ATTRIBUTE: {
5639                 unsigned long allowed_attributes = 0;
5640
5641                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5642                 if (r)
5643                         break;
5644
5645                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5646                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5647                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5648                         kvm->arch.sgx_provisioning_allowed = true;
5649                 else
5650                         r = -EINVAL;
5651                 break;
5652         }
5653 #endif
5654         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5655                 r = -EINVAL;
5656                 if (kvm_x86_ops.vm_copy_enc_context_from)
5657                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5658                 return r;
5659         case KVM_CAP_EXIT_HYPERCALL:
5660                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5661                         r = -EINVAL;
5662                         break;
5663                 }
5664                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5665                 r = 0;
5666                 break;
5667         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5668                 r = -EINVAL;
5669                 if (cap->args[0] & ~1)
5670                         break;
5671                 kvm->arch.exit_on_emulation_error = cap->args[0];
5672                 r = 0;
5673                 break;
5674         default:
5675                 r = -EINVAL;
5676                 break;
5677         }
5678         return r;
5679 }
5680
5681 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5682 {
5683         struct kvm_x86_msr_filter *msr_filter;
5684
5685         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5686         if (!msr_filter)
5687                 return NULL;
5688
5689         msr_filter->default_allow = default_allow;
5690         return msr_filter;
5691 }
5692
5693 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5694 {
5695         u32 i;
5696
5697         if (!msr_filter)
5698                 return;
5699
5700         for (i = 0; i < msr_filter->count; i++)
5701                 kfree(msr_filter->ranges[i].bitmap);
5702
5703         kfree(msr_filter);
5704 }
5705
5706 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5707                               struct kvm_msr_filter_range *user_range)
5708 {
5709         unsigned long *bitmap = NULL;
5710         size_t bitmap_size;
5711
5712         if (!user_range->nmsrs)
5713                 return 0;
5714
5715         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5716                 return -EINVAL;
5717
5718         if (!user_range->flags)
5719                 return -EINVAL;
5720
5721         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5722         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5723                 return -EINVAL;
5724
5725         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5726         if (IS_ERR(bitmap))
5727                 return PTR_ERR(bitmap);
5728
5729         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5730                 .flags = user_range->flags,
5731                 .base = user_range->base,
5732                 .nmsrs = user_range->nmsrs,
5733                 .bitmap = bitmap,
5734         };
5735
5736         msr_filter->count++;
5737         return 0;
5738 }
5739
5740 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5741 {
5742         struct kvm_msr_filter __user *user_msr_filter = argp;
5743         struct kvm_x86_msr_filter *new_filter, *old_filter;
5744         struct kvm_msr_filter filter;
5745         bool default_allow;
5746         bool empty = true;
5747         int r = 0;
5748         u32 i;
5749
5750         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5751                 return -EFAULT;
5752
5753         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5754                 empty &= !filter.ranges[i].nmsrs;
5755
5756         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5757         if (empty && !default_allow)
5758                 return -EINVAL;
5759
5760         new_filter = kvm_alloc_msr_filter(default_allow);
5761         if (!new_filter)
5762                 return -ENOMEM;
5763
5764         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5765                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5766                 if (r) {
5767                         kvm_free_msr_filter(new_filter);
5768                         return r;
5769                 }
5770         }
5771
5772         mutex_lock(&kvm->lock);
5773
5774         /* The per-VM filter is protected by kvm->lock... */
5775         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5776
5777         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5778         synchronize_srcu(&kvm->srcu);
5779
5780         kvm_free_msr_filter(old_filter);
5781
5782         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5783         mutex_unlock(&kvm->lock);
5784
5785         return 0;
5786 }
5787
5788 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5789 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5790 {
5791         struct kvm_vcpu *vcpu;
5792         int i, ret = 0;
5793
5794         mutex_lock(&kvm->lock);
5795         kvm_for_each_vcpu(i, vcpu, kvm) {
5796                 if (!vcpu->arch.pv_time_enabled)
5797                         continue;
5798
5799                 ret = kvm_set_guest_paused(vcpu);
5800                 if (ret) {
5801                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5802                                 vcpu->vcpu_id, ret);
5803                         break;
5804                 }
5805         }
5806         mutex_unlock(&kvm->lock);
5807
5808         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5809 }
5810
5811 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5812 {
5813         switch (state) {
5814         case PM_HIBERNATION_PREPARE:
5815         case PM_SUSPEND_PREPARE:
5816                 return kvm_arch_suspend_notifier(kvm);
5817         }
5818
5819         return NOTIFY_DONE;
5820 }
5821 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5822
5823 long kvm_arch_vm_ioctl(struct file *filp,
5824                        unsigned int ioctl, unsigned long arg)
5825 {
5826         struct kvm *kvm = filp->private_data;
5827         void __user *argp = (void __user *)arg;
5828         int r = -ENOTTY;
5829         /*
5830          * This union makes it completely explicit to gcc-3.x
5831          * that these two variables' stack usage should be
5832          * combined, not added together.
5833          */
5834         union {
5835                 struct kvm_pit_state ps;
5836                 struct kvm_pit_state2 ps2;
5837                 struct kvm_pit_config pit_config;
5838         } u;
5839
5840         switch (ioctl) {
5841         case KVM_SET_TSS_ADDR:
5842                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5843                 break;
5844         case KVM_SET_IDENTITY_MAP_ADDR: {
5845                 u64 ident_addr;
5846
5847                 mutex_lock(&kvm->lock);
5848                 r = -EINVAL;
5849                 if (kvm->created_vcpus)
5850                         goto set_identity_unlock;
5851                 r = -EFAULT;
5852                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5853                         goto set_identity_unlock;
5854                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5855 set_identity_unlock:
5856                 mutex_unlock(&kvm->lock);
5857                 break;
5858         }
5859         case KVM_SET_NR_MMU_PAGES:
5860                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5861                 break;
5862         case KVM_GET_NR_MMU_PAGES:
5863                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5864                 break;
5865         case KVM_CREATE_IRQCHIP: {
5866                 mutex_lock(&kvm->lock);
5867
5868                 r = -EEXIST;
5869                 if (irqchip_in_kernel(kvm))
5870                         goto create_irqchip_unlock;
5871
5872                 r = -EINVAL;
5873                 if (kvm->created_vcpus)
5874                         goto create_irqchip_unlock;
5875
5876                 r = kvm_pic_init(kvm);
5877                 if (r)
5878                         goto create_irqchip_unlock;
5879
5880                 r = kvm_ioapic_init(kvm);
5881                 if (r) {
5882                         kvm_pic_destroy(kvm);
5883                         goto create_irqchip_unlock;
5884                 }
5885
5886                 r = kvm_setup_default_irq_routing(kvm);
5887                 if (r) {
5888                         kvm_ioapic_destroy(kvm);
5889                         kvm_pic_destroy(kvm);
5890                         goto create_irqchip_unlock;
5891                 }
5892                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5893                 smp_wmb();
5894                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5895         create_irqchip_unlock:
5896                 mutex_unlock(&kvm->lock);
5897                 break;
5898         }
5899         case KVM_CREATE_PIT:
5900                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5901                 goto create_pit;
5902         case KVM_CREATE_PIT2:
5903                 r = -EFAULT;
5904                 if (copy_from_user(&u.pit_config, argp,
5905                                    sizeof(struct kvm_pit_config)))
5906                         goto out;
5907         create_pit:
5908                 mutex_lock(&kvm->lock);
5909                 r = -EEXIST;
5910                 if (kvm->arch.vpit)
5911                         goto create_pit_unlock;
5912                 r = -ENOMEM;
5913                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5914                 if (kvm->arch.vpit)
5915                         r = 0;
5916         create_pit_unlock:
5917                 mutex_unlock(&kvm->lock);
5918                 break;
5919         case KVM_GET_IRQCHIP: {
5920                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5921                 struct kvm_irqchip *chip;
5922
5923                 chip = memdup_user(argp, sizeof(*chip));
5924                 if (IS_ERR(chip)) {
5925                         r = PTR_ERR(chip);
5926                         goto out;
5927                 }
5928
5929                 r = -ENXIO;
5930                 if (!irqchip_kernel(kvm))
5931                         goto get_irqchip_out;
5932                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5933                 if (r)
5934                         goto get_irqchip_out;
5935                 r = -EFAULT;
5936                 if (copy_to_user(argp, chip, sizeof(*chip)))
5937                         goto get_irqchip_out;
5938                 r = 0;
5939         get_irqchip_out:
5940                 kfree(chip);
5941                 break;
5942         }
5943         case KVM_SET_IRQCHIP: {
5944                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5945                 struct kvm_irqchip *chip;
5946
5947                 chip = memdup_user(argp, sizeof(*chip));
5948                 if (IS_ERR(chip)) {
5949                         r = PTR_ERR(chip);
5950                         goto out;
5951                 }
5952
5953                 r = -ENXIO;
5954                 if (!irqchip_kernel(kvm))
5955                         goto set_irqchip_out;
5956                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5957         set_irqchip_out:
5958                 kfree(chip);
5959                 break;
5960         }
5961         case KVM_GET_PIT: {
5962                 r = -EFAULT;
5963                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5964                         goto out;
5965                 r = -ENXIO;
5966                 if (!kvm->arch.vpit)
5967                         goto out;
5968                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5969                 if (r)
5970                         goto out;
5971                 r = -EFAULT;
5972                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5973                         goto out;
5974                 r = 0;
5975                 break;
5976         }
5977         case KVM_SET_PIT: {
5978                 r = -EFAULT;
5979                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5980                         goto out;
5981                 mutex_lock(&kvm->lock);
5982                 r = -ENXIO;
5983                 if (!kvm->arch.vpit)
5984                         goto set_pit_out;
5985                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5986 set_pit_out:
5987                 mutex_unlock(&kvm->lock);
5988                 break;
5989         }
5990         case KVM_GET_PIT2: {
5991                 r = -ENXIO;
5992                 if (!kvm->arch.vpit)
5993                         goto out;
5994                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5995                 if (r)
5996                         goto out;
5997                 r = -EFAULT;
5998                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5999                         goto out;
6000                 r = 0;
6001                 break;
6002         }
6003         case KVM_SET_PIT2: {
6004                 r = -EFAULT;
6005                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6006                         goto out;
6007                 mutex_lock(&kvm->lock);
6008                 r = -ENXIO;
6009                 if (!kvm->arch.vpit)
6010                         goto set_pit2_out;
6011                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6012 set_pit2_out:
6013                 mutex_unlock(&kvm->lock);
6014                 break;
6015         }
6016         case KVM_REINJECT_CONTROL: {
6017                 struct kvm_reinject_control control;
6018                 r =  -EFAULT;
6019                 if (copy_from_user(&control, argp, sizeof(control)))
6020                         goto out;
6021                 r = -ENXIO;
6022                 if (!kvm->arch.vpit)
6023                         goto out;
6024                 r = kvm_vm_ioctl_reinject(kvm, &control);
6025                 break;
6026         }
6027         case KVM_SET_BOOT_CPU_ID:
6028                 r = 0;
6029                 mutex_lock(&kvm->lock);
6030                 if (kvm->created_vcpus)
6031                         r = -EBUSY;
6032                 else
6033                         kvm->arch.bsp_vcpu_id = arg;
6034                 mutex_unlock(&kvm->lock);
6035                 break;
6036 #ifdef CONFIG_KVM_XEN
6037         case KVM_XEN_HVM_CONFIG: {
6038                 struct kvm_xen_hvm_config xhc;
6039                 r = -EFAULT;
6040                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6041                         goto out;
6042                 r = kvm_xen_hvm_config(kvm, &xhc);
6043                 break;
6044         }
6045         case KVM_XEN_HVM_GET_ATTR: {
6046                 struct kvm_xen_hvm_attr xha;
6047
6048                 r = -EFAULT;
6049                 if (copy_from_user(&xha, argp, sizeof(xha)))
6050                         goto out;
6051                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6052                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6053                         r = -EFAULT;
6054                 break;
6055         }
6056         case KVM_XEN_HVM_SET_ATTR: {
6057                 struct kvm_xen_hvm_attr xha;
6058
6059                 r = -EFAULT;
6060                 if (copy_from_user(&xha, argp, sizeof(xha)))
6061                         goto out;
6062                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6063                 break;
6064         }
6065 #endif
6066         case KVM_SET_CLOCK: {
6067                 struct kvm_arch *ka = &kvm->arch;
6068                 struct kvm_clock_data user_ns;
6069                 u64 now_ns;
6070
6071                 r = -EFAULT;
6072                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
6073                         goto out;
6074
6075                 r = -EINVAL;
6076                 if (user_ns.flags)
6077                         goto out;
6078
6079                 r = 0;
6080                 /*
6081                  * TODO: userspace has to take care of races with VCPU_RUN, so
6082                  * kvm_gen_update_masterclock() can be cut down to locked
6083                  * pvclock_update_vm_gtod_copy().
6084                  */
6085                 kvm_gen_update_masterclock(kvm);
6086
6087                 /*
6088                  * This pairs with kvm_guest_time_update(): when masterclock is
6089                  * in use, we use master_kernel_ns + kvmclock_offset to set
6090                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6091                  * is slightly ahead) here we risk going negative on unsigned
6092                  * 'system_time' when 'user_ns.clock' is very small.
6093                  */
6094                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6095                 if (kvm->arch.use_master_clock)
6096                         now_ns = ka->master_kernel_ns;
6097                 else
6098                         now_ns = get_kvmclock_base_ns();
6099                 ka->kvmclock_offset = user_ns.clock - now_ns;
6100                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6101
6102                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6103                 break;
6104         }
6105         case KVM_GET_CLOCK: {
6106                 struct kvm_clock_data user_ns;
6107                 u64 now_ns;
6108
6109                 now_ns = get_kvmclock_ns(kvm);
6110                 user_ns.clock = now_ns;
6111                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6112                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6113
6114                 r = -EFAULT;
6115                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6116                         goto out;
6117                 r = 0;
6118                 break;
6119         }
6120         case KVM_MEMORY_ENCRYPT_OP: {
6121                 r = -ENOTTY;
6122                 if (kvm_x86_ops.mem_enc_op)
6123                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6124                 break;
6125         }
6126         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6127                 struct kvm_enc_region region;
6128
6129                 r = -EFAULT;
6130                 if (copy_from_user(&region, argp, sizeof(region)))
6131                         goto out;
6132
6133                 r = -ENOTTY;
6134                 if (kvm_x86_ops.mem_enc_reg_region)
6135                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6136                 break;
6137         }
6138         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6139                 struct kvm_enc_region region;
6140
6141                 r = -EFAULT;
6142                 if (copy_from_user(&region, argp, sizeof(region)))
6143                         goto out;
6144
6145                 r = -ENOTTY;
6146                 if (kvm_x86_ops.mem_enc_unreg_region)
6147                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6148                 break;
6149         }
6150         case KVM_HYPERV_EVENTFD: {
6151                 struct kvm_hyperv_eventfd hvevfd;
6152
6153                 r = -EFAULT;
6154                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6155                         goto out;
6156                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6157                 break;
6158         }
6159         case KVM_SET_PMU_EVENT_FILTER:
6160                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6161                 break;
6162         case KVM_X86_SET_MSR_FILTER:
6163                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6164                 break;
6165         default:
6166                 r = -ENOTTY;
6167         }
6168 out:
6169         return r;
6170 }
6171
6172 static void kvm_init_msr_list(void)
6173 {
6174         struct x86_pmu_capability x86_pmu;
6175         u32 dummy[2];
6176         unsigned i;
6177
6178         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6179                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6180
6181         perf_get_x86_pmu_capability(&x86_pmu);
6182
6183         num_msrs_to_save = 0;
6184         num_emulated_msrs = 0;
6185         num_msr_based_features = 0;
6186
6187         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6188                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6189                         continue;
6190
6191                 /*
6192                  * Even MSRs that are valid in the host may not be exposed
6193                  * to the guests in some cases.
6194                  */
6195                 switch (msrs_to_save_all[i]) {
6196                 case MSR_IA32_BNDCFGS:
6197                         if (!kvm_mpx_supported())
6198                                 continue;
6199                         break;
6200                 case MSR_TSC_AUX:
6201                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6202                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6203                                 continue;
6204                         break;
6205                 case MSR_IA32_UMWAIT_CONTROL:
6206                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6207                                 continue;
6208                         break;
6209                 case MSR_IA32_RTIT_CTL:
6210                 case MSR_IA32_RTIT_STATUS:
6211                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6212                                 continue;
6213                         break;
6214                 case MSR_IA32_RTIT_CR3_MATCH:
6215                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6216                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6217                                 continue;
6218                         break;
6219                 case MSR_IA32_RTIT_OUTPUT_BASE:
6220                 case MSR_IA32_RTIT_OUTPUT_MASK:
6221                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6222                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6223                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6224                                 continue;
6225                         break;
6226                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6227                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6228                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6229                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6230                                 continue;
6231                         break;
6232                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6233                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6234                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6235                                 continue;
6236                         break;
6237                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6238                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6239                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6240                                 continue;
6241                         break;
6242                 default:
6243                         break;
6244                 }
6245
6246                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6247         }
6248
6249         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6250                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6251                         continue;
6252
6253                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6254         }
6255
6256         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6257                 struct kvm_msr_entry msr;
6258
6259                 msr.index = msr_based_features_all[i];
6260                 if (kvm_get_msr_feature(&msr))
6261                         continue;
6262
6263                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6264         }
6265 }
6266
6267 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6268                            const void *v)
6269 {
6270         int handled = 0;
6271         int n;
6272
6273         do {
6274                 n = min(len, 8);
6275                 if (!(lapic_in_kernel(vcpu) &&
6276                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6277                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6278                         break;
6279                 handled += n;
6280                 addr += n;
6281                 len -= n;
6282                 v += n;
6283         } while (len);
6284
6285         return handled;
6286 }
6287
6288 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6289 {
6290         int handled = 0;
6291         int n;
6292
6293         do {
6294                 n = min(len, 8);
6295                 if (!(lapic_in_kernel(vcpu) &&
6296                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6297                                          addr, n, v))
6298                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6299                         break;
6300                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6301                 handled += n;
6302                 addr += n;
6303                 len -= n;
6304                 v += n;
6305         } while (len);
6306
6307         return handled;
6308 }
6309
6310 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6311                         struct kvm_segment *var, int seg)
6312 {
6313         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6314 }
6315
6316 void kvm_get_segment(struct kvm_vcpu *vcpu,
6317                      struct kvm_segment *var, int seg)
6318 {
6319         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6320 }
6321
6322 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6323                            struct x86_exception *exception)
6324 {
6325         gpa_t t_gpa;
6326
6327         BUG_ON(!mmu_is_nested(vcpu));
6328
6329         /* NPT walks are always user-walks */
6330         access |= PFERR_USER_MASK;
6331         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6332
6333         return t_gpa;
6334 }
6335
6336 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6337                               struct x86_exception *exception)
6338 {
6339         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6340         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6341 }
6342 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6343
6344  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6345                                 struct x86_exception *exception)
6346 {
6347         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6348         access |= PFERR_FETCH_MASK;
6349         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6350 }
6351
6352 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6353                                struct x86_exception *exception)
6354 {
6355         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6356         access |= PFERR_WRITE_MASK;
6357         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6358 }
6359 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6360
6361 /* uses this to access any guest's mapped memory without checking CPL */
6362 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6363                                 struct x86_exception *exception)
6364 {
6365         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6366 }
6367
6368 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6369                                       struct kvm_vcpu *vcpu, u32 access,
6370                                       struct x86_exception *exception)
6371 {
6372         void *data = val;
6373         int r = X86EMUL_CONTINUE;
6374
6375         while (bytes) {
6376                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6377                                                             exception);
6378                 unsigned offset = addr & (PAGE_SIZE-1);
6379                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6380                 int ret;
6381
6382                 if (gpa == UNMAPPED_GVA)
6383                         return X86EMUL_PROPAGATE_FAULT;
6384                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6385                                                offset, toread);
6386                 if (ret < 0) {
6387                         r = X86EMUL_IO_NEEDED;
6388                         goto out;
6389                 }
6390
6391                 bytes -= toread;
6392                 data += toread;
6393                 addr += toread;
6394         }
6395 out:
6396         return r;
6397 }
6398
6399 /* used for instruction fetching */
6400 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6401                                 gva_t addr, void *val, unsigned int bytes,
6402                                 struct x86_exception *exception)
6403 {
6404         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6405         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6406         unsigned offset;
6407         int ret;
6408
6409         /* Inline kvm_read_guest_virt_helper for speed.  */
6410         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6411                                                     exception);
6412         if (unlikely(gpa == UNMAPPED_GVA))
6413                 return X86EMUL_PROPAGATE_FAULT;
6414
6415         offset = addr & (PAGE_SIZE-1);
6416         if (WARN_ON(offset + bytes > PAGE_SIZE))
6417                 bytes = (unsigned)PAGE_SIZE - offset;
6418         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6419                                        offset, bytes);
6420         if (unlikely(ret < 0))
6421                 return X86EMUL_IO_NEEDED;
6422
6423         return X86EMUL_CONTINUE;
6424 }
6425
6426 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6427                                gva_t addr, void *val, unsigned int bytes,
6428                                struct x86_exception *exception)
6429 {
6430         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6431
6432         /*
6433          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6434          * is returned, but our callers are not ready for that and they blindly
6435          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6436          * uninitialized kernel stack memory into cr2 and error code.
6437          */
6438         memset(exception, 0, sizeof(*exception));
6439         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6440                                           exception);
6441 }
6442 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6443
6444 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6445                              gva_t addr, void *val, unsigned int bytes,
6446                              struct x86_exception *exception, bool system)
6447 {
6448         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6449         u32 access = 0;
6450
6451         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6452                 access |= PFERR_USER_MASK;
6453
6454         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6455 }
6456
6457 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6458                 unsigned long addr, void *val, unsigned int bytes)
6459 {
6460         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6461         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6462
6463         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6464 }
6465
6466 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6467                                       struct kvm_vcpu *vcpu, u32 access,
6468                                       struct x86_exception *exception)
6469 {
6470         void *data = val;
6471         int r = X86EMUL_CONTINUE;
6472
6473         while (bytes) {
6474                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6475                                                              access,
6476                                                              exception);
6477                 unsigned offset = addr & (PAGE_SIZE-1);
6478                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6479                 int ret;
6480
6481                 if (gpa == UNMAPPED_GVA)
6482                         return X86EMUL_PROPAGATE_FAULT;
6483                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6484                 if (ret < 0) {
6485                         r = X86EMUL_IO_NEEDED;
6486                         goto out;
6487                 }
6488
6489                 bytes -= towrite;
6490                 data += towrite;
6491                 addr += towrite;
6492         }
6493 out:
6494         return r;
6495 }
6496
6497 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6498                               unsigned int bytes, struct x86_exception *exception,
6499                               bool system)
6500 {
6501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6502         u32 access = PFERR_WRITE_MASK;
6503
6504         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6505                 access |= PFERR_USER_MASK;
6506
6507         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6508                                            access, exception);
6509 }
6510
6511 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6512                                 unsigned int bytes, struct x86_exception *exception)
6513 {
6514         /* kvm_write_guest_virt_system can pull in tons of pages. */
6515         vcpu->arch.l1tf_flush_l1d = true;
6516
6517         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6518                                            PFERR_WRITE_MASK, exception);
6519 }
6520 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6521
6522 int handle_ud(struct kvm_vcpu *vcpu)
6523 {
6524         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6525         int emul_type = EMULTYPE_TRAP_UD;
6526         char sig[5]; /* ud2; .ascii "kvm" */
6527         struct x86_exception e;
6528
6529         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6530                 return 1;
6531
6532         if (force_emulation_prefix &&
6533             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6534                                 sig, sizeof(sig), &e) == 0 &&
6535             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6536                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6537                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6538         }
6539
6540         return kvm_emulate_instruction(vcpu, emul_type);
6541 }
6542 EXPORT_SYMBOL_GPL(handle_ud);
6543
6544 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6545                             gpa_t gpa, bool write)
6546 {
6547         /* For APIC access vmexit */
6548         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6549                 return 1;
6550
6551         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6552                 trace_vcpu_match_mmio(gva, gpa, write, true);
6553                 return 1;
6554         }
6555
6556         return 0;
6557 }
6558
6559 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6560                                 gpa_t *gpa, struct x86_exception *exception,
6561                                 bool write)
6562 {
6563         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6564                 | (write ? PFERR_WRITE_MASK : 0);
6565
6566         /*
6567          * currently PKRU is only applied to ept enabled guest so
6568          * there is no pkey in EPT page table for L1 guest or EPT
6569          * shadow page table for L2 guest.
6570          */
6571         if (vcpu_match_mmio_gva(vcpu, gva)
6572             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6573                                  vcpu->arch.mmio_access, 0, access)) {
6574                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6575                                         (gva & (PAGE_SIZE - 1));
6576                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6577                 return 1;
6578         }
6579
6580         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6581
6582         if (*gpa == UNMAPPED_GVA)
6583                 return -1;
6584
6585         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6586 }
6587
6588 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6589                         const void *val, int bytes)
6590 {
6591         int ret;
6592
6593         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6594         if (ret < 0)
6595                 return 0;
6596         kvm_page_track_write(vcpu, gpa, val, bytes);
6597         return 1;
6598 }
6599
6600 struct read_write_emulator_ops {
6601         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6602                                   int bytes);
6603         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6604                                   void *val, int bytes);
6605         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6606                                int bytes, void *val);
6607         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6608                                     void *val, int bytes);
6609         bool write;
6610 };
6611
6612 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6613 {
6614         if (vcpu->mmio_read_completed) {
6615                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6616                                vcpu->mmio_fragments[0].gpa, val);
6617                 vcpu->mmio_read_completed = 0;
6618                 return 1;
6619         }
6620
6621         return 0;
6622 }
6623
6624 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6625                         void *val, int bytes)
6626 {
6627         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6628 }
6629
6630 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6631                          void *val, int bytes)
6632 {
6633         return emulator_write_phys(vcpu, gpa, val, bytes);
6634 }
6635
6636 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6637 {
6638         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6639         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6640 }
6641
6642 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6643                           void *val, int bytes)
6644 {
6645         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6646         return X86EMUL_IO_NEEDED;
6647 }
6648
6649 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6650                            void *val, int bytes)
6651 {
6652         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6653
6654         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6655         return X86EMUL_CONTINUE;
6656 }
6657
6658 static const struct read_write_emulator_ops read_emultor = {
6659         .read_write_prepare = read_prepare,
6660         .read_write_emulate = read_emulate,
6661         .read_write_mmio = vcpu_mmio_read,
6662         .read_write_exit_mmio = read_exit_mmio,
6663 };
6664
6665 static const struct read_write_emulator_ops write_emultor = {
6666         .read_write_emulate = write_emulate,
6667         .read_write_mmio = write_mmio,
6668         .read_write_exit_mmio = write_exit_mmio,
6669         .write = true,
6670 };
6671
6672 static int emulator_read_write_onepage(unsigned long addr, void *val,
6673                                        unsigned int bytes,
6674                                        struct x86_exception *exception,
6675                                        struct kvm_vcpu *vcpu,
6676                                        const struct read_write_emulator_ops *ops)
6677 {
6678         gpa_t gpa;
6679         int handled, ret;
6680         bool write = ops->write;
6681         struct kvm_mmio_fragment *frag;
6682         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6683
6684         /*
6685          * If the exit was due to a NPF we may already have a GPA.
6686          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6687          * Note, this cannot be used on string operations since string
6688          * operation using rep will only have the initial GPA from the NPF
6689          * occurred.
6690          */
6691         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6692             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6693                 gpa = ctxt->gpa_val;
6694                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6695         } else {
6696                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6697                 if (ret < 0)
6698                         return X86EMUL_PROPAGATE_FAULT;
6699         }
6700
6701         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6702                 return X86EMUL_CONTINUE;
6703
6704         /*
6705          * Is this MMIO handled locally?
6706          */
6707         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6708         if (handled == bytes)
6709                 return X86EMUL_CONTINUE;
6710
6711         gpa += handled;
6712         bytes -= handled;
6713         val += handled;
6714
6715         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6716         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6717         frag->gpa = gpa;
6718         frag->data = val;
6719         frag->len = bytes;
6720         return X86EMUL_CONTINUE;
6721 }
6722
6723 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6724                         unsigned long addr,
6725                         void *val, unsigned int bytes,
6726                         struct x86_exception *exception,
6727                         const struct read_write_emulator_ops *ops)
6728 {
6729         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6730         gpa_t gpa;
6731         int rc;
6732
6733         if (ops->read_write_prepare &&
6734                   ops->read_write_prepare(vcpu, val, bytes))
6735                 return X86EMUL_CONTINUE;
6736
6737         vcpu->mmio_nr_fragments = 0;
6738
6739         /* Crossing a page boundary? */
6740         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6741                 int now;
6742
6743                 now = -addr & ~PAGE_MASK;
6744                 rc = emulator_read_write_onepage(addr, val, now, exception,
6745                                                  vcpu, ops);
6746
6747                 if (rc != X86EMUL_CONTINUE)
6748                         return rc;
6749                 addr += now;
6750                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6751                         addr = (u32)addr;
6752                 val += now;
6753                 bytes -= now;
6754         }
6755
6756         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6757                                          vcpu, ops);
6758         if (rc != X86EMUL_CONTINUE)
6759                 return rc;
6760
6761         if (!vcpu->mmio_nr_fragments)
6762                 return rc;
6763
6764         gpa = vcpu->mmio_fragments[0].gpa;
6765
6766         vcpu->mmio_needed = 1;
6767         vcpu->mmio_cur_fragment = 0;
6768
6769         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6770         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6771         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6772         vcpu->run->mmio.phys_addr = gpa;
6773
6774         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6775 }
6776
6777 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6778                                   unsigned long addr,
6779                                   void *val,
6780                                   unsigned int bytes,
6781                                   struct x86_exception *exception)
6782 {
6783         return emulator_read_write(ctxt, addr, val, bytes,
6784                                    exception, &read_emultor);
6785 }
6786
6787 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6788                             unsigned long addr,
6789                             const void *val,
6790                             unsigned int bytes,
6791                             struct x86_exception *exception)
6792 {
6793         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6794                                    exception, &write_emultor);
6795 }
6796
6797 #define CMPXCHG_TYPE(t, ptr, old, new) \
6798         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6799
6800 #ifdef CONFIG_X86_64
6801 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6802 #else
6803 #  define CMPXCHG64(ptr, old, new) \
6804         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6805 #endif
6806
6807 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6808                                      unsigned long addr,
6809                                      const void *old,
6810                                      const void *new,
6811                                      unsigned int bytes,
6812                                      struct x86_exception *exception)
6813 {
6814         struct kvm_host_map map;
6815         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6816         u64 page_line_mask;
6817         gpa_t gpa;
6818         char *kaddr;
6819         bool exchanged;
6820
6821         /* guests cmpxchg8b have to be emulated atomically */
6822         if (bytes > 8 || (bytes & (bytes - 1)))
6823                 goto emul_write;
6824
6825         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6826
6827         if (gpa == UNMAPPED_GVA ||
6828             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6829                 goto emul_write;
6830
6831         /*
6832          * Emulate the atomic as a straight write to avoid #AC if SLD is
6833          * enabled in the host and the access splits a cache line.
6834          */
6835         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6836                 page_line_mask = ~(cache_line_size() - 1);
6837         else
6838                 page_line_mask = PAGE_MASK;
6839
6840         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6841                 goto emul_write;
6842
6843         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6844                 goto emul_write;
6845
6846         kaddr = map.hva + offset_in_page(gpa);
6847
6848         switch (bytes) {
6849         case 1:
6850                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6851                 break;
6852         case 2:
6853                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6854                 break;
6855         case 4:
6856                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6857                 break;
6858         case 8:
6859                 exchanged = CMPXCHG64(kaddr, old, new);
6860                 break;
6861         default:
6862                 BUG();
6863         }
6864
6865         kvm_vcpu_unmap(vcpu, &map, true);
6866
6867         if (!exchanged)
6868                 return X86EMUL_CMPXCHG_FAILED;
6869
6870         kvm_page_track_write(vcpu, gpa, new, bytes);
6871
6872         return X86EMUL_CONTINUE;
6873
6874 emul_write:
6875         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6876
6877         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6878 }
6879
6880 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6881 {
6882         int r = 0, i;
6883
6884         for (i = 0; i < vcpu->arch.pio.count; i++) {
6885                 if (vcpu->arch.pio.in)
6886                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6887                                             vcpu->arch.pio.size, pd);
6888                 else
6889                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6890                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6891                                              pd);
6892                 if (r)
6893                         break;
6894                 pd += vcpu->arch.pio.size;
6895         }
6896         return r;
6897 }
6898
6899 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6900                                unsigned short port, void *val,
6901                                unsigned int count, bool in)
6902 {
6903         vcpu->arch.pio.port = port;
6904         vcpu->arch.pio.in = in;
6905         vcpu->arch.pio.count  = count;
6906         vcpu->arch.pio.size = size;
6907
6908         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6909                 vcpu->arch.pio.count = 0;
6910                 return 1;
6911         }
6912
6913         vcpu->run->exit_reason = KVM_EXIT_IO;
6914         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6915         vcpu->run->io.size = size;
6916         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6917         vcpu->run->io.count = count;
6918         vcpu->run->io.port = port;
6919
6920         return 0;
6921 }
6922
6923 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6924                            unsigned short port, void *val, unsigned int count)
6925 {
6926         int ret;
6927
6928         if (vcpu->arch.pio.count)
6929                 goto data_avail;
6930
6931         memset(vcpu->arch.pio_data, 0, size * count);
6932
6933         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6934         if (ret) {
6935 data_avail:
6936                 memcpy(val, vcpu->arch.pio_data, size * count);
6937                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6938                 vcpu->arch.pio.count = 0;
6939                 return 1;
6940         }
6941
6942         return 0;
6943 }
6944
6945 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6946                                     int size, unsigned short port, void *val,
6947                                     unsigned int count)
6948 {
6949         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6950
6951 }
6952
6953 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6954                             unsigned short port, const void *val,
6955                             unsigned int count)
6956 {
6957         memcpy(vcpu->arch.pio_data, val, size * count);
6958         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6959         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6960 }
6961
6962 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6963                                      int size, unsigned short port,
6964                                      const void *val, unsigned int count)
6965 {
6966         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6967 }
6968
6969 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6970 {
6971         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6972 }
6973
6974 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6975 {
6976         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6977 }
6978
6979 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6980 {
6981         if (!need_emulate_wbinvd(vcpu))
6982                 return X86EMUL_CONTINUE;
6983
6984         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6985                 int cpu = get_cpu();
6986
6987                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6988                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6989                                 wbinvd_ipi, NULL, 1);
6990                 put_cpu();
6991                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6992         } else
6993                 wbinvd();
6994         return X86EMUL_CONTINUE;
6995 }
6996
6997 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6998 {
6999         kvm_emulate_wbinvd_noskip(vcpu);
7000         return kvm_skip_emulated_instruction(vcpu);
7001 }
7002 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7003
7004
7005
7006 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7007 {
7008         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7009 }
7010
7011 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7012                             unsigned long *dest)
7013 {
7014         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7015 }
7016
7017 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7018                            unsigned long value)
7019 {
7020
7021         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7022 }
7023
7024 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7025 {
7026         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7027 }
7028
7029 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7030 {
7031         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7032         unsigned long value;
7033
7034         switch (cr) {
7035         case 0:
7036                 value = kvm_read_cr0(vcpu);
7037                 break;
7038         case 2:
7039                 value = vcpu->arch.cr2;
7040                 break;
7041         case 3:
7042                 value = kvm_read_cr3(vcpu);
7043                 break;
7044         case 4:
7045                 value = kvm_read_cr4(vcpu);
7046                 break;
7047         case 8:
7048                 value = kvm_get_cr8(vcpu);
7049                 break;
7050         default:
7051                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7052                 return 0;
7053         }
7054
7055         return value;
7056 }
7057
7058 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7059 {
7060         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7061         int res = 0;
7062
7063         switch (cr) {
7064         case 0:
7065                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7066                 break;
7067         case 2:
7068                 vcpu->arch.cr2 = val;
7069                 break;
7070         case 3:
7071                 res = kvm_set_cr3(vcpu, val);
7072                 break;
7073         case 4:
7074                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7075                 break;
7076         case 8:
7077                 res = kvm_set_cr8(vcpu, val);
7078                 break;
7079         default:
7080                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7081                 res = -1;
7082         }
7083
7084         return res;
7085 }
7086
7087 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7088 {
7089         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7090 }
7091
7092 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7093 {
7094         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7095 }
7096
7097 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7098 {
7099         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7100 }
7101
7102 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7103 {
7104         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7105 }
7106
7107 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7108 {
7109         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7110 }
7111
7112 static unsigned long emulator_get_cached_segment_base(
7113         struct x86_emulate_ctxt *ctxt, int seg)
7114 {
7115         return get_segment_base(emul_to_vcpu(ctxt), seg);
7116 }
7117
7118 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7119                                  struct desc_struct *desc, u32 *base3,
7120                                  int seg)
7121 {
7122         struct kvm_segment var;
7123
7124         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7125         *selector = var.selector;
7126
7127         if (var.unusable) {
7128                 memset(desc, 0, sizeof(*desc));
7129                 if (base3)
7130                         *base3 = 0;
7131                 return false;
7132         }
7133
7134         if (var.g)
7135                 var.limit >>= 12;
7136         set_desc_limit(desc, var.limit);
7137         set_desc_base(desc, (unsigned long)var.base);
7138 #ifdef CONFIG_X86_64
7139         if (base3)
7140                 *base3 = var.base >> 32;
7141 #endif
7142         desc->type = var.type;
7143         desc->s = var.s;
7144         desc->dpl = var.dpl;
7145         desc->p = var.present;
7146         desc->avl = var.avl;
7147         desc->l = var.l;
7148         desc->d = var.db;
7149         desc->g = var.g;
7150
7151         return true;
7152 }
7153
7154 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7155                                  struct desc_struct *desc, u32 base3,
7156                                  int seg)
7157 {
7158         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7159         struct kvm_segment var;
7160
7161         var.selector = selector;
7162         var.base = get_desc_base(desc);
7163 #ifdef CONFIG_X86_64
7164         var.base |= ((u64)base3) << 32;
7165 #endif
7166         var.limit = get_desc_limit(desc);
7167         if (desc->g)
7168                 var.limit = (var.limit << 12) | 0xfff;
7169         var.type = desc->type;
7170         var.dpl = desc->dpl;
7171         var.db = desc->d;
7172         var.s = desc->s;
7173         var.l = desc->l;
7174         var.g = desc->g;
7175         var.avl = desc->avl;
7176         var.present = desc->p;
7177         var.unusable = !var.present;
7178         var.padding = 0;
7179
7180         kvm_set_segment(vcpu, &var, seg);
7181         return;
7182 }
7183
7184 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7185                             u32 msr_index, u64 *pdata)
7186 {
7187         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7188         int r;
7189
7190         r = kvm_get_msr(vcpu, msr_index, pdata);
7191
7192         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7193                 /* Bounce to user space */
7194                 return X86EMUL_IO_NEEDED;
7195         }
7196
7197         return r;
7198 }
7199
7200 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7201                             u32 msr_index, u64 data)
7202 {
7203         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7204         int r;
7205
7206         r = kvm_set_msr(vcpu, msr_index, data);
7207
7208         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7209                 /* Bounce to user space */
7210                 return X86EMUL_IO_NEEDED;
7211         }
7212
7213         return r;
7214 }
7215
7216 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7217 {
7218         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7219
7220         return vcpu->arch.smbase;
7221 }
7222
7223 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7224 {
7225         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7226
7227         vcpu->arch.smbase = smbase;
7228 }
7229
7230 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7231                               u32 pmc)
7232 {
7233         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7234 }
7235
7236 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7237                              u32 pmc, u64 *pdata)
7238 {
7239         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7240 }
7241
7242 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7243 {
7244         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7245 }
7246
7247 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7248                               struct x86_instruction_info *info,
7249                               enum x86_intercept_stage stage)
7250 {
7251         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7252                                             &ctxt->exception);
7253 }
7254
7255 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7256                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7257                               bool exact_only)
7258 {
7259         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7260 }
7261
7262 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7263 {
7264         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7265 }
7266
7267 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7268 {
7269         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7270 }
7271
7272 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7273 {
7274         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7275 }
7276
7277 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7278 {
7279         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7280 }
7281
7282 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7283 {
7284         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7285 }
7286
7287 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7288 {
7289         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7290 }
7291
7292 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7293 {
7294         return emul_to_vcpu(ctxt)->arch.hflags;
7295 }
7296
7297 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7298 {
7299         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7300
7301         kvm_smm_changed(vcpu, false);
7302 }
7303
7304 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7305                                   const char *smstate)
7306 {
7307         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7308 }
7309
7310 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7311 {
7312         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7313 }
7314
7315 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7316 {
7317         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7318 }
7319
7320 static const struct x86_emulate_ops emulate_ops = {
7321         .read_gpr            = emulator_read_gpr,
7322         .write_gpr           = emulator_write_gpr,
7323         .read_std            = emulator_read_std,
7324         .write_std           = emulator_write_std,
7325         .read_phys           = kvm_read_guest_phys_system,
7326         .fetch               = kvm_fetch_guest_virt,
7327         .read_emulated       = emulator_read_emulated,
7328         .write_emulated      = emulator_write_emulated,
7329         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7330         .invlpg              = emulator_invlpg,
7331         .pio_in_emulated     = emulator_pio_in_emulated,
7332         .pio_out_emulated    = emulator_pio_out_emulated,
7333         .get_segment         = emulator_get_segment,
7334         .set_segment         = emulator_set_segment,
7335         .get_cached_segment_base = emulator_get_cached_segment_base,
7336         .get_gdt             = emulator_get_gdt,
7337         .get_idt             = emulator_get_idt,
7338         .set_gdt             = emulator_set_gdt,
7339         .set_idt             = emulator_set_idt,
7340         .get_cr              = emulator_get_cr,
7341         .set_cr              = emulator_set_cr,
7342         .cpl                 = emulator_get_cpl,
7343         .get_dr              = emulator_get_dr,
7344         .set_dr              = emulator_set_dr,
7345         .get_smbase          = emulator_get_smbase,
7346         .set_smbase          = emulator_set_smbase,
7347         .set_msr             = emulator_set_msr,
7348         .get_msr             = emulator_get_msr,
7349         .check_pmc           = emulator_check_pmc,
7350         .read_pmc            = emulator_read_pmc,
7351         .halt                = emulator_halt,
7352         .wbinvd              = emulator_wbinvd,
7353         .fix_hypercall       = emulator_fix_hypercall,
7354         .intercept           = emulator_intercept,
7355         .get_cpuid           = emulator_get_cpuid,
7356         .guest_has_long_mode = emulator_guest_has_long_mode,
7357         .guest_has_movbe     = emulator_guest_has_movbe,
7358         .guest_has_fxsr      = emulator_guest_has_fxsr,
7359         .set_nmi_mask        = emulator_set_nmi_mask,
7360         .get_hflags          = emulator_get_hflags,
7361         .exiting_smm         = emulator_exiting_smm,
7362         .leave_smm           = emulator_leave_smm,
7363         .triple_fault        = emulator_triple_fault,
7364         .set_xcr             = emulator_set_xcr,
7365 };
7366
7367 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7368 {
7369         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7370         /*
7371          * an sti; sti; sequence only disable interrupts for the first
7372          * instruction. So, if the last instruction, be it emulated or
7373          * not, left the system with the INT_STI flag enabled, it
7374          * means that the last instruction is an sti. We should not
7375          * leave the flag on in this case. The same goes for mov ss
7376          */
7377         if (int_shadow & mask)
7378                 mask = 0;
7379         if (unlikely(int_shadow || mask)) {
7380                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7381                 if (!mask)
7382                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7383         }
7384 }
7385
7386 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7387 {
7388         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7389         if (ctxt->exception.vector == PF_VECTOR)
7390                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7391
7392         if (ctxt->exception.error_code_valid)
7393                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7394                                       ctxt->exception.error_code);
7395         else
7396                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7397         return false;
7398 }
7399
7400 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7401 {
7402         struct x86_emulate_ctxt *ctxt;
7403
7404         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7405         if (!ctxt) {
7406                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7407                 return NULL;
7408         }
7409
7410         ctxt->vcpu = vcpu;
7411         ctxt->ops = &emulate_ops;
7412         vcpu->arch.emulate_ctxt = ctxt;
7413
7414         return ctxt;
7415 }
7416
7417 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7418 {
7419         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7420         int cs_db, cs_l;
7421
7422         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7423
7424         ctxt->gpa_available = false;
7425         ctxt->eflags = kvm_get_rflags(vcpu);
7426         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7427
7428         ctxt->eip = kvm_rip_read(vcpu);
7429         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7430                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7431                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7432                      cs_db                              ? X86EMUL_MODE_PROT32 :
7433                                                           X86EMUL_MODE_PROT16;
7434         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7435         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7436         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7437
7438         ctxt->interruptibility = 0;
7439         ctxt->have_exception = false;
7440         ctxt->exception.vector = -1;
7441         ctxt->perm_ok = false;
7442
7443         init_decode_cache(ctxt);
7444         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7445 }
7446
7447 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7448 {
7449         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7450         int ret;
7451
7452         init_emulate_ctxt(vcpu);
7453
7454         ctxt->op_bytes = 2;
7455         ctxt->ad_bytes = 2;
7456         ctxt->_eip = ctxt->eip + inc_eip;
7457         ret = emulate_int_real(ctxt, irq);
7458
7459         if (ret != X86EMUL_CONTINUE) {
7460                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7461         } else {
7462                 ctxt->eip = ctxt->_eip;
7463                 kvm_rip_write(vcpu, ctxt->eip);
7464                 kvm_set_rflags(vcpu, ctxt->eflags);
7465         }
7466 }
7467 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7468
7469 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7470 {
7471         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7472         u32 insn_size = ctxt->fetch.end - ctxt->fetch.data;
7473         struct kvm_run *run = vcpu->run;
7474
7475         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7476         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7477         run->emulation_failure.ndata = 0;
7478         run->emulation_failure.flags = 0;
7479
7480         if (insn_size) {
7481                 run->emulation_failure.ndata = 3;
7482                 run->emulation_failure.flags |=
7483                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7484                 run->emulation_failure.insn_size = insn_size;
7485                 memset(run->emulation_failure.insn_bytes, 0x90,
7486                        sizeof(run->emulation_failure.insn_bytes));
7487                 memcpy(run->emulation_failure.insn_bytes,
7488                        ctxt->fetch.data, insn_size);
7489         }
7490 }
7491
7492 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7493 {
7494         struct kvm *kvm = vcpu->kvm;
7495
7496         ++vcpu->stat.insn_emulation_fail;
7497         trace_kvm_emulate_insn_failed(vcpu);
7498
7499         if (emulation_type & EMULTYPE_VMWARE_GP) {
7500                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7501                 return 1;
7502         }
7503
7504         if (kvm->arch.exit_on_emulation_error ||
7505             (emulation_type & EMULTYPE_SKIP)) {
7506                 prepare_emulation_failure_exit(vcpu);
7507                 return 0;
7508         }
7509
7510         kvm_queue_exception(vcpu, UD_VECTOR);
7511
7512         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7513                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7514                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7515                 vcpu->run->internal.ndata = 0;
7516                 return 0;
7517         }
7518
7519         return 1;
7520 }
7521
7522 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7523                                   bool write_fault_to_shadow_pgtable,
7524                                   int emulation_type)
7525 {
7526         gpa_t gpa = cr2_or_gpa;
7527         kvm_pfn_t pfn;
7528
7529         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7530                 return false;
7531
7532         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7533             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7534                 return false;
7535
7536         if (!vcpu->arch.mmu->direct_map) {
7537                 /*
7538                  * Write permission should be allowed since only
7539                  * write access need to be emulated.
7540                  */
7541                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7542
7543                 /*
7544                  * If the mapping is invalid in guest, let cpu retry
7545                  * it to generate fault.
7546                  */
7547                 if (gpa == UNMAPPED_GVA)
7548                         return true;
7549         }
7550
7551         /*
7552          * Do not retry the unhandleable instruction if it faults on the
7553          * readonly host memory, otherwise it will goto a infinite loop:
7554          * retry instruction -> write #PF -> emulation fail -> retry
7555          * instruction -> ...
7556          */
7557         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7558
7559         /*
7560          * If the instruction failed on the error pfn, it can not be fixed,
7561          * report the error to userspace.
7562          */
7563         if (is_error_noslot_pfn(pfn))
7564                 return false;
7565
7566         kvm_release_pfn_clean(pfn);
7567
7568         /* The instructions are well-emulated on direct mmu. */
7569         if (vcpu->arch.mmu->direct_map) {
7570                 unsigned int indirect_shadow_pages;
7571
7572                 write_lock(&vcpu->kvm->mmu_lock);
7573                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7574                 write_unlock(&vcpu->kvm->mmu_lock);
7575
7576                 if (indirect_shadow_pages)
7577                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7578
7579                 return true;
7580         }
7581
7582         /*
7583          * if emulation was due to access to shadowed page table
7584          * and it failed try to unshadow page and re-enter the
7585          * guest to let CPU execute the instruction.
7586          */
7587         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7588
7589         /*
7590          * If the access faults on its page table, it can not
7591          * be fixed by unprotecting shadow page and it should
7592          * be reported to userspace.
7593          */
7594         return !write_fault_to_shadow_pgtable;
7595 }
7596
7597 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7598                               gpa_t cr2_or_gpa,  int emulation_type)
7599 {
7600         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7601         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7602
7603         last_retry_eip = vcpu->arch.last_retry_eip;
7604         last_retry_addr = vcpu->arch.last_retry_addr;
7605
7606         /*
7607          * If the emulation is caused by #PF and it is non-page_table
7608          * writing instruction, it means the VM-EXIT is caused by shadow
7609          * page protected, we can zap the shadow page and retry this
7610          * instruction directly.
7611          *
7612          * Note: if the guest uses a non-page-table modifying instruction
7613          * on the PDE that points to the instruction, then we will unmap
7614          * the instruction and go to an infinite loop. So, we cache the
7615          * last retried eip and the last fault address, if we meet the eip
7616          * and the address again, we can break out of the potential infinite
7617          * loop.
7618          */
7619         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7620
7621         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7622                 return false;
7623
7624         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7625             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7626                 return false;
7627
7628         if (x86_page_table_writing_insn(ctxt))
7629                 return false;
7630
7631         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7632                 return false;
7633
7634         vcpu->arch.last_retry_eip = ctxt->eip;
7635         vcpu->arch.last_retry_addr = cr2_or_gpa;
7636
7637         if (!vcpu->arch.mmu->direct_map)
7638                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7639
7640         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7641
7642         return true;
7643 }
7644
7645 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7646 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7647
7648 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7649 {
7650         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7651
7652         if (entering_smm) {
7653                 vcpu->arch.hflags |= HF_SMM_MASK;
7654         } else {
7655                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7656
7657                 /* Process a latched INIT or SMI, if any.  */
7658                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7659         }
7660
7661         kvm_mmu_reset_context(vcpu);
7662 }
7663
7664 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7665                                 unsigned long *db)
7666 {
7667         u32 dr6 = 0;
7668         int i;
7669         u32 enable, rwlen;
7670
7671         enable = dr7;
7672         rwlen = dr7 >> 16;
7673         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7674                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7675                         dr6 |= (1 << i);
7676         return dr6;
7677 }
7678
7679 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7680 {
7681         struct kvm_run *kvm_run = vcpu->run;
7682
7683         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7684                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7685                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7686                 kvm_run->debug.arch.exception = DB_VECTOR;
7687                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7688                 return 0;
7689         }
7690         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7691         return 1;
7692 }
7693
7694 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7695 {
7696         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7697         int r;
7698
7699         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7700         if (unlikely(!r))
7701                 return 0;
7702
7703         /*
7704          * rflags is the old, "raw" value of the flags.  The new value has
7705          * not been saved yet.
7706          *
7707          * This is correct even for TF set by the guest, because "the
7708          * processor will not generate this exception after the instruction
7709          * that sets the TF flag".
7710          */
7711         if (unlikely(rflags & X86_EFLAGS_TF))
7712                 r = kvm_vcpu_do_singlestep(vcpu);
7713         return r;
7714 }
7715 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7716
7717 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7718 {
7719         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7720             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7721                 struct kvm_run *kvm_run = vcpu->run;
7722                 unsigned long eip = kvm_get_linear_rip(vcpu);
7723                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7724                                            vcpu->arch.guest_debug_dr7,
7725                                            vcpu->arch.eff_db);
7726
7727                 if (dr6 != 0) {
7728                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7729                         kvm_run->debug.arch.pc = eip;
7730                         kvm_run->debug.arch.exception = DB_VECTOR;
7731                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7732                         *r = 0;
7733                         return true;
7734                 }
7735         }
7736
7737         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7738             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7739                 unsigned long eip = kvm_get_linear_rip(vcpu);
7740                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7741                                            vcpu->arch.dr7,
7742                                            vcpu->arch.db);
7743
7744                 if (dr6 != 0) {
7745                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7746                         *r = 1;
7747                         return true;
7748                 }
7749         }
7750
7751         return false;
7752 }
7753
7754 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7755 {
7756         switch (ctxt->opcode_len) {
7757         case 1:
7758                 switch (ctxt->b) {
7759                 case 0xe4:      /* IN */
7760                 case 0xe5:
7761                 case 0xec:
7762                 case 0xed:
7763                 case 0xe6:      /* OUT */
7764                 case 0xe7:
7765                 case 0xee:
7766                 case 0xef:
7767                 case 0x6c:      /* INS */
7768                 case 0x6d:
7769                 case 0x6e:      /* OUTS */
7770                 case 0x6f:
7771                         return true;
7772                 }
7773                 break;
7774         case 2:
7775                 switch (ctxt->b) {
7776                 case 0x33:      /* RDPMC */
7777                         return true;
7778                 }
7779                 break;
7780         }
7781
7782         return false;
7783 }
7784
7785 /*
7786  * Decode to be emulated instruction. Return EMULATION_OK if success.
7787  */
7788 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7789                                     void *insn, int insn_len)
7790 {
7791         int r = EMULATION_OK;
7792         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7793
7794         init_emulate_ctxt(vcpu);
7795
7796         /*
7797          * We will reenter on the same instruction since we do not set
7798          * complete_userspace_io. This does not handle watchpoints yet,
7799          * those would be handled in the emulate_ops.
7800          */
7801         if (!(emulation_type & EMULTYPE_SKIP) &&
7802             kvm_vcpu_check_breakpoint(vcpu, &r))
7803                 return r;
7804
7805         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7806
7807         trace_kvm_emulate_insn_start(vcpu);
7808         ++vcpu->stat.insn_emulation;
7809
7810         return r;
7811 }
7812 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7813
7814 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7815                             int emulation_type, void *insn, int insn_len)
7816 {
7817         int r;
7818         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7819         bool writeback = true;
7820         bool write_fault_to_spt;
7821
7822         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7823                 return 1;
7824
7825         vcpu->arch.l1tf_flush_l1d = true;
7826
7827         /*
7828          * Clear write_fault_to_shadow_pgtable here to ensure it is
7829          * never reused.
7830          */
7831         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7832         vcpu->arch.write_fault_to_shadow_pgtable = false;
7833
7834         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7835                 kvm_clear_exception_queue(vcpu);
7836
7837                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7838                                                     insn, insn_len);
7839                 if (r != EMULATION_OK)  {
7840                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7841                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7842                                 kvm_queue_exception(vcpu, UD_VECTOR);
7843                                 return 1;
7844                         }
7845                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7846                                                   write_fault_to_spt,
7847                                                   emulation_type))
7848                                 return 1;
7849                         if (ctxt->have_exception) {
7850                                 /*
7851                                  * #UD should result in just EMULATION_FAILED, and trap-like
7852                                  * exception should not be encountered during decode.
7853                                  */
7854                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7855                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7856                                 inject_emulated_exception(vcpu);
7857                                 return 1;
7858                         }
7859                         return handle_emulation_failure(vcpu, emulation_type);
7860                 }
7861         }
7862
7863         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7864             !is_vmware_backdoor_opcode(ctxt)) {
7865                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7866                 return 1;
7867         }
7868
7869         /*
7870          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7871          * for kvm_skip_emulated_instruction().  The caller is responsible for
7872          * updating interruptibility state and injecting single-step #DBs.
7873          */
7874         if (emulation_type & EMULTYPE_SKIP) {
7875                 kvm_rip_write(vcpu, ctxt->_eip);
7876                 if (ctxt->eflags & X86_EFLAGS_RF)
7877                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7878                 return 1;
7879         }
7880
7881         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7882                 return 1;
7883
7884         /* this is needed for vmware backdoor interface to work since it
7885            changes registers values  during IO operation */
7886         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7887                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7888                 emulator_invalidate_register_cache(ctxt);
7889         }
7890
7891 restart:
7892         if (emulation_type & EMULTYPE_PF) {
7893                 /* Save the faulting GPA (cr2) in the address field */
7894                 ctxt->exception.address = cr2_or_gpa;
7895
7896                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7897                 if (vcpu->arch.mmu->direct_map) {
7898                         ctxt->gpa_available = true;
7899                         ctxt->gpa_val = cr2_or_gpa;
7900                 }
7901         } else {
7902                 /* Sanitize the address out of an abundance of paranoia. */
7903                 ctxt->exception.address = 0;
7904         }
7905
7906         r = x86_emulate_insn(ctxt);
7907
7908         if (r == EMULATION_INTERCEPTED)
7909                 return 1;
7910
7911         if (r == EMULATION_FAILED) {
7912                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7913                                         emulation_type))
7914                         return 1;
7915
7916                 return handle_emulation_failure(vcpu, emulation_type);
7917         }
7918
7919         if (ctxt->have_exception) {
7920                 r = 1;
7921                 if (inject_emulated_exception(vcpu))
7922                         return r;
7923         } else if (vcpu->arch.pio.count) {
7924                 if (!vcpu->arch.pio.in) {
7925                         /* FIXME: return into emulator if single-stepping.  */
7926                         vcpu->arch.pio.count = 0;
7927                 } else {
7928                         writeback = false;
7929                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7930                 }
7931                 r = 0;
7932         } else if (vcpu->mmio_needed) {
7933                 ++vcpu->stat.mmio_exits;
7934
7935                 if (!vcpu->mmio_is_write)
7936                         writeback = false;
7937                 r = 0;
7938                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7939         } else if (r == EMULATION_RESTART)
7940                 goto restart;
7941         else
7942                 r = 1;
7943
7944         if (writeback) {
7945                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7946                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7947                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7948                 if (!ctxt->have_exception ||
7949                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7950                         kvm_rip_write(vcpu, ctxt->eip);
7951                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7952                                 r = kvm_vcpu_do_singlestep(vcpu);
7953                         if (kvm_x86_ops.update_emulated_instruction)
7954                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7955                         __kvm_set_rflags(vcpu, ctxt->eflags);
7956                 }
7957
7958                 /*
7959                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7960                  * do nothing, and it will be requested again as soon as
7961                  * the shadow expires.  But we still need to check here,
7962                  * because POPF has no interrupt shadow.
7963                  */
7964                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7965                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7966         } else
7967                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7968
7969         return r;
7970 }
7971
7972 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7973 {
7974         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7975 }
7976 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7977
7978 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7979                                         void *insn, int insn_len)
7980 {
7981         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7982 }
7983 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7984
7985 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7986 {
7987         vcpu->arch.pio.count = 0;
7988         return 1;
7989 }
7990
7991 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7992 {
7993         vcpu->arch.pio.count = 0;
7994
7995         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7996                 return 1;
7997
7998         return kvm_skip_emulated_instruction(vcpu);
7999 }
8000
8001 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8002                             unsigned short port)
8003 {
8004         unsigned long val = kvm_rax_read(vcpu);
8005         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8006
8007         if (ret)
8008                 return ret;
8009
8010         /*
8011          * Workaround userspace that relies on old KVM behavior of %rip being
8012          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8013          */
8014         if (port == 0x7e &&
8015             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8016                 vcpu->arch.complete_userspace_io =
8017                         complete_fast_pio_out_port_0x7e;
8018                 kvm_skip_emulated_instruction(vcpu);
8019         } else {
8020                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8021                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8022         }
8023         return 0;
8024 }
8025
8026 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8027 {
8028         unsigned long val;
8029
8030         /* We should only ever be called with arch.pio.count equal to 1 */
8031         BUG_ON(vcpu->arch.pio.count != 1);
8032
8033         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8034                 vcpu->arch.pio.count = 0;
8035                 return 1;
8036         }
8037
8038         /* For size less than 4 we merge, else we zero extend */
8039         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8040
8041         /*
8042          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8043          * the copy and tracing
8044          */
8045         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8046         kvm_rax_write(vcpu, val);
8047
8048         return kvm_skip_emulated_instruction(vcpu);
8049 }
8050
8051 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8052                            unsigned short port)
8053 {
8054         unsigned long val;
8055         int ret;
8056
8057         /* For size less than 4 we merge, else we zero extend */
8058         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8059
8060         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8061         if (ret) {
8062                 kvm_rax_write(vcpu, val);
8063                 return ret;
8064         }
8065
8066         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8067         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8068
8069         return 0;
8070 }
8071
8072 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8073 {
8074         int ret;
8075
8076         if (in)
8077                 ret = kvm_fast_pio_in(vcpu, size, port);
8078         else
8079                 ret = kvm_fast_pio_out(vcpu, size, port);
8080         return ret && kvm_skip_emulated_instruction(vcpu);
8081 }
8082 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8083
8084 static int kvmclock_cpu_down_prep(unsigned int cpu)
8085 {
8086         __this_cpu_write(cpu_tsc_khz, 0);
8087         return 0;
8088 }
8089
8090 static void tsc_khz_changed(void *data)
8091 {
8092         struct cpufreq_freqs *freq = data;
8093         unsigned long khz = 0;
8094
8095         if (data)
8096                 khz = freq->new;
8097         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8098                 khz = cpufreq_quick_get(raw_smp_processor_id());
8099         if (!khz)
8100                 khz = tsc_khz;
8101         __this_cpu_write(cpu_tsc_khz, khz);
8102 }
8103
8104 #ifdef CONFIG_X86_64
8105 static void kvm_hyperv_tsc_notifier(void)
8106 {
8107         struct kvm *kvm;
8108         struct kvm_vcpu *vcpu;
8109         int cpu;
8110         unsigned long flags;
8111
8112         mutex_lock(&kvm_lock);
8113         list_for_each_entry(kvm, &vm_list, vm_list)
8114                 kvm_make_mclock_inprogress_request(kvm);
8115
8116         hyperv_stop_tsc_emulation();
8117
8118         /* TSC frequency always matches when on Hyper-V */
8119         for_each_present_cpu(cpu)
8120                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8121         kvm_max_guest_tsc_khz = tsc_khz;
8122
8123         list_for_each_entry(kvm, &vm_list, vm_list) {
8124                 struct kvm_arch *ka = &kvm->arch;
8125
8126                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8127                 pvclock_update_vm_gtod_copy(kvm);
8128                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8129
8130                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8131                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8132
8133                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8134                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8135         }
8136         mutex_unlock(&kvm_lock);
8137 }
8138 #endif
8139
8140 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8141 {
8142         struct kvm *kvm;
8143         struct kvm_vcpu *vcpu;
8144         int i, send_ipi = 0;
8145
8146         /*
8147          * We allow guests to temporarily run on slowing clocks,
8148          * provided we notify them after, or to run on accelerating
8149          * clocks, provided we notify them before.  Thus time never
8150          * goes backwards.
8151          *
8152          * However, we have a problem.  We can't atomically update
8153          * the frequency of a given CPU from this function; it is
8154          * merely a notifier, which can be called from any CPU.
8155          * Changing the TSC frequency at arbitrary points in time
8156          * requires a recomputation of local variables related to
8157          * the TSC for each VCPU.  We must flag these local variables
8158          * to be updated and be sure the update takes place with the
8159          * new frequency before any guests proceed.
8160          *
8161          * Unfortunately, the combination of hotplug CPU and frequency
8162          * change creates an intractable locking scenario; the order
8163          * of when these callouts happen is undefined with respect to
8164          * CPU hotplug, and they can race with each other.  As such,
8165          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8166          * undefined; you can actually have a CPU frequency change take
8167          * place in between the computation of X and the setting of the
8168          * variable.  To protect against this problem, all updates of
8169          * the per_cpu tsc_khz variable are done in an interrupt
8170          * protected IPI, and all callers wishing to update the value
8171          * must wait for a synchronous IPI to complete (which is trivial
8172          * if the caller is on the CPU already).  This establishes the
8173          * necessary total order on variable updates.
8174          *
8175          * Note that because a guest time update may take place
8176          * anytime after the setting of the VCPU's request bit, the
8177          * correct TSC value must be set before the request.  However,
8178          * to ensure the update actually makes it to any guest which
8179          * starts running in hardware virtualization between the set
8180          * and the acquisition of the spinlock, we must also ping the
8181          * CPU after setting the request bit.
8182          *
8183          */
8184
8185         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8186
8187         mutex_lock(&kvm_lock);
8188         list_for_each_entry(kvm, &vm_list, vm_list) {
8189                 kvm_for_each_vcpu(i, vcpu, kvm) {
8190                         if (vcpu->cpu != cpu)
8191                                 continue;
8192                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8193                         if (vcpu->cpu != raw_smp_processor_id())
8194                                 send_ipi = 1;
8195                 }
8196         }
8197         mutex_unlock(&kvm_lock);
8198
8199         if (freq->old < freq->new && send_ipi) {
8200                 /*
8201                  * We upscale the frequency.  Must make the guest
8202                  * doesn't see old kvmclock values while running with
8203                  * the new frequency, otherwise we risk the guest sees
8204                  * time go backwards.
8205                  *
8206                  * In case we update the frequency for another cpu
8207                  * (which might be in guest context) send an interrupt
8208                  * to kick the cpu out of guest context.  Next time
8209                  * guest context is entered kvmclock will be updated,
8210                  * so the guest will not see stale values.
8211                  */
8212                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8213         }
8214 }
8215
8216 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8217                                      void *data)
8218 {
8219         struct cpufreq_freqs *freq = data;
8220         int cpu;
8221
8222         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8223                 return 0;
8224         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8225                 return 0;
8226
8227         for_each_cpu(cpu, freq->policy->cpus)
8228                 __kvmclock_cpufreq_notifier(freq, cpu);
8229
8230         return 0;
8231 }
8232
8233 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8234         .notifier_call  = kvmclock_cpufreq_notifier
8235 };
8236
8237 static int kvmclock_cpu_online(unsigned int cpu)
8238 {
8239         tsc_khz_changed(NULL);
8240         return 0;
8241 }
8242
8243 static void kvm_timer_init(void)
8244 {
8245         max_tsc_khz = tsc_khz;
8246
8247         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8248 #ifdef CONFIG_CPU_FREQ
8249                 struct cpufreq_policy *policy;
8250                 int cpu;
8251
8252                 cpu = get_cpu();
8253                 policy = cpufreq_cpu_get(cpu);
8254                 if (policy) {
8255                         if (policy->cpuinfo.max_freq)
8256                                 max_tsc_khz = policy->cpuinfo.max_freq;
8257                         cpufreq_cpu_put(policy);
8258                 }
8259                 put_cpu();
8260 #endif
8261                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8262                                           CPUFREQ_TRANSITION_NOTIFIER);
8263         }
8264
8265         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8266                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8267 }
8268
8269 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8270 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8271
8272 int kvm_is_in_guest(void)
8273 {
8274         return __this_cpu_read(current_vcpu) != NULL;
8275 }
8276
8277 static int kvm_is_user_mode(void)
8278 {
8279         int user_mode = 3;
8280
8281         if (__this_cpu_read(current_vcpu))
8282                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8283
8284         return user_mode != 0;
8285 }
8286
8287 static unsigned long kvm_get_guest_ip(void)
8288 {
8289         unsigned long ip = 0;
8290
8291         if (__this_cpu_read(current_vcpu))
8292                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8293
8294         return ip;
8295 }
8296
8297 static void kvm_handle_intel_pt_intr(void)
8298 {
8299         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8300
8301         kvm_make_request(KVM_REQ_PMI, vcpu);
8302         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8303                         (unsigned long *)&vcpu->arch.pmu.global_status);
8304 }
8305
8306 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8307         .is_in_guest            = kvm_is_in_guest,
8308         .is_user_mode           = kvm_is_user_mode,
8309         .get_guest_ip           = kvm_get_guest_ip,
8310         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8311 };
8312
8313 #ifdef CONFIG_X86_64
8314 static void pvclock_gtod_update_fn(struct work_struct *work)
8315 {
8316         struct kvm *kvm;
8317
8318         struct kvm_vcpu *vcpu;
8319         int i;
8320
8321         mutex_lock(&kvm_lock);
8322         list_for_each_entry(kvm, &vm_list, vm_list)
8323                 kvm_for_each_vcpu(i, vcpu, kvm)
8324                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8325         atomic_set(&kvm_guest_has_master_clock, 0);
8326         mutex_unlock(&kvm_lock);
8327 }
8328
8329 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8330
8331 /*
8332  * Indirection to move queue_work() out of the tk_core.seq write held
8333  * region to prevent possible deadlocks against time accessors which
8334  * are invoked with work related locks held.
8335  */
8336 static void pvclock_irq_work_fn(struct irq_work *w)
8337 {
8338         queue_work(system_long_wq, &pvclock_gtod_work);
8339 }
8340
8341 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8342
8343 /*
8344  * Notification about pvclock gtod data update.
8345  */
8346 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8347                                void *priv)
8348 {
8349         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8350         struct timekeeper *tk = priv;
8351
8352         update_pvclock_gtod(tk);
8353
8354         /*
8355          * Disable master clock if host does not trust, or does not use,
8356          * TSC based clocksource. Delegate queue_work() to irq_work as
8357          * this is invoked with tk_core.seq write held.
8358          */
8359         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8360             atomic_read(&kvm_guest_has_master_clock) != 0)
8361                 irq_work_queue(&pvclock_irq_work);
8362         return 0;
8363 }
8364
8365 static struct notifier_block pvclock_gtod_notifier = {
8366         .notifier_call = pvclock_gtod_notify,
8367 };
8368 #endif
8369
8370 int kvm_arch_init(void *opaque)
8371 {
8372         struct kvm_x86_init_ops *ops = opaque;
8373         int r;
8374
8375         if (kvm_x86_ops.hardware_enable) {
8376                 printk(KERN_ERR "kvm: already loaded the other module\n");
8377                 r = -EEXIST;
8378                 goto out;
8379         }
8380
8381         if (!ops->cpu_has_kvm_support()) {
8382                 pr_err_ratelimited("kvm: no hardware support\n");
8383                 r = -EOPNOTSUPP;
8384                 goto out;
8385         }
8386         if (ops->disabled_by_bios()) {
8387                 pr_err_ratelimited("kvm: disabled by bios\n");
8388                 r = -EOPNOTSUPP;
8389                 goto out;
8390         }
8391
8392         /*
8393          * KVM explicitly assumes that the guest has an FPU and
8394          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8395          * vCPU's FPU state as a fxregs_state struct.
8396          */
8397         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8398                 printk(KERN_ERR "kvm: inadequate fpu\n");
8399                 r = -EOPNOTSUPP;
8400                 goto out;
8401         }
8402
8403         r = -ENOMEM;
8404         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8405                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8406                                           NULL);
8407         if (!x86_fpu_cache) {
8408                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8409                 goto out;
8410         }
8411
8412         x86_emulator_cache = kvm_alloc_emulator_cache();
8413         if (!x86_emulator_cache) {
8414                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8415                 goto out_free_x86_fpu_cache;
8416         }
8417
8418         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8419         if (!user_return_msrs) {
8420                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8421                 goto out_free_x86_emulator_cache;
8422         }
8423         kvm_nr_uret_msrs = 0;
8424
8425         r = kvm_mmu_module_init();
8426         if (r)
8427                 goto out_free_percpu;
8428
8429         kvm_timer_init();
8430
8431         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8432
8433         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8434                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8435                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8436         }
8437
8438         if (pi_inject_timer == -1)
8439                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8440 #ifdef CONFIG_X86_64
8441         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8442
8443         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8444                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8445 #endif
8446
8447         return 0;
8448
8449 out_free_percpu:
8450         free_percpu(user_return_msrs);
8451 out_free_x86_emulator_cache:
8452         kmem_cache_destroy(x86_emulator_cache);
8453 out_free_x86_fpu_cache:
8454         kmem_cache_destroy(x86_fpu_cache);
8455 out:
8456         return r;
8457 }
8458
8459 void kvm_arch_exit(void)
8460 {
8461 #ifdef CONFIG_X86_64
8462         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8463                 clear_hv_tscchange_cb();
8464 #endif
8465         kvm_lapic_exit();
8466         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8467
8468         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8469                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8470                                             CPUFREQ_TRANSITION_NOTIFIER);
8471         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8472 #ifdef CONFIG_X86_64
8473         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8474         irq_work_sync(&pvclock_irq_work);
8475         cancel_work_sync(&pvclock_gtod_work);
8476 #endif
8477         kvm_x86_ops.hardware_enable = NULL;
8478         kvm_mmu_module_exit();
8479         free_percpu(user_return_msrs);
8480         kmem_cache_destroy(x86_emulator_cache);
8481         kmem_cache_destroy(x86_fpu_cache);
8482 #ifdef CONFIG_KVM_XEN
8483         static_key_deferred_flush(&kvm_xen_enabled);
8484         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8485 #endif
8486 }
8487
8488 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8489 {
8490         ++vcpu->stat.halt_exits;
8491         if (lapic_in_kernel(vcpu)) {
8492                 vcpu->arch.mp_state = state;
8493                 return 1;
8494         } else {
8495                 vcpu->run->exit_reason = reason;
8496                 return 0;
8497         }
8498 }
8499
8500 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8501 {
8502         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8503 }
8504 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8505
8506 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8507 {
8508         int ret = kvm_skip_emulated_instruction(vcpu);
8509         /*
8510          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8511          * KVM_EXIT_DEBUG here.
8512          */
8513         return kvm_vcpu_halt(vcpu) && ret;
8514 }
8515 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8516
8517 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8518 {
8519         int ret = kvm_skip_emulated_instruction(vcpu);
8520
8521         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8522 }
8523 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8524
8525 #ifdef CONFIG_X86_64
8526 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8527                                 unsigned long clock_type)
8528 {
8529         struct kvm_clock_pairing clock_pairing;
8530         struct timespec64 ts;
8531         u64 cycle;
8532         int ret;
8533
8534         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8535                 return -KVM_EOPNOTSUPP;
8536
8537         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8538                 return -KVM_EOPNOTSUPP;
8539
8540         clock_pairing.sec = ts.tv_sec;
8541         clock_pairing.nsec = ts.tv_nsec;
8542         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8543         clock_pairing.flags = 0;
8544         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8545
8546         ret = 0;
8547         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8548                             sizeof(struct kvm_clock_pairing)))
8549                 ret = -KVM_EFAULT;
8550
8551         return ret;
8552 }
8553 #endif
8554
8555 /*
8556  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8557  *
8558  * @apicid - apicid of vcpu to be kicked.
8559  */
8560 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8561 {
8562         struct kvm_lapic_irq lapic_irq;
8563
8564         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8565         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8566         lapic_irq.level = 0;
8567         lapic_irq.dest_id = apicid;
8568         lapic_irq.msi_redir_hint = false;
8569
8570         lapic_irq.delivery_mode = APIC_DM_REMRD;
8571         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8572 }
8573
8574 bool kvm_apicv_activated(struct kvm *kvm)
8575 {
8576         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8577 }
8578 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8579
8580 static void kvm_apicv_init(struct kvm *kvm)
8581 {
8582         if (enable_apicv)
8583                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8584                           &kvm->arch.apicv_inhibit_reasons);
8585         else
8586                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8587                         &kvm->arch.apicv_inhibit_reasons);
8588 }
8589
8590 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8591 {
8592         struct kvm_vcpu *target = NULL;
8593         struct kvm_apic_map *map;
8594
8595         vcpu->stat.directed_yield_attempted++;
8596
8597         if (single_task_running())
8598                 goto no_yield;
8599
8600         rcu_read_lock();
8601         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8602
8603         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8604                 target = map->phys_map[dest_id]->vcpu;
8605
8606         rcu_read_unlock();
8607
8608         if (!target || !READ_ONCE(target->ready))
8609                 goto no_yield;
8610
8611         /* Ignore requests to yield to self */
8612         if (vcpu == target)
8613                 goto no_yield;
8614
8615         if (kvm_vcpu_yield_to(target) <= 0)
8616                 goto no_yield;
8617
8618         vcpu->stat.directed_yield_successful++;
8619
8620 no_yield:
8621         return;
8622 }
8623
8624 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8625 {
8626         u64 ret = vcpu->run->hypercall.ret;
8627
8628         if (!is_64_bit_mode(vcpu))
8629                 ret = (u32)ret;
8630         kvm_rax_write(vcpu, ret);
8631         ++vcpu->stat.hypercalls;
8632         return kvm_skip_emulated_instruction(vcpu);
8633 }
8634
8635 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8636 {
8637         unsigned long nr, a0, a1, a2, a3, ret;
8638         int op_64_bit;
8639
8640         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8641                 return kvm_xen_hypercall(vcpu);
8642
8643         if (kvm_hv_hypercall_enabled(vcpu))
8644                 return kvm_hv_hypercall(vcpu);
8645
8646         nr = kvm_rax_read(vcpu);
8647         a0 = kvm_rbx_read(vcpu);
8648         a1 = kvm_rcx_read(vcpu);
8649         a2 = kvm_rdx_read(vcpu);
8650         a3 = kvm_rsi_read(vcpu);
8651
8652         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8653
8654         op_64_bit = is_64_bit_mode(vcpu);
8655         if (!op_64_bit) {
8656                 nr &= 0xFFFFFFFF;
8657                 a0 &= 0xFFFFFFFF;
8658                 a1 &= 0xFFFFFFFF;
8659                 a2 &= 0xFFFFFFFF;
8660                 a3 &= 0xFFFFFFFF;
8661         }
8662
8663         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8664                 ret = -KVM_EPERM;
8665                 goto out;
8666         }
8667
8668         ret = -KVM_ENOSYS;
8669
8670         switch (nr) {
8671         case KVM_HC_VAPIC_POLL_IRQ:
8672                 ret = 0;
8673                 break;
8674         case KVM_HC_KICK_CPU:
8675                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8676                         break;
8677
8678                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8679                 kvm_sched_yield(vcpu, a1);
8680                 ret = 0;
8681                 break;
8682 #ifdef CONFIG_X86_64
8683         case KVM_HC_CLOCK_PAIRING:
8684                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8685                 break;
8686 #endif
8687         case KVM_HC_SEND_IPI:
8688                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8689                         break;
8690
8691                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8692                 break;
8693         case KVM_HC_SCHED_YIELD:
8694                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8695                         break;
8696
8697                 kvm_sched_yield(vcpu, a0);
8698                 ret = 0;
8699                 break;
8700         case KVM_HC_MAP_GPA_RANGE: {
8701                 u64 gpa = a0, npages = a1, attrs = a2;
8702
8703                 ret = -KVM_ENOSYS;
8704                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8705                         break;
8706
8707                 if (!PAGE_ALIGNED(gpa) || !npages ||
8708                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8709                         ret = -KVM_EINVAL;
8710                         break;
8711                 }
8712
8713                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8714                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8715                 vcpu->run->hypercall.args[0]  = gpa;
8716                 vcpu->run->hypercall.args[1]  = npages;
8717                 vcpu->run->hypercall.args[2]  = attrs;
8718                 vcpu->run->hypercall.longmode = op_64_bit;
8719                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8720                 return 0;
8721         }
8722         default:
8723                 ret = -KVM_ENOSYS;
8724                 break;
8725         }
8726 out:
8727         if (!op_64_bit)
8728                 ret = (u32)ret;
8729         kvm_rax_write(vcpu, ret);
8730
8731         ++vcpu->stat.hypercalls;
8732         return kvm_skip_emulated_instruction(vcpu);
8733 }
8734 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8735
8736 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8737 {
8738         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8739         char instruction[3];
8740         unsigned long rip = kvm_rip_read(vcpu);
8741
8742         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8743
8744         return emulator_write_emulated(ctxt, rip, instruction, 3,
8745                 &ctxt->exception);
8746 }
8747
8748 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8749 {
8750         return vcpu->run->request_interrupt_window &&
8751                 likely(!pic_in_kernel(vcpu->kvm));
8752 }
8753
8754 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8755 {
8756         struct kvm_run *kvm_run = vcpu->run;
8757
8758         /*
8759          * if_flag is obsolete and useless, so do not bother
8760          * setting it for SEV-ES guests.  Userspace can just
8761          * use kvm_run->ready_for_interrupt_injection.
8762          */
8763         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8764                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8765
8766         kvm_run->cr8 = kvm_get_cr8(vcpu);
8767         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8768         kvm_run->ready_for_interrupt_injection =
8769                 pic_in_kernel(vcpu->kvm) ||
8770                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8771
8772         if (is_smm(vcpu))
8773                 kvm_run->flags |= KVM_RUN_X86_SMM;
8774 }
8775
8776 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8777 {
8778         int max_irr, tpr;
8779
8780         if (!kvm_x86_ops.update_cr8_intercept)
8781                 return;
8782
8783         if (!lapic_in_kernel(vcpu))
8784                 return;
8785
8786         if (vcpu->arch.apicv_active)
8787                 return;
8788
8789         if (!vcpu->arch.apic->vapic_addr)
8790                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8791         else
8792                 max_irr = -1;
8793
8794         if (max_irr != -1)
8795                 max_irr >>= 4;
8796
8797         tpr = kvm_lapic_get_cr8(vcpu);
8798
8799         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8800 }
8801
8802
8803 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8804 {
8805         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8806                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8807                 return 1;
8808         }
8809
8810         return kvm_x86_ops.nested_ops->check_events(vcpu);
8811 }
8812
8813 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8814 {
8815         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8816                 vcpu->arch.exception.error_code = false;
8817         static_call(kvm_x86_queue_exception)(vcpu);
8818 }
8819
8820 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8821 {
8822         int r;
8823         bool can_inject = true;
8824
8825         /* try to reinject previous events if any */
8826
8827         if (vcpu->arch.exception.injected) {
8828                 kvm_inject_exception(vcpu);
8829                 can_inject = false;
8830         }
8831         /*
8832          * Do not inject an NMI or interrupt if there is a pending
8833          * exception.  Exceptions and interrupts are recognized at
8834          * instruction boundaries, i.e. the start of an instruction.
8835          * Trap-like exceptions, e.g. #DB, have higher priority than
8836          * NMIs and interrupts, i.e. traps are recognized before an
8837          * NMI/interrupt that's pending on the same instruction.
8838          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8839          * priority, but are only generated (pended) during instruction
8840          * execution, i.e. a pending fault-like exception means the
8841          * fault occurred on the *previous* instruction and must be
8842          * serviced prior to recognizing any new events in order to
8843          * fully complete the previous instruction.
8844          */
8845         else if (!vcpu->arch.exception.pending) {
8846                 if (vcpu->arch.nmi_injected) {
8847                         static_call(kvm_x86_set_nmi)(vcpu);
8848                         can_inject = false;
8849                 } else if (vcpu->arch.interrupt.injected) {
8850                         static_call(kvm_x86_set_irq)(vcpu);
8851                         can_inject = false;
8852                 }
8853         }
8854
8855         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8856                      vcpu->arch.exception.pending);
8857
8858         /*
8859          * Call check_nested_events() even if we reinjected a previous event
8860          * in order for caller to determine if it should require immediate-exit
8861          * from L2 to L1 due to pending L1 events which require exit
8862          * from L2 to L1.
8863          */
8864         if (is_guest_mode(vcpu)) {
8865                 r = kvm_check_nested_events(vcpu);
8866                 if (r < 0)
8867                         goto out;
8868         }
8869
8870         /* try to inject new event if pending */
8871         if (vcpu->arch.exception.pending) {
8872                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8873                                         vcpu->arch.exception.has_error_code,
8874                                         vcpu->arch.exception.error_code);
8875
8876                 vcpu->arch.exception.pending = false;
8877                 vcpu->arch.exception.injected = true;
8878
8879                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8880                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8881                                              X86_EFLAGS_RF);
8882
8883                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8884                         kvm_deliver_exception_payload(vcpu);
8885                         if (vcpu->arch.dr7 & DR7_GD) {
8886                                 vcpu->arch.dr7 &= ~DR7_GD;
8887                                 kvm_update_dr7(vcpu);
8888                         }
8889                 }
8890
8891                 kvm_inject_exception(vcpu);
8892                 can_inject = false;
8893         }
8894
8895         /*
8896          * Finally, inject interrupt events.  If an event cannot be injected
8897          * due to architectural conditions (e.g. IF=0) a window-open exit
8898          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8899          * and can architecturally be injected, but we cannot do it right now:
8900          * an interrupt could have arrived just now and we have to inject it
8901          * as a vmexit, or there could already an event in the queue, which is
8902          * indicated by can_inject.  In that case we request an immediate exit
8903          * in order to make progress and get back here for another iteration.
8904          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8905          */
8906         if (vcpu->arch.smi_pending) {
8907                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8908                 if (r < 0)
8909                         goto out;
8910                 if (r) {
8911                         vcpu->arch.smi_pending = false;
8912                         ++vcpu->arch.smi_count;
8913                         enter_smm(vcpu);
8914                         can_inject = false;
8915                 } else
8916                         static_call(kvm_x86_enable_smi_window)(vcpu);
8917         }
8918
8919         if (vcpu->arch.nmi_pending) {
8920                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8921                 if (r < 0)
8922                         goto out;
8923                 if (r) {
8924                         --vcpu->arch.nmi_pending;
8925                         vcpu->arch.nmi_injected = true;
8926                         static_call(kvm_x86_set_nmi)(vcpu);
8927                         can_inject = false;
8928                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8929                 }
8930                 if (vcpu->arch.nmi_pending)
8931                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8932         }
8933
8934         if (kvm_cpu_has_injectable_intr(vcpu)) {
8935                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8936                 if (r < 0)
8937                         goto out;
8938                 if (r) {
8939                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8940                         static_call(kvm_x86_set_irq)(vcpu);
8941                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8942                 }
8943                 if (kvm_cpu_has_injectable_intr(vcpu))
8944                         static_call(kvm_x86_enable_irq_window)(vcpu);
8945         }
8946
8947         if (is_guest_mode(vcpu) &&
8948             kvm_x86_ops.nested_ops->hv_timer_pending &&
8949             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8950                 *req_immediate_exit = true;
8951
8952         WARN_ON(vcpu->arch.exception.pending);
8953         return 0;
8954
8955 out:
8956         if (r == -EBUSY) {
8957                 *req_immediate_exit = true;
8958                 r = 0;
8959         }
8960         return r;
8961 }
8962
8963 static void process_nmi(struct kvm_vcpu *vcpu)
8964 {
8965         unsigned limit = 2;
8966
8967         /*
8968          * x86 is limited to one NMI running, and one NMI pending after it.
8969          * If an NMI is already in progress, limit further NMIs to just one.
8970          * Otherwise, allow two (and we'll inject the first one immediately).
8971          */
8972         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8973                 limit = 1;
8974
8975         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8976         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8977         kvm_make_request(KVM_REQ_EVENT, vcpu);
8978 }
8979
8980 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8981 {
8982         u32 flags = 0;
8983         flags |= seg->g       << 23;
8984         flags |= seg->db      << 22;
8985         flags |= seg->l       << 21;
8986         flags |= seg->avl     << 20;
8987         flags |= seg->present << 15;
8988         flags |= seg->dpl     << 13;
8989         flags |= seg->s       << 12;
8990         flags |= seg->type    << 8;
8991         return flags;
8992 }
8993
8994 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8995 {
8996         struct kvm_segment seg;
8997         int offset;
8998
8999         kvm_get_segment(vcpu, &seg, n);
9000         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9001
9002         if (n < 3)
9003                 offset = 0x7f84 + n * 12;
9004         else
9005                 offset = 0x7f2c + (n - 3) * 12;
9006
9007         put_smstate(u32, buf, offset + 8, seg.base);
9008         put_smstate(u32, buf, offset + 4, seg.limit);
9009         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9010 }
9011
9012 #ifdef CONFIG_X86_64
9013 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9014 {
9015         struct kvm_segment seg;
9016         int offset;
9017         u16 flags;
9018
9019         kvm_get_segment(vcpu, &seg, n);
9020         offset = 0x7e00 + n * 16;
9021
9022         flags = enter_smm_get_segment_flags(&seg) >> 8;
9023         put_smstate(u16, buf, offset, seg.selector);
9024         put_smstate(u16, buf, offset + 2, flags);
9025         put_smstate(u32, buf, offset + 4, seg.limit);
9026         put_smstate(u64, buf, offset + 8, seg.base);
9027 }
9028 #endif
9029
9030 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9031 {
9032         struct desc_ptr dt;
9033         struct kvm_segment seg;
9034         unsigned long val;
9035         int i;
9036
9037         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9038         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9039         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9040         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9041
9042         for (i = 0; i < 8; i++)
9043                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9044
9045         kvm_get_dr(vcpu, 6, &val);
9046         put_smstate(u32, buf, 0x7fcc, (u32)val);
9047         kvm_get_dr(vcpu, 7, &val);
9048         put_smstate(u32, buf, 0x7fc8, (u32)val);
9049
9050         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9051         put_smstate(u32, buf, 0x7fc4, seg.selector);
9052         put_smstate(u32, buf, 0x7f64, seg.base);
9053         put_smstate(u32, buf, 0x7f60, seg.limit);
9054         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9055
9056         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9057         put_smstate(u32, buf, 0x7fc0, seg.selector);
9058         put_smstate(u32, buf, 0x7f80, seg.base);
9059         put_smstate(u32, buf, 0x7f7c, seg.limit);
9060         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9061
9062         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9063         put_smstate(u32, buf, 0x7f74, dt.address);
9064         put_smstate(u32, buf, 0x7f70, dt.size);
9065
9066         static_call(kvm_x86_get_idt)(vcpu, &dt);
9067         put_smstate(u32, buf, 0x7f58, dt.address);
9068         put_smstate(u32, buf, 0x7f54, dt.size);
9069
9070         for (i = 0; i < 6; i++)
9071                 enter_smm_save_seg_32(vcpu, buf, i);
9072
9073         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9074
9075         /* revision id */
9076         put_smstate(u32, buf, 0x7efc, 0x00020000);
9077         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9078 }
9079
9080 #ifdef CONFIG_X86_64
9081 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9082 {
9083         struct desc_ptr dt;
9084         struct kvm_segment seg;
9085         unsigned long val;
9086         int i;
9087
9088         for (i = 0; i < 16; i++)
9089                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9090
9091         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9092         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9093
9094         kvm_get_dr(vcpu, 6, &val);
9095         put_smstate(u64, buf, 0x7f68, val);
9096         kvm_get_dr(vcpu, 7, &val);
9097         put_smstate(u64, buf, 0x7f60, val);
9098
9099         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9100         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9101         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9102
9103         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9104
9105         /* revision id */
9106         put_smstate(u32, buf, 0x7efc, 0x00020064);
9107
9108         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9109
9110         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9111         put_smstate(u16, buf, 0x7e90, seg.selector);
9112         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9113         put_smstate(u32, buf, 0x7e94, seg.limit);
9114         put_smstate(u64, buf, 0x7e98, seg.base);
9115
9116         static_call(kvm_x86_get_idt)(vcpu, &dt);
9117         put_smstate(u32, buf, 0x7e84, dt.size);
9118         put_smstate(u64, buf, 0x7e88, dt.address);
9119
9120         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9121         put_smstate(u16, buf, 0x7e70, seg.selector);
9122         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9123         put_smstate(u32, buf, 0x7e74, seg.limit);
9124         put_smstate(u64, buf, 0x7e78, seg.base);
9125
9126         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9127         put_smstate(u32, buf, 0x7e64, dt.size);
9128         put_smstate(u64, buf, 0x7e68, dt.address);
9129
9130         for (i = 0; i < 6; i++)
9131                 enter_smm_save_seg_64(vcpu, buf, i);
9132 }
9133 #endif
9134
9135 static void enter_smm(struct kvm_vcpu *vcpu)
9136 {
9137         struct kvm_segment cs, ds;
9138         struct desc_ptr dt;
9139         unsigned long cr0;
9140         char buf[512];
9141
9142         memset(buf, 0, 512);
9143 #ifdef CONFIG_X86_64
9144         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9145                 enter_smm_save_state_64(vcpu, buf);
9146         else
9147 #endif
9148                 enter_smm_save_state_32(vcpu, buf);
9149
9150         /*
9151          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9152          * state (e.g. leave guest mode) after we've saved the state into the
9153          * SMM state-save area.
9154          */
9155         static_call(kvm_x86_enter_smm)(vcpu, buf);
9156
9157         kvm_smm_changed(vcpu, true);
9158         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9159
9160         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9161                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9162         else
9163                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9164
9165         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9166         kvm_rip_write(vcpu, 0x8000);
9167
9168         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9169         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9170         vcpu->arch.cr0 = cr0;
9171
9172         static_call(kvm_x86_set_cr4)(vcpu, 0);
9173
9174         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9175         dt.address = dt.size = 0;
9176         static_call(kvm_x86_set_idt)(vcpu, &dt);
9177
9178         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9179
9180         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9181         cs.base = vcpu->arch.smbase;
9182
9183         ds.selector = 0;
9184         ds.base = 0;
9185
9186         cs.limit    = ds.limit = 0xffffffff;
9187         cs.type     = ds.type = 0x3;
9188         cs.dpl      = ds.dpl = 0;
9189         cs.db       = ds.db = 0;
9190         cs.s        = ds.s = 1;
9191         cs.l        = ds.l = 0;
9192         cs.g        = ds.g = 1;
9193         cs.avl      = ds.avl = 0;
9194         cs.present  = ds.present = 1;
9195         cs.unusable = ds.unusable = 0;
9196         cs.padding  = ds.padding = 0;
9197
9198         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9199         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9200         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9201         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9202         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9203         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9204
9205 #ifdef CONFIG_X86_64
9206         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9207                 static_call(kvm_x86_set_efer)(vcpu, 0);
9208 #endif
9209
9210         kvm_update_cpuid_runtime(vcpu);
9211         kvm_mmu_reset_context(vcpu);
9212 }
9213
9214 static void process_smi(struct kvm_vcpu *vcpu)
9215 {
9216         vcpu->arch.smi_pending = true;
9217         kvm_make_request(KVM_REQ_EVENT, vcpu);
9218 }
9219
9220 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9221                                        unsigned long *vcpu_bitmap)
9222 {
9223         cpumask_var_t cpus;
9224
9225         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9226
9227         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9228                                     NULL, vcpu_bitmap, cpus);
9229
9230         free_cpumask_var(cpus);
9231 }
9232
9233 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9234 {
9235         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9236 }
9237
9238 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9239 {
9240         if (!lapic_in_kernel(vcpu))
9241                 return;
9242
9243         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9244         kvm_apic_update_apicv(vcpu);
9245         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9246
9247         /*
9248          * When APICv gets disabled, we may still have injected interrupts
9249          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9250          * still active when the interrupt got accepted. Make sure
9251          * inject_pending_event() is called to check for that.
9252          */
9253         if (!vcpu->arch.apicv_active)
9254                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9255 }
9256 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9257
9258 /*
9259  * NOTE: Do not hold any lock prior to calling this.
9260  *
9261  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9262  * locked, because it calls __x86_set_memory_region() which does
9263  * synchronize_srcu(&kvm->srcu).
9264  */
9265 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9266 {
9267         struct kvm_vcpu *except;
9268         unsigned long old, new, expected;
9269
9270         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9271             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9272                 return;
9273
9274         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9275         do {
9276                 expected = new = old;
9277                 if (activate)
9278                         __clear_bit(bit, &new);
9279                 else
9280                         __set_bit(bit, &new);
9281                 if (new == old)
9282                         break;
9283                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9284         } while (old != expected);
9285
9286         if (!!old == !!new)
9287                 return;
9288
9289         trace_kvm_apicv_update_request(activate, bit);
9290         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9291                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9292
9293         /*
9294          * Sending request to update APICV for all other vcpus,
9295          * while update the calling vcpu immediately instead of
9296          * waiting for another #VMEXIT to handle the request.
9297          */
9298         except = kvm_get_running_vcpu();
9299         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9300                                          except);
9301         if (except)
9302                 kvm_vcpu_update_apicv(except);
9303 }
9304 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9305
9306 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9307 {
9308         if (!kvm_apic_present(vcpu))
9309                 return;
9310
9311         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9312
9313         if (irqchip_split(vcpu->kvm))
9314                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9315         else {
9316                 if (vcpu->arch.apicv_active)
9317                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9318                 if (ioapic_in_kernel(vcpu->kvm))
9319                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9320         }
9321
9322         if (is_guest_mode(vcpu))
9323                 vcpu->arch.load_eoi_exitmap_pending = true;
9324         else
9325                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9326 }
9327
9328 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9329 {
9330         u64 eoi_exit_bitmap[4];
9331
9332         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9333                 return;
9334
9335         if (to_hv_vcpu(vcpu))
9336                 bitmap_or((ulong *)eoi_exit_bitmap,
9337                           vcpu->arch.ioapic_handled_vectors,
9338                           to_hv_synic(vcpu)->vec_bitmap, 256);
9339
9340         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9341 }
9342
9343 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9344                                             unsigned long start, unsigned long end)
9345 {
9346         unsigned long apic_address;
9347
9348         /*
9349          * The physical address of apic access page is stored in the VMCS.
9350          * Update it when it becomes invalid.
9351          */
9352         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9353         if (start <= apic_address && apic_address < end)
9354                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9355 }
9356
9357 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9358 {
9359         if (!lapic_in_kernel(vcpu))
9360                 return;
9361
9362         if (!kvm_x86_ops.set_apic_access_page_addr)
9363                 return;
9364
9365         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9366 }
9367
9368 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9369 {
9370         smp_send_reschedule(vcpu->cpu);
9371 }
9372 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9373
9374 /*
9375  * Returns 1 to let vcpu_run() continue the guest execution loop without
9376  * exiting to the userspace.  Otherwise, the value will be returned to the
9377  * userspace.
9378  */
9379 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9380 {
9381         int r;
9382         bool req_int_win =
9383                 dm_request_for_irq_injection(vcpu) &&
9384                 kvm_cpu_accept_dm_intr(vcpu);
9385         fastpath_t exit_fastpath;
9386
9387         bool req_immediate_exit = false;
9388
9389         /* Forbid vmenter if vcpu dirty ring is soft-full */
9390         if (unlikely(vcpu->kvm->dirty_ring_size &&
9391                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9392                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9393                 trace_kvm_dirty_ring_exit(vcpu);
9394                 r = 0;
9395                 goto out;
9396         }
9397
9398         if (kvm_request_pending(vcpu)) {
9399                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9400                         r = -EIO;
9401                         goto out;
9402                 }
9403                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9404                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9405                                 r = 0;
9406                                 goto out;
9407                         }
9408                 }
9409                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9410                         kvm_mmu_unload(vcpu);
9411                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9412                         __kvm_migrate_timers(vcpu);
9413                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9414                         kvm_gen_update_masterclock(vcpu->kvm);
9415                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9416                         kvm_gen_kvmclock_update(vcpu);
9417                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9418                         r = kvm_guest_time_update(vcpu);
9419                         if (unlikely(r))
9420                                 goto out;
9421                 }
9422                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9423                         kvm_mmu_sync_roots(vcpu);
9424                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9425                         kvm_mmu_load_pgd(vcpu);
9426                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9427                         kvm_vcpu_flush_tlb_all(vcpu);
9428
9429                         /* Flushing all ASIDs flushes the current ASID... */
9430                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9431                 }
9432                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9433                         kvm_vcpu_flush_tlb_current(vcpu);
9434                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9435                         kvm_vcpu_flush_tlb_guest(vcpu);
9436
9437                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9438                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9439                         r = 0;
9440                         goto out;
9441                 }
9442                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9443                         if (is_guest_mode(vcpu)) {
9444                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9445                         } else {
9446                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9447                                 vcpu->mmio_needed = 0;
9448                                 r = 0;
9449                                 goto out;
9450                         }
9451                 }
9452                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9453                         /* Page is swapped out. Do synthetic halt */
9454                         vcpu->arch.apf.halted = true;
9455                         r = 1;
9456                         goto out;
9457                 }
9458                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9459                         record_steal_time(vcpu);
9460                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9461                         process_smi(vcpu);
9462                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9463                         process_nmi(vcpu);
9464                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9465                         kvm_pmu_handle_event(vcpu);
9466                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9467                         kvm_pmu_deliver_pmi(vcpu);
9468                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9469                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9470                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9471                                      vcpu->arch.ioapic_handled_vectors)) {
9472                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9473                                 vcpu->run->eoi.vector =
9474                                                 vcpu->arch.pending_ioapic_eoi;
9475                                 r = 0;
9476                                 goto out;
9477                         }
9478                 }
9479                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9480                         vcpu_scan_ioapic(vcpu);
9481                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9482                         vcpu_load_eoi_exitmap(vcpu);
9483                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9484                         kvm_vcpu_reload_apic_access_page(vcpu);
9485                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9486                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9487                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9488                         r = 0;
9489                         goto out;
9490                 }
9491                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9492                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9493                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9494                         r = 0;
9495                         goto out;
9496                 }
9497                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9498                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9499
9500                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9501                         vcpu->run->hyperv = hv_vcpu->exit;
9502                         r = 0;
9503                         goto out;
9504                 }
9505
9506                 /*
9507                  * KVM_REQ_HV_STIMER has to be processed after
9508                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9509                  * depend on the guest clock being up-to-date
9510                  */
9511                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9512                         kvm_hv_process_stimers(vcpu);
9513                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9514                         kvm_vcpu_update_apicv(vcpu);
9515                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9516                         kvm_check_async_pf_completion(vcpu);
9517                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9518                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9519
9520                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9521                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9522         }
9523
9524         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9525             kvm_xen_has_interrupt(vcpu)) {
9526                 ++vcpu->stat.req_event;
9527                 r = kvm_apic_accept_events(vcpu);
9528                 if (r < 0) {
9529                         r = 0;
9530                         goto out;
9531                 }
9532                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9533                         r = 1;
9534                         goto out;
9535                 }
9536
9537                 r = inject_pending_event(vcpu, &req_immediate_exit);
9538                 if (r < 0) {
9539                         r = 0;
9540                         goto out;
9541                 }
9542                 if (req_int_win)
9543                         static_call(kvm_x86_enable_irq_window)(vcpu);
9544
9545                 if (kvm_lapic_enabled(vcpu)) {
9546                         update_cr8_intercept(vcpu);
9547                         kvm_lapic_sync_to_vapic(vcpu);
9548                 }
9549         }
9550
9551         r = kvm_mmu_reload(vcpu);
9552         if (unlikely(r)) {
9553                 goto cancel_injection;
9554         }
9555
9556         preempt_disable();
9557
9558         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9559
9560         /*
9561          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9562          * IPI are then delayed after guest entry, which ensures that they
9563          * result in virtual interrupt delivery.
9564          */
9565         local_irq_disable();
9566         vcpu->mode = IN_GUEST_MODE;
9567
9568         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9569
9570         /*
9571          * 1) We should set ->mode before checking ->requests.  Please see
9572          * the comment in kvm_vcpu_exiting_guest_mode().
9573          *
9574          * 2) For APICv, we should set ->mode before checking PID.ON. This
9575          * pairs with the memory barrier implicit in pi_test_and_set_on
9576          * (see vmx_deliver_posted_interrupt).
9577          *
9578          * 3) This also orders the write to mode from any reads to the page
9579          * tables done while the VCPU is running.  Please see the comment
9580          * in kvm_flush_remote_tlbs.
9581          */
9582         smp_mb__after_srcu_read_unlock();
9583
9584         /*
9585          * This handles the case where a posted interrupt was
9586          * notified with kvm_vcpu_kick.
9587          */
9588         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9589                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9590
9591         if (kvm_vcpu_exit_request(vcpu)) {
9592                 vcpu->mode = OUTSIDE_GUEST_MODE;
9593                 smp_wmb();
9594                 local_irq_enable();
9595                 preempt_enable();
9596                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9597                 r = 1;
9598                 goto cancel_injection;
9599         }
9600
9601         if (req_immediate_exit) {
9602                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9603                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9604         }
9605
9606         fpregs_assert_state_consistent();
9607         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9608                 switch_fpu_return();
9609
9610         if (unlikely(vcpu->arch.switch_db_regs)) {
9611                 set_debugreg(0, 7);
9612                 set_debugreg(vcpu->arch.eff_db[0], 0);
9613                 set_debugreg(vcpu->arch.eff_db[1], 1);
9614                 set_debugreg(vcpu->arch.eff_db[2], 2);
9615                 set_debugreg(vcpu->arch.eff_db[3], 3);
9616                 set_debugreg(vcpu->arch.dr6, 6);
9617                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9618         } else if (unlikely(hw_breakpoint_active())) {
9619                 set_debugreg(0, 7);
9620         }
9621
9622         for (;;) {
9623                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9624                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9625                         break;
9626
9627                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9628                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9629                         break;
9630                 }
9631
9632                 if (vcpu->arch.apicv_active)
9633                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9634         }
9635
9636         /*
9637          * Do this here before restoring debug registers on the host.  And
9638          * since we do this before handling the vmexit, a DR access vmexit
9639          * can (a) read the correct value of the debug registers, (b) set
9640          * KVM_DEBUGREG_WONT_EXIT again.
9641          */
9642         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9643                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9644                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9645                 kvm_update_dr0123(vcpu);
9646                 kvm_update_dr7(vcpu);
9647                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9648         }
9649
9650         /*
9651          * If the guest has used debug registers, at least dr7
9652          * will be disabled while returning to the host.
9653          * If we don't have active breakpoints in the host, we don't
9654          * care about the messed up debug address registers. But if
9655          * we have some of them active, restore the old state.
9656          */
9657         if (hw_breakpoint_active())
9658                 hw_breakpoint_restore();
9659
9660         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9661         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9662
9663         vcpu->mode = OUTSIDE_GUEST_MODE;
9664         smp_wmb();
9665
9666         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9667
9668         /*
9669          * Consume any pending interrupts, including the possible source of
9670          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9671          * An instruction is required after local_irq_enable() to fully unblock
9672          * interrupts on processors that implement an interrupt shadow, the
9673          * stat.exits increment will do nicely.
9674          */
9675         kvm_before_interrupt(vcpu);
9676         local_irq_enable();
9677         ++vcpu->stat.exits;
9678         local_irq_disable();
9679         kvm_after_interrupt(vcpu);
9680
9681         /*
9682          * Wait until after servicing IRQs to account guest time so that any
9683          * ticks that occurred while running the guest are properly accounted
9684          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9685          * of accounting via context tracking, but the loss of accuracy is
9686          * acceptable for all known use cases.
9687          */
9688         vtime_account_guest_exit();
9689
9690         if (lapic_in_kernel(vcpu)) {
9691                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9692                 if (delta != S64_MIN) {
9693                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9694                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9695                 }
9696         }
9697
9698         local_irq_enable();
9699         preempt_enable();
9700
9701         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9702
9703         /*
9704          * Profile KVM exit RIPs:
9705          */
9706         if (unlikely(prof_on == KVM_PROFILING)) {
9707                 unsigned long rip = kvm_rip_read(vcpu);
9708                 profile_hit(KVM_PROFILING, (void *)rip);
9709         }
9710
9711         if (unlikely(vcpu->arch.tsc_always_catchup))
9712                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9713
9714         if (vcpu->arch.apic_attention)
9715                 kvm_lapic_sync_from_vapic(vcpu);
9716
9717         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9718         return r;
9719
9720 cancel_injection:
9721         if (req_immediate_exit)
9722                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9723         static_call(kvm_x86_cancel_injection)(vcpu);
9724         if (unlikely(vcpu->arch.apic_attention))
9725                 kvm_lapic_sync_from_vapic(vcpu);
9726 out:
9727         return r;
9728 }
9729
9730 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9731 {
9732         if (!kvm_arch_vcpu_runnable(vcpu) &&
9733             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9734                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9735                 kvm_vcpu_block(vcpu);
9736                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9737
9738                 if (kvm_x86_ops.post_block)
9739                         static_call(kvm_x86_post_block)(vcpu);
9740
9741                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9742                         return 1;
9743         }
9744
9745         if (kvm_apic_accept_events(vcpu) < 0)
9746                 return 0;
9747         switch(vcpu->arch.mp_state) {
9748         case KVM_MP_STATE_HALTED:
9749         case KVM_MP_STATE_AP_RESET_HOLD:
9750                 vcpu->arch.pv.pv_unhalted = false;
9751                 vcpu->arch.mp_state =
9752                         KVM_MP_STATE_RUNNABLE;
9753                 fallthrough;
9754         case KVM_MP_STATE_RUNNABLE:
9755                 vcpu->arch.apf.halted = false;
9756                 break;
9757         case KVM_MP_STATE_INIT_RECEIVED:
9758                 break;
9759         default:
9760                 return -EINTR;
9761         }
9762         return 1;
9763 }
9764
9765 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9766 {
9767         if (is_guest_mode(vcpu))
9768                 kvm_check_nested_events(vcpu);
9769
9770         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9771                 !vcpu->arch.apf.halted);
9772 }
9773
9774 static int vcpu_run(struct kvm_vcpu *vcpu)
9775 {
9776         int r;
9777         struct kvm *kvm = vcpu->kvm;
9778
9779         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9780         vcpu->arch.l1tf_flush_l1d = true;
9781
9782         for (;;) {
9783                 if (kvm_vcpu_running(vcpu)) {
9784                         r = vcpu_enter_guest(vcpu);
9785                 } else {
9786                         r = vcpu_block(kvm, vcpu);
9787                 }
9788
9789                 if (r <= 0)
9790                         break;
9791
9792                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9793                 if (kvm_cpu_has_pending_timer(vcpu))
9794                         kvm_inject_pending_timer_irqs(vcpu);
9795
9796                 if (dm_request_for_irq_injection(vcpu) &&
9797                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9798                         r = 0;
9799                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9800                         ++vcpu->stat.request_irq_exits;
9801                         break;
9802                 }
9803
9804                 if (__xfer_to_guest_mode_work_pending()) {
9805                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9806                         r = xfer_to_guest_mode_handle_work(vcpu);
9807                         if (r)
9808                                 return r;
9809                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9810                 }
9811         }
9812
9813         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9814
9815         return r;
9816 }
9817
9818 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9819 {
9820         int r;
9821
9822         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9823         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9824         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9825         return r;
9826 }
9827
9828 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9829 {
9830         BUG_ON(!vcpu->arch.pio.count);
9831
9832         return complete_emulated_io(vcpu);
9833 }
9834
9835 /*
9836  * Implements the following, as a state machine:
9837  *
9838  * read:
9839  *   for each fragment
9840  *     for each mmio piece in the fragment
9841  *       write gpa, len
9842  *       exit
9843  *       copy data
9844  *   execute insn
9845  *
9846  * write:
9847  *   for each fragment
9848  *     for each mmio piece in the fragment
9849  *       write gpa, len
9850  *       copy data
9851  *       exit
9852  */
9853 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9854 {
9855         struct kvm_run *run = vcpu->run;
9856         struct kvm_mmio_fragment *frag;
9857         unsigned len;
9858
9859         BUG_ON(!vcpu->mmio_needed);
9860
9861         /* Complete previous fragment */
9862         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9863         len = min(8u, frag->len);
9864         if (!vcpu->mmio_is_write)
9865                 memcpy(frag->data, run->mmio.data, len);
9866
9867         if (frag->len <= 8) {
9868                 /* Switch to the next fragment. */
9869                 frag++;
9870                 vcpu->mmio_cur_fragment++;
9871         } else {
9872                 /* Go forward to the next mmio piece. */
9873                 frag->data += len;
9874                 frag->gpa += len;
9875                 frag->len -= len;
9876         }
9877
9878         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9879                 vcpu->mmio_needed = 0;
9880
9881                 /* FIXME: return into emulator if single-stepping.  */
9882                 if (vcpu->mmio_is_write)
9883                         return 1;
9884                 vcpu->mmio_read_completed = 1;
9885                 return complete_emulated_io(vcpu);
9886         }
9887
9888         run->exit_reason = KVM_EXIT_MMIO;
9889         run->mmio.phys_addr = frag->gpa;
9890         if (vcpu->mmio_is_write)
9891                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9892         run->mmio.len = min(8u, frag->len);
9893         run->mmio.is_write = vcpu->mmio_is_write;
9894         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9895         return 0;
9896 }
9897
9898 static void kvm_save_current_fpu(struct fpu *fpu)
9899 {
9900         /*
9901          * If the target FPU state is not resident in the CPU registers, just
9902          * memcpy() from current, else save CPU state directly to the target.
9903          */
9904         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9905                 memcpy(&fpu->state, &current->thread.fpu.state,
9906                        fpu_kernel_xstate_size);
9907         else
9908                 save_fpregs_to_fpstate(fpu);
9909 }
9910
9911 /* Swap (qemu) user FPU context for the guest FPU context. */
9912 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9913 {
9914         fpregs_lock();
9915
9916         kvm_save_current_fpu(vcpu->arch.user_fpu);
9917
9918         /*
9919          * Guests with protected state can't have it set by the hypervisor,
9920          * so skip trying to set it.
9921          */
9922         if (vcpu->arch.guest_fpu)
9923                 /* PKRU is separately restored in kvm_x86_ops.run. */
9924                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
9925                                         ~XFEATURE_MASK_PKRU);
9926
9927         fpregs_mark_activate();
9928         fpregs_unlock();
9929
9930         trace_kvm_fpu(1);
9931 }
9932
9933 /* When vcpu_run ends, restore user space FPU context. */
9934 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9935 {
9936         fpregs_lock();
9937
9938         /*
9939          * Guests with protected state can't have it read by the hypervisor,
9940          * so skip trying to save it.
9941          */
9942         if (vcpu->arch.guest_fpu)
9943                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9944
9945         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
9946
9947         fpregs_mark_activate();
9948         fpregs_unlock();
9949
9950         ++vcpu->stat.fpu_reload;
9951         trace_kvm_fpu(0);
9952 }
9953
9954 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9955 {
9956         struct kvm_run *kvm_run = vcpu->run;
9957         int r;
9958
9959         vcpu_load(vcpu);
9960         kvm_sigset_activate(vcpu);
9961         kvm_run->flags = 0;
9962         kvm_load_guest_fpu(vcpu);
9963
9964         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9965                 if (kvm_run->immediate_exit) {
9966                         r = -EINTR;
9967                         goto out;
9968                 }
9969                 kvm_vcpu_block(vcpu);
9970                 if (kvm_apic_accept_events(vcpu) < 0) {
9971                         r = 0;
9972                         goto out;
9973                 }
9974                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9975                 r = -EAGAIN;
9976                 if (signal_pending(current)) {
9977                         r = -EINTR;
9978                         kvm_run->exit_reason = KVM_EXIT_INTR;
9979                         ++vcpu->stat.signal_exits;
9980                 }
9981                 goto out;
9982         }
9983
9984         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
9985             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
9986                 r = -EINVAL;
9987                 goto out;
9988         }
9989
9990         if (kvm_run->kvm_dirty_regs) {
9991                 r = sync_regs(vcpu);
9992                 if (r != 0)
9993                         goto out;
9994         }
9995
9996         /* re-sync apic's tpr */
9997         if (!lapic_in_kernel(vcpu)) {
9998                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9999                         r = -EINVAL;
10000                         goto out;
10001                 }
10002         }
10003
10004         if (unlikely(vcpu->arch.complete_userspace_io)) {
10005                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10006                 vcpu->arch.complete_userspace_io = NULL;
10007                 r = cui(vcpu);
10008                 if (r <= 0)
10009                         goto out;
10010         } else
10011                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10012
10013         if (kvm_run->immediate_exit)
10014                 r = -EINTR;
10015         else
10016                 r = vcpu_run(vcpu);
10017
10018 out:
10019         kvm_put_guest_fpu(vcpu);
10020         if (kvm_run->kvm_valid_regs)
10021                 store_regs(vcpu);
10022         post_kvm_run_save(vcpu);
10023         kvm_sigset_deactivate(vcpu);
10024
10025         vcpu_put(vcpu);
10026         return r;
10027 }
10028
10029 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10030 {
10031         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10032                 /*
10033                  * We are here if userspace calls get_regs() in the middle of
10034                  * instruction emulation. Registers state needs to be copied
10035                  * back from emulation context to vcpu. Userspace shouldn't do
10036                  * that usually, but some bad designed PV devices (vmware
10037                  * backdoor interface) need this to work
10038                  */
10039                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10040                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10041         }
10042         regs->rax = kvm_rax_read(vcpu);
10043         regs->rbx = kvm_rbx_read(vcpu);
10044         regs->rcx = kvm_rcx_read(vcpu);
10045         regs->rdx = kvm_rdx_read(vcpu);
10046         regs->rsi = kvm_rsi_read(vcpu);
10047         regs->rdi = kvm_rdi_read(vcpu);
10048         regs->rsp = kvm_rsp_read(vcpu);
10049         regs->rbp = kvm_rbp_read(vcpu);
10050 #ifdef CONFIG_X86_64
10051         regs->r8 = kvm_r8_read(vcpu);
10052         regs->r9 = kvm_r9_read(vcpu);
10053         regs->r10 = kvm_r10_read(vcpu);
10054         regs->r11 = kvm_r11_read(vcpu);
10055         regs->r12 = kvm_r12_read(vcpu);
10056         regs->r13 = kvm_r13_read(vcpu);
10057         regs->r14 = kvm_r14_read(vcpu);
10058         regs->r15 = kvm_r15_read(vcpu);
10059 #endif
10060
10061         regs->rip = kvm_rip_read(vcpu);
10062         regs->rflags = kvm_get_rflags(vcpu);
10063 }
10064
10065 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10066 {
10067         vcpu_load(vcpu);
10068         __get_regs(vcpu, regs);
10069         vcpu_put(vcpu);
10070         return 0;
10071 }
10072
10073 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10074 {
10075         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10076         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10077
10078         kvm_rax_write(vcpu, regs->rax);
10079         kvm_rbx_write(vcpu, regs->rbx);
10080         kvm_rcx_write(vcpu, regs->rcx);
10081         kvm_rdx_write(vcpu, regs->rdx);
10082         kvm_rsi_write(vcpu, regs->rsi);
10083         kvm_rdi_write(vcpu, regs->rdi);
10084         kvm_rsp_write(vcpu, regs->rsp);
10085         kvm_rbp_write(vcpu, regs->rbp);
10086 #ifdef CONFIG_X86_64
10087         kvm_r8_write(vcpu, regs->r8);
10088         kvm_r9_write(vcpu, regs->r9);
10089         kvm_r10_write(vcpu, regs->r10);
10090         kvm_r11_write(vcpu, regs->r11);
10091         kvm_r12_write(vcpu, regs->r12);
10092         kvm_r13_write(vcpu, regs->r13);
10093         kvm_r14_write(vcpu, regs->r14);
10094         kvm_r15_write(vcpu, regs->r15);
10095 #endif
10096
10097         kvm_rip_write(vcpu, regs->rip);
10098         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10099
10100         vcpu->arch.exception.pending = false;
10101
10102         kvm_make_request(KVM_REQ_EVENT, vcpu);
10103 }
10104
10105 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10106 {
10107         vcpu_load(vcpu);
10108         __set_regs(vcpu, regs);
10109         vcpu_put(vcpu);
10110         return 0;
10111 }
10112
10113 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10114 {
10115         struct kvm_segment cs;
10116
10117         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10118         *db = cs.db;
10119         *l = cs.l;
10120 }
10121 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10122
10123 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10124 {
10125         struct desc_ptr dt;
10126
10127         if (vcpu->arch.guest_state_protected)
10128                 goto skip_protected_regs;
10129
10130         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10131         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10132         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10133         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10134         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10135         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10136
10137         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10138         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10139
10140         static_call(kvm_x86_get_idt)(vcpu, &dt);
10141         sregs->idt.limit = dt.size;
10142         sregs->idt.base = dt.address;
10143         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10144         sregs->gdt.limit = dt.size;
10145         sregs->gdt.base = dt.address;
10146
10147         sregs->cr2 = vcpu->arch.cr2;
10148         sregs->cr3 = kvm_read_cr3(vcpu);
10149
10150 skip_protected_regs:
10151         sregs->cr0 = kvm_read_cr0(vcpu);
10152         sregs->cr4 = kvm_read_cr4(vcpu);
10153         sregs->cr8 = kvm_get_cr8(vcpu);
10154         sregs->efer = vcpu->arch.efer;
10155         sregs->apic_base = kvm_get_apic_base(vcpu);
10156 }
10157
10158 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10159 {
10160         __get_sregs_common(vcpu, sregs);
10161
10162         if (vcpu->arch.guest_state_protected)
10163                 return;
10164
10165         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10166                 set_bit(vcpu->arch.interrupt.nr,
10167                         (unsigned long *)sregs->interrupt_bitmap);
10168 }
10169
10170 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10171 {
10172         int i;
10173
10174         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10175
10176         if (vcpu->arch.guest_state_protected)
10177                 return;
10178
10179         if (is_pae_paging(vcpu)) {
10180                 for (i = 0 ; i < 4 ; i++)
10181                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10182                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10183         }
10184 }
10185
10186 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10187                                   struct kvm_sregs *sregs)
10188 {
10189         vcpu_load(vcpu);
10190         __get_sregs(vcpu, sregs);
10191         vcpu_put(vcpu);
10192         return 0;
10193 }
10194
10195 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10196                                     struct kvm_mp_state *mp_state)
10197 {
10198         int r;
10199
10200         vcpu_load(vcpu);
10201         if (kvm_mpx_supported())
10202                 kvm_load_guest_fpu(vcpu);
10203
10204         r = kvm_apic_accept_events(vcpu);
10205         if (r < 0)
10206                 goto out;
10207         r = 0;
10208
10209         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10210              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10211             vcpu->arch.pv.pv_unhalted)
10212                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10213         else
10214                 mp_state->mp_state = vcpu->arch.mp_state;
10215
10216 out:
10217         if (kvm_mpx_supported())
10218                 kvm_put_guest_fpu(vcpu);
10219         vcpu_put(vcpu);
10220         return r;
10221 }
10222
10223 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10224                                     struct kvm_mp_state *mp_state)
10225 {
10226         int ret = -EINVAL;
10227
10228         vcpu_load(vcpu);
10229
10230         if (!lapic_in_kernel(vcpu) &&
10231             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10232                 goto out;
10233
10234         /*
10235          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10236          * INIT state; latched init should be reported using
10237          * KVM_SET_VCPU_EVENTS, so reject it here.
10238          */
10239         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10240             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10241              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10242                 goto out;
10243
10244         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10245                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10246                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10247         } else
10248                 vcpu->arch.mp_state = mp_state->mp_state;
10249         kvm_make_request(KVM_REQ_EVENT, vcpu);
10250
10251         ret = 0;
10252 out:
10253         vcpu_put(vcpu);
10254         return ret;
10255 }
10256
10257 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10258                     int reason, bool has_error_code, u32 error_code)
10259 {
10260         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10261         int ret;
10262
10263         init_emulate_ctxt(vcpu);
10264
10265         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10266                                    has_error_code, error_code);
10267         if (ret) {
10268                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10269                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10270                 vcpu->run->internal.ndata = 0;
10271                 return 0;
10272         }
10273
10274         kvm_rip_write(vcpu, ctxt->eip);
10275         kvm_set_rflags(vcpu, ctxt->eflags);
10276         return 1;
10277 }
10278 EXPORT_SYMBOL_GPL(kvm_task_switch);
10279
10280 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10281 {
10282         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10283                 /*
10284                  * When EFER.LME and CR0.PG are set, the processor is in
10285                  * 64-bit mode (though maybe in a 32-bit code segment).
10286                  * CR4.PAE and EFER.LMA must be set.
10287                  */
10288                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10289                         return false;
10290                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10291                         return false;
10292         } else {
10293                 /*
10294                  * Not in 64-bit mode: EFER.LMA is clear and the code
10295                  * segment cannot be 64-bit.
10296                  */
10297                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10298                         return false;
10299         }
10300
10301         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10302 }
10303
10304 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10305                 int *mmu_reset_needed, bool update_pdptrs)
10306 {
10307         struct msr_data apic_base_msr;
10308         int idx;
10309         struct desc_ptr dt;
10310
10311         if (!kvm_is_valid_sregs(vcpu, sregs))
10312                 return -EINVAL;
10313
10314         apic_base_msr.data = sregs->apic_base;
10315         apic_base_msr.host_initiated = true;
10316         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10317                 return -EINVAL;
10318
10319         if (vcpu->arch.guest_state_protected)
10320                 return 0;
10321
10322         dt.size = sregs->idt.limit;
10323         dt.address = sregs->idt.base;
10324         static_call(kvm_x86_set_idt)(vcpu, &dt);
10325         dt.size = sregs->gdt.limit;
10326         dt.address = sregs->gdt.base;
10327         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10328
10329         vcpu->arch.cr2 = sregs->cr2;
10330         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10331         vcpu->arch.cr3 = sregs->cr3;
10332         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10333
10334         kvm_set_cr8(vcpu, sregs->cr8);
10335
10336         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10337         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10338
10339         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10340         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10341         vcpu->arch.cr0 = sregs->cr0;
10342
10343         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10344         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10345
10346         if (update_pdptrs) {
10347                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10348                 if (is_pae_paging(vcpu)) {
10349                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10350                         *mmu_reset_needed = 1;
10351                 }
10352                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10353         }
10354
10355         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10356         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10357         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10358         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10359         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10360         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10361
10362         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10363         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10364
10365         update_cr8_intercept(vcpu);
10366
10367         /* Older userspace won't unhalt the vcpu on reset. */
10368         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10369             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10370             !is_protmode(vcpu))
10371                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10372
10373         return 0;
10374 }
10375
10376 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10377 {
10378         int pending_vec, max_bits;
10379         int mmu_reset_needed = 0;
10380         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10381
10382         if (ret)
10383                 return ret;
10384
10385         if (mmu_reset_needed)
10386                 kvm_mmu_reset_context(vcpu);
10387
10388         max_bits = KVM_NR_INTERRUPTS;
10389         pending_vec = find_first_bit(
10390                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10391
10392         if (pending_vec < max_bits) {
10393                 kvm_queue_interrupt(vcpu, pending_vec, false);
10394                 pr_debug("Set back pending irq %d\n", pending_vec);
10395                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10396         }
10397         return 0;
10398 }
10399
10400 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10401 {
10402         int mmu_reset_needed = 0;
10403         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10404         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10405                 !(sregs2->efer & EFER_LMA);
10406         int i, ret;
10407
10408         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10409                 return -EINVAL;
10410
10411         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10412                 return -EINVAL;
10413
10414         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10415                                  &mmu_reset_needed, !valid_pdptrs);
10416         if (ret)
10417                 return ret;
10418
10419         if (valid_pdptrs) {
10420                 for (i = 0; i < 4 ; i++)
10421                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10422
10423                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10424                 mmu_reset_needed = 1;
10425                 vcpu->arch.pdptrs_from_userspace = true;
10426         }
10427         if (mmu_reset_needed)
10428                 kvm_mmu_reset_context(vcpu);
10429         return 0;
10430 }
10431
10432 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10433                                   struct kvm_sregs *sregs)
10434 {
10435         int ret;
10436
10437         vcpu_load(vcpu);
10438         ret = __set_sregs(vcpu, sregs);
10439         vcpu_put(vcpu);
10440         return ret;
10441 }
10442
10443 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10444                                         struct kvm_guest_debug *dbg)
10445 {
10446         unsigned long rflags;
10447         int i, r;
10448
10449         if (vcpu->arch.guest_state_protected)
10450                 return -EINVAL;
10451
10452         vcpu_load(vcpu);
10453
10454         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10455                 r = -EBUSY;
10456                 if (vcpu->arch.exception.pending)
10457                         goto out;
10458                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10459                         kvm_queue_exception(vcpu, DB_VECTOR);
10460                 else
10461                         kvm_queue_exception(vcpu, BP_VECTOR);
10462         }
10463
10464         /*
10465          * Read rflags as long as potentially injected trace flags are still
10466          * filtered out.
10467          */
10468         rflags = kvm_get_rflags(vcpu);
10469
10470         vcpu->guest_debug = dbg->control;
10471         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10472                 vcpu->guest_debug = 0;
10473
10474         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10475                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10476                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10477                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10478         } else {
10479                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10480                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10481         }
10482         kvm_update_dr7(vcpu);
10483
10484         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10485                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10486
10487         /*
10488          * Trigger an rflags update that will inject or remove the trace
10489          * flags.
10490          */
10491         kvm_set_rflags(vcpu, rflags);
10492
10493         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10494
10495         r = 0;
10496
10497 out:
10498         vcpu_put(vcpu);
10499         return r;
10500 }
10501
10502 /*
10503  * Translate a guest virtual address to a guest physical address.
10504  */
10505 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10506                                     struct kvm_translation *tr)
10507 {
10508         unsigned long vaddr = tr->linear_address;
10509         gpa_t gpa;
10510         int idx;
10511
10512         vcpu_load(vcpu);
10513
10514         idx = srcu_read_lock(&vcpu->kvm->srcu);
10515         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10516         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10517         tr->physical_address = gpa;
10518         tr->valid = gpa != UNMAPPED_GVA;
10519         tr->writeable = 1;
10520         tr->usermode = 0;
10521
10522         vcpu_put(vcpu);
10523         return 0;
10524 }
10525
10526 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10527 {
10528         struct fxregs_state *fxsave;
10529
10530         if (!vcpu->arch.guest_fpu)
10531                 return 0;
10532
10533         vcpu_load(vcpu);
10534
10535         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10536         memcpy(fpu->fpr, fxsave->st_space, 128);
10537         fpu->fcw = fxsave->cwd;
10538         fpu->fsw = fxsave->swd;
10539         fpu->ftwx = fxsave->twd;
10540         fpu->last_opcode = fxsave->fop;
10541         fpu->last_ip = fxsave->rip;
10542         fpu->last_dp = fxsave->rdp;
10543         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10544
10545         vcpu_put(vcpu);
10546         return 0;
10547 }
10548
10549 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10550 {
10551         struct fxregs_state *fxsave;
10552
10553         if (!vcpu->arch.guest_fpu)
10554                 return 0;
10555
10556         vcpu_load(vcpu);
10557
10558         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10559
10560         memcpy(fxsave->st_space, fpu->fpr, 128);
10561         fxsave->cwd = fpu->fcw;
10562         fxsave->swd = fpu->fsw;
10563         fxsave->twd = fpu->ftwx;
10564         fxsave->fop = fpu->last_opcode;
10565         fxsave->rip = fpu->last_ip;
10566         fxsave->rdp = fpu->last_dp;
10567         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10568
10569         vcpu_put(vcpu);
10570         return 0;
10571 }
10572
10573 static void store_regs(struct kvm_vcpu *vcpu)
10574 {
10575         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10576
10577         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10578                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10579
10580         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10581                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10582
10583         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10584                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10585                                 vcpu, &vcpu->run->s.regs.events);
10586 }
10587
10588 static int sync_regs(struct kvm_vcpu *vcpu)
10589 {
10590         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10591                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10592                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10593         }
10594         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10595                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10596                         return -EINVAL;
10597                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10598         }
10599         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10600                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10601                                 vcpu, &vcpu->run->s.regs.events))
10602                         return -EINVAL;
10603                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10604         }
10605
10606         return 0;
10607 }
10608
10609 static void fx_init(struct kvm_vcpu *vcpu)
10610 {
10611         if (!vcpu->arch.guest_fpu)
10612                 return;
10613
10614         fpstate_init(&vcpu->arch.guest_fpu->state);
10615         if (boot_cpu_has(X86_FEATURE_XSAVES))
10616                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10617                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10618
10619         /*
10620          * Ensure guest xcr0 is valid for loading
10621          */
10622         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10623
10624         vcpu->arch.cr0 |= X86_CR0_ET;
10625 }
10626
10627 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10628 {
10629         if (vcpu->arch.guest_fpu) {
10630                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10631                 vcpu->arch.guest_fpu = NULL;
10632         }
10633 }
10634 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10635
10636 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10637 {
10638         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10639                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10640                              "guest TSC will not be reliable\n");
10641
10642         return 0;
10643 }
10644
10645 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10646 {
10647         struct page *page;
10648         int r;
10649
10650         vcpu->arch.last_vmentry_cpu = -1;
10651
10652         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10653                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10654         else
10655                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10656
10657         r = kvm_mmu_create(vcpu);
10658         if (r < 0)
10659                 return r;
10660
10661         if (irqchip_in_kernel(vcpu->kvm)) {
10662                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10663                 if (r < 0)
10664                         goto fail_mmu_destroy;
10665                 if (kvm_apicv_activated(vcpu->kvm))
10666                         vcpu->arch.apicv_active = true;
10667         } else
10668                 static_branch_inc(&kvm_has_noapic_vcpu);
10669
10670         r = -ENOMEM;
10671
10672         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10673         if (!page)
10674                 goto fail_free_lapic;
10675         vcpu->arch.pio_data = page_address(page);
10676
10677         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10678                                        GFP_KERNEL_ACCOUNT);
10679         if (!vcpu->arch.mce_banks)
10680                 goto fail_free_pio_data;
10681         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10682
10683         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10684                                 GFP_KERNEL_ACCOUNT))
10685                 goto fail_free_mce_banks;
10686
10687         if (!alloc_emulate_ctxt(vcpu))
10688                 goto free_wbinvd_dirty_mask;
10689
10690         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10691                                                 GFP_KERNEL_ACCOUNT);
10692         if (!vcpu->arch.user_fpu) {
10693                 pr_err("kvm: failed to allocate userspace's fpu\n");
10694                 goto free_emulate_ctxt;
10695         }
10696
10697         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10698                                                  GFP_KERNEL_ACCOUNT);
10699         if (!vcpu->arch.guest_fpu) {
10700                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10701                 goto free_user_fpu;
10702         }
10703         fx_init(vcpu);
10704
10705         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10706         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10707
10708         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10709
10710         kvm_async_pf_hash_reset(vcpu);
10711         kvm_pmu_init(vcpu);
10712
10713         vcpu->arch.pending_external_vector = -1;
10714         vcpu->arch.preempted_in_kernel = false;
10715
10716 #if IS_ENABLED(CONFIG_HYPERV)
10717         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10718 #endif
10719
10720         r = static_call(kvm_x86_vcpu_create)(vcpu);
10721         if (r)
10722                 goto free_guest_fpu;
10723
10724         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10725         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10726         kvm_vcpu_mtrr_init(vcpu);
10727         vcpu_load(vcpu);
10728         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10729         kvm_vcpu_reset(vcpu, false);
10730         kvm_init_mmu(vcpu);
10731         vcpu_put(vcpu);
10732         return 0;
10733
10734 free_guest_fpu:
10735         kvm_free_guest_fpu(vcpu);
10736 free_user_fpu:
10737         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10738 free_emulate_ctxt:
10739         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10740 free_wbinvd_dirty_mask:
10741         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10742 fail_free_mce_banks:
10743         kfree(vcpu->arch.mce_banks);
10744 fail_free_pio_data:
10745         free_page((unsigned long)vcpu->arch.pio_data);
10746 fail_free_lapic:
10747         kvm_free_lapic(vcpu);
10748 fail_mmu_destroy:
10749         kvm_mmu_destroy(vcpu);
10750         return r;
10751 }
10752
10753 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10754 {
10755         struct kvm *kvm = vcpu->kvm;
10756
10757         if (mutex_lock_killable(&vcpu->mutex))
10758                 return;
10759         vcpu_load(vcpu);
10760         kvm_synchronize_tsc(vcpu, 0);
10761         vcpu_put(vcpu);
10762
10763         /* poll control enabled by default */
10764         vcpu->arch.msr_kvm_poll_control = 1;
10765
10766         mutex_unlock(&vcpu->mutex);
10767
10768         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10769                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10770                                                 KVMCLOCK_SYNC_PERIOD);
10771 }
10772
10773 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10774 {
10775         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10776         int idx;
10777
10778         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10779
10780         kvmclock_reset(vcpu);
10781
10782         static_call(kvm_x86_vcpu_free)(vcpu);
10783
10784         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10785         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10786         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10787         kvm_free_guest_fpu(vcpu);
10788
10789         kvm_hv_vcpu_uninit(vcpu);
10790         kvm_pmu_destroy(vcpu);
10791         kfree(vcpu->arch.mce_banks);
10792         kvm_free_lapic(vcpu);
10793         idx = srcu_read_lock(&vcpu->kvm->srcu);
10794         kvm_mmu_destroy(vcpu);
10795         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10796         free_page((unsigned long)vcpu->arch.pio_data);
10797         kvfree(vcpu->arch.cpuid_entries);
10798         if (!lapic_in_kernel(vcpu))
10799                 static_branch_dec(&kvm_has_noapic_vcpu);
10800 }
10801
10802 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10803 {
10804         unsigned long old_cr0 = kvm_read_cr0(vcpu);
10805
10806         kvm_lapic_reset(vcpu, init_event);
10807
10808         vcpu->arch.hflags = 0;
10809
10810         vcpu->arch.smi_pending = 0;
10811         vcpu->arch.smi_count = 0;
10812         atomic_set(&vcpu->arch.nmi_queued, 0);
10813         vcpu->arch.nmi_pending = 0;
10814         vcpu->arch.nmi_injected = false;
10815         kvm_clear_interrupt_queue(vcpu);
10816         kvm_clear_exception_queue(vcpu);
10817
10818         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10819         kvm_update_dr0123(vcpu);
10820         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10821         vcpu->arch.dr7 = DR7_FIXED_1;
10822         kvm_update_dr7(vcpu);
10823
10824         vcpu->arch.cr2 = 0;
10825
10826         kvm_make_request(KVM_REQ_EVENT, vcpu);
10827         vcpu->arch.apf.msr_en_val = 0;
10828         vcpu->arch.apf.msr_int_val = 0;
10829         vcpu->arch.st.msr_val = 0;
10830
10831         kvmclock_reset(vcpu);
10832
10833         kvm_clear_async_pf_completion_queue(vcpu);
10834         kvm_async_pf_hash_reset(vcpu);
10835         vcpu->arch.apf.halted = false;
10836
10837         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10838                 void *mpx_state_buffer;
10839
10840                 /*
10841                  * To avoid have the INIT path from kvm_apic_has_events() that be
10842                  * called with loaded FPU and does not let userspace fix the state.
10843                  */
10844                 if (init_event)
10845                         kvm_put_guest_fpu(vcpu);
10846                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10847                                         XFEATURE_BNDREGS);
10848                 if (mpx_state_buffer)
10849                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10850                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10851                                         XFEATURE_BNDCSR);
10852                 if (mpx_state_buffer)
10853                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10854                 if (init_event)
10855                         kvm_load_guest_fpu(vcpu);
10856         }
10857
10858         if (!init_event) {
10859                 kvm_pmu_reset(vcpu);
10860                 vcpu->arch.smbase = 0x30000;
10861
10862                 vcpu->arch.msr_misc_features_enables = 0;
10863
10864                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10865         }
10866
10867         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10868         vcpu->arch.regs_avail = ~0;
10869         vcpu->arch.regs_dirty = ~0;
10870
10871         vcpu->arch.ia32_xss = 0;
10872
10873         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10874
10875         /*
10876          * Reset the MMU context if paging was enabled prior to INIT (which is
10877          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
10878          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10879          * checked because it is unconditionally cleared on INIT and all other
10880          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10881          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10882          */
10883         if (old_cr0 & X86_CR0_PG)
10884                 kvm_mmu_reset_context(vcpu);
10885 }
10886
10887 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10888 {
10889         struct kvm_segment cs;
10890
10891         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10892         cs.selector = vector << 8;
10893         cs.base = vector << 12;
10894         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10895         kvm_rip_write(vcpu, 0);
10896 }
10897 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10898
10899 int kvm_arch_hardware_enable(void)
10900 {
10901         struct kvm *kvm;
10902         struct kvm_vcpu *vcpu;
10903         int i;
10904         int ret;
10905         u64 local_tsc;
10906         u64 max_tsc = 0;
10907         bool stable, backwards_tsc = false;
10908
10909         kvm_user_return_msr_cpu_online();
10910         ret = static_call(kvm_x86_hardware_enable)();
10911         if (ret != 0)
10912                 return ret;
10913
10914         local_tsc = rdtsc();
10915         stable = !kvm_check_tsc_unstable();
10916         list_for_each_entry(kvm, &vm_list, vm_list) {
10917                 kvm_for_each_vcpu(i, vcpu, kvm) {
10918                         if (!stable && vcpu->cpu == smp_processor_id())
10919                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10920                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10921                                 backwards_tsc = true;
10922                                 if (vcpu->arch.last_host_tsc > max_tsc)
10923                                         max_tsc = vcpu->arch.last_host_tsc;
10924                         }
10925                 }
10926         }
10927
10928         /*
10929          * Sometimes, even reliable TSCs go backwards.  This happens on
10930          * platforms that reset TSC during suspend or hibernate actions, but
10931          * maintain synchronization.  We must compensate.  Fortunately, we can
10932          * detect that condition here, which happens early in CPU bringup,
10933          * before any KVM threads can be running.  Unfortunately, we can't
10934          * bring the TSCs fully up to date with real time, as we aren't yet far
10935          * enough into CPU bringup that we know how much real time has actually
10936          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10937          * variables that haven't been updated yet.
10938          *
10939          * So we simply find the maximum observed TSC above, then record the
10940          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10941          * the adjustment will be applied.  Note that we accumulate
10942          * adjustments, in case multiple suspend cycles happen before some VCPU
10943          * gets a chance to run again.  In the event that no KVM threads get a
10944          * chance to run, we will miss the entire elapsed period, as we'll have
10945          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10946          * loose cycle time.  This isn't too big a deal, since the loss will be
10947          * uniform across all VCPUs (not to mention the scenario is extremely
10948          * unlikely). It is possible that a second hibernate recovery happens
10949          * much faster than a first, causing the observed TSC here to be
10950          * smaller; this would require additional padding adjustment, which is
10951          * why we set last_host_tsc to the local tsc observed here.
10952          *
10953          * N.B. - this code below runs only on platforms with reliable TSC,
10954          * as that is the only way backwards_tsc is set above.  Also note
10955          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10956          * have the same delta_cyc adjustment applied if backwards_tsc
10957          * is detected.  Note further, this adjustment is only done once,
10958          * as we reset last_host_tsc on all VCPUs to stop this from being
10959          * called multiple times (one for each physical CPU bringup).
10960          *
10961          * Platforms with unreliable TSCs don't have to deal with this, they
10962          * will be compensated by the logic in vcpu_load, which sets the TSC to
10963          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10964          * guarantee that they stay in perfect synchronization.
10965          */
10966         if (backwards_tsc) {
10967                 u64 delta_cyc = max_tsc - local_tsc;
10968                 list_for_each_entry(kvm, &vm_list, vm_list) {
10969                         kvm->arch.backwards_tsc_observed = true;
10970                         kvm_for_each_vcpu(i, vcpu, kvm) {
10971                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10972                                 vcpu->arch.last_host_tsc = local_tsc;
10973                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10974                         }
10975
10976                         /*
10977                          * We have to disable TSC offset matching.. if you were
10978                          * booting a VM while issuing an S4 host suspend....
10979                          * you may have some problem.  Solving this issue is
10980                          * left as an exercise to the reader.
10981                          */
10982                         kvm->arch.last_tsc_nsec = 0;
10983                         kvm->arch.last_tsc_write = 0;
10984                 }
10985
10986         }
10987         return 0;
10988 }
10989
10990 void kvm_arch_hardware_disable(void)
10991 {
10992         static_call(kvm_x86_hardware_disable)();
10993         drop_user_return_notifiers();
10994 }
10995
10996 int kvm_arch_hardware_setup(void *opaque)
10997 {
10998         struct kvm_x86_init_ops *ops = opaque;
10999         int r;
11000
11001         rdmsrl_safe(MSR_EFER, &host_efer);
11002
11003         if (boot_cpu_has(X86_FEATURE_XSAVES))
11004                 rdmsrl(MSR_IA32_XSS, host_xss);
11005
11006         r = ops->hardware_setup();
11007         if (r != 0)
11008                 return r;
11009
11010         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11011         kvm_ops_static_call_update();
11012
11013         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11014                 supported_xss = 0;
11015
11016 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11017         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11018 #undef __kvm_cpu_cap_has
11019
11020         if (kvm_has_tsc_control) {
11021                 /*
11022                  * Make sure the user can only configure tsc_khz values that
11023                  * fit into a signed integer.
11024                  * A min value is not calculated because it will always
11025                  * be 1 on all machines.
11026                  */
11027                 u64 max = min(0x7fffffffULL,
11028                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11029                 kvm_max_guest_tsc_khz = max;
11030
11031                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11032         }
11033
11034         kvm_init_msr_list();
11035         return 0;
11036 }
11037
11038 void kvm_arch_hardware_unsetup(void)
11039 {
11040         static_call(kvm_x86_hardware_unsetup)();
11041 }
11042
11043 int kvm_arch_check_processor_compat(void *opaque)
11044 {
11045         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11046         struct kvm_x86_init_ops *ops = opaque;
11047
11048         WARN_ON(!irqs_disabled());
11049
11050         if (__cr4_reserved_bits(cpu_has, c) !=
11051             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11052                 return -EIO;
11053
11054         return ops->check_processor_compatibility();
11055 }
11056
11057 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11058 {
11059         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11060 }
11061 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11062
11063 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11064 {
11065         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11066 }
11067
11068 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11069 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11070
11071 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11072 {
11073         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11074
11075         vcpu->arch.l1tf_flush_l1d = true;
11076         if (pmu->version && unlikely(pmu->event_count)) {
11077                 pmu->need_cleanup = true;
11078                 kvm_make_request(KVM_REQ_PMU, vcpu);
11079         }
11080         static_call(kvm_x86_sched_in)(vcpu, cpu);
11081 }
11082
11083 void kvm_arch_free_vm(struct kvm *kvm)
11084 {
11085         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11086         vfree(kvm);
11087 }
11088
11089
11090 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11091 {
11092         if (type)
11093                 return -EINVAL;
11094
11095         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11096         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11097         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11098         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11099         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11100         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11101
11102         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11103         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11104         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11105         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11106                 &kvm->arch.irq_sources_bitmap);
11107
11108         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11109         mutex_init(&kvm->arch.apic_map_lock);
11110         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
11111
11112         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11113         pvclock_update_vm_gtod_copy(kvm);
11114
11115         kvm->arch.guest_can_read_msr_platform_info = true;
11116
11117 #if IS_ENABLED(CONFIG_HYPERV)
11118         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11119         kvm->arch.hv_root_tdp = INVALID_PAGE;
11120 #endif
11121
11122         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11123         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11124
11125         kvm_apicv_init(kvm);
11126         kvm_hv_init_vm(kvm);
11127         kvm_page_track_init(kvm);
11128         kvm_mmu_init_vm(kvm);
11129
11130         return static_call(kvm_x86_vm_init)(kvm);
11131 }
11132
11133 int kvm_arch_post_init_vm(struct kvm *kvm)
11134 {
11135         return kvm_mmu_post_init_vm(kvm);
11136 }
11137
11138 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11139 {
11140         vcpu_load(vcpu);
11141         kvm_mmu_unload(vcpu);
11142         vcpu_put(vcpu);
11143 }
11144
11145 static void kvm_free_vcpus(struct kvm *kvm)
11146 {
11147         unsigned int i;
11148         struct kvm_vcpu *vcpu;
11149
11150         /*
11151          * Unpin any mmu pages first.
11152          */
11153         kvm_for_each_vcpu(i, vcpu, kvm) {
11154                 kvm_clear_async_pf_completion_queue(vcpu);
11155                 kvm_unload_vcpu_mmu(vcpu);
11156         }
11157         kvm_for_each_vcpu(i, vcpu, kvm)
11158                 kvm_vcpu_destroy(vcpu);
11159
11160         mutex_lock(&kvm->lock);
11161         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11162                 kvm->vcpus[i] = NULL;
11163
11164         atomic_set(&kvm->online_vcpus, 0);
11165         mutex_unlock(&kvm->lock);
11166 }
11167
11168 void kvm_arch_sync_events(struct kvm *kvm)
11169 {
11170         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11171         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11172         kvm_free_pit(kvm);
11173 }
11174
11175 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11176
11177 /**
11178  * __x86_set_memory_region: Setup KVM internal memory slot
11179  *
11180  * @kvm: the kvm pointer to the VM.
11181  * @id: the slot ID to setup.
11182  * @gpa: the GPA to install the slot (unused when @size == 0).
11183  * @size: the size of the slot. Set to zero to uninstall a slot.
11184  *
11185  * This function helps to setup a KVM internal memory slot.  Specify
11186  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11187  * slot.  The return code can be one of the following:
11188  *
11189  *   HVA:           on success (uninstall will return a bogus HVA)
11190  *   -errno:        on error
11191  *
11192  * The caller should always use IS_ERR() to check the return value
11193  * before use.  Note, the KVM internal memory slots are guaranteed to
11194  * remain valid and unchanged until the VM is destroyed, i.e., the
11195  * GPA->HVA translation will not change.  However, the HVA is a user
11196  * address, i.e. its accessibility is not guaranteed, and must be
11197  * accessed via __copy_{to,from}_user().
11198  */
11199 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11200                                       u32 size)
11201 {
11202         int i, r;
11203         unsigned long hva, old_npages;
11204         struct kvm_memslots *slots = kvm_memslots(kvm);
11205         struct kvm_memory_slot *slot;
11206
11207         /* Called with kvm->slots_lock held.  */
11208         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11209                 return ERR_PTR_USR(-EINVAL);
11210
11211         slot = id_to_memslot(slots, id);
11212         if (size) {
11213                 if (slot && slot->npages)
11214                         return ERR_PTR_USR(-EEXIST);
11215
11216                 /*
11217                  * MAP_SHARED to prevent internal slot pages from being moved
11218                  * by fork()/COW.
11219                  */
11220                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11221                               MAP_SHARED | MAP_ANONYMOUS, 0);
11222                 if (IS_ERR((void *)hva))
11223                         return (void __user *)hva;
11224         } else {
11225                 if (!slot || !slot->npages)
11226                         return NULL;
11227
11228                 old_npages = slot->npages;
11229                 hva = slot->userspace_addr;
11230         }
11231
11232         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11233                 struct kvm_userspace_memory_region m;
11234
11235                 m.slot = id | (i << 16);
11236                 m.flags = 0;
11237                 m.guest_phys_addr = gpa;
11238                 m.userspace_addr = hva;
11239                 m.memory_size = size;
11240                 r = __kvm_set_memory_region(kvm, &m);
11241                 if (r < 0)
11242                         return ERR_PTR_USR(r);
11243         }
11244
11245         if (!size)
11246                 vm_munmap(hva, old_npages * PAGE_SIZE);
11247
11248         return (void __user *)hva;
11249 }
11250 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11251
11252 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11253 {
11254         kvm_mmu_pre_destroy_vm(kvm);
11255 }
11256
11257 void kvm_arch_destroy_vm(struct kvm *kvm)
11258 {
11259         if (current->mm == kvm->mm) {
11260                 /*
11261                  * Free memory regions allocated on behalf of userspace,
11262                  * unless the the memory map has changed due to process exit
11263                  * or fd copying.
11264                  */
11265                 mutex_lock(&kvm->slots_lock);
11266                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11267                                         0, 0);
11268                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11269                                         0, 0);
11270                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11271                 mutex_unlock(&kvm->slots_lock);
11272         }
11273         static_call_cond(kvm_x86_vm_destroy)(kvm);
11274         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11275         kvm_pic_destroy(kvm);
11276         kvm_ioapic_destroy(kvm);
11277         kvm_free_vcpus(kvm);
11278         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11279         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11280         kvm_mmu_uninit_vm(kvm);
11281         kvm_page_track_cleanup(kvm);
11282         kvm_xen_destroy_vm(kvm);
11283         kvm_hv_destroy_vm(kvm);
11284 }
11285
11286 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11287 {
11288         int i;
11289
11290         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11291                 kvfree(slot->arch.rmap[i]);
11292                 slot->arch.rmap[i] = NULL;
11293         }
11294 }
11295
11296 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11297 {
11298         int i;
11299
11300         memslot_rmap_free(slot);
11301
11302         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11303                 kvfree(slot->arch.lpage_info[i - 1]);
11304                 slot->arch.lpage_info[i - 1] = NULL;
11305         }
11306
11307         kvm_page_track_free_memslot(slot);
11308 }
11309
11310 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11311                               unsigned long npages)
11312 {
11313         const int sz = sizeof(*slot->arch.rmap[0]);
11314         int i;
11315
11316         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11317                 int level = i + 1;
11318                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11319                                           slot->base_gfn, level) + 1;
11320
11321                 WARN_ON(slot->arch.rmap[i]);
11322
11323                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11324                 if (!slot->arch.rmap[i]) {
11325                         memslot_rmap_free(slot);
11326                         return -ENOMEM;
11327                 }
11328         }
11329
11330         return 0;
11331 }
11332
11333 int alloc_all_memslots_rmaps(struct kvm *kvm)
11334 {
11335         struct kvm_memslots *slots;
11336         struct kvm_memory_slot *slot;
11337         int r, i;
11338
11339         /*
11340          * Check if memslots alreday have rmaps early before acquiring
11341          * the slots_arch_lock below.
11342          */
11343         if (kvm_memslots_have_rmaps(kvm))
11344                 return 0;
11345
11346         mutex_lock(&kvm->slots_arch_lock);
11347
11348         /*
11349          * Read memslots_have_rmaps again, under the slots arch lock,
11350          * before allocating the rmaps
11351          */
11352         if (kvm_memslots_have_rmaps(kvm)) {
11353                 mutex_unlock(&kvm->slots_arch_lock);
11354                 return 0;
11355         }
11356
11357         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11358                 slots = __kvm_memslots(kvm, i);
11359                 kvm_for_each_memslot(slot, slots) {
11360                         r = memslot_rmap_alloc(slot, slot->npages);
11361                         if (r) {
11362                                 mutex_unlock(&kvm->slots_arch_lock);
11363                                 return r;
11364                         }
11365                 }
11366         }
11367
11368         /*
11369          * Ensure that memslots_have_rmaps becomes true strictly after
11370          * all the rmap pointers are set.
11371          */
11372         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11373         mutex_unlock(&kvm->slots_arch_lock);
11374         return 0;
11375 }
11376
11377 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11378                                       struct kvm_memory_slot *slot,
11379                                       unsigned long npages)
11380 {
11381         int i, r;
11382
11383         /*
11384          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11385          * old arrays will be freed by __kvm_set_memory_region() if installing
11386          * the new memslot is successful.
11387          */
11388         memset(&slot->arch, 0, sizeof(slot->arch));
11389
11390         if (kvm_memslots_have_rmaps(kvm)) {
11391                 r = memslot_rmap_alloc(slot, npages);
11392                 if (r)
11393                         return r;
11394         }
11395
11396         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11397                 struct kvm_lpage_info *linfo;
11398                 unsigned long ugfn;
11399                 int lpages;
11400                 int level = i + 1;
11401
11402                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11403                                       slot->base_gfn, level) + 1;
11404
11405                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11406                 if (!linfo)
11407                         goto out_free;
11408
11409                 slot->arch.lpage_info[i - 1] = linfo;
11410
11411                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11412                         linfo[0].disallow_lpage = 1;
11413                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11414                         linfo[lpages - 1].disallow_lpage = 1;
11415                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11416                 /*
11417                  * If the gfn and userspace address are not aligned wrt each
11418                  * other, disable large page support for this slot.
11419                  */
11420                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11421                         unsigned long j;
11422
11423                         for (j = 0; j < lpages; ++j)
11424                                 linfo[j].disallow_lpage = 1;
11425                 }
11426         }
11427
11428         if (kvm_page_track_create_memslot(slot, npages))
11429                 goto out_free;
11430
11431         return 0;
11432
11433 out_free:
11434         memslot_rmap_free(slot);
11435
11436         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11437                 kvfree(slot->arch.lpage_info[i - 1]);
11438                 slot->arch.lpage_info[i - 1] = NULL;
11439         }
11440         return -ENOMEM;
11441 }
11442
11443 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11444 {
11445         struct kvm_vcpu *vcpu;
11446         int i;
11447
11448         /*
11449          * memslots->generation has been incremented.
11450          * mmio generation may have reached its maximum value.
11451          */
11452         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11453
11454         /* Force re-initialization of steal_time cache */
11455         kvm_for_each_vcpu(i, vcpu, kvm)
11456                 kvm_vcpu_kick(vcpu);
11457 }
11458
11459 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11460                                 struct kvm_memory_slot *memslot,
11461                                 const struct kvm_userspace_memory_region *mem,
11462                                 enum kvm_mr_change change)
11463 {
11464         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11465                 return kvm_alloc_memslot_metadata(kvm, memslot,
11466                                                   mem->memory_size >> PAGE_SHIFT);
11467         return 0;
11468 }
11469
11470
11471 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11472 {
11473         struct kvm_arch *ka = &kvm->arch;
11474
11475         if (!kvm_x86_ops.cpu_dirty_log_size)
11476                 return;
11477
11478         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11479             (!enable && --ka->cpu_dirty_logging_count == 0))
11480                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11481
11482         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11483 }
11484
11485 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11486                                      struct kvm_memory_slot *old,
11487                                      struct kvm_memory_slot *new,
11488                                      enum kvm_mr_change change)
11489 {
11490         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11491
11492         /*
11493          * Update CPU dirty logging if dirty logging is being toggled.  This
11494          * applies to all operations.
11495          */
11496         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11497                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11498
11499         /*
11500          * Nothing more to do for RO slots (which can't be dirtied and can't be
11501          * made writable) or CREATE/MOVE/DELETE of a slot.
11502          *
11503          * For a memslot with dirty logging disabled:
11504          * CREATE:      No dirty mappings will already exist.
11505          * MOVE/DELETE: The old mappings will already have been cleaned up by
11506          *              kvm_arch_flush_shadow_memslot()
11507          *
11508          * For a memslot with dirty logging enabled:
11509          * CREATE:      No shadow pages exist, thus nothing to write-protect
11510          *              and no dirty bits to clear.
11511          * MOVE/DELETE: The old mappings will already have been cleaned up by
11512          *              kvm_arch_flush_shadow_memslot().
11513          */
11514         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11515                 return;
11516
11517         /*
11518          * READONLY and non-flags changes were filtered out above, and the only
11519          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11520          * logging isn't being toggled on or off.
11521          */
11522         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11523                 return;
11524
11525         if (!log_dirty_pages) {
11526                 /*
11527                  * Dirty logging tracks sptes in 4k granularity, meaning that
11528                  * large sptes have to be split.  If live migration succeeds,
11529                  * the guest in the source machine will be destroyed and large
11530                  * sptes will be created in the destination.  However, if the
11531                  * guest continues to run in the source machine (for example if
11532                  * live migration fails), small sptes will remain around and
11533                  * cause bad performance.
11534                  *
11535                  * Scan sptes if dirty logging has been stopped, dropping those
11536                  * which can be collapsed into a single large-page spte.  Later
11537                  * page faults will create the large-page sptes.
11538                  */
11539                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11540         } else {
11541                 /*
11542                  * Initially-all-set does not require write protecting any page,
11543                  * because they're all assumed to be dirty.
11544                  */
11545                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11546                         return;
11547
11548                 if (kvm_x86_ops.cpu_dirty_log_size) {
11549                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11550                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11551                 } else {
11552                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11553                 }
11554         }
11555 }
11556
11557 void kvm_arch_commit_memory_region(struct kvm *kvm,
11558                                 const struct kvm_userspace_memory_region *mem,
11559                                 struct kvm_memory_slot *old,
11560                                 const struct kvm_memory_slot *new,
11561                                 enum kvm_mr_change change)
11562 {
11563         if (!kvm->arch.n_requested_mmu_pages)
11564                 kvm_mmu_change_mmu_pages(kvm,
11565                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11566
11567         /*
11568          * FIXME: const-ify all uses of struct kvm_memory_slot.
11569          */
11570         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11571
11572         /* Free the arrays associated with the old memslot. */
11573         if (change == KVM_MR_MOVE)
11574                 kvm_arch_free_memslot(kvm, old);
11575 }
11576
11577 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11578 {
11579         kvm_mmu_zap_all(kvm);
11580 }
11581
11582 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11583                                    struct kvm_memory_slot *slot)
11584 {
11585         kvm_page_track_flush_slot(kvm, slot);
11586 }
11587
11588 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11589 {
11590         return (is_guest_mode(vcpu) &&
11591                         kvm_x86_ops.guest_apic_has_interrupt &&
11592                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11593 }
11594
11595 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11596 {
11597         if (!list_empty_careful(&vcpu->async_pf.done))
11598                 return true;
11599
11600         if (kvm_apic_has_events(vcpu))
11601                 return true;
11602
11603         if (vcpu->arch.pv.pv_unhalted)
11604                 return true;
11605
11606         if (vcpu->arch.exception.pending)
11607                 return true;
11608
11609         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11610             (vcpu->arch.nmi_pending &&
11611              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11612                 return true;
11613
11614         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11615             (vcpu->arch.smi_pending &&
11616              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11617                 return true;
11618
11619         if (kvm_arch_interrupt_allowed(vcpu) &&
11620             (kvm_cpu_has_interrupt(vcpu) ||
11621             kvm_guest_apic_has_interrupt(vcpu)))
11622                 return true;
11623
11624         if (kvm_hv_has_stimer_pending(vcpu))
11625                 return true;
11626
11627         if (is_guest_mode(vcpu) &&
11628             kvm_x86_ops.nested_ops->hv_timer_pending &&
11629             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11630                 return true;
11631
11632         return false;
11633 }
11634
11635 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11636 {
11637         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11638 }
11639
11640 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11641 {
11642         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11643                 return true;
11644
11645         return false;
11646 }
11647
11648 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11649 {
11650         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11651                 return true;
11652
11653         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11654                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11655                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11656                 return true;
11657
11658         return kvm_arch_dy_has_pending_interrupt(vcpu);
11659 }
11660
11661 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11662 {
11663         if (vcpu->arch.guest_state_protected)
11664                 return true;
11665
11666         return vcpu->arch.preempted_in_kernel;
11667 }
11668
11669 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11670 {
11671         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11672 }
11673
11674 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11675 {
11676         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11677 }
11678
11679 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11680 {
11681         /* Can't read the RIP when guest state is protected, just return 0 */
11682         if (vcpu->arch.guest_state_protected)
11683                 return 0;
11684
11685         if (is_64_bit_mode(vcpu))
11686                 return kvm_rip_read(vcpu);
11687         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11688                      kvm_rip_read(vcpu));
11689 }
11690 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11691
11692 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11693 {
11694         return kvm_get_linear_rip(vcpu) == linear_rip;
11695 }
11696 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11697
11698 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11699 {
11700         unsigned long rflags;
11701
11702         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11703         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11704                 rflags &= ~X86_EFLAGS_TF;
11705         return rflags;
11706 }
11707 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11708
11709 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11710 {
11711         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11712             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11713                 rflags |= X86_EFLAGS_TF;
11714         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11715 }
11716
11717 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11718 {
11719         __kvm_set_rflags(vcpu, rflags);
11720         kvm_make_request(KVM_REQ_EVENT, vcpu);
11721 }
11722 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11723
11724 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11725 {
11726         int r;
11727
11728         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11729               work->wakeup_all)
11730                 return;
11731
11732         r = kvm_mmu_reload(vcpu);
11733         if (unlikely(r))
11734                 return;
11735
11736         if (!vcpu->arch.mmu->direct_map &&
11737               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11738                 return;
11739
11740         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11741 }
11742
11743 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11744 {
11745         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11746
11747         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11748 }
11749
11750 static inline u32 kvm_async_pf_next_probe(u32 key)
11751 {
11752         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11753 }
11754
11755 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11756 {
11757         u32 key = kvm_async_pf_hash_fn(gfn);
11758
11759         while (vcpu->arch.apf.gfns[key] != ~0)
11760                 key = kvm_async_pf_next_probe(key);
11761
11762         vcpu->arch.apf.gfns[key] = gfn;
11763 }
11764
11765 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11766 {
11767         int i;
11768         u32 key = kvm_async_pf_hash_fn(gfn);
11769
11770         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11771                      (vcpu->arch.apf.gfns[key] != gfn &&
11772                       vcpu->arch.apf.gfns[key] != ~0); i++)
11773                 key = kvm_async_pf_next_probe(key);
11774
11775         return key;
11776 }
11777
11778 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11779 {
11780         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11781 }
11782
11783 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11784 {
11785         u32 i, j, k;
11786
11787         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11788
11789         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11790                 return;
11791
11792         while (true) {
11793                 vcpu->arch.apf.gfns[i] = ~0;
11794                 do {
11795                         j = kvm_async_pf_next_probe(j);
11796                         if (vcpu->arch.apf.gfns[j] == ~0)
11797                                 return;
11798                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11799                         /*
11800                          * k lies cyclically in ]i,j]
11801                          * |    i.k.j |
11802                          * |....j i.k.| or  |.k..j i...|
11803                          */
11804                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11805                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11806                 i = j;
11807         }
11808 }
11809
11810 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11811 {
11812         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11813
11814         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11815                                       sizeof(reason));
11816 }
11817
11818 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11819 {
11820         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11821
11822         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11823                                              &token, offset, sizeof(token));
11824 }
11825
11826 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11827 {
11828         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11829         u32 val;
11830
11831         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11832                                          &val, offset, sizeof(val)))
11833                 return false;
11834
11835         return !val;
11836 }
11837
11838 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11839 {
11840         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11841                 return false;
11842
11843         if (!kvm_pv_async_pf_enabled(vcpu) ||
11844             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11845                 return false;
11846
11847         return true;
11848 }
11849
11850 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11851 {
11852         if (unlikely(!lapic_in_kernel(vcpu) ||
11853                      kvm_event_needs_reinjection(vcpu) ||
11854                      vcpu->arch.exception.pending))
11855                 return false;
11856
11857         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11858                 return false;
11859
11860         /*
11861          * If interrupts are off we cannot even use an artificial
11862          * halt state.
11863          */
11864         return kvm_arch_interrupt_allowed(vcpu);
11865 }
11866
11867 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11868                                      struct kvm_async_pf *work)
11869 {
11870         struct x86_exception fault;
11871
11872         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11873         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11874
11875         if (kvm_can_deliver_async_pf(vcpu) &&
11876             !apf_put_user_notpresent(vcpu)) {
11877                 fault.vector = PF_VECTOR;
11878                 fault.error_code_valid = true;
11879                 fault.error_code = 0;
11880                 fault.nested_page_fault = false;
11881                 fault.address = work->arch.token;
11882                 fault.async_page_fault = true;
11883                 kvm_inject_page_fault(vcpu, &fault);
11884                 return true;
11885         } else {
11886                 /*
11887                  * It is not possible to deliver a paravirtualized asynchronous
11888                  * page fault, but putting the guest in an artificial halt state
11889                  * can be beneficial nevertheless: if an interrupt arrives, we
11890                  * can deliver it timely and perhaps the guest will schedule
11891                  * another process.  When the instruction that triggered a page
11892                  * fault is retried, hopefully the page will be ready in the host.
11893                  */
11894                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11895                 return false;
11896         }
11897 }
11898
11899 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11900                                  struct kvm_async_pf *work)
11901 {
11902         struct kvm_lapic_irq irq = {
11903                 .delivery_mode = APIC_DM_FIXED,
11904                 .vector = vcpu->arch.apf.vec
11905         };
11906
11907         if (work->wakeup_all)
11908                 work->arch.token = ~0; /* broadcast wakeup */
11909         else
11910                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11911         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11912
11913         if ((work->wakeup_all || work->notpresent_injected) &&
11914             kvm_pv_async_pf_enabled(vcpu) &&
11915             !apf_put_user_ready(vcpu, work->arch.token)) {
11916                 vcpu->arch.apf.pageready_pending = true;
11917                 kvm_apic_set_irq(vcpu, &irq, NULL);
11918         }
11919
11920         vcpu->arch.apf.halted = false;
11921         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11922 }
11923
11924 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11925 {
11926         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11927         if (!vcpu->arch.apf.pageready_pending)
11928                 kvm_vcpu_kick(vcpu);
11929 }
11930
11931 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11932 {
11933         if (!kvm_pv_async_pf_enabled(vcpu))
11934                 return true;
11935         else
11936                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11937 }
11938
11939 void kvm_arch_start_assignment(struct kvm *kvm)
11940 {
11941         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11942                 static_call_cond(kvm_x86_start_assignment)(kvm);
11943 }
11944 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11945
11946 void kvm_arch_end_assignment(struct kvm *kvm)
11947 {
11948         atomic_dec(&kvm->arch.assigned_device_count);
11949 }
11950 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11951
11952 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11953 {
11954         return atomic_read(&kvm->arch.assigned_device_count);
11955 }
11956 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11957
11958 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11959 {
11960         atomic_inc(&kvm->arch.noncoherent_dma_count);
11961 }
11962 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11963
11964 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11965 {
11966         atomic_dec(&kvm->arch.noncoherent_dma_count);
11967 }
11968 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11969
11970 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11971 {
11972         return atomic_read(&kvm->arch.noncoherent_dma_count);
11973 }
11974 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11975
11976 bool kvm_arch_has_irq_bypass(void)
11977 {
11978         return true;
11979 }
11980
11981 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11982                                       struct irq_bypass_producer *prod)
11983 {
11984         struct kvm_kernel_irqfd *irqfd =
11985                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11986         int ret;
11987
11988         irqfd->producer = prod;
11989         kvm_arch_start_assignment(irqfd->kvm);
11990         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11991                                          prod->irq, irqfd->gsi, 1);
11992
11993         if (ret)
11994                 kvm_arch_end_assignment(irqfd->kvm);
11995
11996         return ret;
11997 }
11998
11999 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12000                                       struct irq_bypass_producer *prod)
12001 {
12002         int ret;
12003         struct kvm_kernel_irqfd *irqfd =
12004                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12005
12006         WARN_ON(irqfd->producer != prod);
12007         irqfd->producer = NULL;
12008
12009         /*
12010          * When producer of consumer is unregistered, we change back to
12011          * remapped mode, so we can re-use the current implementation
12012          * when the irq is masked/disabled or the consumer side (KVM
12013          * int this case doesn't want to receive the interrupts.
12014         */
12015         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12016         if (ret)
12017                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12018                        " fails: %d\n", irqfd->consumer.token, ret);
12019
12020         kvm_arch_end_assignment(irqfd->kvm);
12021 }
12022
12023 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12024                                    uint32_t guest_irq, bool set)
12025 {
12026         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12027 }
12028
12029 bool kvm_vector_hashing_enabled(void)
12030 {
12031         return vector_hashing;
12032 }
12033
12034 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12035 {
12036         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12037 }
12038 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12039
12040
12041 int kvm_spec_ctrl_test_value(u64 value)
12042 {
12043         /*
12044          * test that setting IA32_SPEC_CTRL to given value
12045          * is allowed by the host processor
12046          */
12047
12048         u64 saved_value;
12049         unsigned long flags;
12050         int ret = 0;
12051
12052         local_irq_save(flags);
12053
12054         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12055                 ret = 1;
12056         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12057                 ret = 1;
12058         else
12059                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12060
12061         local_irq_restore(flags);
12062
12063         return ret;
12064 }
12065 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12066
12067 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12068 {
12069         struct x86_exception fault;
12070         u32 access = error_code &
12071                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12072
12073         if (!(error_code & PFERR_PRESENT_MASK) ||
12074             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12075                 /*
12076                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12077                  * tables probably do not match the TLB.  Just proceed
12078                  * with the error code that the processor gave.
12079                  */
12080                 fault.vector = PF_VECTOR;
12081                 fault.error_code_valid = true;
12082                 fault.error_code = error_code;
12083                 fault.nested_page_fault = false;
12084                 fault.address = gva;
12085         }
12086         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12087 }
12088 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12089
12090 /*
12091  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12092  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12093  * indicates whether exit to userspace is needed.
12094  */
12095 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12096                               struct x86_exception *e)
12097 {
12098         if (r == X86EMUL_PROPAGATE_FAULT) {
12099                 kvm_inject_emulated_page_fault(vcpu, e);
12100                 return 1;
12101         }
12102
12103         /*
12104          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12105          * while handling a VMX instruction KVM could've handled the request
12106          * correctly by exiting to userspace and performing I/O but there
12107          * doesn't seem to be a real use-case behind such requests, just return
12108          * KVM_EXIT_INTERNAL_ERROR for now.
12109          */
12110         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
12111         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
12112         vcpu->run->internal.ndata = 0;
12113
12114         return 0;
12115 }
12116 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12117
12118 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12119 {
12120         bool pcid_enabled;
12121         struct x86_exception e;
12122         struct {
12123                 u64 pcid;
12124                 u64 gla;
12125         } operand;
12126         int r;
12127
12128         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12129         if (r != X86EMUL_CONTINUE)
12130                 return kvm_handle_memory_failure(vcpu, r, &e);
12131
12132         if (operand.pcid >> 12 != 0) {
12133                 kvm_inject_gp(vcpu, 0);
12134                 return 1;
12135         }
12136
12137         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12138
12139         switch (type) {
12140         case INVPCID_TYPE_INDIV_ADDR:
12141                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12142                     is_noncanonical_address(operand.gla, vcpu)) {
12143                         kvm_inject_gp(vcpu, 0);
12144                         return 1;
12145                 }
12146                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12147                 return kvm_skip_emulated_instruction(vcpu);
12148
12149         case INVPCID_TYPE_SINGLE_CTXT:
12150                 if (!pcid_enabled && (operand.pcid != 0)) {
12151                         kvm_inject_gp(vcpu, 0);
12152                         return 1;
12153                 }
12154
12155                 kvm_invalidate_pcid(vcpu, operand.pcid);
12156                 return kvm_skip_emulated_instruction(vcpu);
12157
12158         case INVPCID_TYPE_ALL_NON_GLOBAL:
12159                 /*
12160                  * Currently, KVM doesn't mark global entries in the shadow
12161                  * page tables, so a non-global flush just degenerates to a
12162                  * global flush. If needed, we could optimize this later by
12163                  * keeping track of global entries in shadow page tables.
12164                  */
12165
12166                 fallthrough;
12167         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12168                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12169                 return kvm_skip_emulated_instruction(vcpu);
12170
12171         default:
12172                 BUG(); /* We have already checked above that type <= 3 */
12173         }
12174 }
12175 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12176
12177 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12178 {
12179         struct kvm_run *run = vcpu->run;
12180         struct kvm_mmio_fragment *frag;
12181         unsigned int len;
12182
12183         BUG_ON(!vcpu->mmio_needed);
12184
12185         /* Complete previous fragment */
12186         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12187         len = min(8u, frag->len);
12188         if (!vcpu->mmio_is_write)
12189                 memcpy(frag->data, run->mmio.data, len);
12190
12191         if (frag->len <= 8) {
12192                 /* Switch to the next fragment. */
12193                 frag++;
12194                 vcpu->mmio_cur_fragment++;
12195         } else {
12196                 /* Go forward to the next mmio piece. */
12197                 frag->data += len;
12198                 frag->gpa += len;
12199                 frag->len -= len;
12200         }
12201
12202         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12203                 vcpu->mmio_needed = 0;
12204
12205                 // VMG change, at this point, we're always done
12206                 // RIP has already been advanced
12207                 return 1;
12208         }
12209
12210         // More MMIO is needed
12211         run->mmio.phys_addr = frag->gpa;
12212         run->mmio.len = min(8u, frag->len);
12213         run->mmio.is_write = vcpu->mmio_is_write;
12214         if (run->mmio.is_write)
12215                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12216         run->exit_reason = KVM_EXIT_MMIO;
12217
12218         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12219
12220         return 0;
12221 }
12222
12223 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12224                           void *data)
12225 {
12226         int handled;
12227         struct kvm_mmio_fragment *frag;
12228
12229         if (!data)
12230                 return -EINVAL;
12231
12232         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12233         if (handled == bytes)
12234                 return 1;
12235
12236         bytes -= handled;
12237         gpa += handled;
12238         data += handled;
12239
12240         /*TODO: Check if need to increment number of frags */
12241         frag = vcpu->mmio_fragments;
12242         vcpu->mmio_nr_fragments = 1;
12243         frag->len = bytes;
12244         frag->gpa = gpa;
12245         frag->data = data;
12246
12247         vcpu->mmio_needed = 1;
12248         vcpu->mmio_cur_fragment = 0;
12249
12250         vcpu->run->mmio.phys_addr = gpa;
12251         vcpu->run->mmio.len = min(8u, frag->len);
12252         vcpu->run->mmio.is_write = 1;
12253         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12254         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12255
12256         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12257
12258         return 0;
12259 }
12260 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12261
12262 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12263                          void *data)
12264 {
12265         int handled;
12266         struct kvm_mmio_fragment *frag;
12267
12268         if (!data)
12269                 return -EINVAL;
12270
12271         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12272         if (handled == bytes)
12273                 return 1;
12274
12275         bytes -= handled;
12276         gpa += handled;
12277         data += handled;
12278
12279         /*TODO: Check if need to increment number of frags */
12280         frag = vcpu->mmio_fragments;
12281         vcpu->mmio_nr_fragments = 1;
12282         frag->len = bytes;
12283         frag->gpa = gpa;
12284         frag->data = data;
12285
12286         vcpu->mmio_needed = 1;
12287         vcpu->mmio_cur_fragment = 0;
12288
12289         vcpu->run->mmio.phys_addr = gpa;
12290         vcpu->run->mmio.len = min(8u, frag->len);
12291         vcpu->run->mmio.is_write = 0;
12292         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12293
12294         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12295
12296         return 0;
12297 }
12298 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12299
12300 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12301 {
12302         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12303                vcpu->arch.pio.count * vcpu->arch.pio.size);
12304         vcpu->arch.pio.count = 0;
12305
12306         return 1;
12307 }
12308
12309 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12310                            unsigned int port, void *data,  unsigned int count)
12311 {
12312         int ret;
12313
12314         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12315                                         data, count);
12316         if (ret)
12317                 return ret;
12318
12319         vcpu->arch.pio.count = 0;
12320
12321         return 0;
12322 }
12323
12324 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12325                           unsigned int port, void *data, unsigned int count)
12326 {
12327         int ret;
12328
12329         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12330                                        data, count);
12331         if (ret) {
12332                 vcpu->arch.pio.count = 0;
12333         } else {
12334                 vcpu->arch.guest_ins_data = data;
12335                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12336         }
12337
12338         return 0;
12339 }
12340
12341 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12342                          unsigned int port, void *data,  unsigned int count,
12343                          int in)
12344 {
12345         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12346                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12347 }
12348 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12349
12350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12355 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12356 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12357 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12358 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12359 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12360 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12361 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12362 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12363 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12364 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12365 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12366 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12367 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12368 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12369 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12370 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12371 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12372 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12373 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12374 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12375 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12376 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);