arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         BUG();
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 366
 367 #define EXCPT_BENIGN            0
 368 #define EXCPT_CONTRIBUTORY      1
 369 #define EXCPT_PF                2
 370
 371 static int exception_class(int vector)
 372 {
 373         switch (vector) {
 374         case PF_VECTOR:
 375                 return EXCPT_PF;
 376         case DE_VECTOR:
 377         case TS_VECTOR:
 378         case NP_VECTOR:
 379         case SS_VECTOR:
 380         case GP_VECTOR:
 381                 return EXCPT_CONTRIBUTORY;
 382         default:
 383                 break;
 384         }
 385         return EXCPT_BENIGN;
 386 }
 387
 388 #define EXCPT_FAULT             0
 389 #define EXCPT_TRAP              1
 390 #define EXCPT_ABORT             2
 391 #define EXCPT_INTERRUPT         3
 392
 393 static int exception_type(int vector)
 394 {
 395         unsigned int mask;
 396
 397         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 398                 return EXCPT_INTERRUPT;
 399
 400         mask = 1 << vector;
 401
 402         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 403         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 404                 return EXCPT_TRAP;
 405
 406         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 407                 return EXCPT_ABORT;
 408
 409         /* Reserved exceptions will result in fault */
 410         return EXCPT_FAULT;
 411 }
 412
 413 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 414 {
 415         unsigned nr = vcpu->arch.exception.nr;
 416         bool has_payload = vcpu->arch.exception.has_payload;
 417         unsigned long payload = vcpu->arch.exception.payload;
 418
 419         if (!has_payload)
 420                 return;
 421
 422         switch (nr) {
 423         case DB_VECTOR:
 424                 /*
 425                  * "Certain debug exceptions may clear bit 0-3.  The
 426                  * remaining contents of the DR6 register are never
 427                  * cleared by the processor".
 428                  */
 429                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 430                 /*
 431                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 432                  */
 433                 vcpu->arch.dr6 |= DR6_RTM;
 434                 vcpu->arch.dr6 |= payload;
 435                 /*
 436                  * Bit 16 should be set in the payload whenever the #DB
 437                  * exception should clear DR6.RTM. This makes the payload
 438                  * compatible with the pending debug exceptions under VMX.
 439                  * Though not currently documented in the SDM, this also
 440                  * makes the payload compatible with the exit qualification
 441                  * for #DB exceptions under VMX.
 442                  */
 443                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 444                 break;
 445         case PF_VECTOR:
 446                 vcpu->arch.cr2 = payload;
 447                 break;
 448         }
 449
 450         vcpu->arch.exception.has_payload = false;
 451         vcpu->arch.exception.payload = 0;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 454
 455 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 456                 unsigned nr, bool has_error, u32 error_code,
 457                 bool has_payload, unsigned long payload, bool reinject)
 458 {
 459         u32 prev_nr;
 460         int class1, class2;
 461
 462         kvm_make_request(KVM_REQ_EVENT, vcpu);
 463
 464         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 465         queue:
 466                 if (has_error && !is_protmode(vcpu))
 467                         has_error = false;
 468                 if (reinject) {
 469                         /*
 470                          * On vmentry, vcpu->arch.exception.pending is only
 471                          * true if an event injection was blocked by
 472                          * nested_run_pending.  In that case, however,
 473                          * vcpu_enter_guest requests an immediate exit,
 474                          * and the guest shouldn't proceed far enough to
 475                          * need reinjection.
 476                          */
 477                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 478                         vcpu->arch.exception.injected = true;
 479                         if (WARN_ON_ONCE(has_payload)) {
 480                                 /*
 481                                  * A reinjected event has already
 482                                  * delivered its payload.
 483                                  */
 484                                 has_payload = false;
 485                                 payload = 0;
 486                         }
 487                 } else {
 488                         vcpu->arch.exception.pending = true;
 489                         vcpu->arch.exception.injected = false;
 490                 }
 491                 vcpu->arch.exception.has_error_code = has_error;
 492                 vcpu->arch.exception.nr = nr;
 493                 vcpu->arch.exception.error_code = error_code;
 494                 vcpu->arch.exception.has_payload = has_payload;
 495                 vcpu->arch.exception.payload = payload;
 496                 /*
 497                  * In guest mode, payload delivery should be deferred,
 498                  * so that the L1 hypervisor can intercept #PF before
 499                  * CR2 is modified (or intercept #DB before DR6 is
 500                  * modified under nVMX).  However, for ABI
 501                  * compatibility with KVM_GET_VCPU_EVENTS and
 502                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 503                  * delivery unless userspace has enabled this
 504                  * functionality via the per-VM capability,
 505                  * KVM_CAP_EXCEPTION_PAYLOAD.
 506                  */
 507                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 508                     !is_guest_mode(vcpu))
 509                         kvm_deliver_exception_payload(vcpu);
 510                 return;
 511         }
 512
 513         /* to check exception */
 514         prev_nr = vcpu->arch.exception.nr;
 515         if (prev_nr == DF_VECTOR) {
 516                 /* triple fault -> shutdown */
 517                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 518                 return;
 519         }
 520         class1 = exception_class(prev_nr);
 521         class2 = exception_class(nr);
 522         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 523                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 524                 /*
 525                  * Generate double fault per SDM Table 5-5.  Set
 526                  * exception.pending = true so that the double fault
 527                  * can trigger a nested vmexit.
 528                  */
 529                 vcpu->arch.exception.pending = true;
 530                 vcpu->arch.exception.injected = false;
 531                 vcpu->arch.exception.has_error_code = true;
 532                 vcpu->arch.exception.nr = DF_VECTOR;
 533                 vcpu->arch.exception.error_code = 0;
 534                 vcpu->arch.exception.has_payload = false;
 535                 vcpu->arch.exception.payload = 0;
 536         } else
 537                 /* replace previous exception with a new one in a hope
 538                    that instruction re-execution will regenerate lost
 539                    exception */
 540                 goto queue;
 541 }
 542
 543 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 548
 549 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 550 {
 551         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 554
 555 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                   unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 559 }
 560
 561 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 562                                     u32 error_code, unsigned long payload)
 563 {
 564         kvm_multiple_exception(vcpu, nr, true, error_code,
 565                                true, payload, false);
 566 }
 567
 568 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 569 {
 570         if (err)
 571                 kvm_inject_gp(vcpu, 0);
 572         else
 573                 return kvm_skip_emulated_instruction(vcpu);
 574
 575         return 1;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 578
 579 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 580 {
 581         ++vcpu->stat.pf_guest;
 582         vcpu->arch.exception.nested_apf =
 583                 is_guest_mode(vcpu) && fault->async_page_fault;
 584         if (vcpu->arch.exception.nested_apf) {
 585                 vcpu->arch.apf.nested_apf_token = fault->address;
 586                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 587         } else {
 588                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 589                                         fault->address);
 590         }
 591 }
 592 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 593
 594 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 595 {
 596         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 597                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 598         else
 599                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 600
 601         return fault->nested_page_fault;
 602 }
 603
 604 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 605 {
 606         atomic_inc(&vcpu->arch.nmi_queued);
 607         kvm_make_request(KVM_REQ_NMI, vcpu);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 610
 611 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 616
 617 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 618 {
 619         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 622
 623 /*
 624  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 625  * a #GP and return false.
 626  */
 627 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 628 {
 629         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 630                 return true;
 631         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 635
 636 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 637 {
 638         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 639                 return true;
 640
 641         kvm_queue_exception(vcpu, UD_VECTOR);
 642         return false;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_require_dr);
 645
 646 /*
 647  * This function will be used to read from the physical memory of the currently
 648  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 649  * can read from guest physical or from the guest's guest physical memory.
 650  */
 651 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 652                             gfn_t ngfn, void *data, int offset, int len,
 653                             u32 access)
 654 {
 655         struct x86_exception exception;
 656         gfn_t real_gfn;
 657         gpa_t ngpa;
 658
 659         ngpa     = gfn_to_gpa(ngfn);
 660         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 661         if (real_gfn == UNMAPPED_GVA)
 662                 return -EFAULT;
 663
 664         real_gfn = gpa_to_gfn(real_gfn);
 665
 666         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 669
 670 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 671                                void *data, int offset, int len, u32 access)
 672 {
 673         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 674                                        data, offset, len, access);
 675 }
 676
 677 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 678 {
 679         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 680                rsvd_bits(1, 2);
 681 }
 682
 683 /*
 684  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 685  */
 686 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 687 {
 688         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 689         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 690         int i;
 691         int ret;
 692         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 693
 694         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 695                                       offset * sizeof(u64), sizeof(pdpte),
 696                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 697         if (ret < 0) {
 698                 ret = 0;
 699                 goto out;
 700         }
 701         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 702                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 703                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 704                         ret = 0;
 705                         goto out;
 706                 }
 707         }
 708         ret = 1;
 709
 710         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 711         __set_bit(VCPU_EXREG_PDPTR,
 712                   (unsigned long *)&vcpu->arch.regs_avail);
 713         __set_bit(VCPU_EXREG_PDPTR,
 714                   (unsigned long *)&vcpu->arch.regs_dirty);
 715 out:
 716
 717         return ret;
 718 }
 719 EXPORT_SYMBOL_GPL(load_pdptrs);
 720
 721 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 722 {
 723         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 724         bool changed = true;
 725         int offset;
 726         gfn_t gfn;
 727         int r;
 728
 729         if (!is_pae_paging(vcpu))
 730                 return false;
 731
 732         if (!test_bit(VCPU_EXREG_PDPTR,
 733                       (unsigned long *)&vcpu->arch.regs_avail))
 734                 return true;
 735
 736         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 737         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 738         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 739                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 740         if (r < 0)
 741                 goto out;
 742         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 743 out:
 744
 745         return changed;
 746 }
 747 EXPORT_SYMBOL_GPL(pdptrs_changed);
 748
 749 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 750 {
 751         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 752         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 753
 754         cr0 |= X86_CR0_ET;
 755
 756 #ifdef CONFIG_X86_64
 757         if (cr0 & 0xffffffff00000000UL)
 758                 return 1;
 759 #endif
 760
 761         cr0 &= ~CR0_RESERVED_BITS;
 762
 763         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 764                 return 1;
 765
 766         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 767                 return 1;
 768
 769         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 770 #ifdef CONFIG_X86_64
 771                 if ((vcpu->arch.efer & EFER_LME)) {
 772                         int cs_db, cs_l;
 773
 774                         if (!is_pae(vcpu))
 775                                 return 1;
 776                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 777                         if (cs_l)
 778                                 return 1;
 779                 } else
 780 #endif
 781                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 782                                                  kvm_read_cr3(vcpu)))
 783                         return 1;
 784         }
 785
 786         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 787                 return 1;
 788
 789         kvm_x86_ops->set_cr0(vcpu, cr0);
 790
 791         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 792                 kvm_clear_async_pf_completion_queue(vcpu);
 793                 kvm_async_pf_hash_reset(vcpu);
 794         }
 795
 796         if ((cr0 ^ old_cr0) & update_bits)
 797                 kvm_mmu_reset_context(vcpu);
 798
 799         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 800             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 801             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 802                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 803
 804         return 0;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 807
 808 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 809 {
 810         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 811 }
 812 EXPORT_SYMBOL_GPL(kvm_lmsw);
 813
 814 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 815 {
 816         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 817                         !vcpu->guest_xcr0_loaded) {
 818                 /* kvm_set_xcr() also depends on this */
 819                 if (vcpu->arch.xcr0 != host_xcr0)
 820                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 821                 vcpu->guest_xcr0_loaded = 1;
 822         }
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 825
 826 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 827 {
 828         if (vcpu->guest_xcr0_loaded) {
 829                 if (vcpu->arch.xcr0 != host_xcr0)
 830                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 831                 vcpu->guest_xcr0_loaded = 0;
 832         }
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 835
 836 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 837 {
 838         u64 xcr0 = xcr;
 839         u64 old_xcr0 = vcpu->arch.xcr0;
 840         u64 valid_bits;
 841
 842         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 843         if (index != XCR_XFEATURE_ENABLED_MASK)
 844                 return 1;
 845         if (!(xcr0 & XFEATURE_MASK_FP))
 846                 return 1;
 847         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 848                 return 1;
 849
 850         /*
 851          * Do not allow the guest to set bits that we do not support
 852          * saving.  However, xcr0 bit 0 is always set, even if the
 853          * emulated CPU does not support XSAVE (see fx_init).
 854          */
 855         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 856         if (xcr0 & ~valid_bits)
 857                 return 1;
 858
 859         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 860             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 861                 return 1;
 862
 863         if (xcr0 & XFEATURE_MASK_AVX512) {
 864                 if (!(xcr0 & XFEATURE_MASK_YMM))
 865                         return 1;
 866                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 867                         return 1;
 868         }
 869         vcpu->arch.xcr0 = xcr0;
 870
 871         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 872                 kvm_update_cpuid(vcpu);
 873         return 0;
 874 }
 875
 876 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 877 {
 878         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 879             __kvm_set_xcr(vcpu, index, xcr)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 886
 887 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 888 {
 889         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 890         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 891                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 892
 893         if (cr4 & CR4_RESERVED_BITS)
 894                 return 1;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 897                 return 1;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 900                 return 1;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 903                 return 1;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 906                 return 1;
 907
 908         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 909                 return 1;
 910
 911         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 912                 return 1;
 913
 914         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 915                 return 1;
 916
 917         if (is_long_mode(vcpu)) {
 918                 if (!(cr4 & X86_CR4_PAE))
 919                         return 1;
 920         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 921                    && ((cr4 ^ old_cr4) & pdptr_bits)
 922                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 923                                    kvm_read_cr3(vcpu)))
 924                 return 1;
 925
 926         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 927                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 928                         return 1;
 929
 930                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 931                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 932                         return 1;
 933         }
 934
 935         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 936                 return 1;
 937
 938         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 939             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 940                 kvm_mmu_reset_context(vcpu);
 941
 942         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 943                 kvm_update_cpuid(vcpu);
 944
 945         return 0;
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 948
 949 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 950 {
 951         bool skip_tlb_flush = false;
 952 #ifdef CONFIG_X86_64
 953         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 954
 955         if (pcid_enabled) {
 956                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 957                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 958         }
 959 #endif
 960
 961         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 962                 if (!skip_tlb_flush) {
 963                         kvm_mmu_sync_roots(vcpu);
 964                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 965                 }
 966                 return 0;
 967         }
 968
 969         if (is_long_mode(vcpu) &&
 970             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 971                 return 1;
 972         else if (is_pae_paging(vcpu) &&
 973                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 974                 return 1;
 975
 976         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 977         vcpu->arch.cr3 = cr3;
 978         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 979
 980         return 0;
 981 }
 982 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 983
 984 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 985 {
 986         if (cr8 & CR8_RESERVED_BITS)
 987                 return 1;
 988         if (lapic_in_kernel(vcpu))
 989                 kvm_lapic_set_tpr(vcpu, cr8);
 990         else
 991                 vcpu->arch.cr8 = cr8;
 992         return 0;
 993 }
 994 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 995
 996 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 997 {
 998         if (lapic_in_kernel(vcpu))
 999                 return kvm_lapic_get_cr8(vcpu);
1000         else
1001                 return vcpu->arch.cr8;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1004
1005 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1006 {
1007         int i;
1008
1009         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1010                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1011                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1012                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1013         }
1014 }
1015
1016 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1017 {
1018         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1019                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1020 }
1021
1022 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1023 {
1024         unsigned long dr7;
1025
1026         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1027                 dr7 = vcpu->arch.guest_debug_dr7;
1028         else
1029                 dr7 = vcpu->arch.dr7;
1030         kvm_x86_ops->set_dr7(vcpu, dr7);
1031         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1032         if (dr7 & DR7_BP_EN_MASK)
1033                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1034 }
1035
1036 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1037 {
1038         u64 fixed = DR6_FIXED_1;
1039
1040         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1041                 fixed |= DR6_RTM;
1042         return fixed;
1043 }
1044
1045 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1046 {
1047         switch (dr) {
1048         case 0 ... 3:
1049                 vcpu->arch.db[dr] = val;
1050                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1051                         vcpu->arch.eff_db[dr] = val;
1052                 break;
1053         case 4:
1054                 /* fall through */
1055         case 6:
1056                 if (val & 0xffffffff00000000ULL)
1057                         return -1; /* #GP */
1058                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1059                 kvm_update_dr6(vcpu);
1060                 break;
1061         case 5:
1062                 /* fall through */
1063         default: /* 7 */
1064                 if (val & 0xffffffff00000000ULL)
1065                         return -1; /* #GP */
1066                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1067                 kvm_update_dr7(vcpu);
1068                 break;
1069         }
1070
1071         return 0;
1072 }
1073
1074 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1075 {
1076         if (__kvm_set_dr(vcpu, dr, val)) {
1077                 kvm_inject_gp(vcpu, 0);
1078                 return 1;
1079         }
1080         return 0;
1081 }
1082 EXPORT_SYMBOL_GPL(kvm_set_dr);
1083
1084 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1085 {
1086         switch (dr) {
1087         case 0 ... 3:
1088                 *val = vcpu->arch.db[dr];
1089                 break;
1090         case 4:
1091                 /* fall through */
1092         case 6:
1093                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1094                         *val = vcpu->arch.dr6;
1095                 else
1096                         *val = kvm_x86_ops->get_dr6(vcpu);
1097                 break;
1098         case 5:
1099                 /* fall through */
1100         default: /* 7 */
1101                 *val = vcpu->arch.dr7;
1102                 break;
1103         }
1104         return 0;
1105 }
1106 EXPORT_SYMBOL_GPL(kvm_get_dr);
1107
1108 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1109 {
1110         u32 ecx = kvm_rcx_read(vcpu);
1111         u64 data;
1112         int err;
1113
1114         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1115         if (err)
1116                 return err;
1117         kvm_rax_write(vcpu, (u32)data);
1118         kvm_rdx_write(vcpu, data >> 32);
1119         return err;
1120 }
1121 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1122
1123 /*
1124  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1125  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1126  *
1127  * This list is modified at module load time to reflect the
1128  * capabilities of the host cpu. This capabilities test skips MSRs that are
1129  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1130  * may depend on host virtualization features rather than host cpu features.
1131  */
1132
1133 static u32 msrs_to_save[] = {
1134         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1135         MSR_STAR,
1136 #ifdef CONFIG_X86_64
1137         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1138 #endif
1139         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1140         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1141         MSR_IA32_SPEC_CTRL,
1142         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1143         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1144         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1145         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1146         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1147         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1148         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1149         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1150         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1151         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1152         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1153         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1154         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1155         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1156         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1157         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1158         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1159         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1160         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1161         MSR_ARCH_PERFMON_PERFCTR0 + 18, MSR_ARCH_PERFMON_PERFCTR0 + 19,
1162         MSR_ARCH_PERFMON_PERFCTR0 + 20, MSR_ARCH_PERFMON_PERFCTR0 + 21,
1163         MSR_ARCH_PERFMON_PERFCTR0 + 22, MSR_ARCH_PERFMON_PERFCTR0 + 23,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 24, MSR_ARCH_PERFMON_PERFCTR0 + 25,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 26, MSR_ARCH_PERFMON_PERFCTR0 + 27,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 28, MSR_ARCH_PERFMON_PERFCTR0 + 29,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 30, MSR_ARCH_PERFMON_PERFCTR0 + 31,
1168         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1169         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1170         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1171         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1172         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 18, MSR_ARCH_PERFMON_EVENTSEL0 + 19,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 20, MSR_ARCH_PERFMON_EVENTSEL0 + 21,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 22, MSR_ARCH_PERFMON_EVENTSEL0 + 23,
1180         MSR_ARCH_PERFMON_EVENTSEL0 + 24, MSR_ARCH_PERFMON_EVENTSEL0 + 25,
1181         MSR_ARCH_PERFMON_EVENTSEL0 + 26, MSR_ARCH_PERFMON_EVENTSEL0 + 27,
1182         MSR_ARCH_PERFMON_EVENTSEL0 + 28, MSR_ARCH_PERFMON_EVENTSEL0 + 29,
1183         MSR_ARCH_PERFMON_EVENTSEL0 + 30, MSR_ARCH_PERFMON_EVENTSEL0 + 31,
1184 };
1185
1186 static unsigned num_msrs_to_save;
1187
1188 static u32 emulated_msrs[] = {
1189         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1190         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1191         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1192         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1193         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1194         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1195         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1196         HV_X64_MSR_RESET,
1197         HV_X64_MSR_VP_INDEX,
1198         HV_X64_MSR_VP_RUNTIME,
1199         HV_X64_MSR_SCONTROL,
1200         HV_X64_MSR_STIMER0_CONFIG,
1201         HV_X64_MSR_VP_ASSIST_PAGE,
1202         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1203         HV_X64_MSR_TSC_EMULATION_STATUS,
1204
1205         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1206         MSR_KVM_PV_EOI_EN,
1207
1208         MSR_IA32_TSC_ADJUST,
1209         MSR_IA32_TSCDEADLINE,
1210         MSR_IA32_ARCH_CAPABILITIES,
1211         MSR_IA32_MISC_ENABLE,
1212         MSR_IA32_MCG_STATUS,
1213         MSR_IA32_MCG_CTL,
1214         MSR_IA32_MCG_EXT_CTL,
1215         MSR_IA32_SMBASE,
1216         MSR_SMI_COUNT,
1217         MSR_PLATFORM_INFO,
1218         MSR_MISC_FEATURES_ENABLES,
1219         MSR_AMD64_VIRT_SPEC_CTRL,
1220         MSR_IA32_POWER_CTL,
1221
1222         /*
1223          * The following list leaves out MSRs whose values are determined
1224          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1225          * We always support the "true" VMX control MSRs, even if the host
1226          * processor does not, so I am putting these registers here rather
1227          * than in msrs_to_save.
1228          */
1229         MSR_IA32_VMX_BASIC,
1230         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1231         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1232         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1233         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1234         MSR_IA32_VMX_MISC,
1235         MSR_IA32_VMX_CR0_FIXED0,
1236         MSR_IA32_VMX_CR4_FIXED0,
1237         MSR_IA32_VMX_VMCS_ENUM,
1238         MSR_IA32_VMX_PROCBASED_CTLS2,
1239         MSR_IA32_VMX_EPT_VPID_CAP,
1240         MSR_IA32_VMX_VMFUNC,
1241
1242         MSR_K7_HWCR,
1243         MSR_KVM_POLL_CONTROL,
1244 };
1245
1246 static unsigned num_emulated_msrs;
1247
1248 /*
1249  * List of msr numbers which are used to expose MSR-based features that
1250  * can be used by a hypervisor to validate requested CPU features.
1251  */
1252 static u32 msr_based_features[] = {
1253         MSR_IA32_VMX_BASIC,
1254         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1255         MSR_IA32_VMX_PINBASED_CTLS,
1256         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1257         MSR_IA32_VMX_PROCBASED_CTLS,
1258         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1259         MSR_IA32_VMX_EXIT_CTLS,
1260         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1261         MSR_IA32_VMX_ENTRY_CTLS,
1262         MSR_IA32_VMX_MISC,
1263         MSR_IA32_VMX_CR0_FIXED0,
1264         MSR_IA32_VMX_CR0_FIXED1,
1265         MSR_IA32_VMX_CR4_FIXED0,
1266         MSR_IA32_VMX_CR4_FIXED1,
1267         MSR_IA32_VMX_VMCS_ENUM,
1268         MSR_IA32_VMX_PROCBASED_CTLS2,
1269         MSR_IA32_VMX_EPT_VPID_CAP,
1270         MSR_IA32_VMX_VMFUNC,
1271
1272         MSR_F10H_DECFG,
1273         MSR_IA32_UCODE_REV,
1274         MSR_IA32_ARCH_CAPABILITIES,
1275 };
1276
1277 static unsigned int num_msr_based_features;
1278
1279 static u64 kvm_get_arch_capabilities(void)
1280 {
1281         u64 data = 0;
1282
1283         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1284                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1285
1286         /*
1287          * If we're doing cache flushes (either "always" or "cond")
1288          * we will do one whenever the guest does a vmlaunch/vmresume.
1289          * If an outer hypervisor is doing the cache flush for us
1290          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1291          * capability to the guest too, and if EPT is disabled we're not
1292          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1293          * require a nested hypervisor to do a flush of its own.
1294          */
1295         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1296                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1297
1298         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1299                 data |= ARCH_CAP_RDCL_NO;
1300         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1301                 data |= ARCH_CAP_SSB_NO;
1302         if (!boot_cpu_has_bug(X86_BUG_MDS))
1303                 data |= ARCH_CAP_MDS_NO;
1304
1305         return data;
1306 }
1307
1308 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1309 {
1310         switch (msr->index) {
1311         case MSR_IA32_ARCH_CAPABILITIES:
1312                 msr->data = kvm_get_arch_capabilities();
1313                 break;
1314         case MSR_IA32_UCODE_REV:
1315                 rdmsrl_safe(msr->index, &msr->data);
1316                 break;
1317         default:
1318                 if (kvm_x86_ops->get_msr_feature(msr))
1319                         return 1;
1320         }
1321         return 0;
1322 }
1323
1324 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1325 {
1326         struct kvm_msr_entry msr;
1327         int r;
1328
1329         msr.index = index;
1330         r = kvm_get_msr_feature(&msr);
1331         if (r)
1332                 return r;
1333
1334         *data = msr.data;
1335
1336         return 0;
1337 }
1338
1339 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1340 {
1341         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1342                 return false;
1343
1344         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1345                 return false;
1346
1347         if (efer & (EFER_LME | EFER_LMA) &&
1348             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1349                 return false;
1350
1351         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1352                 return false;
1353
1354         return true;
1355
1356 }
1357 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1358 {
1359         if (efer & efer_reserved_bits)
1360                 return false;
1361
1362         return __kvm_valid_efer(vcpu, efer);
1363 }
1364 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1365
1366 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1367 {
1368         u64 old_efer = vcpu->arch.efer;
1369         u64 efer = msr_info->data;
1370
1371         if (efer & efer_reserved_bits)
1372                 return 1;
1373
1374         if (!msr_info->host_initiated) {
1375                 if (!__kvm_valid_efer(vcpu, efer))
1376                         return 1;
1377
1378                 if (is_paging(vcpu) &&
1379                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1380                         return 1;
1381         }
1382
1383         efer &= ~EFER_LMA;
1384         efer |= vcpu->arch.efer & EFER_LMA;
1385
1386         kvm_x86_ops->set_efer(vcpu, efer);
1387
1388         /* Update reserved bits */
1389         if ((efer ^ old_efer) & EFER_NX)
1390                 kvm_mmu_reset_context(vcpu);
1391
1392         return 0;
1393 }
1394
1395 void kvm_enable_efer_bits(u64 mask)
1396 {
1397        efer_reserved_bits &= ~mask;
1398 }
1399 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1400
1401 /*
1402  * Write @data into the MSR specified by @index.  Select MSR specific fault
1403  * checks are bypassed if @host_initiated is %true.
1404  * Returns 0 on success, non-0 otherwise.
1405  * Assumes vcpu_load() was already called.
1406  */
1407 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1408                          bool host_initiated)
1409 {
1410         struct msr_data msr;
1411
1412         switch (index) {
1413         case MSR_FS_BASE:
1414         case MSR_GS_BASE:
1415         case MSR_KERNEL_GS_BASE:
1416         case MSR_CSTAR:
1417         case MSR_LSTAR:
1418                 if (is_noncanonical_address(data, vcpu))
1419                         return 1;
1420                 break;
1421         case MSR_IA32_SYSENTER_EIP:
1422         case MSR_IA32_SYSENTER_ESP:
1423                 /*
1424                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1425                  * non-canonical address is written on Intel but not on
1426                  * AMD (which ignores the top 32-bits, because it does
1427                  * not implement 64-bit SYSENTER).
1428                  *
1429                  * 64-bit code should hence be able to write a non-canonical
1430                  * value on AMD.  Making the address canonical ensures that
1431                  * vmentry does not fail on Intel after writing a non-canonical
1432                  * value, and that something deterministic happens if the guest
1433                  * invokes 64-bit SYSENTER.
1434                  */
1435                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1436         }
1437
1438         msr.data = data;
1439         msr.index = index;
1440         msr.host_initiated = host_initiated;
1441
1442         return kvm_x86_ops->set_msr(vcpu, &msr);
1443 }
1444
1445 /*
1446  * Read the MSR specified by @index into @data.  Select MSR specific fault
1447  * checks are bypassed if @host_initiated is %true.
1448  * Returns 0 on success, non-0 otherwise.
1449  * Assumes vcpu_load() was already called.
1450  */
1451 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1452                          bool host_initiated)
1453 {
1454         struct msr_data msr;
1455         int ret;
1456
1457         msr.index = index;
1458         msr.host_initiated = host_initiated;
1459
1460         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1461         if (!ret)
1462                 *data = msr.data;
1463         return ret;
1464 }
1465
1466 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1467 {
1468         return __kvm_get_msr(vcpu, index, data, false);
1469 }
1470 EXPORT_SYMBOL_GPL(kvm_get_msr);
1471
1472 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1473 {
1474         return __kvm_set_msr(vcpu, index, data, false);
1475 }
1476 EXPORT_SYMBOL_GPL(kvm_set_msr);
1477
1478 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1479 {
1480         u32 ecx = kvm_rcx_read(vcpu);
1481         u64 data;
1482
1483         if (kvm_get_msr(vcpu, ecx, &data)) {
1484                 trace_kvm_msr_read_ex(ecx);
1485                 kvm_inject_gp(vcpu, 0);
1486                 return 1;
1487         }
1488
1489         trace_kvm_msr_read(ecx, data);
1490
1491         kvm_rax_write(vcpu, data & -1u);
1492         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1493         return kvm_skip_emulated_instruction(vcpu);
1494 }
1495 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1496
1497 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1498 {
1499         u32 ecx = kvm_rcx_read(vcpu);
1500         u64 data = kvm_read_edx_eax(vcpu);
1501
1502         if (kvm_set_msr(vcpu, ecx, data)) {
1503                 trace_kvm_msr_write_ex(ecx, data);
1504                 kvm_inject_gp(vcpu, 0);
1505                 return 1;
1506         }
1507
1508         trace_kvm_msr_write(ecx, data);
1509         return kvm_skip_emulated_instruction(vcpu);
1510 }
1511 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1512
1513 /*
1514  * Adapt set_msr() to msr_io()'s calling convention
1515  */
1516 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1517 {
1518         return __kvm_get_msr(vcpu, index, data, true);
1519 }
1520
1521 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1522 {
1523         return __kvm_set_msr(vcpu, index, *data, true);
1524 }
1525
1526 #ifdef CONFIG_X86_64
1527 struct pvclock_gtod_data {
1528         seqcount_t      seq;
1529
1530         struct { /* extract of a clocksource struct */
1531                 int vclock_mode;
1532                 u64     cycle_last;
1533                 u64     mask;
1534                 u32     mult;
1535                 u32     shift;
1536         } clock;
1537
1538         u64             boot_ns;
1539         u64             nsec_base;
1540         u64             wall_time_sec;
1541 };
1542
1543 static struct pvclock_gtod_data pvclock_gtod_data;
1544
1545 static void update_pvclock_gtod(struct timekeeper *tk)
1546 {
1547         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1548         u64 boot_ns;
1549
1550         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1551
1552         write_seqcount_begin(&vdata->seq);
1553
1554         /* copy pvclock gtod data */
1555         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1556         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1557         vdata->clock.mask               = tk->tkr_mono.mask;
1558         vdata->clock.mult               = tk->tkr_mono.mult;
1559         vdata->clock.shift              = tk->tkr_mono.shift;
1560
1561         vdata->boot_ns                  = boot_ns;
1562         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1563
1564         vdata->wall_time_sec            = tk->xtime_sec;
1565
1566         write_seqcount_end(&vdata->seq);
1567 }
1568 #endif
1569
1570 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1571 {
1572         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1573         kvm_vcpu_kick(vcpu);
1574 }
1575
1576 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1577 {
1578         int version;
1579         int r;
1580         struct pvclock_wall_clock wc;
1581         struct timespec64 boot;
1582
1583         if (!wall_clock)
1584                 return;
1585
1586         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1587         if (r)
1588                 return;
1589
1590         if (version & 1)
1591                 ++version;  /* first time write, random junk */
1592
1593         ++version;
1594
1595         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1596                 return;
1597
1598         /*
1599          * The guest calculates current wall clock time by adding
1600          * system time (updated by kvm_guest_time_update below) to the
1601          * wall clock specified here.  guest system time equals host
1602          * system time for us, thus we must fill in host boot time here.
1603          */
1604         getboottime64(&boot);
1605
1606         if (kvm->arch.kvmclock_offset) {
1607                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1608                 boot = timespec64_sub(boot, ts);
1609         }
1610         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1611         wc.nsec = boot.tv_nsec;
1612         wc.version = version;
1613
1614         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1615
1616         version++;
1617         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1618 }
1619
1620 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1621 {
1622         do_shl32_div32(dividend, divisor);
1623         return dividend;
1624 }
1625
1626 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1627                                s8 *pshift, u32 *pmultiplier)
1628 {
1629         uint64_t scaled64;
1630         int32_t  shift = 0;
1631         uint64_t tps64;
1632         uint32_t tps32;
1633
1634         tps64 = base_hz;
1635         scaled64 = scaled_hz;
1636         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1637                 tps64 >>= 1;
1638                 shift--;
1639         }
1640
1641         tps32 = (uint32_t)tps64;
1642         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1643                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1644                         scaled64 >>= 1;
1645                 else
1646                         tps32 <<= 1;
1647                 shift++;
1648         }
1649
1650         *pshift = shift;
1651         *pmultiplier = div_frac(scaled64, tps32);
1652 }
1653
1654 #ifdef CONFIG_X86_64
1655 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1656 #endif
1657
1658 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1659 static unsigned long max_tsc_khz;
1660
1661 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1662 {
1663         u64 v = (u64)khz * (1000000 + ppm);
1664         do_div(v, 1000000);
1665         return v;
1666 }
1667
1668 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1669 {
1670         u64 ratio;
1671
1672         /* Guest TSC same frequency as host TSC? */
1673         if (!scale) {
1674                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1675                 return 0;
1676         }
1677
1678         /* TSC scaling supported? */
1679         if (!kvm_has_tsc_control) {
1680                 if (user_tsc_khz > tsc_khz) {
1681                         vcpu->arch.tsc_catchup = 1;
1682                         vcpu->arch.tsc_always_catchup = 1;
1683                         return 0;
1684                 } else {
1685                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1686                         return -1;
1687                 }
1688         }
1689
1690         /* TSC scaling required  - calculate ratio */
1691         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1692                                 user_tsc_khz, tsc_khz);
1693
1694         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1695                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1696                                     user_tsc_khz);
1697                 return -1;
1698         }
1699
1700         vcpu->arch.tsc_scaling_ratio = ratio;
1701         return 0;
1702 }
1703
1704 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1705 {
1706         u32 thresh_lo, thresh_hi;
1707         int use_scaling = 0;
1708
1709         /* tsc_khz can be zero if TSC calibration fails */
1710         if (user_tsc_khz == 0) {
1711                 /* set tsc_scaling_ratio to a safe value */
1712                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1713                 return -1;
1714         }
1715
1716         /* Compute a scale to convert nanoseconds in TSC cycles */
1717         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1718                            &vcpu->arch.virtual_tsc_shift,
1719                            &vcpu->arch.virtual_tsc_mult);
1720         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1721
1722         /*
1723          * Compute the variation in TSC rate which is acceptable
1724          * within the range of tolerance and decide if the
1725          * rate being applied is within that bounds of the hardware
1726          * rate.  If so, no scaling or compensation need be done.
1727          */
1728         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1729         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1730         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1731                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1732                 use_scaling = 1;
1733         }
1734         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1735 }
1736
1737 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1738 {
1739         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1740                                       vcpu->arch.virtual_tsc_mult,
1741                                       vcpu->arch.virtual_tsc_shift);
1742         tsc += vcpu->arch.this_tsc_write;
1743         return tsc;
1744 }
1745
1746 static inline int gtod_is_based_on_tsc(int mode)
1747 {
1748         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1749 }
1750
1751 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1752 {
1753 #ifdef CONFIG_X86_64
1754         bool vcpus_matched;
1755         struct kvm_arch *ka = &vcpu->kvm->arch;
1756         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1757
1758         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1759                          atomic_read(&vcpu->kvm->online_vcpus));
1760
1761         /*
1762          * Once the masterclock is enabled, always perform request in
1763          * order to update it.
1764          *
1765          * In order to enable masterclock, the host clocksource must be TSC
1766          * and the vcpus need to have matched TSCs.  When that happens,
1767          * perform request to enable masterclock.
1768          */
1769         if (ka->use_master_clock ||
1770             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1771                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1772
1773         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1774                             atomic_read(&vcpu->kvm->online_vcpus),
1775                             ka->use_master_clock, gtod->clock.vclock_mode);
1776 #endif
1777 }
1778
1779 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1780 {
1781         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1782         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1783 }
1784
1785 /*
1786  * Multiply tsc by a fixed point number represented by ratio.
1787  *
1788  * The most significant 64-N bits (mult) of ratio represent the
1789  * integral part of the fixed point number; the remaining N bits
1790  * (frac) represent the fractional part, ie. ratio represents a fixed
1791  * point number (mult + frac * 2^(-N)).
1792  *
1793  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1794  */
1795 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1796 {
1797         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1798 }
1799
1800 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1801 {
1802         u64 _tsc = tsc;
1803         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1804
1805         if (ratio != kvm_default_tsc_scaling_ratio)
1806                 _tsc = __scale_tsc(ratio, tsc);
1807
1808         return _tsc;
1809 }
1810 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1811
1812 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1813 {
1814         u64 tsc;
1815
1816         tsc = kvm_scale_tsc(vcpu, rdtsc());
1817
1818         return target_tsc - tsc;
1819 }
1820
1821 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1822 {
1823         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1824
1825         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1826 }
1827 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1828
1829 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1830 {
1831         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1832 }
1833
1834 static inline bool kvm_check_tsc_unstable(void)
1835 {
1836 #ifdef CONFIG_X86_64
1837         /*
1838          * TSC is marked unstable when we're running on Hyper-V,
1839          * 'TSC page' clocksource is good.
1840          */
1841         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1842                 return false;
1843 #endif
1844         return check_tsc_unstable();
1845 }
1846
1847 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1848 {
1849         struct kvm *kvm = vcpu->kvm;
1850         u64 offset, ns, elapsed;
1851         unsigned long flags;
1852         bool matched;
1853         bool already_matched;
1854         u64 data = msr->data;
1855         bool synchronizing = false;
1856
1857         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1858         offset = kvm_compute_tsc_offset(vcpu, data);
1859         ns = ktime_get_boottime_ns();
1860         elapsed = ns - kvm->arch.last_tsc_nsec;
1861
1862         if (vcpu->arch.virtual_tsc_khz) {
1863                 if (data == 0 && msr->host_initiated) {
1864                         /*
1865                          * detection of vcpu initialization -- need to sync
1866                          * with other vCPUs. This particularly helps to keep
1867                          * kvm_clock stable after CPU hotplug
1868                          */
1869                         synchronizing = true;
1870                 } else {
1871                         u64 tsc_exp = kvm->arch.last_tsc_write +
1872                                                 nsec_to_cycles(vcpu, elapsed);
1873                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1874                         /*
1875                          * Special case: TSC write with a small delta (1 second)
1876                          * of virtual cycle time against real time is
1877                          * interpreted as an attempt to synchronize the CPU.
1878                          */
1879                         synchronizing = data < tsc_exp + tsc_hz &&
1880                                         data + tsc_hz > tsc_exp;
1881                 }
1882         }
1883
1884         /*
1885          * For a reliable TSC, we can match TSC offsets, and for an unstable
1886          * TSC, we add elapsed time in this computation.  We could let the
1887          * compensation code attempt to catch up if we fall behind, but
1888          * it's better to try to match offsets from the beginning.
1889          */
1890         if (synchronizing &&
1891             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1892                 if (!kvm_check_tsc_unstable()) {
1893                         offset = kvm->arch.cur_tsc_offset;
1894                 } else {
1895                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1896                         data += delta;
1897                         offset = kvm_compute_tsc_offset(vcpu, data);
1898                 }
1899                 matched = true;
1900                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1901         } else {
1902                 /*
1903                  * We split periods of matched TSC writes into generations.
1904                  * For each generation, we track the original measured
1905                  * nanosecond time, offset, and write, so if TSCs are in
1906                  * sync, we can match exact offset, and if not, we can match
1907                  * exact software computation in compute_guest_tsc()
1908                  *
1909                  * These values are tracked in kvm->arch.cur_xxx variables.
1910                  */
1911                 kvm->arch.cur_tsc_generation++;
1912                 kvm->arch.cur_tsc_nsec = ns;
1913                 kvm->arch.cur_tsc_write = data;
1914                 kvm->arch.cur_tsc_offset = offset;
1915                 matched = false;
1916         }
1917
1918         /*
1919          * We also track th most recent recorded KHZ, write and time to
1920          * allow the matching interval to be extended at each write.
1921          */
1922         kvm->arch.last_tsc_nsec = ns;
1923         kvm->arch.last_tsc_write = data;
1924         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1925
1926         vcpu->arch.last_guest_tsc = data;
1927
1928         /* Keep track of which generation this VCPU has synchronized to */
1929         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1930         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1931         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1932
1933         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1934                 update_ia32_tsc_adjust_msr(vcpu, offset);
1935
1936         kvm_vcpu_write_tsc_offset(vcpu, offset);
1937         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1938
1939         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1940         if (!matched) {
1941                 kvm->arch.nr_vcpus_matched_tsc = 0;
1942         } else if (!already_matched) {
1943                 kvm->arch.nr_vcpus_matched_tsc++;
1944         }
1945
1946         kvm_track_tsc_matching(vcpu);
1947         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1948 }
1949
1950 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1951
1952 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1953                                            s64 adjustment)
1954 {
1955         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1956         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1957 }
1958
1959 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1960 {
1961         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1962                 WARN_ON(adjustment < 0);
1963         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1964         adjust_tsc_offset_guest(vcpu, adjustment);
1965 }
1966
1967 #ifdef CONFIG_X86_64
1968
1969 static u64 read_tsc(void)
1970 {
1971         u64 ret = (u64)rdtsc_ordered();
1972         u64 last = pvclock_gtod_data.clock.cycle_last;
1973
1974         if (likely(ret >= last))
1975                 return ret;
1976
1977         /*
1978          * GCC likes to generate cmov here, but this branch is extremely
1979          * predictable (it's just a function of time and the likely is
1980          * very likely) and there's a data dependence, so force GCC
1981          * to generate a branch instead.  I don't barrier() because
1982          * we don't actually need a barrier, and if this function
1983          * ever gets inlined it will generate worse code.
1984          */
1985         asm volatile ("");
1986         return last;
1987 }
1988
1989 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1990 {
1991         long v;
1992         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1993         u64 tsc_pg_val;
1994
1995         switch (gtod->clock.vclock_mode) {
1996         case VCLOCK_HVCLOCK:
1997                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1998                                                   tsc_timestamp);
1999                 if (tsc_pg_val != U64_MAX) {
2000                         /* TSC page valid */
2001                         *mode = VCLOCK_HVCLOCK;
2002                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2003                                 gtod->clock.mask;
2004                 } else {
2005                         /* TSC page invalid */
2006                         *mode = VCLOCK_NONE;
2007                 }
2008                 break;
2009         case VCLOCK_TSC:
2010                 *mode = VCLOCK_TSC;
2011                 *tsc_timestamp = read_tsc();
2012                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2013                         gtod->clock.mask;
2014                 break;
2015         default:
2016                 *mode = VCLOCK_NONE;
2017         }
2018
2019         if (*mode == VCLOCK_NONE)
2020                 *tsc_timestamp = v = 0;
2021
2022         return v * gtod->clock.mult;
2023 }
2024
2025 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2026 {
2027         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2028         unsigned long seq;
2029         int mode;
2030         u64 ns;
2031
2032         do {
2033                 seq = read_seqcount_begin(&gtod->seq);
2034                 ns = gtod->nsec_base;
2035                 ns += vgettsc(tsc_timestamp, &mode);
2036                 ns >>= gtod->clock.shift;
2037                 ns += gtod->boot_ns;
2038         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2039         *t = ns;
2040
2041         return mode;
2042 }
2043
2044 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2045 {
2046         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2047         unsigned long seq;
2048         int mode;
2049         u64 ns;
2050
2051         do {
2052                 seq = read_seqcount_begin(&gtod->seq);
2053                 ts->tv_sec = gtod->wall_time_sec;
2054                 ns = gtod->nsec_base;
2055                 ns += vgettsc(tsc_timestamp, &mode);
2056                 ns >>= gtod->clock.shift;
2057         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2058
2059         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2060         ts->tv_nsec = ns;
2061
2062         return mode;
2063 }
2064
2065 /* returns true if host is using TSC based clocksource */
2066 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2067 {
2068         /* checked again under seqlock below */
2069         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2070                 return false;
2071
2072         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2073                                                       tsc_timestamp));
2074 }
2075
2076 /* returns true if host is using TSC based clocksource */
2077 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2078                                            u64 *tsc_timestamp)
2079 {
2080         /* checked again under seqlock below */
2081         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2082                 return false;
2083
2084         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2085 }
2086 #endif
2087
2088 /*
2089  *
2090  * Assuming a stable TSC across physical CPUS, and a stable TSC
2091  * across virtual CPUs, the following condition is possible.
2092  * Each numbered line represents an event visible to both
2093  * CPUs at the next numbered event.
2094  *
2095  * "timespecX" represents host monotonic time. "tscX" represents
2096  * RDTSC value.
2097  *
2098  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2099  *
2100  * 1.  read timespec0,tsc0
2101  * 2.                                   | timespec1 = timespec0 + N
2102  *                                      | tsc1 = tsc0 + M
2103  * 3. transition to guest               | transition to guest
2104  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2105  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2106  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2107  *
2108  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2109  *
2110  *      - ret0 < ret1
2111  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2112  *              ...
2113  *      - 0 < N - M => M < N
2114  *
2115  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2116  * always the case (the difference between two distinct xtime instances
2117  * might be smaller then the difference between corresponding TSC reads,
2118  * when updating guest vcpus pvclock areas).
2119  *
2120  * To avoid that problem, do not allow visibility of distinct
2121  * system_timestamp/tsc_timestamp values simultaneously: use a master
2122  * copy of host monotonic time values. Update that master copy
2123  * in lockstep.
2124  *
2125  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2126  *
2127  */
2128
2129 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2130 {
2131 #ifdef CONFIG_X86_64
2132         struct kvm_arch *ka = &kvm->arch;
2133         int vclock_mode;
2134         bool host_tsc_clocksource, vcpus_matched;
2135
2136         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2137                         atomic_read(&kvm->online_vcpus));
2138
2139         /*
2140          * If the host uses TSC clock, then passthrough TSC as stable
2141          * to the guest.
2142          */
2143         host_tsc_clocksource = kvm_get_time_and_clockread(
2144                                         &ka->master_kernel_ns,
2145                                         &ka->master_cycle_now);
2146
2147         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2148                                 && !ka->backwards_tsc_observed
2149                                 && !ka->boot_vcpu_runs_old_kvmclock;
2150
2151         if (ka->use_master_clock)
2152                 atomic_set(&kvm_guest_has_master_clock, 1);
2153
2154         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2155         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2156                                         vcpus_matched);
2157 #endif
2158 }
2159
2160 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2161 {
2162         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2163 }
2164
2165 static void kvm_gen_update_masterclock(struct kvm *kvm)
2166 {
2167 #ifdef CONFIG_X86_64
2168         int i;
2169         struct kvm_vcpu *vcpu;
2170         struct kvm_arch *ka = &kvm->arch;
2171
2172         spin_lock(&ka->pvclock_gtod_sync_lock);
2173         kvm_make_mclock_inprogress_request(kvm);
2174         /* no guest entries from this point */
2175         pvclock_update_vm_gtod_copy(kvm);
2176
2177         kvm_for_each_vcpu(i, vcpu, kvm)
2178                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2179
2180         /* guest entries allowed */
2181         kvm_for_each_vcpu(i, vcpu, kvm)
2182                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2183
2184         spin_unlock(&ka->pvclock_gtod_sync_lock);
2185 #endif
2186 }
2187
2188 u64 get_kvmclock_ns(struct kvm *kvm)
2189 {
2190         struct kvm_arch *ka = &kvm->arch;
2191         struct pvclock_vcpu_time_info hv_clock;
2192         u64 ret;
2193
2194         spin_lock(&ka->pvclock_gtod_sync_lock);
2195         if (!ka->use_master_clock) {
2196                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2197                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2198         }
2199
2200         hv_clock.tsc_timestamp = ka->master_cycle_now;
2201         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2202         spin_unlock(&ka->pvclock_gtod_sync_lock);
2203
2204         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2205         get_cpu();
2206
2207         if (__this_cpu_read(cpu_tsc_khz)) {
2208                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2209                                    &hv_clock.tsc_shift,
2210                                    &hv_clock.tsc_to_system_mul);
2211                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2212         } else
2213                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2214
2215         put_cpu();
2216
2217         return ret;
2218 }
2219
2220 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2221 {
2222         struct kvm_vcpu_arch *vcpu = &v->arch;
2223         struct pvclock_vcpu_time_info guest_hv_clock;
2224
2225         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2226                 &guest_hv_clock, sizeof(guest_hv_clock))))
2227                 return;
2228
2229         /* This VCPU is paused, but it's legal for a guest to read another
2230          * VCPU's kvmclock, so we really have to follow the specification where
2231          * it says that version is odd if data is being modified, and even after
2232          * it is consistent.
2233          *
2234          * Version field updates must be kept separate.  This is because
2235          * kvm_write_guest_cached might use a "rep movs" instruction, and
2236          * writes within a string instruction are weakly ordered.  So there
2237          * are three writes overall.
2238          *
2239          * As a small optimization, only write the version field in the first
2240          * and third write.  The vcpu->pv_time cache is still valid, because the
2241          * version field is the first in the struct.
2242          */
2243         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2244
2245         if (guest_hv_clock.version & 1)
2246                 ++guest_hv_clock.version;  /* first time write, random junk */
2247
2248         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2249         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2250                                 &vcpu->hv_clock,
2251                                 sizeof(vcpu->hv_clock.version));
2252
2253         smp_wmb();
2254
2255         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2256         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2257
2258         if (vcpu->pvclock_set_guest_stopped_request) {
2259                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2260                 vcpu->pvclock_set_guest_stopped_request = false;
2261         }
2262
2263         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2264
2265         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2266                                 &vcpu->hv_clock,
2267                                 sizeof(vcpu->hv_clock));
2268
2269         smp_wmb();
2270
2271         vcpu->hv_clock.version++;
2272         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2273                                 &vcpu->hv_clock,
2274                                 sizeof(vcpu->hv_clock.version));
2275 }
2276
2277 static int kvm_guest_time_update(struct kvm_vcpu *v)
2278 {
2279         unsigned long flags, tgt_tsc_khz;
2280         struct kvm_vcpu_arch *vcpu = &v->arch;
2281         struct kvm_arch *ka = &v->kvm->arch;
2282         s64 kernel_ns;
2283         u64 tsc_timestamp, host_tsc;
2284         u8 pvclock_flags;
2285         bool use_master_clock;
2286
2287         kernel_ns = 0;
2288         host_tsc = 0;
2289
2290         /*
2291          * If the host uses TSC clock, then passthrough TSC as stable
2292          * to the guest.
2293          */
2294         spin_lock(&ka->pvclock_gtod_sync_lock);
2295         use_master_clock = ka->use_master_clock;
2296         if (use_master_clock) {
2297                 host_tsc = ka->master_cycle_now;
2298                 kernel_ns = ka->master_kernel_ns;
2299         }
2300         spin_unlock(&ka->pvclock_gtod_sync_lock);
2301
2302         /* Keep irq disabled to prevent changes to the clock */
2303         local_irq_save(flags);
2304         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2305         if (unlikely(tgt_tsc_khz == 0)) {
2306                 local_irq_restore(flags);
2307                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2308                 return 1;
2309         }
2310         if (!use_master_clock) {
2311                 host_tsc = rdtsc();
2312                 kernel_ns = ktime_get_boottime_ns();
2313         }
2314
2315         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2316
2317         /*
2318          * We may have to catch up the TSC to match elapsed wall clock
2319          * time for two reasons, even if kvmclock is used.
2320          *   1) CPU could have been running below the maximum TSC rate
2321          *   2) Broken TSC compensation resets the base at each VCPU
2322          *      entry to avoid unknown leaps of TSC even when running
2323          *      again on the same CPU.  This may cause apparent elapsed
2324          *      time to disappear, and the guest to stand still or run
2325          *      very slowly.
2326          */
2327         if (vcpu->tsc_catchup) {
2328                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2329                 if (tsc > tsc_timestamp) {
2330                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2331                         tsc_timestamp = tsc;
2332                 }
2333         }
2334
2335         local_irq_restore(flags);
2336
2337         /* With all the info we got, fill in the values */
2338
2339         if (kvm_has_tsc_control)
2340                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2341
2342         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2343                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2344                                    &vcpu->hv_clock.tsc_shift,
2345                                    &vcpu->hv_clock.tsc_to_system_mul);
2346                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2347         }
2348
2349         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2350         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2351         vcpu->last_guest_tsc = tsc_timestamp;
2352
2353         /* If the host uses TSC clocksource, then it is stable */
2354         pvclock_flags = 0;
2355         if (use_master_clock)
2356                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2357
2358         vcpu->hv_clock.flags = pvclock_flags;
2359
2360         if (vcpu->pv_time_enabled)
2361                 kvm_setup_pvclock_page(v);
2362         if (v == kvm_get_vcpu(v->kvm, 0))
2363                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2364         return 0;
2365 }
2366
2367 /*
2368  * kvmclock updates which are isolated to a given vcpu, such as
2369  * vcpu->cpu migration, should not allow system_timestamp from
2370  * the rest of the vcpus to remain static. Otherwise ntp frequency
2371  * correction applies to one vcpu's system_timestamp but not
2372  * the others.
2373  *
2374  * So in those cases, request a kvmclock update for all vcpus.
2375  * We need to rate-limit these requests though, as they can
2376  * considerably slow guests that have a large number of vcpus.
2377  * The time for a remote vcpu to update its kvmclock is bound
2378  * by the delay we use to rate-limit the updates.
2379  */
2380
2381 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2382
2383 static void kvmclock_update_fn(struct work_struct *work)
2384 {
2385         int i;
2386         struct delayed_work *dwork = to_delayed_work(work);
2387         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2388                                            kvmclock_update_work);
2389         struct kvm *kvm = container_of(ka, struct kvm, arch);
2390         struct kvm_vcpu *vcpu;
2391
2392         kvm_for_each_vcpu(i, vcpu, kvm) {
2393                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2394                 kvm_vcpu_kick(vcpu);
2395         }
2396 }
2397
2398 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2399 {
2400         struct kvm *kvm = v->kvm;
2401
2402         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2403         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2404                                         KVMCLOCK_UPDATE_DELAY);
2405 }
2406
2407 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2408
2409 static void kvmclock_sync_fn(struct work_struct *work)
2410 {
2411         struct delayed_work *dwork = to_delayed_work(work);
2412         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2413                                            kvmclock_sync_work);
2414         struct kvm *kvm = container_of(ka, struct kvm, arch);
2415
2416         if (!kvmclock_periodic_sync)
2417                 return;
2418
2419         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2420         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2421                                         KVMCLOCK_SYNC_PERIOD);
2422 }
2423
2424 /*
2425  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2426  */
2427 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2428 {
2429         /* McStatusWrEn enabled? */
2430         if (guest_cpuid_is_amd(vcpu))
2431                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2432
2433         return false;
2434 }
2435
2436 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2437 {
2438         u64 mcg_cap = vcpu->arch.mcg_cap;
2439         unsigned bank_num = mcg_cap & 0xff;
2440         u32 msr = msr_info->index;
2441         u64 data = msr_info->data;
2442
2443         switch (msr) {
2444         case MSR_IA32_MCG_STATUS:
2445                 vcpu->arch.mcg_status = data;
2446                 break;
2447         case MSR_IA32_MCG_CTL:
2448                 if (!(mcg_cap & MCG_CTL_P) &&
2449                     (data || !msr_info->host_initiated))
2450                         return 1;
2451                 if (data != 0 && data != ~(u64)0)
2452                         return 1;
2453                 vcpu->arch.mcg_ctl = data;
2454                 break;
2455         default:
2456                 if (msr >= MSR_IA32_MC0_CTL &&
2457                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2458                         u32 offset = msr - MSR_IA32_MC0_CTL;
2459                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2460                          * some Linux kernels though clear bit 10 in bank 4 to
2461                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2462                          * this to avoid an uncatched #GP in the guest
2463                          */
2464                         if ((offset & 0x3) == 0 &&
2465                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2466                                 return -1;
2467
2468                         /* MCi_STATUS */
2469                         if (!msr_info->host_initiated &&
2470                             (offset & 0x3) == 1 && data != 0) {
2471                                 if (!can_set_mci_status(vcpu))
2472                                         return -1;
2473                         }
2474
2475                         vcpu->arch.mce_banks[offset] = data;
2476                         break;
2477                 }
2478                 return 1;
2479         }
2480         return 0;
2481 }
2482
2483 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2484 {
2485         struct kvm *kvm = vcpu->kvm;
2486         int lm = is_long_mode(vcpu);
2487         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2488                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2489         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2490                 : kvm->arch.xen_hvm_config.blob_size_32;
2491         u32 page_num = data & ~PAGE_MASK;
2492         u64 page_addr = data & PAGE_MASK;
2493         u8 *page;
2494         int r;
2495
2496         r = -E2BIG;
2497         if (page_num >= blob_size)
2498                 goto out;
2499         r = -ENOMEM;
2500         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2501         if (IS_ERR(page)) {
2502                 r = PTR_ERR(page);
2503                 goto out;
2504         }
2505         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2506                 goto out_free;
2507         r = 0;
2508 out_free:
2509         kfree(page);
2510 out:
2511         return r;
2512 }
2513
2514 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2515 {
2516         gpa_t gpa = data & ~0x3f;
2517
2518         /* Bits 3:5 are reserved, Should be zero */
2519         if (data & 0x38)
2520                 return 1;
2521
2522         vcpu->arch.apf.msr_val = data;
2523
2524         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2525                 kvm_clear_async_pf_completion_queue(vcpu);
2526                 kvm_async_pf_hash_reset(vcpu);
2527                 return 0;
2528         }
2529
2530         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2531                                         sizeof(u32)))
2532                 return 1;
2533
2534         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2535         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2536         kvm_async_pf_wakeup_all(vcpu);
2537         return 0;
2538 }
2539
2540 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2541 {
2542         vcpu->arch.pv_time_enabled = false;
2543 }
2544
2545 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2546 {
2547         ++vcpu->stat.tlb_flush;
2548         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2549 }
2550
2551 static void record_steal_time(struct kvm_vcpu *vcpu)
2552 {
2553         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2554                 return;
2555
2556         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2557                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2558                 return;
2559
2560         /*
2561          * Doing a TLB flush here, on the guest's behalf, can avoid
2562          * expensive IPIs.
2563          */
2564         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2565                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2566         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2567                 kvm_vcpu_flush_tlb(vcpu, false);
2568
2569         if (vcpu->arch.st.steal.version & 1)
2570                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2571
2572         vcpu->arch.st.steal.version += 1;
2573
2574         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2575                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2576
2577         smp_wmb();
2578
2579         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2580                 vcpu->arch.st.last_steal;
2581         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2582
2583         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2584                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2585
2586         smp_wmb();
2587
2588         vcpu->arch.st.steal.version += 1;
2589
2590         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2591                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2592 }
2593
2594 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2595 {
2596         bool pr = false;
2597         u32 msr = msr_info->index;
2598         u64 data = msr_info->data;
2599
2600         switch (msr) {
2601         case MSR_AMD64_NB_CFG:
2602         case MSR_IA32_UCODE_WRITE:
2603         case MSR_VM_HSAVE_PA:
2604         case MSR_AMD64_PATCH_LOADER:
2605         case MSR_AMD64_BU_CFG2:
2606         case MSR_AMD64_DC_CFG:
2607         case MSR_F15H_EX_CFG:
2608                 break;
2609
2610         case MSR_IA32_UCODE_REV:
2611                 if (msr_info->host_initiated)
2612                         vcpu->arch.microcode_version = data;
2613                 break;
2614         case MSR_IA32_ARCH_CAPABILITIES:
2615                 if (!msr_info->host_initiated)
2616                         return 1;
2617                 vcpu->arch.arch_capabilities = data;
2618                 break;
2619         case MSR_EFER:
2620                 return set_efer(vcpu, msr_info);
2621         case MSR_K7_HWCR:
2622                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2623                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2624                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2625
2626                 /* Handle McStatusWrEn */
2627                 if (data == BIT_ULL(18)) {
2628                         vcpu->arch.msr_hwcr = data;
2629                 } else if (data != 0) {
2630                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2631                                     data);
2632                         return 1;
2633                 }
2634                 break;
2635         case MSR_FAM10H_MMIO_CONF_BASE:
2636                 if (data != 0) {
2637                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2638                                     "0x%llx\n", data);
2639                         return 1;
2640                 }
2641                 break;
2642         case MSR_IA32_DEBUGCTLMSR:
2643                 if (!data) {
2644                         /* We support the non-activated case already */
2645                         break;
2646                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2647                         /* Values other than LBR and BTF are vendor-specific,
2648                            thus reserved and should throw a #GP */
2649                         return 1;
2650                 }
2651                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2652                             __func__, data);
2653                 break;
2654         case 0x200 ... 0x2ff:
2655                 return kvm_mtrr_set_msr(vcpu, msr, data);
2656         case MSR_IA32_APICBASE:
2657                 return kvm_set_apic_base(vcpu, msr_info);
2658         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2659                 return kvm_x2apic_msr_write(vcpu, msr, data);
2660         case MSR_IA32_TSCDEADLINE:
2661                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2662                 break;
2663         case MSR_IA32_TSC_ADJUST:
2664                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2665                         if (!msr_info->host_initiated) {
2666                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2667                                 adjust_tsc_offset_guest(vcpu, adj);
2668                         }
2669                         vcpu->arch.ia32_tsc_adjust_msr = data;
2670                 }
2671                 break;
2672         case MSR_IA32_MISC_ENABLE:
2673                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2674                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2675                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2676                                 return 1;
2677                         vcpu->arch.ia32_misc_enable_msr = data;
2678                         kvm_update_cpuid(vcpu);
2679                 } else {
2680                         vcpu->arch.ia32_misc_enable_msr = data;
2681                 }
2682                 break;
2683         case MSR_IA32_SMBASE:
2684                 if (!msr_info->host_initiated)
2685                         return 1;
2686                 vcpu->arch.smbase = data;
2687                 break;
2688         case MSR_IA32_POWER_CTL:
2689                 vcpu->arch.msr_ia32_power_ctl = data;
2690                 break;
2691         case MSR_IA32_TSC:
2692                 kvm_write_tsc(vcpu, msr_info);
2693                 break;
2694         case MSR_SMI_COUNT:
2695                 if (!msr_info->host_initiated)
2696                         return 1;
2697                 vcpu->arch.smi_count = data;
2698                 break;
2699         case MSR_KVM_WALL_CLOCK_NEW:
2700         case MSR_KVM_WALL_CLOCK:
2701                 vcpu->kvm->arch.wall_clock = data;
2702                 kvm_write_wall_clock(vcpu->kvm, data);
2703                 break;
2704         case MSR_KVM_SYSTEM_TIME_NEW:
2705         case MSR_KVM_SYSTEM_TIME: {
2706                 struct kvm_arch *ka = &vcpu->kvm->arch;
2707
2708                 kvmclock_reset(vcpu);
2709
2710                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2711                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2712
2713                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2714                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2715
2716                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2717                 }
2718
2719                 vcpu->arch.time = data;
2720                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2721
2722                 /* we verify if the enable bit is set... */
2723                 if (!(data & 1))
2724                         break;
2725
2726                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2727                      &vcpu->arch.pv_time, data & ~1ULL,
2728                      sizeof(struct pvclock_vcpu_time_info)))
2729                         vcpu->arch.pv_time_enabled = false;
2730                 else
2731                         vcpu->arch.pv_time_enabled = true;
2732
2733                 break;
2734         }
2735         case MSR_KVM_ASYNC_PF_EN:
2736                 if (kvm_pv_enable_async_pf(vcpu, data))
2737                         return 1;
2738                 break;
2739         case MSR_KVM_STEAL_TIME:
2740
2741                 if (unlikely(!sched_info_on()))
2742                         return 1;
2743
2744                 if (data & KVM_STEAL_RESERVED_MASK)
2745                         return 1;
2746
2747                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2748                                                 data & KVM_STEAL_VALID_BITS,
2749                                                 sizeof(struct kvm_steal_time)))
2750                         return 1;
2751
2752                 vcpu->arch.st.msr_val = data;
2753
2754                 if (!(data & KVM_MSR_ENABLED))
2755                         break;
2756
2757                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2758
2759                 break;
2760         case MSR_KVM_PV_EOI_EN:
2761                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2762                         return 1;
2763                 break;
2764
2765         case MSR_KVM_POLL_CONTROL:
2766                 /* only enable bit supported */
2767                 if (data & (-1ULL << 1))
2768                         return 1;
2769
2770                 vcpu->arch.msr_kvm_poll_control = data;
2771                 break;
2772
2773         case MSR_IA32_MCG_CTL:
2774         case MSR_IA32_MCG_STATUS:
2775         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2776                 return set_msr_mce(vcpu, msr_info);
2777
2778         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2779         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2780                 pr = true; /* fall through */
2781         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2782         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2783                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2784                         return kvm_pmu_set_msr(vcpu, msr_info);
2785
2786                 if (pr || data != 0)
2787                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2788                                     "0x%x data 0x%llx\n", msr, data);
2789                 break;
2790         case MSR_K7_CLK_CTL:
2791                 /*
2792                  * Ignore all writes to this no longer documented MSR.
2793                  * Writes are only relevant for old K7 processors,
2794                  * all pre-dating SVM, but a recommended workaround from
2795                  * AMD for these chips. It is possible to specify the
2796                  * affected processor models on the command line, hence
2797                  * the need to ignore the workaround.
2798                  */
2799                 break;
2800         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2801         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2802         case HV_X64_MSR_CRASH_CTL:
2803         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2804         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2805         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2806         case HV_X64_MSR_TSC_EMULATION_STATUS:
2807                 return kvm_hv_set_msr_common(vcpu, msr, data,
2808                                              msr_info->host_initiated);
2809         case MSR_IA32_BBL_CR_CTL3:
2810                 /* Drop writes to this legacy MSR -- see rdmsr
2811                  * counterpart for further detail.
2812                  */
2813                 if (report_ignored_msrs)
2814                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2815                                 msr, data);
2816                 break;
2817         case MSR_AMD64_OSVW_ID_LENGTH:
2818                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2819                         return 1;
2820                 vcpu->arch.osvw.length = data;
2821                 break;
2822         case MSR_AMD64_OSVW_STATUS:
2823                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2824                         return 1;
2825                 vcpu->arch.osvw.status = data;
2826                 break;
2827         case MSR_PLATFORM_INFO:
2828                 if (!msr_info->host_initiated ||
2829                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2830                      cpuid_fault_enabled(vcpu)))
2831                         return 1;
2832                 vcpu->arch.msr_platform_info = data;
2833                 break;
2834         case MSR_MISC_FEATURES_ENABLES:
2835                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2836                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2837                      !supports_cpuid_fault(vcpu)))
2838                         return 1;
2839                 vcpu->arch.msr_misc_features_enables = data;
2840                 break;
2841         default:
2842                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2843                         return xen_hvm_config(vcpu, data);
2844                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2845                         return kvm_pmu_set_msr(vcpu, msr_info);
2846                 if (!ignore_msrs) {
2847                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2848                                     msr, data);
2849                         return 1;
2850                 } else {
2851                         if (report_ignored_msrs)
2852                                 vcpu_unimpl(vcpu,
2853                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2854                                         msr, data);
2855                         break;
2856                 }
2857         }
2858         return 0;
2859 }
2860 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2861
2862 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2863 {
2864         u64 data;
2865         u64 mcg_cap = vcpu->arch.mcg_cap;
2866         unsigned bank_num = mcg_cap & 0xff;
2867
2868         switch (msr) {
2869         case MSR_IA32_P5_MC_ADDR:
2870         case MSR_IA32_P5_MC_TYPE:
2871                 data = 0;
2872                 break;
2873         case MSR_IA32_MCG_CAP:
2874                 data = vcpu->arch.mcg_cap;
2875                 break;
2876         case MSR_IA32_MCG_CTL:
2877                 if (!(mcg_cap & MCG_CTL_P) && !host)
2878                         return 1;
2879                 data = vcpu->arch.mcg_ctl;
2880                 break;
2881         case MSR_IA32_MCG_STATUS:
2882                 data = vcpu->arch.mcg_status;
2883                 break;
2884         default:
2885                 if (msr >= MSR_IA32_MC0_CTL &&
2886                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2887                         u32 offset = msr - MSR_IA32_MC0_CTL;
2888                         data = vcpu->arch.mce_banks[offset];
2889                         break;
2890                 }
2891                 return 1;
2892         }
2893         *pdata = data;
2894         return 0;
2895 }
2896
2897 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2898 {
2899         switch (msr_info->index) {
2900         case MSR_IA32_PLATFORM_ID:
2901         case MSR_IA32_EBL_CR_POWERON:
2902         case MSR_IA32_DEBUGCTLMSR:
2903         case MSR_IA32_LASTBRANCHFROMIP:
2904         case MSR_IA32_LASTBRANCHTOIP:
2905         case MSR_IA32_LASTINTFROMIP:
2906         case MSR_IA32_LASTINTTOIP:
2907         case MSR_K8_SYSCFG:
2908         case MSR_K8_TSEG_ADDR:
2909         case MSR_K8_TSEG_MASK:
2910         case MSR_VM_HSAVE_PA:
2911         case MSR_K8_INT_PENDING_MSG:
2912         case MSR_AMD64_NB_CFG:
2913         case MSR_FAM10H_MMIO_CONF_BASE:
2914         case MSR_AMD64_BU_CFG2:
2915         case MSR_IA32_PERF_CTL:
2916         case MSR_AMD64_DC_CFG:
2917         case MSR_F15H_EX_CFG:
2918                 msr_info->data = 0;
2919                 break;
2920         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2921         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2922         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2923         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2924         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2925                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2926                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2927                 msr_info->data = 0;
2928                 break;
2929         case MSR_IA32_UCODE_REV:
2930                 msr_info->data = vcpu->arch.microcode_version;
2931                 break;
2932         case MSR_IA32_ARCH_CAPABILITIES:
2933                 if (!msr_info->host_initiated &&
2934                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2935                         return 1;
2936                 msr_info->data = vcpu->arch.arch_capabilities;
2937                 break;
2938         case MSR_IA32_POWER_CTL:
2939                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2940                 break;
2941         case MSR_IA32_TSC:
2942                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2943                 break;
2944         case MSR_MTRRcap:
2945         case 0x200 ... 0x2ff:
2946                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2947         case 0xcd: /* fsb frequency */
2948                 msr_info->data = 3;
2949                 break;
2950                 /*
2951                  * MSR_EBC_FREQUENCY_ID
2952                  * Conservative value valid for even the basic CPU models.
2953                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2954                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2955                  * and 266MHz for model 3, or 4. Set Core Clock
2956                  * Frequency to System Bus Frequency Ratio to 1 (bits
2957                  * 31:24) even though these are only valid for CPU
2958                  * models > 2, however guests may end up dividing or
2959                  * multiplying by zero otherwise.
2960                  */
2961         case MSR_EBC_FREQUENCY_ID:
2962                 msr_info->data = 1 << 24;
2963                 break;
2964         case MSR_IA32_APICBASE:
2965                 msr_info->data = kvm_get_apic_base(vcpu);
2966                 break;
2967         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2968                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2969                 break;
2970         case MSR_IA32_TSCDEADLINE:
2971                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2972                 break;
2973         case MSR_IA32_TSC_ADJUST:
2974                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2975                 break;
2976         case MSR_IA32_MISC_ENABLE:
2977                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2978                 break;
2979         case MSR_IA32_SMBASE:
2980                 if (!msr_info->host_initiated)
2981                         return 1;
2982                 msr_info->data = vcpu->arch.smbase;
2983                 break;
2984         case MSR_SMI_COUNT:
2985                 msr_info->data = vcpu->arch.smi_count;
2986                 break;
2987         case MSR_IA32_PERF_STATUS:
2988                 /* TSC increment by tick */
2989                 msr_info->data = 1000ULL;
2990                 /* CPU multiplier */
2991                 msr_info->data |= (((uint64_t)4ULL) << 40);
2992                 break;
2993         case MSR_EFER:
2994                 msr_info->data = vcpu->arch.efer;
2995                 break;
2996         case MSR_KVM_WALL_CLOCK:
2997         case MSR_KVM_WALL_CLOCK_NEW:
2998                 msr_info->data = vcpu->kvm->arch.wall_clock;
2999                 break;
3000         case MSR_KVM_SYSTEM_TIME:
3001         case MSR_KVM_SYSTEM_TIME_NEW:
3002                 msr_info->data = vcpu->arch.time;
3003                 break;
3004         case MSR_KVM_ASYNC_PF_EN:
3005                 msr_info->data = vcpu->arch.apf.msr_val;
3006                 break;
3007         case MSR_KVM_STEAL_TIME:
3008                 msr_info->data = vcpu->arch.st.msr_val;
3009                 break;
3010         case MSR_KVM_PV_EOI_EN:
3011                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3012                 break;
3013         case MSR_KVM_POLL_CONTROL:
3014                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3015                 break;
3016         case MSR_IA32_P5_MC_ADDR:
3017         case MSR_IA32_P5_MC_TYPE:
3018         case MSR_IA32_MCG_CAP:
3019         case MSR_IA32_MCG_CTL:
3020         case MSR_IA32_MCG_STATUS:
3021         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3022                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3023                                    msr_info->host_initiated);
3024         case MSR_K7_CLK_CTL:
3025                 /*
3026                  * Provide expected ramp-up count for K7. All other
3027                  * are set to zero, indicating minimum divisors for
3028                  * every field.
3029                  *
3030                  * This prevents guest kernels on AMD host with CPU
3031                  * type 6, model 8 and higher from exploding due to
3032                  * the rdmsr failing.
3033                  */
3034                 msr_info->data = 0x20000000;
3035                 break;
3036         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3037         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3038         case HV_X64_MSR_CRASH_CTL:
3039         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3040         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3041         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3042         case HV_X64_MSR_TSC_EMULATION_STATUS:
3043                 return kvm_hv_get_msr_common(vcpu,
3044                                              msr_info->index, &msr_info->data,
3045                                              msr_info->host_initiated);
3046                 break;
3047         case MSR_IA32_BBL_CR_CTL3:
3048                 /* This legacy MSR exists but isn't fully documented in current
3049                  * silicon.  It is however accessed by winxp in very narrow
3050                  * scenarios where it sets bit #19, itself documented as
3051                  * a "reserved" bit.  Best effort attempt to source coherent
3052                  * read data here should the balance of the register be
3053                  * interpreted by the guest:
3054                  *
3055                  * L2 cache control register 3: 64GB range, 256KB size,
3056                  * enabled, latency 0x1, configured
3057                  */
3058                 msr_info->data = 0xbe702111;
3059                 break;
3060         case MSR_AMD64_OSVW_ID_LENGTH:
3061                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3062                         return 1;
3063                 msr_info->data = vcpu->arch.osvw.length;
3064                 break;
3065         case MSR_AMD64_OSVW_STATUS:
3066                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3067                         return 1;
3068                 msr_info->data = vcpu->arch.osvw.status;
3069                 break;
3070         case MSR_PLATFORM_INFO:
3071                 if (!msr_info->host_initiated &&
3072                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3073                         return 1;
3074                 msr_info->data = vcpu->arch.msr_platform_info;
3075                 break;
3076         case MSR_MISC_FEATURES_ENABLES:
3077                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3078                 break;
3079         case MSR_K7_HWCR:
3080                 msr_info->data = vcpu->arch.msr_hwcr;
3081                 break;
3082         default:
3083                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3084                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3085                 if (!ignore_msrs) {
3086                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3087                                                msr_info->index);
3088                         return 1;
3089                 } else {
3090                         if (report_ignored_msrs)
3091                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3092                                         msr_info->index);
3093                         msr_info->data = 0;
3094                 }
3095                 break;
3096         }
3097         return 0;
3098 }
3099 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3100
3101 /*
3102  * Read or write a bunch of msrs. All parameters are kernel addresses.
3103  *
3104  * @return number of msrs set successfully.
3105  */
3106 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3107                     struct kvm_msr_entry *entries,
3108                     int (*do_msr)(struct kvm_vcpu *vcpu,
3109                                   unsigned index, u64 *data))
3110 {
3111         int i;
3112
3113         for (i = 0; i < msrs->nmsrs; ++i)
3114                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3115                         break;
3116
3117         return i;
3118 }
3119
3120 /*
3121  * Read or write a bunch of msrs. Parameters are user addresses.
3122  *
3123  * @return number of msrs set successfully.
3124  */
3125 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3126                   int (*do_msr)(struct kvm_vcpu *vcpu,
3127                                 unsigned index, u64 *data),
3128                   int writeback)
3129 {
3130         struct kvm_msrs msrs;
3131         struct kvm_msr_entry *entries;
3132         int r, n;
3133         unsigned size;
3134
3135         r = -EFAULT;
3136         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3137                 goto out;
3138
3139         r = -E2BIG;
3140         if (msrs.nmsrs >= MAX_IO_MSRS)
3141                 goto out;
3142
3143         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3144         entries = memdup_user(user_msrs->entries, size);
3145         if (IS_ERR(entries)) {
3146                 r = PTR_ERR(entries);
3147                 goto out;
3148         }
3149
3150         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3151         if (r < 0)
3152                 goto out_free;
3153
3154         r = -EFAULT;
3155         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3156                 goto out_free;
3157
3158         r = n;
3159
3160 out_free:
3161         kfree(entries);
3162 out:
3163         return r;
3164 }
3165
3166 static inline bool kvm_can_mwait_in_guest(void)
3167 {
3168         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3169                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3170                 boot_cpu_has(X86_FEATURE_ARAT);
3171 }
3172
3173 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3174 {
3175         int r = 0;
3176
3177         switch (ext) {
3178         case KVM_CAP_IRQCHIP:
3179         case KVM_CAP_HLT:
3180         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3181         case KVM_CAP_SET_TSS_ADDR:
3182         case KVM_CAP_EXT_CPUID:
3183         case KVM_CAP_EXT_EMUL_CPUID:
3184         case KVM_CAP_CLOCKSOURCE:
3185         case KVM_CAP_PIT:
3186         case KVM_CAP_NOP_IO_DELAY:
3187         case KVM_CAP_MP_STATE:
3188         case KVM_CAP_SYNC_MMU:
3189         case KVM_CAP_USER_NMI:
3190         case KVM_CAP_REINJECT_CONTROL:
3191         case KVM_CAP_IRQ_INJECT_STATUS:
3192         case KVM_CAP_IOEVENTFD:
3193         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3194         case KVM_CAP_PIT2:
3195         case KVM_CAP_PIT_STATE2:
3196         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3197         case KVM_CAP_XEN_HVM:
3198         case KVM_CAP_VCPU_EVENTS:
3199         case KVM_CAP_HYPERV:
3200         case KVM_CAP_HYPERV_VAPIC:
3201         case KVM_CAP_HYPERV_SPIN:
3202         case KVM_CAP_HYPERV_SYNIC:
3203         case KVM_CAP_HYPERV_SYNIC2:
3204         case KVM_CAP_HYPERV_VP_INDEX:
3205         case KVM_CAP_HYPERV_EVENTFD:
3206         case KVM_CAP_HYPERV_TLBFLUSH:
3207         case KVM_CAP_HYPERV_SEND_IPI:
3208         case KVM_CAP_HYPERV_CPUID:
3209         case KVM_CAP_PCI_SEGMENT:
3210         case KVM_CAP_DEBUGREGS:
3211         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3212         case KVM_CAP_XSAVE:
3213         case KVM_CAP_ASYNC_PF:
3214         case KVM_CAP_GET_TSC_KHZ:
3215         case KVM_CAP_KVMCLOCK_CTRL:
3216         case KVM_CAP_READONLY_MEM:
3217         case KVM_CAP_HYPERV_TIME:
3218         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3219         case KVM_CAP_TSC_DEADLINE_TIMER:
3220         case KVM_CAP_DISABLE_QUIRKS:
3221         case KVM_CAP_SET_BOOT_CPU_ID:
3222         case KVM_CAP_SPLIT_IRQCHIP:
3223         case KVM_CAP_IMMEDIATE_EXIT:
3224         case KVM_CAP_PMU_EVENT_FILTER:
3225         case KVM_CAP_GET_MSR_FEATURES:
3226         case KVM_CAP_MSR_PLATFORM_INFO:
3227         case KVM_CAP_EXCEPTION_PAYLOAD:
3228                 r = 1;
3229                 break;
3230         case KVM_CAP_SYNC_REGS:
3231                 r = KVM_SYNC_X86_VALID_FIELDS;
3232                 break;
3233         case KVM_CAP_ADJUST_CLOCK:
3234                 r = KVM_CLOCK_TSC_STABLE;
3235                 break;
3236         case KVM_CAP_X86_DISABLE_EXITS:
3237                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3238                       KVM_X86_DISABLE_EXITS_CSTATE;
3239                 if(kvm_can_mwait_in_guest())
3240                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3241                 break;
3242         case KVM_CAP_X86_SMM:
3243                 /* SMBASE is usually relocated above 1M on modern chipsets,
3244                  * and SMM handlers might indeed rely on 4G segment limits,
3245                  * so do not report SMM to be available if real mode is
3246                  * emulated via vm86 mode.  Still, do not go to great lengths
3247                  * to avoid userspace's usage of the feature, because it is a
3248                  * fringe case that is not enabled except via specific settings
3249                  * of the module parameters.
3250                  */
3251                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3252                 break;
3253         case KVM_CAP_VAPIC:
3254                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3255                 break;
3256         case KVM_CAP_NR_VCPUS:
3257                 r = KVM_SOFT_MAX_VCPUS;
3258                 break;
3259         case KVM_CAP_MAX_VCPUS:
3260                 r = KVM_MAX_VCPUS;
3261                 break;
3262         case KVM_CAP_MAX_VCPU_ID:
3263                 r = KVM_MAX_VCPU_ID;
3264                 break;
3265         case KVM_CAP_PV_MMU:    /* obsolete */
3266                 r = 0;
3267                 break;
3268         case KVM_CAP_MCE:
3269                 r = KVM_MAX_MCE_BANKS;
3270                 break;
3271         case KVM_CAP_XCRS:
3272                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3273                 break;
3274         case KVM_CAP_TSC_CONTROL:
3275                 r = kvm_has_tsc_control;
3276                 break;
3277         case KVM_CAP_X2APIC_API:
3278                 r = KVM_X2APIC_API_VALID_FLAGS;
3279                 break;
3280         case KVM_CAP_NESTED_STATE:
3281                 r = kvm_x86_ops->get_nested_state ?
3282                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3283                 break;
3284         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3285                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3286                 break;
3287         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3288                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3289                 break;
3290         default:
3291                 break;
3292         }
3293         return r;
3294
3295 }
3296
3297 long kvm_arch_dev_ioctl(struct file *filp,
3298                         unsigned int ioctl, unsigned long arg)
3299 {
3300         void __user *argp = (void __user *)arg;
3301         long r;
3302
3303         switch (ioctl) {
3304         case KVM_GET_MSR_INDEX_LIST: {
3305                 struct kvm_msr_list __user *user_msr_list = argp;
3306                 struct kvm_msr_list msr_list;
3307                 unsigned n;
3308
3309                 r = -EFAULT;
3310                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3311                         goto out;
3312                 n = msr_list.nmsrs;
3313                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3314                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3315                         goto out;
3316                 r = -E2BIG;
3317                 if (n < msr_list.nmsrs)
3318                         goto out;
3319                 r = -EFAULT;
3320                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3321                                  num_msrs_to_save * sizeof(u32)))
3322                         goto out;
3323                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3324                                  &emulated_msrs,
3325                                  num_emulated_msrs * sizeof(u32)))
3326                         goto out;
3327                 r = 0;
3328                 break;
3329         }
3330         case KVM_GET_SUPPORTED_CPUID:
3331         case KVM_GET_EMULATED_CPUID: {
3332                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3333                 struct kvm_cpuid2 cpuid;
3334
3335                 r = -EFAULT;
3336                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3337                         goto out;
3338
3339                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3340                                             ioctl);
3341                 if (r)
3342                         goto out;
3343
3344                 r = -EFAULT;
3345                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3346                         goto out;
3347                 r = 0;
3348                 break;
3349         }
3350         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3351                 r = -EFAULT;
3352                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3353                                  sizeof(kvm_mce_cap_supported)))
3354                         goto out;
3355                 r = 0;
3356                 break;
3357         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3358                 struct kvm_msr_list __user *user_msr_list = argp;
3359                 struct kvm_msr_list msr_list;
3360                 unsigned int n;
3361
3362                 r = -EFAULT;
3363                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3364                         goto out;
3365                 n = msr_list.nmsrs;
3366                 msr_list.nmsrs = num_msr_based_features;
3367                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3368                         goto out;
3369                 r = -E2BIG;
3370                 if (n < msr_list.nmsrs)
3371                         goto out;
3372                 r = -EFAULT;
3373                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3374                                  num_msr_based_features * sizeof(u32)))
3375                         goto out;
3376                 r = 0;
3377                 break;
3378         }
3379         case KVM_GET_MSRS:
3380                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3381                 break;
3382         }
3383         default:
3384                 r = -EINVAL;
3385         }
3386 out:
3387         return r;
3388 }
3389
3390 static void wbinvd_ipi(void *garbage)
3391 {
3392         wbinvd();
3393 }
3394
3395 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3396 {
3397         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3398 }
3399
3400 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3401 {
3402         /* Address WBINVD may be executed by guest */
3403         if (need_emulate_wbinvd(vcpu)) {
3404                 if (kvm_x86_ops->has_wbinvd_exit())
3405                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3406                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3407                         smp_call_function_single(vcpu->cpu,
3408                                         wbinvd_ipi, NULL, 1);
3409         }
3410
3411         kvm_x86_ops->vcpu_load(vcpu, cpu);
3412
3413         fpregs_assert_state_consistent();
3414         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3415                 switch_fpu_return();
3416
3417         /* Apply any externally detected TSC adjustments (due to suspend) */
3418         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3419                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3420                 vcpu->arch.tsc_offset_adjustment = 0;
3421                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3422         }
3423
3424         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3425                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3426                                 rdtsc() - vcpu->arch.last_host_tsc;
3427                 if (tsc_delta < 0)
3428                         mark_tsc_unstable("KVM discovered backwards TSC");
3429
3430                 if (kvm_check_tsc_unstable()) {
3431                         u64 offset = kvm_compute_tsc_offset(vcpu,
3432                                                 vcpu->arch.last_guest_tsc);
3433                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3434                         vcpu->arch.tsc_catchup = 1;
3435                 }
3436
3437                 if (kvm_lapic_hv_timer_in_use(vcpu))
3438                         kvm_lapic_restart_hv_timer(vcpu);
3439
3440                 /*
3441                  * On a host with synchronized TSC, there is no need to update
3442                  * kvmclock on vcpu->cpu migration
3443                  */
3444                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3445                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3446                 if (vcpu->cpu != cpu)
3447                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3448                 vcpu->cpu = cpu;
3449         }
3450
3451         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3452 }
3453
3454 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3455 {
3456         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3457                 return;
3458
3459         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3460
3461         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3462                         &vcpu->arch.st.steal.preempted,
3463                         offsetof(struct kvm_steal_time, preempted),
3464                         sizeof(vcpu->arch.st.steal.preempted));
3465 }
3466
3467 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3468 {
3469         int idx;
3470
3471         if (vcpu->preempted)
3472                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3473
3474         /*
3475          * Disable page faults because we're in atomic context here.
3476          * kvm_write_guest_offset_cached() would call might_fault()
3477          * that relies on pagefault_disable() to tell if there's a
3478          * bug. NOTE: the write to guest memory may not go through if
3479          * during postcopy live migration or if there's heavy guest
3480          * paging.
3481          */
3482         pagefault_disable();
3483         /*
3484          * kvm_memslots() will be called by
3485          * kvm_write_guest_offset_cached() so take the srcu lock.
3486          */
3487         idx = srcu_read_lock(&vcpu->kvm->srcu);
3488         kvm_steal_time_set_preempted(vcpu);
3489         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3490         pagefault_enable();
3491         kvm_x86_ops->vcpu_put(vcpu);
3492         vcpu->arch.last_host_tsc = rdtsc();
3493         /*
3494          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3495          * on every vmexit, but if not, we might have a stale dr6 from the
3496          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3497          */
3498         set_debugreg(0, 6);
3499 }
3500
3501 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3502                                     struct kvm_lapic_state *s)
3503 {
3504         if (vcpu->arch.apicv_active)
3505                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3506
3507         return kvm_apic_get_state(vcpu, s);
3508 }
3509
3510 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3511                                     struct kvm_lapic_state *s)
3512 {
3513         int r;
3514
3515         r = kvm_apic_set_state(vcpu, s);
3516         if (r)
3517                 return r;
3518         update_cr8_intercept(vcpu);
3519
3520         return 0;
3521 }
3522
3523 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3524 {
3525         return (!lapic_in_kernel(vcpu) ||
3526                 kvm_apic_accept_pic_intr(vcpu));
3527 }
3528
3529 /*
3530  * if userspace requested an interrupt window, check that the
3531  * interrupt window is open.
3532  *
3533  * No need to exit to userspace if we already have an interrupt queued.
3534  */
3535 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3536 {
3537         return kvm_arch_interrupt_allowed(vcpu) &&
3538                 !kvm_cpu_has_interrupt(vcpu) &&
3539                 !kvm_event_needs_reinjection(vcpu) &&
3540                 kvm_cpu_accept_dm_intr(vcpu);
3541 }
3542
3543 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3544                                     struct kvm_interrupt *irq)
3545 {
3546         if (irq->irq >= KVM_NR_INTERRUPTS)
3547                 return -EINVAL;
3548
3549         if (!irqchip_in_kernel(vcpu->kvm)) {
3550                 kvm_queue_interrupt(vcpu, irq->irq, false);
3551                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3552                 return 0;
3553         }
3554
3555         /*
3556          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3557          * fail for in-kernel 8259.
3558          */
3559         if (pic_in_kernel(vcpu->kvm))
3560                 return -ENXIO;
3561
3562         if (vcpu->arch.pending_external_vector != -1)
3563                 return -EEXIST;
3564
3565         vcpu->arch.pending_external_vector = irq->irq;
3566         kvm_make_request(KVM_REQ_EVENT, vcpu);
3567         return 0;
3568 }
3569
3570 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3571 {
3572         kvm_inject_nmi(vcpu);
3573
3574         return 0;
3575 }
3576
3577 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3578 {
3579         kvm_make_request(KVM_REQ_SMI, vcpu);
3580
3581         return 0;
3582 }
3583
3584 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3585                                            struct kvm_tpr_access_ctl *tac)
3586 {
3587         if (tac->flags)
3588                 return -EINVAL;
3589         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3590         return 0;
3591 }
3592
3593 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3594                                         u64 mcg_cap)
3595 {
3596         int r;
3597         unsigned bank_num = mcg_cap & 0xff, bank;
3598
3599         r = -EINVAL;
3600         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3601                 goto out;
3602         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3603                 goto out;
3604         r = 0;
3605         vcpu->arch.mcg_cap = mcg_cap;
3606         /* Init IA32_MCG_CTL to all 1s */
3607         if (mcg_cap & MCG_CTL_P)
3608                 vcpu->arch.mcg_ctl = ~(u64)0;
3609         /* Init IA32_MCi_CTL to all 1s */
3610         for (bank = 0; bank < bank_num; bank++)
3611                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3612
3613         kvm_x86_ops->setup_mce(vcpu);
3614 out:
3615         return r;
3616 }
3617
3618 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3619                                       struct kvm_x86_mce *mce)
3620 {
3621         u64 mcg_cap = vcpu->arch.mcg_cap;
3622         unsigned bank_num = mcg_cap & 0xff;
3623         u64 *banks = vcpu->arch.mce_banks;
3624
3625         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3626                 return -EINVAL;
3627         /*
3628          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3629          * reporting is disabled
3630          */
3631         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3632             vcpu->arch.mcg_ctl != ~(u64)0)
3633                 return 0;
3634         banks += 4 * mce->bank;
3635         /*
3636          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3637          * reporting is disabled for the bank
3638          */
3639         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3640                 return 0;
3641         if (mce->status & MCI_STATUS_UC) {
3642                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3643                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3644                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3645                         return 0;
3646                 }
3647                 if (banks[1] & MCI_STATUS_VAL)
3648                         mce->status |= MCI_STATUS_OVER;
3649                 banks[2] = mce->addr;
3650                 banks[3] = mce->misc;
3651                 vcpu->arch.mcg_status = mce->mcg_status;
3652                 banks[1] = mce->status;
3653                 kvm_queue_exception(vcpu, MC_VECTOR);
3654         } else if (!(banks[1] & MCI_STATUS_VAL)
3655                    || !(banks[1] & MCI_STATUS_UC)) {
3656                 if (banks[1] & MCI_STATUS_VAL)
3657                         mce->status |= MCI_STATUS_OVER;
3658                 banks[2] = mce->addr;
3659                 banks[3] = mce->misc;
3660                 banks[1] = mce->status;
3661         } else
3662                 banks[1] |= MCI_STATUS_OVER;
3663         return 0;
3664 }
3665
3666 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3667                                                struct kvm_vcpu_events *events)
3668 {
3669         process_nmi(vcpu);
3670
3671         /*
3672          * The API doesn't provide the instruction length for software
3673          * exceptions, so don't report them. As long as the guest RIP
3674          * isn't advanced, we should expect to encounter the exception
3675          * again.
3676          */
3677         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3678                 events->exception.injected = 0;
3679                 events->exception.pending = 0;
3680         } else {
3681                 events->exception.injected = vcpu->arch.exception.injected;
3682                 events->exception.pending = vcpu->arch.exception.pending;
3683                 /*
3684                  * For ABI compatibility, deliberately conflate
3685                  * pending and injected exceptions when
3686                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3687                  */
3688                 if (!vcpu->kvm->arch.exception_payload_enabled)
3689                         events->exception.injected |=
3690                                 vcpu->arch.exception.pending;
3691         }
3692         events->exception.nr = vcpu->arch.exception.nr;
3693         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3694         events->exception.error_code = vcpu->arch.exception.error_code;
3695         events->exception_has_payload = vcpu->arch.exception.has_payload;
3696         events->exception_payload = vcpu->arch.exception.payload;
3697
3698         events->interrupt.injected =
3699                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3700         events->interrupt.nr = vcpu->arch.interrupt.nr;
3701         events->interrupt.soft = 0;
3702         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3703
3704         events->nmi.injected = vcpu->arch.nmi_injected;
3705         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3706         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3707         events->nmi.pad = 0;
3708
3709         events->sipi_vector = 0; /* never valid when reporting to user space */
3710
3711         events->smi.smm = is_smm(vcpu);
3712         events->smi.pending = vcpu->arch.smi_pending;
3713         events->smi.smm_inside_nmi =
3714                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3715         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3716
3717         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3718                          | KVM_VCPUEVENT_VALID_SHADOW
3719                          | KVM_VCPUEVENT_VALID_SMM);
3720         if (vcpu->kvm->arch.exception_payload_enabled)
3721                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3722
3723         memset(&events->reserved, 0, sizeof(events->reserved));
3724 }
3725
3726 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3727
3728 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3729                                               struct kvm_vcpu_events *events)
3730 {
3731         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3732                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3733                               | KVM_VCPUEVENT_VALID_SHADOW
3734                               | KVM_VCPUEVENT_VALID_SMM
3735                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3736                 return -EINVAL;
3737
3738         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3739                 if (!vcpu->kvm->arch.exception_payload_enabled)
3740                         return -EINVAL;
3741                 if (events->exception.pending)
3742                         events->exception.injected = 0;
3743                 else
3744                         events->exception_has_payload = 0;
3745         } else {
3746                 events->exception.pending = 0;
3747                 events->exception_has_payload = 0;
3748         }
3749
3750         if ((events->exception.injected || events->exception.pending) &&
3751             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3752                 return -EINVAL;
3753
3754         /* INITs are latched while in SMM */
3755         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3756             (events->smi.smm || events->smi.pending) &&
3757             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3758                 return -EINVAL;
3759
3760         process_nmi(vcpu);
3761         vcpu->arch.exception.injected = events->exception.injected;
3762         vcpu->arch.exception.pending = events->exception.pending;
3763         vcpu->arch.exception.nr = events->exception.nr;
3764         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3765         vcpu->arch.exception.error_code = events->exception.error_code;
3766         vcpu->arch.exception.has_payload = events->exception_has_payload;
3767         vcpu->arch.exception.payload = events->exception_payload;
3768
3769         vcpu->arch.interrupt.injected = events->interrupt.injected;
3770         vcpu->arch.interrupt.nr = events->interrupt.nr;
3771         vcpu->arch.interrupt.soft = events->interrupt.soft;
3772         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3773                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3774                                                   events->interrupt.shadow);
3775
3776         vcpu->arch.nmi_injected = events->nmi.injected;
3777         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3778                 vcpu->arch.nmi_pending = events->nmi.pending;
3779         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3780
3781         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3782             lapic_in_kernel(vcpu))
3783                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3784
3785         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3786                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3787                         if (events->smi.smm)
3788                                 vcpu->arch.hflags |= HF_SMM_MASK;
3789                         else
3790                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3791                         kvm_smm_changed(vcpu);
3792                 }
3793
3794                 vcpu->arch.smi_pending = events->smi.pending;
3795
3796                 if (events->smi.smm) {
3797                         if (events->smi.smm_inside_nmi)
3798                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3799                         else
3800                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3801                         if (lapic_in_kernel(vcpu)) {
3802                                 if (events->smi.latched_init)
3803                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3804                                 else
3805                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3806                         }
3807                 }
3808         }
3809
3810         kvm_make_request(KVM_REQ_EVENT, vcpu);
3811
3812         return 0;
3813 }
3814
3815 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3816                                              struct kvm_debugregs *dbgregs)
3817 {
3818         unsigned long val;
3819
3820         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3821         kvm_get_dr(vcpu, 6, &val);
3822         dbgregs->dr6 = val;
3823         dbgregs->dr7 = vcpu->arch.dr7;
3824         dbgregs->flags = 0;
3825         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3826 }
3827
3828 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3829                                             struct kvm_debugregs *dbgregs)
3830 {
3831         if (dbgregs->flags)
3832                 return -EINVAL;
3833
3834         if (dbgregs->dr6 & ~0xffffffffull)
3835                 return -EINVAL;
3836         if (dbgregs->dr7 & ~0xffffffffull)
3837                 return -EINVAL;
3838
3839         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3840         kvm_update_dr0123(vcpu);
3841         vcpu->arch.dr6 = dbgregs->dr6;
3842         kvm_update_dr6(vcpu);
3843         vcpu->arch.dr7 = dbgregs->dr7;
3844         kvm_update_dr7(vcpu);
3845
3846         return 0;
3847 }
3848
3849 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3850
3851 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3852 {
3853         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3854         u64 xstate_bv = xsave->header.xfeatures;
3855         u64 valid;
3856
3857         /*
3858          * Copy legacy XSAVE area, to avoid complications with CPUID
3859          * leaves 0 and 1 in the loop below.
3860          */
3861         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3862
3863         /* Set XSTATE_BV */
3864         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3865         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3866
3867         /*
3868          * Copy each region from the possibly compacted offset to the
3869          * non-compacted offset.
3870          */
3871         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3872         while (valid) {
3873                 u64 xfeature_mask = valid & -valid;
3874                 int xfeature_nr = fls64(xfeature_mask) - 1;
3875                 void *src = get_xsave_addr(xsave, xfeature_nr);
3876
3877                 if (src) {
3878                         u32 size, offset, ecx, edx;
3879                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3880                                     &size, &offset, &ecx, &edx);
3881                         if (xfeature_nr == XFEATURE_PKRU)
3882                                 memcpy(dest + offset, &vcpu->arch.pkru,
3883                                        sizeof(vcpu->arch.pkru));
3884                         else
3885                                 memcpy(dest + offset, src, size);
3886
3887                 }
3888
3889                 valid -= xfeature_mask;
3890         }
3891 }
3892
3893 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3894 {
3895         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3896         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3897         u64 valid;
3898
3899         /*
3900          * Copy legacy XSAVE area, to avoid complications with CPUID
3901          * leaves 0 and 1 in the loop below.
3902          */
3903         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3904
3905         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3906         xsave->header.xfeatures = xstate_bv;
3907         if (boot_cpu_has(X86_FEATURE_XSAVES))
3908                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3909
3910         /*
3911          * Copy each region from the non-compacted offset to the
3912          * possibly compacted offset.
3913          */
3914         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3915         while (valid) {
3916                 u64 xfeature_mask = valid & -valid;
3917                 int xfeature_nr = fls64(xfeature_mask) - 1;
3918                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3919
3920                 if (dest) {
3921                         u32 size, offset, ecx, edx;
3922                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3923                                     &size, &offset, &ecx, &edx);
3924                         if (xfeature_nr == XFEATURE_PKRU)
3925                                 memcpy(&vcpu->arch.pkru, src + offset,
3926                                        sizeof(vcpu->arch.pkru));
3927                         else
3928                                 memcpy(dest, src + offset, size);
3929                 }
3930
3931                 valid -= xfeature_mask;
3932         }
3933 }
3934
3935 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3936                                          struct kvm_xsave *guest_xsave)
3937 {
3938         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3939                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3940                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3941         } else {
3942                 memcpy(guest_xsave->region,
3943                         &vcpu->arch.guest_fpu->state.fxsave,
3944                         sizeof(struct fxregs_state));
3945                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3946                         XFEATURE_MASK_FPSSE;
3947         }
3948 }
3949
3950 #define XSAVE_MXCSR_OFFSET 24
3951
3952 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3953                                         struct kvm_xsave *guest_xsave)
3954 {
3955         u64 xstate_bv =
3956                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3957         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3958
3959         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3960                 /*
3961                  * Here we allow setting states that are not present in
3962                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3963                  * with old userspace.
3964                  */
3965                 if (xstate_bv & ~kvm_supported_xcr0() ||
3966                         mxcsr & ~mxcsr_feature_mask)
3967                         return -EINVAL;
3968                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3969         } else {
3970                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3971                         mxcsr & ~mxcsr_feature_mask)
3972                         return -EINVAL;
3973                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3974                         guest_xsave->region, sizeof(struct fxregs_state));
3975         }
3976         return 0;
3977 }
3978
3979 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3980                                         struct kvm_xcrs *guest_xcrs)
3981 {
3982         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3983                 guest_xcrs->nr_xcrs = 0;
3984                 return;
3985         }
3986
3987         guest_xcrs->nr_xcrs = 1;
3988         guest_xcrs->flags = 0;
3989         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3990         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3991 }
3992
3993 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3994                                        struct kvm_xcrs *guest_xcrs)
3995 {
3996         int i, r = 0;
3997
3998         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3999                 return -EINVAL;
4000
4001         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4002                 return -EINVAL;
4003
4004         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4005                 /* Only support XCR0 currently */
4006                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4007                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4008                                 guest_xcrs->xcrs[i].value);
4009                         break;
4010                 }
4011         if (r)
4012                 r = -EINVAL;
4013         return r;
4014 }
4015
4016 /*
4017  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4018  * stopped by the hypervisor.  This function will be called from the host only.
4019  * EINVAL is returned when the host attempts to set the flag for a guest that
4020  * does not support pv clocks.
4021  */
4022 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4023 {
4024         if (!vcpu->arch.pv_time_enabled)
4025                 return -EINVAL;
4026         vcpu->arch.pvclock_set_guest_stopped_request = true;
4027         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4028         return 0;
4029 }
4030
4031 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4032                                      struct kvm_enable_cap *cap)
4033 {
4034         int r;
4035         uint16_t vmcs_version;
4036         void __user *user_ptr;
4037
4038         if (cap->flags)
4039                 return -EINVAL;
4040
4041         switch (cap->cap) {
4042         case KVM_CAP_HYPERV_SYNIC2:
4043                 if (cap->args[0])
4044                         return -EINVAL;
4045                 /* fall through */
4046
4047         case KVM_CAP_HYPERV_SYNIC:
4048                 if (!irqchip_in_kernel(vcpu->kvm))
4049                         return -EINVAL;
4050                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4051                                              KVM_CAP_HYPERV_SYNIC2);
4052         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4053                 if (!kvm_x86_ops->nested_enable_evmcs)
4054                         return -ENOTTY;
4055                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4056                 if (!r) {
4057                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4058                         if (copy_to_user(user_ptr, &vmcs_version,
4059                                          sizeof(vmcs_version)))
4060                                 r = -EFAULT;
4061                 }
4062                 return r;
4063         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4064                 if (!kvm_x86_ops->enable_direct_tlbflush)
4065                         return -ENOTTY;
4066
4067                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4068
4069         default:
4070                 return -EINVAL;
4071         }
4072 }
4073
4074 long kvm_arch_vcpu_ioctl(struct file *filp,
4075                          unsigned int ioctl, unsigned long arg)
4076 {
4077         struct kvm_vcpu *vcpu = filp->private_data;
4078         void __user *argp = (void __user *)arg;
4079         int r;
4080         union {
4081                 struct kvm_lapic_state *lapic;
4082                 struct kvm_xsave *xsave;
4083                 struct kvm_xcrs *xcrs;
4084                 void *buffer;
4085         } u;
4086
4087         vcpu_load(vcpu);
4088
4089         u.buffer = NULL;
4090         switch (ioctl) {
4091         case KVM_GET_LAPIC: {
4092                 r = -EINVAL;
4093                 if (!lapic_in_kernel(vcpu))
4094                         goto out;
4095                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4096                                 GFP_KERNEL_ACCOUNT);
4097
4098                 r = -ENOMEM;
4099                 if (!u.lapic)
4100                         goto out;
4101                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4102                 if (r)
4103                         goto out;
4104                 r = -EFAULT;
4105                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4106                         goto out;
4107                 r = 0;
4108                 break;
4109         }
4110         case KVM_SET_LAPIC: {
4111                 r = -EINVAL;
4112                 if (!lapic_in_kernel(vcpu))
4113                         goto out;
4114                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4115                 if (IS_ERR(u.lapic)) {
4116                         r = PTR_ERR(u.lapic);
4117                         goto out_nofree;
4118                 }
4119
4120                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4121                 break;
4122         }
4123         case KVM_INTERRUPT: {
4124                 struct kvm_interrupt irq;
4125
4126                 r = -EFAULT;
4127                 if (copy_from_user(&irq, argp, sizeof(irq)))
4128                         goto out;
4129                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4130                 break;
4131         }
4132         case KVM_NMI: {
4133                 r = kvm_vcpu_ioctl_nmi(vcpu);
4134                 break;
4135         }
4136         case KVM_SMI: {
4137                 r = kvm_vcpu_ioctl_smi(vcpu);
4138                 break;
4139         }
4140         case KVM_SET_CPUID: {
4141                 struct kvm_cpuid __user *cpuid_arg = argp;
4142                 struct kvm_cpuid cpuid;
4143
4144                 r = -EFAULT;
4145                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4146                         goto out;
4147                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4148                 break;
4149         }
4150         case KVM_SET_CPUID2: {
4151                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4152                 struct kvm_cpuid2 cpuid;
4153
4154                 r = -EFAULT;
4155                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4156                         goto out;
4157                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4158                                               cpuid_arg->entries);
4159                 break;
4160         }
4161         case KVM_GET_CPUID2: {
4162                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4163                 struct kvm_cpuid2 cpuid;
4164
4165                 r = -EFAULT;
4166                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4167                         goto out;
4168                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4169                                               cpuid_arg->entries);
4170                 if (r)
4171                         goto out;
4172                 r = -EFAULT;
4173                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4174                         goto out;
4175                 r = 0;
4176                 break;
4177         }
4178         case KVM_GET_MSRS: {
4179                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4180                 r = msr_io(vcpu, argp, do_get_msr, 1);
4181                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4182                 break;
4183         }
4184         case KVM_SET_MSRS: {
4185                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4186                 r = msr_io(vcpu, argp, do_set_msr, 0);
4187                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4188                 break;
4189         }
4190         case KVM_TPR_ACCESS_REPORTING: {
4191                 struct kvm_tpr_access_ctl tac;
4192
4193                 r = -EFAULT;
4194                 if (copy_from_user(&tac, argp, sizeof(tac)))
4195                         goto out;
4196                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4197                 if (r)
4198                         goto out;
4199                 r = -EFAULT;
4200                 if (copy_to_user(argp, &tac, sizeof(tac)))
4201                         goto out;
4202                 r = 0;
4203                 break;
4204         };
4205         case KVM_SET_VAPIC_ADDR: {
4206                 struct kvm_vapic_addr va;
4207                 int idx;
4208
4209                 r = -EINVAL;
4210                 if (!lapic_in_kernel(vcpu))
4211                         goto out;
4212                 r = -EFAULT;
4213                 if (copy_from_user(&va, argp, sizeof(va)))
4214                         goto out;
4215                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4216                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4217                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4218                 break;
4219         }
4220         case KVM_X86_SETUP_MCE: {
4221                 u64 mcg_cap;
4222
4223                 r = -EFAULT;
4224                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4225                         goto out;
4226                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4227                 break;
4228         }
4229         case KVM_X86_SET_MCE: {
4230                 struct kvm_x86_mce mce;
4231
4232                 r = -EFAULT;
4233                 if (copy_from_user(&mce, argp, sizeof(mce)))
4234                         goto out;
4235                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4236                 break;
4237         }
4238         case KVM_GET_VCPU_EVENTS: {
4239                 struct kvm_vcpu_events events;
4240
4241                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4242
4243                 r = -EFAULT;
4244                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4245                         break;
4246                 r = 0;
4247                 break;
4248         }
4249         case KVM_SET_VCPU_EVENTS: {
4250                 struct kvm_vcpu_events events;
4251
4252                 r = -EFAULT;
4253                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4254                         break;
4255
4256                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4257                 break;
4258         }
4259         case KVM_GET_DEBUGREGS: {
4260                 struct kvm_debugregs dbgregs;
4261
4262                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4263
4264                 r = -EFAULT;
4265                 if (copy_to_user(argp, &dbgregs,
4266                                  sizeof(struct kvm_debugregs)))
4267                         break;
4268                 r = 0;
4269                 break;
4270         }
4271         case KVM_SET_DEBUGREGS: {
4272                 struct kvm_debugregs dbgregs;
4273
4274                 r = -EFAULT;
4275                 if (copy_from_user(&dbgregs, argp,
4276                                    sizeof(struct kvm_debugregs)))
4277                         break;
4278
4279                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4280                 break;
4281         }
4282         case KVM_GET_XSAVE: {
4283                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4284                 r = -ENOMEM;
4285                 if (!u.xsave)
4286                         break;
4287
4288                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4289
4290                 r = -EFAULT;
4291                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4292                         break;
4293                 r = 0;
4294                 break;
4295         }
4296         case KVM_SET_XSAVE: {
4297                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4298                 if (IS_ERR(u.xsave)) {
4299                         r = PTR_ERR(u.xsave);
4300                         goto out_nofree;
4301                 }
4302
4303                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4304                 break;
4305         }
4306         case KVM_GET_XCRS: {
4307                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4308                 r = -ENOMEM;
4309                 if (!u.xcrs)
4310                         break;
4311
4312                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4313
4314                 r = -EFAULT;
4315                 if (copy_to_user(argp, u.xcrs,
4316                                  sizeof(struct kvm_xcrs)))
4317                         break;
4318                 r = 0;
4319                 break;
4320         }
4321         case KVM_SET_XCRS: {
4322                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4323                 if (IS_ERR(u.xcrs)) {
4324                         r = PTR_ERR(u.xcrs);
4325                         goto out_nofree;
4326                 }
4327
4328                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4329                 break;
4330         }
4331         case KVM_SET_TSC_KHZ: {
4332                 u32 user_tsc_khz;
4333
4334                 r = -EINVAL;
4335                 user_tsc_khz = (u32)arg;
4336
4337                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4338                         goto out;
4339
4340                 if (user_tsc_khz == 0)
4341                         user_tsc_khz = tsc_khz;
4342
4343                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4344                         r = 0;
4345
4346                 goto out;
4347         }
4348         case KVM_GET_TSC_KHZ: {
4349                 r = vcpu->arch.virtual_tsc_khz;
4350                 goto out;
4351         }
4352         case KVM_KVMCLOCK_CTRL: {
4353                 r = kvm_set_guest_paused(vcpu);
4354                 goto out;
4355         }
4356         case KVM_ENABLE_CAP: {
4357                 struct kvm_enable_cap cap;
4358
4359                 r = -EFAULT;
4360                 if (copy_from_user(&cap, argp, sizeof(cap)))
4361                         goto out;
4362                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4363                 break;
4364         }
4365         case KVM_GET_NESTED_STATE: {
4366                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4367                 u32 user_data_size;
4368
4369                 r = -EINVAL;
4370                 if (!kvm_x86_ops->get_nested_state)
4371                         break;
4372
4373                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4374                 r = -EFAULT;
4375                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4376                         break;
4377
4378                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4379                                                   user_data_size);
4380                 if (r < 0)
4381                         break;
4382
4383                 if (r > user_data_size) {
4384                         if (put_user(r, &user_kvm_nested_state->size))
4385                                 r = -EFAULT;
4386                         else
4387                                 r = -E2BIG;
4388                         break;
4389                 }
4390
4391                 r = 0;
4392                 break;
4393         }
4394         case KVM_SET_NESTED_STATE: {
4395                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4396                 struct kvm_nested_state kvm_state;
4397
4398                 r = -EINVAL;
4399                 if (!kvm_x86_ops->set_nested_state)
4400                         break;
4401
4402                 r = -EFAULT;
4403                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4404                         break;
4405
4406                 r = -EINVAL;
4407                 if (kvm_state.size < sizeof(kvm_state))
4408                         break;
4409
4410                 if (kvm_state.flags &
4411                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4412                       | KVM_STATE_NESTED_EVMCS))
4413                         break;
4414
4415                 /* nested_run_pending implies guest_mode.  */
4416                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4417                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4418                         break;
4419
4420                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4421                 break;
4422         }
4423         case KVM_GET_SUPPORTED_HV_CPUID: {
4424                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4425                 struct kvm_cpuid2 cpuid;
4426
4427                 r = -EFAULT;
4428                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4429                         goto out;
4430
4431                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4432                                                 cpuid_arg->entries);
4433                 if (r)
4434                         goto out;
4435
4436                 r = -EFAULT;
4437                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4438                         goto out;
4439                 r = 0;
4440                 break;
4441         }
4442         default:
4443                 r = -EINVAL;
4444         }
4445 out:
4446         kfree(u.buffer);
4447 out_nofree:
4448         vcpu_put(vcpu);
4449         return r;
4450 }
4451
4452 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4453 {
4454         return VM_FAULT_SIGBUS;
4455 }
4456
4457 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4458 {
4459         int ret;
4460
4461         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4462                 return -EINVAL;
4463         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4464         return ret;
4465 }
4466
4467 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4468                                               u64 ident_addr)
4469 {
4470         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4471 }
4472
4473 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4474                                          unsigned long kvm_nr_mmu_pages)
4475 {
4476         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4477                 return -EINVAL;
4478
4479         mutex_lock(&kvm->slots_lock);
4480
4481         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4482         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4483
4484         mutex_unlock(&kvm->slots_lock);
4485         return 0;
4486 }
4487
4488 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4489 {
4490         return kvm->arch.n_max_mmu_pages;
4491 }
4492
4493 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4494 {
4495         struct kvm_pic *pic = kvm->arch.vpic;
4496         int r;
4497
4498         r = 0;
4499         switch (chip->chip_id) {
4500         case KVM_IRQCHIP_PIC_MASTER:
4501                 memcpy(&chip->chip.pic, &pic->pics[0],
4502                         sizeof(struct kvm_pic_state));
4503                 break;
4504         case KVM_IRQCHIP_PIC_SLAVE:
4505                 memcpy(&chip->chip.pic, &pic->pics[1],
4506                         sizeof(struct kvm_pic_state));
4507                 break;
4508         case KVM_IRQCHIP_IOAPIC:
4509                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4510                 break;
4511         default:
4512                 r = -EINVAL;
4513                 break;
4514         }
4515         return r;
4516 }
4517
4518 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4519 {
4520         struct kvm_pic *pic = kvm->arch.vpic;
4521         int r;
4522
4523         r = 0;
4524         switch (chip->chip_id) {
4525         case KVM_IRQCHIP_PIC_MASTER:
4526                 spin_lock(&pic->lock);
4527                 memcpy(&pic->pics[0], &chip->chip.pic,
4528                         sizeof(struct kvm_pic_state));
4529                 spin_unlock(&pic->lock);
4530                 break;
4531         case KVM_IRQCHIP_PIC_SLAVE:
4532                 spin_lock(&pic->lock);
4533                 memcpy(&pic->pics[1], &chip->chip.pic,
4534                         sizeof(struct kvm_pic_state));
4535                 spin_unlock(&pic->lock);
4536                 break;
4537         case KVM_IRQCHIP_IOAPIC:
4538                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4539                 break;
4540         default:
4541                 r = -EINVAL;
4542                 break;
4543         }
4544         kvm_pic_update_irq(pic);
4545         return r;
4546 }
4547
4548 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4549 {
4550         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4551
4552         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4553
4554         mutex_lock(&kps->lock);
4555         memcpy(ps, &kps->channels, sizeof(*ps));
4556         mutex_unlock(&kps->lock);
4557         return 0;
4558 }
4559
4560 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4561 {
4562         int i;
4563         struct kvm_pit *pit = kvm->arch.vpit;
4564
4565         mutex_lock(&pit->pit_state.lock);
4566         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4567         for (i = 0; i < 3; i++)
4568                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4569         mutex_unlock(&pit->pit_state.lock);
4570         return 0;
4571 }
4572
4573 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4574 {
4575         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4576         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4577                 sizeof(ps->channels));
4578         ps->flags = kvm->arch.vpit->pit_state.flags;
4579         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4580         memset(&ps->reserved, 0, sizeof(ps->reserved));
4581         return 0;
4582 }
4583
4584 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4585 {
4586         int start = 0;
4587         int i;
4588         u32 prev_legacy, cur_legacy;
4589         struct kvm_pit *pit = kvm->arch.vpit;
4590
4591         mutex_lock(&pit->pit_state.lock);
4592         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4593         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4594         if (!prev_legacy && cur_legacy)
4595                 start = 1;
4596         memcpy(&pit->pit_state.channels, &ps->channels,
4597                sizeof(pit->pit_state.channels));
4598         pit->pit_state.flags = ps->flags;
4599         for (i = 0; i < 3; i++)
4600                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4601                                    start && i == 0);
4602         mutex_unlock(&pit->pit_state.lock);
4603         return 0;
4604 }
4605
4606 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4607                                  struct kvm_reinject_control *control)
4608 {
4609         struct kvm_pit *pit = kvm->arch.vpit;
4610
4611         if (!pit)
4612                 return -ENXIO;
4613
4614         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4615          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4616          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4617          */
4618         mutex_lock(&pit->pit_state.lock);
4619         kvm_pit_set_reinject(pit, control->pit_reinject);
4620         mutex_unlock(&pit->pit_state.lock);
4621
4622         return 0;
4623 }
4624
4625 /**
4626  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4627  * @kvm: kvm instance
4628  * @log: slot id and address to which we copy the log
4629  *
4630  * Steps 1-4 below provide general overview of dirty page logging. See
4631  * kvm_get_dirty_log_protect() function description for additional details.
4632  *
4633  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4634  * always flush the TLB (step 4) even if previous step failed  and the dirty
4635  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4636  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4637  * writes will be marked dirty for next log read.
4638  *
4639  *   1. Take a snapshot of the bit and clear it if needed.
4640  *   2. Write protect the corresponding page.
4641  *   3. Copy the snapshot to the userspace.
4642  *   4. Flush TLB's if needed.
4643  */
4644 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4645 {
4646         bool flush = false;
4647         int r;
4648
4649         mutex_lock(&kvm->slots_lock);
4650
4651         /*
4652          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4653          */
4654         if (kvm_x86_ops->flush_log_dirty)
4655                 kvm_x86_ops->flush_log_dirty(kvm);
4656
4657         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4658
4659         /*
4660          * All the TLBs can be flushed out of mmu lock, see the comments in
4661          * kvm_mmu_slot_remove_write_access().
4662          */
4663         lockdep_assert_held(&kvm->slots_lock);
4664         if (flush)
4665                 kvm_flush_remote_tlbs(kvm);
4666
4667         mutex_unlock(&kvm->slots_lock);
4668         return r;
4669 }
4670
4671 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4672 {
4673         bool flush = false;
4674         int r;
4675
4676         mutex_lock(&kvm->slots_lock);
4677
4678         /*
4679          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4680          */
4681         if (kvm_x86_ops->flush_log_dirty)
4682                 kvm_x86_ops->flush_log_dirty(kvm);
4683
4684         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4685
4686         /*
4687          * All the TLBs can be flushed out of mmu lock, see the comments in
4688          * kvm_mmu_slot_remove_write_access().
4689          */
4690         lockdep_assert_held(&kvm->slots_lock);
4691         if (flush)
4692                 kvm_flush_remote_tlbs(kvm);
4693
4694         mutex_unlock(&kvm->slots_lock);
4695         return r;
4696 }
4697
4698 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4699                         bool line_status)
4700 {
4701         if (!irqchip_in_kernel(kvm))
4702                 return -ENXIO;
4703
4704         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4705                                         irq_event->irq, irq_event->level,
4706                                         line_status);
4707         return 0;
4708 }
4709
4710 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4711                             struct kvm_enable_cap *cap)
4712 {
4713         int r;
4714
4715         if (cap->flags)
4716                 return -EINVAL;
4717
4718         switch (cap->cap) {
4719         case KVM_CAP_DISABLE_QUIRKS:
4720                 kvm->arch.disabled_quirks = cap->args[0];
4721                 r = 0;
4722                 break;
4723         case KVM_CAP_SPLIT_IRQCHIP: {
4724                 mutex_lock(&kvm->lock);
4725                 r = -EINVAL;
4726                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4727                         goto split_irqchip_unlock;
4728                 r = -EEXIST;
4729                 if (irqchip_in_kernel(kvm))
4730                         goto split_irqchip_unlock;
4731                 if (kvm->created_vcpus)
4732                         goto split_irqchip_unlock;
4733                 r = kvm_setup_empty_irq_routing(kvm);
4734                 if (r)
4735                         goto split_irqchip_unlock;
4736                 /* Pairs with irqchip_in_kernel. */
4737                 smp_wmb();
4738                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4739                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4740                 r = 0;
4741 split_irqchip_unlock:
4742                 mutex_unlock(&kvm->lock);
4743                 break;
4744         }
4745         case KVM_CAP_X2APIC_API:
4746                 r = -EINVAL;
4747                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4748                         break;
4749
4750                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4751                         kvm->arch.x2apic_format = true;
4752                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4753                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4754
4755                 r = 0;
4756                 break;
4757         case KVM_CAP_X86_DISABLE_EXITS:
4758                 r = -EINVAL;
4759                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4760                         break;
4761
4762                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4763                         kvm_can_mwait_in_guest())
4764                         kvm->arch.mwait_in_guest = true;
4765                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4766                         kvm->arch.hlt_in_guest = true;
4767                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4768                         kvm->arch.pause_in_guest = true;
4769                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4770                         kvm->arch.cstate_in_guest = true;
4771                 r = 0;
4772                 break;
4773         case KVM_CAP_MSR_PLATFORM_INFO:
4774                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4775                 r = 0;
4776                 break;
4777         case KVM_CAP_EXCEPTION_PAYLOAD:
4778                 kvm->arch.exception_payload_enabled = cap->args[0];
4779                 r = 0;
4780                 break;
4781         default:
4782                 r = -EINVAL;
4783                 break;
4784         }
4785         return r;
4786 }
4787
4788 long kvm_arch_vm_ioctl(struct file *filp,
4789                        unsigned int ioctl, unsigned long arg)
4790 {
4791         struct kvm *kvm = filp->private_data;
4792         void __user *argp = (void __user *)arg;
4793         int r = -ENOTTY;
4794         /*
4795          * This union makes it completely explicit to gcc-3.x
4796          * that these two variables' stack usage should be
4797          * combined, not added together.
4798          */
4799         union {
4800                 struct kvm_pit_state ps;
4801                 struct kvm_pit_state2 ps2;
4802                 struct kvm_pit_config pit_config;
4803         } u;
4804
4805         switch (ioctl) {
4806         case KVM_SET_TSS_ADDR:
4807                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4808                 break;
4809         case KVM_SET_IDENTITY_MAP_ADDR: {
4810                 u64 ident_addr;
4811
4812                 mutex_lock(&kvm->lock);
4813                 r = -EINVAL;
4814                 if (kvm->created_vcpus)
4815                         goto set_identity_unlock;
4816                 r = -EFAULT;
4817                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4818                         goto set_identity_unlock;
4819                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4820 set_identity_unlock:
4821                 mutex_unlock(&kvm->lock);
4822                 break;
4823         }
4824         case KVM_SET_NR_MMU_PAGES:
4825                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4826                 break;
4827         case KVM_GET_NR_MMU_PAGES:
4828                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4829                 break;
4830         case KVM_CREATE_IRQCHIP: {
4831                 mutex_lock(&kvm->lock);
4832
4833                 r = -EEXIST;
4834                 if (irqchip_in_kernel(kvm))
4835                         goto create_irqchip_unlock;
4836
4837                 r = -EINVAL;
4838                 if (kvm->created_vcpus)
4839                         goto create_irqchip_unlock;
4840
4841                 r = kvm_pic_init(kvm);
4842                 if (r)
4843                         goto create_irqchip_unlock;
4844
4845                 r = kvm_ioapic_init(kvm);
4846                 if (r) {
4847                         kvm_pic_destroy(kvm);
4848                         goto create_irqchip_unlock;
4849                 }
4850
4851                 r = kvm_setup_default_irq_routing(kvm);
4852                 if (r) {
4853                         kvm_ioapic_destroy(kvm);
4854                         kvm_pic_destroy(kvm);
4855                         goto create_irqchip_unlock;
4856                 }
4857                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4858                 smp_wmb();
4859                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4860         create_irqchip_unlock:
4861                 mutex_unlock(&kvm->lock);
4862                 break;
4863         }
4864         case KVM_CREATE_PIT:
4865                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4866                 goto create_pit;
4867         case KVM_CREATE_PIT2:
4868                 r = -EFAULT;
4869                 if (copy_from_user(&u.pit_config, argp,
4870                                    sizeof(struct kvm_pit_config)))
4871                         goto out;
4872         create_pit:
4873                 mutex_lock(&kvm->lock);
4874                 r = -EEXIST;
4875                 if (kvm->arch.vpit)
4876                         goto create_pit_unlock;
4877                 r = -ENOMEM;
4878                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4879                 if (kvm->arch.vpit)
4880                         r = 0;
4881         create_pit_unlock:
4882                 mutex_unlock(&kvm->lock);
4883                 break;
4884         case KVM_GET_IRQCHIP: {
4885                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4886                 struct kvm_irqchip *chip;
4887
4888                 chip = memdup_user(argp, sizeof(*chip));
4889                 if (IS_ERR(chip)) {
4890                         r = PTR_ERR(chip);
4891                         goto out;
4892                 }
4893
4894                 r = -ENXIO;
4895                 if (!irqchip_kernel(kvm))
4896                         goto get_irqchip_out;
4897                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4898                 if (r)
4899                         goto get_irqchip_out;
4900                 r = -EFAULT;
4901                 if (copy_to_user(argp, chip, sizeof(*chip)))
4902                         goto get_irqchip_out;
4903                 r = 0;
4904         get_irqchip_out:
4905                 kfree(chip);
4906                 break;
4907         }
4908         case KVM_SET_IRQCHIP: {
4909                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4910                 struct kvm_irqchip *chip;
4911
4912                 chip = memdup_user(argp, sizeof(*chip));
4913                 if (IS_ERR(chip)) {
4914                         r = PTR_ERR(chip);
4915                         goto out;
4916                 }
4917
4918                 r = -ENXIO;
4919                 if (!irqchip_kernel(kvm))
4920                         goto set_irqchip_out;
4921                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4922                 if (r)
4923                         goto set_irqchip_out;
4924                 r = 0;
4925         set_irqchip_out:
4926                 kfree(chip);
4927                 break;
4928         }
4929         case KVM_GET_PIT: {
4930                 r = -EFAULT;
4931                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4932                         goto out;
4933                 r = -ENXIO;
4934                 if (!kvm->arch.vpit)
4935                         goto out;
4936                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4937                 if (r)
4938                         goto out;
4939                 r = -EFAULT;
4940                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4941                         goto out;
4942                 r = 0;
4943                 break;
4944         }
4945         case KVM_SET_PIT: {
4946                 r = -EFAULT;
4947                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4948                         goto out;
4949                 r = -ENXIO;
4950                 if (!kvm->arch.vpit)
4951                         goto out;
4952                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4953                 break;
4954         }
4955         case KVM_GET_PIT2: {
4956                 r = -ENXIO;
4957                 if (!kvm->arch.vpit)
4958                         goto out;
4959                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4960                 if (r)
4961                         goto out;
4962                 r = -EFAULT;
4963                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4964                         goto out;
4965                 r = 0;
4966                 break;
4967         }
4968         case KVM_SET_PIT2: {
4969                 r = -EFAULT;
4970                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4971                         goto out;
4972                 r = -ENXIO;
4973                 if (!kvm->arch.vpit)
4974                         goto out;
4975                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4976                 break;
4977         }
4978         case KVM_REINJECT_CONTROL: {
4979                 struct kvm_reinject_control control;
4980                 r =  -EFAULT;
4981                 if (copy_from_user(&control, argp, sizeof(control)))
4982                         goto out;
4983                 r = kvm_vm_ioctl_reinject(kvm, &control);
4984                 break;
4985         }
4986         case KVM_SET_BOOT_CPU_ID:
4987                 r = 0;
4988                 mutex_lock(&kvm->lock);
4989                 if (kvm->created_vcpus)
4990                         r = -EBUSY;
4991                 else
4992                         kvm->arch.bsp_vcpu_id = arg;
4993                 mutex_unlock(&kvm->lock);
4994                 break;
4995         case KVM_XEN_HVM_CONFIG: {
4996                 struct kvm_xen_hvm_config xhc;
4997                 r = -EFAULT;
4998                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4999                         goto out;
5000                 r = -EINVAL;
5001                 if (xhc.flags)
5002                         goto out;
5003                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5004                 r = 0;
5005                 break;
5006         }
5007         case KVM_SET_CLOCK: {
5008                 struct kvm_clock_data user_ns;
5009                 u64 now_ns;
5010
5011                 r = -EFAULT;
5012                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5013                         goto out;
5014
5015                 r = -EINVAL;
5016                 if (user_ns.flags)
5017                         goto out;
5018
5019                 r = 0;
5020                 /*
5021                  * TODO: userspace has to take care of races with VCPU_RUN, so
5022                  * kvm_gen_update_masterclock() can be cut down to locked
5023                  * pvclock_update_vm_gtod_copy().
5024                  */
5025                 kvm_gen_update_masterclock(kvm);
5026                 now_ns = get_kvmclock_ns(kvm);
5027                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5028                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5029                 break;
5030         }
5031         case KVM_GET_CLOCK: {
5032                 struct kvm_clock_data user_ns;
5033                 u64 now_ns;
5034
5035                 now_ns = get_kvmclock_ns(kvm);
5036                 user_ns.clock = now_ns;
5037                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5038                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5039
5040                 r = -EFAULT;
5041                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5042                         goto out;
5043                 r = 0;
5044                 break;
5045         }
5046         case KVM_MEMORY_ENCRYPT_OP: {
5047                 r = -ENOTTY;
5048                 if (kvm_x86_ops->mem_enc_op)
5049                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5050                 break;
5051         }
5052         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5053                 struct kvm_enc_region region;
5054
5055                 r = -EFAULT;
5056                 if (copy_from_user(&region, argp, sizeof(region)))
5057                         goto out;
5058
5059                 r = -ENOTTY;
5060                 if (kvm_x86_ops->mem_enc_reg_region)
5061                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5062                 break;
5063         }
5064         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5065                 struct kvm_enc_region region;
5066
5067                 r = -EFAULT;
5068                 if (copy_from_user(&region, argp, sizeof(region)))
5069                         goto out;
5070
5071                 r = -ENOTTY;
5072                 if (kvm_x86_ops->mem_enc_unreg_region)
5073                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5074                 break;
5075         }
5076         case KVM_HYPERV_EVENTFD: {
5077                 struct kvm_hyperv_eventfd hvevfd;
5078
5079                 r = -EFAULT;
5080                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5081                         goto out;
5082                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5083                 break;
5084         }
5085         case KVM_SET_PMU_EVENT_FILTER:
5086                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5087                 break;
5088         default:
5089                 r = -ENOTTY;
5090         }
5091 out:
5092         return r;
5093 }
5094
5095 static void kvm_init_msr_list(void)
5096 {
5097         u32 dummy[2];
5098         unsigned i, j;
5099
5100         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5101                          "Please update the fixed PMCs in msrs_to_save[]");
5102         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_GENERIC != 32,
5103                          "Please update the generic perfctr/eventsel MSRs in msrs_to_save[]");
5104
5105         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5106                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5107                         continue;
5108
5109                 /*
5110                  * Even MSRs that are valid in the host may not be exposed
5111                  * to the guests in some cases.
5112                  */
5113                 switch (msrs_to_save[i]) {
5114                 case MSR_IA32_BNDCFGS:
5115                         if (!kvm_mpx_supported())
5116                                 continue;
5117                         break;
5118                 case MSR_TSC_AUX:
5119                         if (!kvm_x86_ops->rdtscp_supported())
5120                                 continue;
5121                         break;
5122                 case MSR_IA32_RTIT_CTL:
5123                 case MSR_IA32_RTIT_STATUS:
5124                         if (!kvm_x86_ops->pt_supported())
5125                                 continue;
5126                         break;
5127                 case MSR_IA32_RTIT_CR3_MATCH:
5128                         if (!kvm_x86_ops->pt_supported() ||
5129                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5130                                 continue;
5131                         break;
5132                 case MSR_IA32_RTIT_OUTPUT_BASE:
5133                 case MSR_IA32_RTIT_OUTPUT_MASK:
5134                         if (!kvm_x86_ops->pt_supported() ||
5135                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5136                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5137                                 continue;
5138                         break;
5139                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5140                         if (!kvm_x86_ops->pt_supported() ||
5141                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5142                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5143                                 continue;
5144                         break;
5145                 }
5146                 default:
5147                         break;
5148                 }
5149
5150                 if (j < i)
5151                         msrs_to_save[j] = msrs_to_save[i];
5152                 j++;
5153         }
5154         num_msrs_to_save = j;
5155
5156         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5157                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5158                         continue;
5159
5160                 if (j < i)
5161                         emulated_msrs[j] = emulated_msrs[i];
5162                 j++;
5163         }
5164         num_emulated_msrs = j;
5165
5166         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5167                 struct kvm_msr_entry msr;
5168
5169                 msr.index = msr_based_features[i];
5170                 if (kvm_get_msr_feature(&msr))
5171                         continue;
5172
5173                 if (j < i)
5174                         msr_based_features[j] = msr_based_features[i];
5175                 j++;
5176         }
5177         num_msr_based_features = j;
5178 }
5179
5180 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5181                            const void *v)
5182 {
5183         int handled = 0;
5184         int n;
5185
5186         do {
5187                 n = min(len, 8);
5188                 if (!(lapic_in_kernel(vcpu) &&
5189                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5190                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5191                         break;
5192                 handled += n;
5193                 addr += n;
5194                 len -= n;
5195                 v += n;
5196         } while (len);
5197
5198         return handled;
5199 }
5200
5201 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5202 {
5203         int handled = 0;
5204         int n;
5205
5206         do {
5207                 n = min(len, 8);
5208                 if (!(lapic_in_kernel(vcpu) &&
5209                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5210                                          addr, n, v))
5211                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5212                         break;
5213                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5214                 handled += n;
5215                 addr += n;
5216                 len -= n;
5217                 v += n;
5218         } while (len);
5219
5220         return handled;
5221 }
5222
5223 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5224                         struct kvm_segment *var, int seg)
5225 {
5226         kvm_x86_ops->set_segment(vcpu, var, seg);
5227 }
5228
5229 void kvm_get_segment(struct kvm_vcpu *vcpu,
5230                      struct kvm_segment *var, int seg)
5231 {
5232         kvm_x86_ops->get_segment(vcpu, var, seg);
5233 }
5234
5235 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5236                            struct x86_exception *exception)
5237 {
5238         gpa_t t_gpa;
5239
5240         BUG_ON(!mmu_is_nested(vcpu));
5241
5242         /* NPT walks are always user-walks */
5243         access |= PFERR_USER_MASK;
5244         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5245
5246         return t_gpa;
5247 }
5248
5249 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5250                               struct x86_exception *exception)
5251 {
5252         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5253         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5254 }
5255
5256  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5257                                 struct x86_exception *exception)
5258 {
5259         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5260         access |= PFERR_FETCH_MASK;
5261         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5262 }
5263
5264 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5265                                struct x86_exception *exception)
5266 {
5267         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5268         access |= PFERR_WRITE_MASK;
5269         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5270 }
5271
5272 /* uses this to access any guest's mapped memory without checking CPL */
5273 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5274                                 struct x86_exception *exception)
5275 {
5276         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5277 }
5278
5279 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5280                                       struct kvm_vcpu *vcpu, u32 access,
5281                                       struct x86_exception *exception)
5282 {
5283         void *data = val;
5284         int r = X86EMUL_CONTINUE;
5285
5286         while (bytes) {
5287                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5288                                                             exception);
5289                 unsigned offset = addr & (PAGE_SIZE-1);
5290                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5291                 int ret;
5292
5293                 if (gpa == UNMAPPED_GVA)
5294                         return X86EMUL_PROPAGATE_FAULT;
5295                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5296                                                offset, toread);
5297                 if (ret < 0) {
5298                         r = X86EMUL_IO_NEEDED;
5299                         goto out;
5300                 }
5301
5302                 bytes -= toread;
5303                 data += toread;
5304                 addr += toread;
5305         }
5306 out:
5307         return r;
5308 }
5309
5310 /* used for instruction fetching */
5311 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5312                                 gva_t addr, void *val, unsigned int bytes,
5313                                 struct x86_exception *exception)
5314 {
5315         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5316         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5317         unsigned offset;
5318         int ret;
5319
5320         /* Inline kvm_read_guest_virt_helper for speed.  */
5321         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5322                                                     exception);
5323         if (unlikely(gpa == UNMAPPED_GVA))
5324                 return X86EMUL_PROPAGATE_FAULT;
5325
5326         offset = addr & (PAGE_SIZE-1);
5327         if (WARN_ON(offset + bytes > PAGE_SIZE))
5328                 bytes = (unsigned)PAGE_SIZE - offset;
5329         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5330                                        offset, bytes);
5331         if (unlikely(ret < 0))
5332                 return X86EMUL_IO_NEEDED;
5333
5334         return X86EMUL_CONTINUE;
5335 }
5336
5337 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5338                                gva_t addr, void *val, unsigned int bytes,
5339                                struct x86_exception *exception)
5340 {
5341         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5342
5343         /*
5344          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5345          * is returned, but our callers are not ready for that and they blindly
5346          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5347          * uninitialized kernel stack memory into cr2 and error code.
5348          */
5349         memset(exception, 0, sizeof(*exception));
5350         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5351                                           exception);
5352 }
5353 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5354
5355 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5356                              gva_t addr, void *val, unsigned int bytes,
5357                              struct x86_exception *exception, bool system)
5358 {
5359         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5360         u32 access = 0;
5361
5362         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5363                 access |= PFERR_USER_MASK;
5364
5365         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5366 }
5367
5368 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5369                 unsigned long addr, void *val, unsigned int bytes)
5370 {
5371         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5372         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5373
5374         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5375 }
5376
5377 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5378                                       struct kvm_vcpu *vcpu, u32 access,
5379                                       struct x86_exception *exception)
5380 {
5381         void *data = val;
5382         int r = X86EMUL_CONTINUE;
5383
5384         while (bytes) {
5385                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5386                                                              access,
5387                                                              exception);
5388                 unsigned offset = addr & (PAGE_SIZE-1);
5389                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5390                 int ret;
5391
5392                 if (gpa == UNMAPPED_GVA)
5393                         return X86EMUL_PROPAGATE_FAULT;
5394                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5395                 if (ret < 0) {
5396                         r = X86EMUL_IO_NEEDED;
5397                         goto out;
5398                 }
5399
5400                 bytes -= towrite;
5401                 data += towrite;
5402                 addr += towrite;
5403         }
5404 out:
5405         return r;
5406 }
5407
5408 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5409                               unsigned int bytes, struct x86_exception *exception,
5410                               bool system)
5411 {
5412         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5413         u32 access = PFERR_WRITE_MASK;
5414
5415         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5416                 access |= PFERR_USER_MASK;
5417
5418         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5419                                            access, exception);
5420 }
5421
5422 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5423                                 unsigned int bytes, struct x86_exception *exception)
5424 {
5425         /* kvm_write_guest_virt_system can pull in tons of pages. */
5426         vcpu->arch.l1tf_flush_l1d = true;
5427
5428         /*
5429          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5430          * is returned, but our callers are not ready for that and they blindly
5431          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5432          * uninitialized kernel stack memory into cr2 and error code.
5433          */
5434         memset(exception, 0, sizeof(*exception));
5435         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5436                                            PFERR_WRITE_MASK, exception);
5437 }
5438 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5439
5440 int handle_ud(struct kvm_vcpu *vcpu)
5441 {
5442         int emul_type = EMULTYPE_TRAP_UD;
5443         char sig[5]; /* ud2; .ascii "kvm" */
5444         struct x86_exception e;
5445
5446         if (force_emulation_prefix &&
5447             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5448                                 sig, sizeof(sig), &e) == 0 &&
5449             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5450                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5451                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5452         }
5453
5454         return kvm_emulate_instruction(vcpu, emul_type) != EMULATE_USER_EXIT;
5455 }
5456 EXPORT_SYMBOL_GPL(handle_ud);
5457
5458 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5459                             gpa_t gpa, bool write)
5460 {
5461         /* For APIC access vmexit */
5462         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5463                 return 1;
5464
5465         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5466                 trace_vcpu_match_mmio(gva, gpa, write, true);
5467                 return 1;
5468         }
5469
5470         return 0;
5471 }
5472
5473 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5474                                 gpa_t *gpa, struct x86_exception *exception,
5475                                 bool write)
5476 {
5477         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5478                 | (write ? PFERR_WRITE_MASK : 0);
5479
5480         /*
5481          * currently PKRU is only applied to ept enabled guest so
5482          * there is no pkey in EPT page table for L1 guest or EPT
5483          * shadow page table for L2 guest.
5484          */
5485         if (vcpu_match_mmio_gva(vcpu, gva)
5486             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5487                                  vcpu->arch.mmio_access, 0, access)) {
5488                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5489                                         (gva & (PAGE_SIZE - 1));
5490                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5491                 return 1;
5492         }
5493
5494         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5495
5496         if (*gpa == UNMAPPED_GVA)
5497                 return -1;
5498
5499         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5500 }
5501
5502 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5503                         const void *val, int bytes)
5504 {
5505         int ret;
5506
5507         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5508         if (ret < 0)
5509                 return 0;
5510         kvm_page_track_write(vcpu, gpa, val, bytes);
5511         return 1;
5512 }
5513
5514 struct read_write_emulator_ops {
5515         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5516                                   int bytes);
5517         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5518                                   void *val, int bytes);
5519         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5520                                int bytes, void *val);
5521         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5522                                     void *val, int bytes);
5523         bool write;
5524 };
5525
5526 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5527 {
5528         if (vcpu->mmio_read_completed) {
5529                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5530                                vcpu->mmio_fragments[0].gpa, val);
5531                 vcpu->mmio_read_completed = 0;
5532                 return 1;
5533         }
5534
5535         return 0;
5536 }
5537
5538 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5539                         void *val, int bytes)
5540 {
5541         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5542 }
5543
5544 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5545                          void *val, int bytes)
5546 {
5547         return emulator_write_phys(vcpu, gpa, val, bytes);
5548 }
5549
5550 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5551 {
5552         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5553         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5554 }
5555
5556 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5557                           void *val, int bytes)
5558 {
5559         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5560         return X86EMUL_IO_NEEDED;
5561 }
5562
5563 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5564                            void *val, int bytes)
5565 {
5566         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5567
5568         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5569         return X86EMUL_CONTINUE;
5570 }
5571
5572 static const struct read_write_emulator_ops read_emultor = {
5573         .read_write_prepare = read_prepare,
5574         .read_write_emulate = read_emulate,
5575         .read_write_mmio = vcpu_mmio_read,
5576         .read_write_exit_mmio = read_exit_mmio,
5577 };
5578
5579 static const struct read_write_emulator_ops write_emultor = {
5580         .read_write_emulate = write_emulate,
5581         .read_write_mmio = write_mmio,
5582         .read_write_exit_mmio = write_exit_mmio,
5583         .write = true,
5584 };
5585
5586 static int emulator_read_write_onepage(unsigned long addr, void *val,
5587                                        unsigned int bytes,
5588                                        struct x86_exception *exception,
5589                                        struct kvm_vcpu *vcpu,
5590                                        const struct read_write_emulator_ops *ops)
5591 {
5592         gpa_t gpa;
5593         int handled, ret;
5594         bool write = ops->write;
5595         struct kvm_mmio_fragment *frag;
5596         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5597
5598         /*
5599          * If the exit was due to a NPF we may already have a GPA.
5600          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5601          * Note, this cannot be used on string operations since string
5602          * operation using rep will only have the initial GPA from the NPF
5603          * occurred.
5604          */
5605         if (vcpu->arch.gpa_available &&
5606             emulator_can_use_gpa(ctxt) &&
5607             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5608                 gpa = vcpu->arch.gpa_val;
5609                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5610         } else {
5611                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5612                 if (ret < 0)
5613                         return X86EMUL_PROPAGATE_FAULT;
5614         }
5615
5616         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5617                 return X86EMUL_CONTINUE;
5618
5619         /*
5620          * Is this MMIO handled locally?
5621          */
5622         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5623         if (handled == bytes)
5624                 return X86EMUL_CONTINUE;
5625
5626         gpa += handled;
5627         bytes -= handled;
5628         val += handled;
5629
5630         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5631         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5632         frag->gpa = gpa;
5633         frag->data = val;
5634         frag->len = bytes;
5635         return X86EMUL_CONTINUE;
5636 }
5637
5638 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5639                         unsigned long addr,
5640                         void *val, unsigned int bytes,
5641                         struct x86_exception *exception,
5642                         const struct read_write_emulator_ops *ops)
5643 {
5644         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5645         gpa_t gpa;
5646         int rc;
5647
5648         if (ops->read_write_prepare &&
5649                   ops->read_write_prepare(vcpu, val, bytes))
5650                 return X86EMUL_CONTINUE;
5651
5652         vcpu->mmio_nr_fragments = 0;
5653
5654         /* Crossing a page boundary? */
5655         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5656                 int now;
5657
5658                 now = -addr & ~PAGE_MASK;
5659                 rc = emulator_read_write_onepage(addr, val, now, exception,
5660                                                  vcpu, ops);
5661
5662                 if (rc != X86EMUL_CONTINUE)
5663                         return rc;
5664                 addr += now;
5665                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5666                         addr = (u32)addr;
5667                 val += now;
5668                 bytes -= now;
5669         }
5670
5671         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5672                                          vcpu, ops);
5673         if (rc != X86EMUL_CONTINUE)
5674                 return rc;
5675
5676         if (!vcpu->mmio_nr_fragments)
5677                 return rc;
5678
5679         gpa = vcpu->mmio_fragments[0].gpa;
5680
5681         vcpu->mmio_needed = 1;
5682         vcpu->mmio_cur_fragment = 0;
5683
5684         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5685         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5686         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5687         vcpu->run->mmio.phys_addr = gpa;
5688
5689         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5690 }
5691
5692 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5693                                   unsigned long addr,
5694                                   void *val,
5695                                   unsigned int bytes,
5696                                   struct x86_exception *exception)
5697 {
5698         return emulator_read_write(ctxt, addr, val, bytes,
5699                                    exception, &read_emultor);
5700 }
5701
5702 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5703                             unsigned long addr,
5704                             const void *val,
5705                             unsigned int bytes,
5706                             struct x86_exception *exception)
5707 {
5708         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5709                                    exception, &write_emultor);
5710 }
5711
5712 #define CMPXCHG_TYPE(t, ptr, old, new) \
5713         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5714
5715 #ifdef CONFIG_X86_64
5716 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5717 #else
5718 #  define CMPXCHG64(ptr, old, new) \
5719         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5720 #endif
5721
5722 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5723                                      unsigned long addr,
5724                                      const void *old,
5725                                      const void *new,
5726                                      unsigned int bytes,
5727                                      struct x86_exception *exception)
5728 {
5729         struct kvm_host_map map;
5730         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5731         gpa_t gpa;
5732         char *kaddr;
5733         bool exchanged;
5734
5735         /* guests cmpxchg8b have to be emulated atomically */
5736         if (bytes > 8 || (bytes & (bytes - 1)))
5737                 goto emul_write;
5738
5739         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5740
5741         if (gpa == UNMAPPED_GVA ||
5742             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5743                 goto emul_write;
5744
5745         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5746                 goto emul_write;
5747
5748         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5749                 goto emul_write;
5750
5751         kaddr = map.hva + offset_in_page(gpa);
5752
5753         switch (bytes) {
5754         case 1:
5755                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5756                 break;
5757         case 2:
5758                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5759                 break;
5760         case 4:
5761                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5762                 break;
5763         case 8:
5764                 exchanged = CMPXCHG64(kaddr, old, new);
5765                 break;
5766         default:
5767                 BUG();
5768         }
5769
5770         kvm_vcpu_unmap(vcpu, &map, true);
5771
5772         if (!exchanged)
5773                 return X86EMUL_CMPXCHG_FAILED;
5774
5775         kvm_page_track_write(vcpu, gpa, new, bytes);
5776
5777         return X86EMUL_CONTINUE;
5778
5779 emul_write:
5780         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5781
5782         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5783 }
5784
5785 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5786 {
5787         int r = 0, i;
5788
5789         for (i = 0; i < vcpu->arch.pio.count; i++) {
5790                 if (vcpu->arch.pio.in)
5791                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5792                                             vcpu->arch.pio.size, pd);
5793                 else
5794                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5795                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5796                                              pd);
5797                 if (r)
5798                         break;
5799                 pd += vcpu->arch.pio.size;
5800         }
5801         return r;
5802 }
5803
5804 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5805                                unsigned short port, void *val,
5806                                unsigned int count, bool in)
5807 {
5808         vcpu->arch.pio.port = port;
5809         vcpu->arch.pio.in = in;
5810         vcpu->arch.pio.count  = count;
5811         vcpu->arch.pio.size = size;
5812
5813         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5814                 vcpu->arch.pio.count = 0;
5815                 return 1;
5816         }
5817
5818         vcpu->run->exit_reason = KVM_EXIT_IO;
5819         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5820         vcpu->run->io.size = size;
5821         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5822         vcpu->run->io.count = count;
5823         vcpu->run->io.port = port;
5824
5825         return 0;
5826 }
5827
5828 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5829                                     int size, unsigned short port, void *val,
5830                                     unsigned int count)
5831 {
5832         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5833         int ret;
5834
5835         if (vcpu->arch.pio.count)
5836                 goto data_avail;
5837
5838         memset(vcpu->arch.pio_data, 0, size * count);
5839
5840         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5841         if (ret) {
5842 data_avail:
5843                 memcpy(val, vcpu->arch.pio_data, size * count);
5844                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5845                 vcpu->arch.pio.count = 0;
5846                 return 1;
5847         }
5848
5849         return 0;
5850 }
5851
5852 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5853                                      int size, unsigned short port,
5854                                      const void *val, unsigned int count)
5855 {
5856         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5857
5858         memcpy(vcpu->arch.pio_data, val, size * count);
5859         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5860         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5861 }
5862
5863 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5864 {
5865         return kvm_x86_ops->get_segment_base(vcpu, seg);
5866 }
5867
5868 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5869 {
5870         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5871 }
5872
5873 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5874 {
5875         if (!need_emulate_wbinvd(vcpu))
5876                 return X86EMUL_CONTINUE;
5877
5878         if (kvm_x86_ops->has_wbinvd_exit()) {
5879                 int cpu = get_cpu();
5880
5881                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5882                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5883                                 wbinvd_ipi, NULL, 1);
5884                 put_cpu();
5885                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5886         } else
5887                 wbinvd();
5888         return X86EMUL_CONTINUE;
5889 }
5890
5891 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5892 {
5893         kvm_emulate_wbinvd_noskip(vcpu);
5894         return kvm_skip_emulated_instruction(vcpu);
5895 }
5896 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5897
5898
5899
5900 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5901 {
5902         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5903 }
5904
5905 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5906                            unsigned long *dest)
5907 {
5908         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5909 }
5910
5911 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5912                            unsigned long value)
5913 {
5914
5915         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5916 }
5917
5918 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5919 {
5920         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5921 }
5922
5923 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5924 {
5925         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5926         unsigned long value;
5927
5928         switch (cr) {
5929         case 0:
5930                 value = kvm_read_cr0(vcpu);
5931                 break;
5932         case 2:
5933                 value = vcpu->arch.cr2;
5934                 break;
5935         case 3:
5936                 value = kvm_read_cr3(vcpu);
5937                 break;
5938         case 4:
5939                 value = kvm_read_cr4(vcpu);
5940                 break;
5941         case 8:
5942                 value = kvm_get_cr8(vcpu);
5943                 break;
5944         default:
5945                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5946                 return 0;
5947         }
5948
5949         return value;
5950 }
5951
5952 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5953 {
5954         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5955         int res = 0;
5956
5957         switch (cr) {
5958         case 0:
5959                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5960                 break;
5961         case 2:
5962                 vcpu->arch.cr2 = val;
5963                 break;
5964         case 3:
5965                 res = kvm_set_cr3(vcpu, val);
5966                 break;
5967         case 4:
5968                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5969                 break;
5970         case 8:
5971                 res = kvm_set_cr8(vcpu, val);
5972                 break;
5973         default:
5974                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5975                 res = -1;
5976         }
5977
5978         return res;
5979 }
5980
5981 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5982 {
5983         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5984 }
5985
5986 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5987 {
5988         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5989 }
5990
5991 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5992 {
5993         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5994 }
5995
5996 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5997 {
5998         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5999 }
6000
6001 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6002 {
6003         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6004 }
6005
6006 static unsigned long emulator_get_cached_segment_base(
6007         struct x86_emulate_ctxt *ctxt, int seg)
6008 {
6009         return get_segment_base(emul_to_vcpu(ctxt), seg);
6010 }
6011
6012 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6013                                  struct desc_struct *desc, u32 *base3,
6014                                  int seg)
6015 {
6016         struct kvm_segment var;
6017
6018         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6019         *selector = var.selector;
6020
6021         if (var.unusable) {
6022                 memset(desc, 0, sizeof(*desc));
6023                 if (base3)
6024                         *base3 = 0;
6025                 return false;
6026         }
6027
6028         if (var.g)
6029                 var.limit >>= 12;
6030         set_desc_limit(desc, var.limit);
6031         set_desc_base(desc, (unsigned long)var.base);
6032 #ifdef CONFIG_X86_64
6033         if (base3)
6034                 *base3 = var.base >> 32;
6035 #endif
6036         desc->type = var.type;
6037         desc->s = var.s;
6038         desc->dpl = var.dpl;
6039         desc->p = var.present;
6040         desc->avl = var.avl;
6041         desc->l = var.l;
6042         desc->d = var.db;
6043         desc->g = var.g;
6044
6045         return true;
6046 }
6047
6048 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6049                                  struct desc_struct *desc, u32 base3,
6050                                  int seg)
6051 {
6052         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6053         struct kvm_segment var;
6054
6055         var.selector = selector;
6056         var.base = get_desc_base(desc);
6057 #ifdef CONFIG_X86_64
6058         var.base |= ((u64)base3) << 32;
6059 #endif
6060         var.limit = get_desc_limit(desc);
6061         if (desc->g)
6062                 var.limit = (var.limit << 12) | 0xfff;
6063         var.type = desc->type;
6064         var.dpl = desc->dpl;
6065         var.db = desc->d;
6066         var.s = desc->s;
6067         var.l = desc->l;
6068         var.g = desc->g;
6069         var.avl = desc->avl;
6070         var.present = desc->p;
6071         var.unusable = !var.present;
6072         var.padding = 0;
6073
6074         kvm_set_segment(vcpu, &var, seg);
6075         return;
6076 }
6077
6078 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6079                             u32 msr_index, u64 *pdata)
6080 {
6081         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6082 }
6083
6084 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6085                             u32 msr_index, u64 data)
6086 {
6087         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6088 }
6089
6090 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6091 {
6092         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6093
6094         return vcpu->arch.smbase;
6095 }
6096
6097 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6098 {
6099         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6100
6101         vcpu->arch.smbase = smbase;
6102 }
6103
6104 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6105                               u32 pmc)
6106 {
6107         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6108 }
6109
6110 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6111                              u32 pmc, u64 *pdata)
6112 {
6113         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6114 }
6115
6116 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6117 {
6118         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6119 }
6120
6121 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6122                               struct x86_instruction_info *info,
6123                               enum x86_intercept_stage stage)
6124 {
6125         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6126 }
6127
6128 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6129                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6130 {
6131         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6132 }
6133
6134 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6135 {
6136         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6137 }
6138
6139 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6140 {
6141         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6142 }
6143
6144 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6145 {
6146         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6147 }
6148
6149 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6150 {
6151         return emul_to_vcpu(ctxt)->arch.hflags;
6152 }
6153
6154 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6155 {
6156         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6157 }
6158
6159 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6160                                   const char *smstate)
6161 {
6162         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6163 }
6164
6165 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6166 {
6167         kvm_smm_changed(emul_to_vcpu(ctxt));
6168 }
6169
6170 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6171 {
6172         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6173 }
6174
6175 static const struct x86_emulate_ops emulate_ops = {
6176         .read_gpr            = emulator_read_gpr,
6177         .write_gpr           = emulator_write_gpr,
6178         .read_std            = emulator_read_std,
6179         .write_std           = emulator_write_std,
6180         .read_phys           = kvm_read_guest_phys_system,
6181         .fetch               = kvm_fetch_guest_virt,
6182         .read_emulated       = emulator_read_emulated,
6183         .write_emulated      = emulator_write_emulated,
6184         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6185         .invlpg              = emulator_invlpg,
6186         .pio_in_emulated     = emulator_pio_in_emulated,
6187         .pio_out_emulated    = emulator_pio_out_emulated,
6188         .get_segment         = emulator_get_segment,
6189         .set_segment         = emulator_set_segment,
6190         .get_cached_segment_base = emulator_get_cached_segment_base,
6191         .get_gdt             = emulator_get_gdt,
6192         .get_idt             = emulator_get_idt,
6193         .set_gdt             = emulator_set_gdt,
6194         .set_idt             = emulator_set_idt,
6195         .get_cr              = emulator_get_cr,
6196         .set_cr              = emulator_set_cr,
6197         .cpl                 = emulator_get_cpl,
6198         .get_dr              = emulator_get_dr,
6199         .set_dr              = emulator_set_dr,
6200         .get_smbase          = emulator_get_smbase,
6201         .set_smbase          = emulator_set_smbase,
6202         .set_msr             = emulator_set_msr,
6203         .get_msr             = emulator_get_msr,
6204         .check_pmc           = emulator_check_pmc,
6205         .read_pmc            = emulator_read_pmc,
6206         .halt                = emulator_halt,
6207         .wbinvd              = emulator_wbinvd,
6208         .fix_hypercall       = emulator_fix_hypercall,
6209         .intercept           = emulator_intercept,
6210         .get_cpuid           = emulator_get_cpuid,
6211         .set_nmi_mask        = emulator_set_nmi_mask,
6212         .get_hflags          = emulator_get_hflags,
6213         .set_hflags          = emulator_set_hflags,
6214         .pre_leave_smm       = emulator_pre_leave_smm,
6215         .post_leave_smm      = emulator_post_leave_smm,
6216         .set_xcr             = emulator_set_xcr,
6217 };
6218
6219 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6220 {
6221         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6222         /*
6223          * an sti; sti; sequence only disable interrupts for the first
6224          * instruction. So, if the last instruction, be it emulated or
6225          * not, left the system with the INT_STI flag enabled, it
6226          * means that the last instruction is an sti. We should not
6227          * leave the flag on in this case. The same goes for mov ss
6228          */
6229         if (int_shadow & mask)
6230                 mask = 0;
6231         if (unlikely(int_shadow || mask)) {
6232                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6233                 if (!mask)
6234                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6235         }
6236 }
6237
6238 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6239 {
6240         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6241         if (ctxt->exception.vector == PF_VECTOR)
6242                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6243
6244         if (ctxt->exception.error_code_valid)
6245                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6246                                       ctxt->exception.error_code);
6247         else
6248                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6249         return false;
6250 }
6251
6252 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6253 {
6254         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6255         int cs_db, cs_l;
6256
6257         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6258
6259         ctxt->eflags = kvm_get_rflags(vcpu);
6260         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6261
6262         ctxt->eip = kvm_rip_read(vcpu);
6263         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6264                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6265                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6266                      cs_db                              ? X86EMUL_MODE_PROT32 :
6267                                                           X86EMUL_MODE_PROT16;
6268         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6269         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6270         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6271
6272         init_decode_cache(ctxt);
6273         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6274 }
6275
6276 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6277 {
6278         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6279         int ret;
6280
6281         init_emulate_ctxt(vcpu);
6282
6283         ctxt->op_bytes = 2;
6284         ctxt->ad_bytes = 2;
6285         ctxt->_eip = ctxt->eip + inc_eip;
6286         ret = emulate_int_real(ctxt, irq);
6287
6288         if (ret != X86EMUL_CONTINUE)
6289                 return EMULATE_FAIL;
6290
6291         ctxt->eip = ctxt->_eip;
6292         kvm_rip_write(vcpu, ctxt->eip);
6293         kvm_set_rflags(vcpu, ctxt->eflags);
6294
6295         return EMULATE_DONE;
6296 }
6297 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6298
6299 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6300 {
6301         ++vcpu->stat.insn_emulation_fail;
6302         trace_kvm_emulate_insn_failed(vcpu);
6303
6304         if (emulation_type & EMULTYPE_VMWARE_GP) {
6305                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6306                 return EMULATE_DONE;
6307         }
6308
6309         kvm_queue_exception(vcpu, UD_VECTOR);
6310
6311         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6312                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6313                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6314                 vcpu->run->internal.ndata = 0;
6315                 return EMULATE_USER_EXIT;
6316         }
6317
6318         return EMULATE_DONE;
6319 }
6320
6321 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6322                                   bool write_fault_to_shadow_pgtable,
6323                                   int emulation_type)
6324 {
6325         gpa_t gpa = cr2;
6326         kvm_pfn_t pfn;
6327
6328         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6329                 return false;
6330
6331         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6332                 return false;
6333
6334         if (!vcpu->arch.mmu->direct_map) {
6335                 /*
6336                  * Write permission should be allowed since only
6337                  * write access need to be emulated.
6338                  */
6339                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6340
6341                 /*
6342                  * If the mapping is invalid in guest, let cpu retry
6343                  * it to generate fault.
6344                  */
6345                 if (gpa == UNMAPPED_GVA)
6346                         return true;
6347         }
6348
6349         /*
6350          * Do not retry the unhandleable instruction if it faults on the
6351          * readonly host memory, otherwise it will goto a infinite loop:
6352          * retry instruction -> write #PF -> emulation fail -> retry
6353          * instruction -> ...
6354          */
6355         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6356
6357         /*
6358          * If the instruction failed on the error pfn, it can not be fixed,
6359          * report the error to userspace.
6360          */
6361         if (is_error_noslot_pfn(pfn))
6362                 return false;
6363
6364         kvm_release_pfn_clean(pfn);
6365
6366         /* The instructions are well-emulated on direct mmu. */
6367         if (vcpu->arch.mmu->direct_map) {
6368                 unsigned int indirect_shadow_pages;
6369
6370                 spin_lock(&vcpu->kvm->mmu_lock);
6371                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6372                 spin_unlock(&vcpu->kvm->mmu_lock);
6373
6374                 if (indirect_shadow_pages)
6375                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6376
6377                 return true;
6378         }
6379
6380         /*
6381          * if emulation was due to access to shadowed page table
6382          * and it failed try to unshadow page and re-enter the
6383          * guest to let CPU execute the instruction.
6384          */
6385         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6386
6387         /*
6388          * If the access faults on its page table, it can not
6389          * be fixed by unprotecting shadow page and it should
6390          * be reported to userspace.
6391          */
6392         return !write_fault_to_shadow_pgtable;
6393 }
6394
6395 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6396                               unsigned long cr2,  int emulation_type)
6397 {
6398         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6399         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6400
6401         last_retry_eip = vcpu->arch.last_retry_eip;
6402         last_retry_addr = vcpu->arch.last_retry_addr;
6403
6404         /*
6405          * If the emulation is caused by #PF and it is non-page_table
6406          * writing instruction, it means the VM-EXIT is caused by shadow
6407          * page protected, we can zap the shadow page and retry this
6408          * instruction directly.
6409          *
6410          * Note: if the guest uses a non-page-table modifying instruction
6411          * on the PDE that points to the instruction, then we will unmap
6412          * the instruction and go to an infinite loop. So, we cache the
6413          * last retried eip and the last fault address, if we meet the eip
6414          * and the address again, we can break out of the potential infinite
6415          * loop.
6416          */
6417         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6418
6419         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6420                 return false;
6421
6422         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6423                 return false;
6424
6425         if (x86_page_table_writing_insn(ctxt))
6426                 return false;
6427
6428         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6429                 return false;
6430
6431         vcpu->arch.last_retry_eip = ctxt->eip;
6432         vcpu->arch.last_retry_addr = cr2;
6433
6434         if (!vcpu->arch.mmu->direct_map)
6435                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6436
6437         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6438
6439         return true;
6440 }
6441
6442 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6443 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6444
6445 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6446 {
6447         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6448                 /* This is a good place to trace that we are exiting SMM.  */
6449                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6450
6451                 /* Process a latched INIT or SMI, if any.  */
6452                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6453         }
6454
6455         kvm_mmu_reset_context(vcpu);
6456 }
6457
6458 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6459                                 unsigned long *db)
6460 {
6461         u32 dr6 = 0;
6462         int i;
6463         u32 enable, rwlen;
6464
6465         enable = dr7;
6466         rwlen = dr7 >> 16;
6467         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6468                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6469                         dr6 |= (1 << i);
6470         return dr6;
6471 }
6472
6473 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6474 {
6475         struct kvm_run *kvm_run = vcpu->run;
6476
6477         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6478                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6479                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6480                 kvm_run->debug.arch.exception = DB_VECTOR;
6481                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6482                 return EMULATE_USER_EXIT;
6483         }
6484         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6485         return EMULATE_DONE;
6486 }
6487
6488 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6489 {
6490         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6491         int r;
6492
6493         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6494         if (unlikely(r != EMULATE_DONE))
6495                 return 0;
6496
6497         /*
6498          * rflags is the old, "raw" value of the flags.  The new value has
6499          * not been saved yet.
6500          *
6501          * This is correct even for TF set by the guest, because "the
6502          * processor will not generate this exception after the instruction
6503          * that sets the TF flag".
6504          */
6505         if (unlikely(rflags & X86_EFLAGS_TF))
6506                 r = kvm_vcpu_do_singlestep(vcpu);
6507         return r == EMULATE_DONE;
6508 }
6509 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6510
6511 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6512 {
6513         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6514             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6515                 struct kvm_run *kvm_run = vcpu->run;
6516                 unsigned long eip = kvm_get_linear_rip(vcpu);
6517                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6518                                            vcpu->arch.guest_debug_dr7,
6519                                            vcpu->arch.eff_db);
6520
6521                 if (dr6 != 0) {
6522                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6523                         kvm_run->debug.arch.pc = eip;
6524                         kvm_run->debug.arch.exception = DB_VECTOR;
6525                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6526                         *r = EMULATE_USER_EXIT;
6527                         return true;
6528                 }
6529         }
6530
6531         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6532             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6533                 unsigned long eip = kvm_get_linear_rip(vcpu);
6534                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6535                                            vcpu->arch.dr7,
6536                                            vcpu->arch.db);
6537
6538                 if (dr6 != 0) {
6539                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6540                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6541                         kvm_queue_exception(vcpu, DB_VECTOR);
6542                         *r = EMULATE_DONE;
6543                         return true;
6544                 }
6545         }
6546
6547         return false;
6548 }
6549
6550 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6551 {
6552         switch (ctxt->opcode_len) {
6553         case 1:
6554                 switch (ctxt->b) {
6555                 case 0xe4:      /* IN */
6556                 case 0xe5:
6557                 case 0xec:
6558                 case 0xed:
6559                 case 0xe6:      /* OUT */
6560                 case 0xe7:
6561                 case 0xee:
6562                 case 0xef:
6563                 case 0x6c:      /* INS */
6564                 case 0x6d:
6565                 case 0x6e:      /* OUTS */
6566                 case 0x6f:
6567                         return true;
6568                 }
6569                 break;
6570         case 2:
6571                 switch (ctxt->b) {
6572                 case 0x33:      /* RDPMC */
6573                         return true;
6574                 }
6575                 break;
6576         }
6577
6578         return false;
6579 }
6580
6581 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6582                             unsigned long cr2,
6583                             int emulation_type,
6584                             void *insn,
6585                             int insn_len)
6586 {
6587         int r;
6588         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6589         bool writeback = true;
6590         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6591
6592         vcpu->arch.l1tf_flush_l1d = true;
6593
6594         /*
6595          * Clear write_fault_to_shadow_pgtable here to ensure it is
6596          * never reused.
6597          */
6598         vcpu->arch.write_fault_to_shadow_pgtable = false;
6599         kvm_clear_exception_queue(vcpu);
6600
6601         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6602                 init_emulate_ctxt(vcpu);
6603
6604                 /*
6605                  * We will reenter on the same instruction since
6606                  * we do not set complete_userspace_io.  This does not
6607                  * handle watchpoints yet, those would be handled in
6608                  * the emulate_ops.
6609                  */
6610                 if (!(emulation_type & EMULTYPE_SKIP) &&
6611                     kvm_vcpu_check_breakpoint(vcpu, &r))
6612                         return r;
6613
6614                 ctxt->interruptibility = 0;
6615                 ctxt->have_exception = false;
6616                 ctxt->exception.vector = -1;
6617                 ctxt->perm_ok = false;
6618
6619                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6620
6621                 r = x86_decode_insn(ctxt, insn, insn_len);
6622
6623                 trace_kvm_emulate_insn_start(vcpu);
6624                 ++vcpu->stat.insn_emulation;
6625                 if (r != EMULATION_OK)  {
6626                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6627                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6628                                 kvm_queue_exception(vcpu, UD_VECTOR);
6629                                 return EMULATE_DONE;
6630                         }
6631                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6632                                                 emulation_type))
6633                                 return EMULATE_DONE;
6634                         if (ctxt->have_exception) {
6635                                 /*
6636                                  * #UD should result in just EMULATION_FAILED, and trap-like
6637                                  * exception should not be encountered during decode.
6638                                  */
6639                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6640                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6641                                 inject_emulated_exception(vcpu);
6642                                 return EMULATE_DONE;
6643                         }
6644                         if (emulation_type & EMULTYPE_SKIP)
6645                                 return EMULATE_FAIL;
6646                         return handle_emulation_failure(vcpu, emulation_type);
6647                 }
6648         }
6649
6650         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6651             !is_vmware_backdoor_opcode(ctxt)) {
6652                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6653                 return EMULATE_DONE;
6654         }
6655
6656         if (emulation_type & EMULTYPE_SKIP) {
6657                 kvm_rip_write(vcpu, ctxt->_eip);
6658                 if (ctxt->eflags & X86_EFLAGS_RF)
6659                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6660                 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
6661                 return EMULATE_DONE;
6662         }
6663
6664         if (retry_instruction(ctxt, cr2, emulation_type))
6665                 return EMULATE_DONE;
6666
6667         /* this is needed for vmware backdoor interface to work since it
6668            changes registers values  during IO operation */
6669         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6670                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6671                 emulator_invalidate_register_cache(ctxt);
6672         }
6673
6674 restart:
6675         /* Save the faulting GPA (cr2) in the address field */
6676         ctxt->exception.address = cr2;
6677
6678         r = x86_emulate_insn(ctxt);
6679
6680         if (r == EMULATION_INTERCEPTED)
6681                 return EMULATE_DONE;
6682
6683         if (r == EMULATION_FAILED) {
6684                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6685                                         emulation_type))
6686                         return EMULATE_DONE;
6687
6688                 return handle_emulation_failure(vcpu, emulation_type);
6689         }
6690
6691         if (ctxt->have_exception) {
6692                 r = EMULATE_DONE;
6693                 if (inject_emulated_exception(vcpu))
6694                         return r;
6695         } else if (vcpu->arch.pio.count) {
6696                 if (!vcpu->arch.pio.in) {
6697                         /* FIXME: return into emulator if single-stepping.  */
6698                         vcpu->arch.pio.count = 0;
6699                 } else {
6700                         writeback = false;
6701                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6702                 }
6703                 r = EMULATE_USER_EXIT;
6704         } else if (vcpu->mmio_needed) {
6705                 ++vcpu->stat.mmio_exits;
6706
6707                 if (!vcpu->mmio_is_write)
6708                         writeback = false;
6709                 r = EMULATE_USER_EXIT;
6710                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6711         } else if (r == EMULATION_RESTART)
6712                 goto restart;
6713         else
6714                 r = EMULATE_DONE;
6715
6716         if (writeback) {
6717                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6718                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6719                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6720                 if (!ctxt->have_exception ||
6721                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6722                         kvm_rip_write(vcpu, ctxt->eip);
6723                         if (r == EMULATE_DONE && ctxt->tf)
6724                                 r = kvm_vcpu_do_singlestep(vcpu);
6725                         __kvm_set_rflags(vcpu, ctxt->eflags);
6726                 }
6727
6728                 /*
6729                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6730                  * do nothing, and it will be requested again as soon as
6731                  * the shadow expires.  But we still need to check here,
6732                  * because POPF has no interrupt shadow.
6733                  */
6734                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6735                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6736         } else
6737                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6738
6739         return r;
6740 }
6741
6742 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6743 {
6744         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6745 }
6746 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6747
6748 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6749                                         void *insn, int insn_len)
6750 {
6751         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6752 }
6753 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6754
6755 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6756 {
6757         vcpu->arch.pio.count = 0;
6758         return 1;
6759 }
6760
6761 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6762 {
6763         vcpu->arch.pio.count = 0;
6764
6765         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6766                 return 1;
6767
6768         return kvm_skip_emulated_instruction(vcpu);
6769 }
6770
6771 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6772                             unsigned short port)
6773 {
6774         unsigned long val = kvm_rax_read(vcpu);
6775         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6776                                             size, port, &val, 1);
6777         if (ret)
6778                 return ret;
6779
6780         /*
6781          * Workaround userspace that relies on old KVM behavior of %rip being
6782          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6783          */
6784         if (port == 0x7e &&
6785             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6786                 vcpu->arch.complete_userspace_io =
6787                         complete_fast_pio_out_port_0x7e;
6788                 kvm_skip_emulated_instruction(vcpu);
6789         } else {
6790                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6791                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6792         }
6793         return 0;
6794 }
6795
6796 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6797 {
6798         unsigned long val;
6799
6800         /* We should only ever be called with arch.pio.count equal to 1 */
6801         BUG_ON(vcpu->arch.pio.count != 1);
6802
6803         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6804                 vcpu->arch.pio.count = 0;
6805                 return 1;
6806         }
6807
6808         /* For size less than 4 we merge, else we zero extend */
6809         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6810
6811         /*
6812          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6813          * the copy and tracing
6814          */
6815         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6816                                  vcpu->arch.pio.port, &val, 1);
6817         kvm_rax_write(vcpu, val);
6818
6819         return kvm_skip_emulated_instruction(vcpu);
6820 }
6821
6822 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6823                            unsigned short port)
6824 {
6825         unsigned long val;
6826         int ret;
6827
6828         /* For size less than 4 we merge, else we zero extend */
6829         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6830
6831         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6832                                        &val, 1);
6833         if (ret) {
6834                 kvm_rax_write(vcpu, val);
6835                 return ret;
6836         }
6837
6838         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6839         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6840
6841         return 0;
6842 }
6843
6844 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6845 {
6846         int ret;
6847
6848         if (in)
6849                 ret = kvm_fast_pio_in(vcpu, size, port);
6850         else
6851                 ret = kvm_fast_pio_out(vcpu, size, port);
6852         return ret && kvm_skip_emulated_instruction(vcpu);
6853 }
6854 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6855
6856 static int kvmclock_cpu_down_prep(unsigned int cpu)
6857 {
6858         __this_cpu_write(cpu_tsc_khz, 0);
6859         return 0;
6860 }
6861
6862 static void tsc_khz_changed(void *data)
6863 {
6864         struct cpufreq_freqs *freq = data;
6865         unsigned long khz = 0;
6866
6867         if (data)
6868                 khz = freq->new;
6869         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6870                 khz = cpufreq_quick_get(raw_smp_processor_id());
6871         if (!khz)
6872                 khz = tsc_khz;
6873         __this_cpu_write(cpu_tsc_khz, khz);
6874 }
6875
6876 #ifdef CONFIG_X86_64
6877 static void kvm_hyperv_tsc_notifier(void)
6878 {
6879         struct kvm *kvm;
6880         struct kvm_vcpu *vcpu;
6881         int cpu;
6882
6883         mutex_lock(&kvm_lock);
6884         list_for_each_entry(kvm, &vm_list, vm_list)
6885                 kvm_make_mclock_inprogress_request(kvm);
6886
6887         hyperv_stop_tsc_emulation();
6888
6889         /* TSC frequency always matches when on Hyper-V */
6890         for_each_present_cpu(cpu)
6891                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6892         kvm_max_guest_tsc_khz = tsc_khz;
6893
6894         list_for_each_entry(kvm, &vm_list, vm_list) {
6895                 struct kvm_arch *ka = &kvm->arch;
6896
6897                 spin_lock(&ka->pvclock_gtod_sync_lock);
6898
6899                 pvclock_update_vm_gtod_copy(kvm);
6900
6901                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6902                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6903
6904                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6905                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6906
6907                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6908         }
6909         mutex_unlock(&kvm_lock);
6910 }
6911 #endif
6912
6913 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6914 {
6915         struct kvm *kvm;
6916         struct kvm_vcpu *vcpu;
6917         int i, send_ipi = 0;
6918
6919         /*
6920          * We allow guests to temporarily run on slowing clocks,
6921          * provided we notify them after, or to run on accelerating
6922          * clocks, provided we notify them before.  Thus time never
6923          * goes backwards.
6924          *
6925          * However, we have a problem.  We can't atomically update
6926          * the frequency of a given CPU from this function; it is
6927          * merely a notifier, which can be called from any CPU.
6928          * Changing the TSC frequency at arbitrary points in time
6929          * requires a recomputation of local variables related to
6930          * the TSC for each VCPU.  We must flag these local variables
6931          * to be updated and be sure the update takes place with the
6932          * new frequency before any guests proceed.
6933          *
6934          * Unfortunately, the combination of hotplug CPU and frequency
6935          * change creates an intractable locking scenario; the order
6936          * of when these callouts happen is undefined with respect to
6937          * CPU hotplug, and they can race with each other.  As such,
6938          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6939          * undefined; you can actually have a CPU frequency change take
6940          * place in between the computation of X and the setting of the
6941          * variable.  To protect against this problem, all updates of
6942          * the per_cpu tsc_khz variable are done in an interrupt
6943          * protected IPI, and all callers wishing to update the value
6944          * must wait for a synchronous IPI to complete (which is trivial
6945          * if the caller is on the CPU already).  This establishes the
6946          * necessary total order on variable updates.
6947          *
6948          * Note that because a guest time update may take place
6949          * anytime after the setting of the VCPU's request bit, the
6950          * correct TSC value must be set before the request.  However,
6951          * to ensure the update actually makes it to any guest which
6952          * starts running in hardware virtualization between the set
6953          * and the acquisition of the spinlock, we must also ping the
6954          * CPU after setting the request bit.
6955          *
6956          */
6957
6958         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6959
6960         mutex_lock(&kvm_lock);
6961         list_for_each_entry(kvm, &vm_list, vm_list) {
6962                 kvm_for_each_vcpu(i, vcpu, kvm) {
6963                         if (vcpu->cpu != cpu)
6964                                 continue;
6965                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6966                         if (vcpu->cpu != raw_smp_processor_id())
6967                                 send_ipi = 1;
6968                 }
6969         }
6970         mutex_unlock(&kvm_lock);
6971
6972         if (freq->old < freq->new && send_ipi) {
6973                 /*
6974                  * We upscale the frequency.  Must make the guest
6975                  * doesn't see old kvmclock values while running with
6976                  * the new frequency, otherwise we risk the guest sees
6977                  * time go backwards.
6978                  *
6979                  * In case we update the frequency for another cpu
6980                  * (which might be in guest context) send an interrupt
6981                  * to kick the cpu out of guest context.  Next time
6982                  * guest context is entered kvmclock will be updated,
6983                  * so the guest will not see stale values.
6984                  */
6985                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6986         }
6987 }
6988
6989 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6990                                      void *data)
6991 {
6992         struct cpufreq_freqs *freq = data;
6993         int cpu;
6994
6995         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6996                 return 0;
6997         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6998                 return 0;
6999
7000         for_each_cpu(cpu, freq->policy->cpus)
7001                 __kvmclock_cpufreq_notifier(freq, cpu);
7002
7003         return 0;
7004 }
7005
7006 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7007         .notifier_call  = kvmclock_cpufreq_notifier
7008 };
7009
7010 static int kvmclock_cpu_online(unsigned int cpu)
7011 {
7012         tsc_khz_changed(NULL);
7013         return 0;
7014 }
7015
7016 static void kvm_timer_init(void)
7017 {
7018         max_tsc_khz = tsc_khz;
7019
7020         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7021 #ifdef CONFIG_CPU_FREQ
7022                 struct cpufreq_policy policy;
7023                 int cpu;
7024
7025                 memset(&policy, 0, sizeof(policy));
7026                 cpu = get_cpu();
7027                 cpufreq_get_policy(&policy, cpu);
7028                 if (policy.cpuinfo.max_freq)
7029                         max_tsc_khz = policy.cpuinfo.max_freq;
7030                 put_cpu();
7031 #endif
7032                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7033                                           CPUFREQ_TRANSITION_NOTIFIER);
7034         }
7035
7036         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7037                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7038 }
7039
7040 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7041 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7042
7043 int kvm_is_in_guest(void)
7044 {
7045         return __this_cpu_read(current_vcpu) != NULL;
7046 }
7047
7048 static int kvm_is_user_mode(void)
7049 {
7050         int user_mode = 3;
7051
7052         if (__this_cpu_read(current_vcpu))
7053                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7054
7055         return user_mode != 0;
7056 }
7057
7058 static unsigned long kvm_get_guest_ip(void)
7059 {
7060         unsigned long ip = 0;
7061
7062         if (__this_cpu_read(current_vcpu))
7063                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7064
7065         return ip;
7066 }
7067
7068 static void kvm_handle_intel_pt_intr(void)
7069 {
7070         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7071
7072         kvm_make_request(KVM_REQ_PMI, vcpu);
7073         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7074                         (unsigned long *)&vcpu->arch.pmu.global_status);
7075 }
7076
7077 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7078         .is_in_guest            = kvm_is_in_guest,
7079         .is_user_mode           = kvm_is_user_mode,
7080         .get_guest_ip           = kvm_get_guest_ip,
7081         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7082 };
7083
7084 #ifdef CONFIG_X86_64
7085 static void pvclock_gtod_update_fn(struct work_struct *work)
7086 {
7087         struct kvm *kvm;
7088
7089         struct kvm_vcpu *vcpu;
7090         int i;
7091
7092         mutex_lock(&kvm_lock);
7093         list_for_each_entry(kvm, &vm_list, vm_list)
7094                 kvm_for_each_vcpu(i, vcpu, kvm)
7095                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7096         atomic_set(&kvm_guest_has_master_clock, 0);
7097         mutex_unlock(&kvm_lock);
7098 }
7099
7100 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7101
7102 /*
7103  * Notification about pvclock gtod data update.
7104  */
7105 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7106                                void *priv)
7107 {
7108         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7109         struct timekeeper *tk = priv;
7110
7111         update_pvclock_gtod(tk);
7112
7113         /* disable master clock if host does not trust, or does not
7114          * use, TSC based clocksource.
7115          */
7116         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7117             atomic_read(&kvm_guest_has_master_clock) != 0)
7118                 queue_work(system_long_wq, &pvclock_gtod_work);
7119
7120         return 0;
7121 }
7122
7123 static struct notifier_block pvclock_gtod_notifier = {
7124         .notifier_call = pvclock_gtod_notify,
7125 };
7126 #endif
7127
7128 int kvm_arch_init(void *opaque)
7129 {
7130         int r;
7131         struct kvm_x86_ops *ops = opaque;
7132
7133         if (kvm_x86_ops) {
7134                 printk(KERN_ERR "kvm: already loaded the other module\n");
7135                 r = -EEXIST;
7136                 goto out;
7137         }
7138
7139         if (!ops->cpu_has_kvm_support()) {
7140                 printk(KERN_ERR "kvm: no hardware support\n");
7141                 r = -EOPNOTSUPP;
7142                 goto out;
7143         }
7144         if (ops->disabled_by_bios()) {
7145                 printk(KERN_ERR "kvm: disabled by bios\n");
7146                 r = -EOPNOTSUPP;
7147                 goto out;
7148         }
7149
7150         /*
7151          * KVM explicitly assumes that the guest has an FPU and
7152          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7153          * vCPU's FPU state as a fxregs_state struct.
7154          */
7155         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7156                 printk(KERN_ERR "kvm: inadequate fpu\n");
7157                 r = -EOPNOTSUPP;
7158                 goto out;
7159         }
7160
7161         r = -ENOMEM;
7162         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7163                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7164                                           NULL);
7165         if (!x86_fpu_cache) {
7166                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7167                 goto out;
7168         }
7169
7170         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7171         if (!shared_msrs) {
7172                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7173                 goto out_free_x86_fpu_cache;
7174         }
7175
7176         r = kvm_mmu_module_init();
7177         if (r)
7178                 goto out_free_percpu;
7179
7180         kvm_x86_ops = ops;
7181
7182         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7183                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7184                         PT_PRESENT_MASK, 0, sme_me_mask);
7185         kvm_timer_init();
7186
7187         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7188
7189         if (boot_cpu_has(X86_FEATURE_XSAVE))
7190                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7191
7192         kvm_lapic_init();
7193         if (pi_inject_timer == -1)
7194                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7195 #ifdef CONFIG_X86_64
7196         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7197
7198         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7199                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7200 #endif
7201
7202         return 0;
7203
7204 out_free_percpu:
7205         free_percpu(shared_msrs);
7206 out_free_x86_fpu_cache:
7207         kmem_cache_destroy(x86_fpu_cache);
7208 out:
7209         return r;
7210 }
7211
7212 void kvm_arch_exit(void)
7213 {
7214 #ifdef CONFIG_X86_64
7215         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7216                 clear_hv_tscchange_cb();
7217 #endif
7218         kvm_lapic_exit();
7219         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7220
7221         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7222                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7223                                             CPUFREQ_TRANSITION_NOTIFIER);
7224         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7225 #ifdef CONFIG_X86_64
7226         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7227 #endif
7228         kvm_x86_ops = NULL;
7229         kvm_mmu_module_exit();
7230         free_percpu(shared_msrs);
7231         kmem_cache_destroy(x86_fpu_cache);
7232 }
7233
7234 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7235 {
7236         ++vcpu->stat.halt_exits;
7237         if (lapic_in_kernel(vcpu)) {
7238                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7239                 return 1;
7240         } else {
7241                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7242                 return 0;
7243         }
7244 }
7245 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7246
7247 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7248 {
7249         int ret = kvm_skip_emulated_instruction(vcpu);
7250         /*
7251          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7252          * KVM_EXIT_DEBUG here.
7253          */
7254         return kvm_vcpu_halt(vcpu) && ret;
7255 }
7256 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7257
7258 #ifdef CONFIG_X86_64
7259 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7260                                 unsigned long clock_type)
7261 {
7262         struct kvm_clock_pairing clock_pairing;
7263         struct timespec64 ts;
7264         u64 cycle;
7265         int ret;
7266
7267         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7268                 return -KVM_EOPNOTSUPP;
7269
7270         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7271                 return -KVM_EOPNOTSUPP;
7272
7273         clock_pairing.sec = ts.tv_sec;
7274         clock_pairing.nsec = ts.tv_nsec;
7275         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7276         clock_pairing.flags = 0;
7277         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7278
7279         ret = 0;
7280         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7281                             sizeof(struct kvm_clock_pairing)))
7282                 ret = -KVM_EFAULT;
7283
7284         return ret;
7285 }
7286 #endif
7287
7288 /*
7289  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7290  *
7291  * @apicid - apicid of vcpu to be kicked.
7292  */
7293 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7294 {
7295         struct kvm_lapic_irq lapic_irq;
7296
7297         lapic_irq.shorthand = 0;
7298         lapic_irq.dest_mode = 0;
7299         lapic_irq.level = 0;
7300         lapic_irq.dest_id = apicid;
7301         lapic_irq.msi_redir_hint = false;
7302
7303         lapic_irq.delivery_mode = APIC_DM_REMRD;
7304         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7305 }
7306
7307 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7308 {
7309         if (!lapic_in_kernel(vcpu)) {
7310                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7311                 return;
7312         }
7313         if (!vcpu->arch.apicv_active)
7314                 return;
7315
7316         vcpu->arch.apicv_active = false;
7317         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7318 }
7319
7320 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7321 {
7322         struct kvm_vcpu *target = NULL;
7323         struct kvm_apic_map *map;
7324
7325         rcu_read_lock();
7326         map = rcu_dereference(kvm->arch.apic_map);
7327
7328         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7329                 target = map->phys_map[dest_id]->vcpu;
7330
7331         rcu_read_unlock();
7332
7333         if (target && READ_ONCE(target->ready))
7334                 kvm_vcpu_yield_to(target);
7335 }
7336
7337 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7338 {
7339         unsigned long nr, a0, a1, a2, a3, ret;
7340         int op_64_bit;
7341
7342         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7343                 return kvm_hv_hypercall(vcpu);
7344
7345         nr = kvm_rax_read(vcpu);
7346         a0 = kvm_rbx_read(vcpu);
7347         a1 = kvm_rcx_read(vcpu);
7348         a2 = kvm_rdx_read(vcpu);
7349         a3 = kvm_rsi_read(vcpu);
7350
7351         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7352
7353         op_64_bit = is_64_bit_mode(vcpu);
7354         if (!op_64_bit) {
7355                 nr &= 0xFFFFFFFF;
7356                 a0 &= 0xFFFFFFFF;
7357                 a1 &= 0xFFFFFFFF;
7358                 a2 &= 0xFFFFFFFF;
7359                 a3 &= 0xFFFFFFFF;
7360         }
7361
7362         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7363                 ret = -KVM_EPERM;
7364                 goto out;
7365         }
7366
7367         switch (nr) {
7368         case KVM_HC_VAPIC_POLL_IRQ:
7369                 ret = 0;
7370                 break;
7371         case KVM_HC_KICK_CPU:
7372                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7373                 kvm_sched_yield(vcpu->kvm, a1);
7374                 ret = 0;
7375                 break;
7376 #ifdef CONFIG_X86_64
7377         case KVM_HC_CLOCK_PAIRING:
7378                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7379                 break;
7380 #endif
7381         case KVM_HC_SEND_IPI:
7382                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7383                 break;
7384         case KVM_HC_SCHED_YIELD:
7385                 kvm_sched_yield(vcpu->kvm, a0);
7386                 ret = 0;
7387                 break;
7388         default:
7389                 ret = -KVM_ENOSYS;
7390                 break;
7391         }
7392 out:
7393         if (!op_64_bit)
7394                 ret = (u32)ret;
7395         kvm_rax_write(vcpu, ret);
7396
7397         ++vcpu->stat.hypercalls;
7398         return kvm_skip_emulated_instruction(vcpu);
7399 }
7400 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7401
7402 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7403 {
7404         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7405         char instruction[3];
7406         unsigned long rip = kvm_rip_read(vcpu);
7407
7408         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7409
7410         return emulator_write_emulated(ctxt, rip, instruction, 3,
7411                 &ctxt->exception);
7412 }
7413
7414 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7415 {
7416         return vcpu->run->request_interrupt_window &&
7417                 likely(!pic_in_kernel(vcpu->kvm));
7418 }
7419
7420 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7421 {
7422         struct kvm_run *kvm_run = vcpu->run;
7423
7424         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7425         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7426         kvm_run->cr8 = kvm_get_cr8(vcpu);
7427         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7428         kvm_run->ready_for_interrupt_injection =
7429                 pic_in_kernel(vcpu->kvm) ||
7430                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7431 }
7432
7433 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7434 {
7435         int max_irr, tpr;
7436
7437         if (!kvm_x86_ops->update_cr8_intercept)
7438                 return;
7439
7440         if (!lapic_in_kernel(vcpu))
7441                 return;
7442
7443         if (vcpu->arch.apicv_active)
7444                 return;
7445
7446         if (!vcpu->arch.apic->vapic_addr)
7447                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7448         else
7449                 max_irr = -1;
7450
7451         if (max_irr != -1)
7452                 max_irr >>= 4;
7453
7454         tpr = kvm_lapic_get_cr8(vcpu);
7455
7456         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7457 }
7458
7459 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7460 {
7461         int r;
7462
7463         /* try to reinject previous events if any */
7464
7465         if (vcpu->arch.exception.injected)
7466                 kvm_x86_ops->queue_exception(vcpu);
7467         /*
7468          * Do not inject an NMI or interrupt if there is a pending
7469          * exception.  Exceptions and interrupts are recognized at
7470          * instruction boundaries, i.e. the start of an instruction.
7471          * Trap-like exceptions, e.g. #DB, have higher priority than
7472          * NMIs and interrupts, i.e. traps are recognized before an
7473          * NMI/interrupt that's pending on the same instruction.
7474          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7475          * priority, but are only generated (pended) during instruction
7476          * execution, i.e. a pending fault-like exception means the
7477          * fault occurred on the *previous* instruction and must be
7478          * serviced prior to recognizing any new events in order to
7479          * fully complete the previous instruction.
7480          */
7481         else if (!vcpu->arch.exception.pending) {
7482                 if (vcpu->arch.nmi_injected)
7483                         kvm_x86_ops->set_nmi(vcpu);
7484                 else if (vcpu->arch.interrupt.injected)
7485                         kvm_x86_ops->set_irq(vcpu);
7486         }
7487
7488         /*
7489          * Call check_nested_events() even if we reinjected a previous event
7490          * in order for caller to determine if it should require immediate-exit
7491          * from L2 to L1 due to pending L1 events which require exit
7492          * from L2 to L1.
7493          */
7494         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7495                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7496                 if (r != 0)
7497                         return r;
7498         }
7499
7500         /* try to inject new event if pending */
7501         if (vcpu->arch.exception.pending) {
7502                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7503                                         vcpu->arch.exception.has_error_code,
7504                                         vcpu->arch.exception.error_code);
7505
7506                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7507                 vcpu->arch.exception.pending = false;
7508                 vcpu->arch.exception.injected = true;
7509
7510                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7511                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7512                                              X86_EFLAGS_RF);
7513
7514                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7515                         /*
7516                          * This code assumes that nSVM doesn't use
7517                          * check_nested_events(). If it does, the
7518                          * DR6/DR7 changes should happen before L1
7519                          * gets a #VMEXIT for an intercepted #DB in
7520                          * L2.  (Under VMX, on the other hand, the
7521                          * DR6/DR7 changes should not happen in the
7522                          * event of a VM-exit to L1 for an intercepted
7523                          * #DB in L2.)
7524                          */
7525                         kvm_deliver_exception_payload(vcpu);
7526                         if (vcpu->arch.dr7 & DR7_GD) {
7527                                 vcpu->arch.dr7 &= ~DR7_GD;
7528                                 kvm_update_dr7(vcpu);
7529                         }
7530                 }
7531
7532                 kvm_x86_ops->queue_exception(vcpu);
7533         }
7534
7535         /* Don't consider new event if we re-injected an event */
7536         if (kvm_event_needs_reinjection(vcpu))
7537                 return 0;
7538
7539         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7540             kvm_x86_ops->smi_allowed(vcpu)) {
7541                 vcpu->arch.smi_pending = false;
7542                 ++vcpu->arch.smi_count;
7543                 enter_smm(vcpu);
7544         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7545                 --vcpu->arch.nmi_pending;
7546                 vcpu->arch.nmi_injected = true;
7547                 kvm_x86_ops->set_nmi(vcpu);
7548         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7549                 /*
7550                  * Because interrupts can be injected asynchronously, we are
7551                  * calling check_nested_events again here to avoid a race condition.
7552                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7553                  * proposal and current concerns.  Perhaps we should be setting
7554                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7555                  */
7556                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7557                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7558                         if (r != 0)
7559                                 return r;
7560                 }
7561                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7562                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7563                                             false);
7564                         kvm_x86_ops->set_irq(vcpu);
7565                 }
7566         }
7567
7568         return 0;
7569 }
7570
7571 static void process_nmi(struct kvm_vcpu *vcpu)
7572 {
7573         unsigned limit = 2;
7574
7575         /*
7576          * x86 is limited to one NMI running, and one NMI pending after it.
7577          * If an NMI is already in progress, limit further NMIs to just one.
7578          * Otherwise, allow two (and we'll inject the first one immediately).
7579          */
7580         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7581                 limit = 1;
7582
7583         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7584         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7585         kvm_make_request(KVM_REQ_EVENT, vcpu);
7586 }
7587
7588 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7589 {
7590         u32 flags = 0;
7591         flags |= seg->g       << 23;
7592         flags |= seg->db      << 22;
7593         flags |= seg->l       << 21;
7594         flags |= seg->avl     << 20;
7595         flags |= seg->present << 15;
7596         flags |= seg->dpl     << 13;
7597         flags |= seg->s       << 12;
7598         flags |= seg->type    << 8;
7599         return flags;
7600 }
7601
7602 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7603 {
7604         struct kvm_segment seg;
7605         int offset;
7606
7607         kvm_get_segment(vcpu, &seg, n);
7608         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7609
7610         if (n < 3)
7611                 offset = 0x7f84 + n * 12;
7612         else
7613                 offset = 0x7f2c + (n - 3) * 12;
7614
7615         put_smstate(u32, buf, offset + 8, seg.base);
7616         put_smstate(u32, buf, offset + 4, seg.limit);
7617         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7618 }
7619
7620 #ifdef CONFIG_X86_64
7621 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7622 {
7623         struct kvm_segment seg;
7624         int offset;
7625         u16 flags;
7626
7627         kvm_get_segment(vcpu, &seg, n);
7628         offset = 0x7e00 + n * 16;
7629
7630         flags = enter_smm_get_segment_flags(&seg) >> 8;
7631         put_smstate(u16, buf, offset, seg.selector);
7632         put_smstate(u16, buf, offset + 2, flags);
7633         put_smstate(u32, buf, offset + 4, seg.limit);
7634         put_smstate(u64, buf, offset + 8, seg.base);
7635 }
7636 #endif
7637
7638 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7639 {
7640         struct desc_ptr dt;
7641         struct kvm_segment seg;
7642         unsigned long val;
7643         int i;
7644
7645         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7646         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7647         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7648         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7649
7650         for (i = 0; i < 8; i++)
7651                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7652
7653         kvm_get_dr(vcpu, 6, &val);
7654         put_smstate(u32, buf, 0x7fcc, (u32)val);
7655         kvm_get_dr(vcpu, 7, &val);
7656         put_smstate(u32, buf, 0x7fc8, (u32)val);
7657
7658         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7659         put_smstate(u32, buf, 0x7fc4, seg.selector);
7660         put_smstate(u32, buf, 0x7f64, seg.base);
7661         put_smstate(u32, buf, 0x7f60, seg.limit);
7662         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7663
7664         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7665         put_smstate(u32, buf, 0x7fc0, seg.selector);
7666         put_smstate(u32, buf, 0x7f80, seg.base);
7667         put_smstate(u32, buf, 0x7f7c, seg.limit);
7668         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7669
7670         kvm_x86_ops->get_gdt(vcpu, &dt);
7671         put_smstate(u32, buf, 0x7f74, dt.address);
7672         put_smstate(u32, buf, 0x7f70, dt.size);
7673
7674         kvm_x86_ops->get_idt(vcpu, &dt);
7675         put_smstate(u32, buf, 0x7f58, dt.address);
7676         put_smstate(u32, buf, 0x7f54, dt.size);
7677
7678         for (i = 0; i < 6; i++)
7679                 enter_smm_save_seg_32(vcpu, buf, i);
7680
7681         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7682
7683         /* revision id */
7684         put_smstate(u32, buf, 0x7efc, 0x00020000);
7685         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7686 }
7687
7688 #ifdef CONFIG_X86_64
7689 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7690 {
7691         struct desc_ptr dt;
7692         struct kvm_segment seg;
7693         unsigned long val;
7694         int i;
7695
7696         for (i = 0; i < 16; i++)
7697                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7698
7699         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7700         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7701
7702         kvm_get_dr(vcpu, 6, &val);
7703         put_smstate(u64, buf, 0x7f68, val);
7704         kvm_get_dr(vcpu, 7, &val);
7705         put_smstate(u64, buf, 0x7f60, val);
7706
7707         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7708         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7709         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7710
7711         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7712
7713         /* revision id */
7714         put_smstate(u32, buf, 0x7efc, 0x00020064);
7715
7716         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7717
7718         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7719         put_smstate(u16, buf, 0x7e90, seg.selector);
7720         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7721         put_smstate(u32, buf, 0x7e94, seg.limit);
7722         put_smstate(u64, buf, 0x7e98, seg.base);
7723
7724         kvm_x86_ops->get_idt(vcpu, &dt);
7725         put_smstate(u32, buf, 0x7e84, dt.size);
7726         put_smstate(u64, buf, 0x7e88, dt.address);
7727
7728         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7729         put_smstate(u16, buf, 0x7e70, seg.selector);
7730         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7731         put_smstate(u32, buf, 0x7e74, seg.limit);
7732         put_smstate(u64, buf, 0x7e78, seg.base);
7733
7734         kvm_x86_ops->get_gdt(vcpu, &dt);
7735         put_smstate(u32, buf, 0x7e64, dt.size);
7736         put_smstate(u64, buf, 0x7e68, dt.address);
7737
7738         for (i = 0; i < 6; i++)
7739                 enter_smm_save_seg_64(vcpu, buf, i);
7740 }
7741 #endif
7742
7743 static void enter_smm(struct kvm_vcpu *vcpu)
7744 {
7745         struct kvm_segment cs, ds;
7746         struct desc_ptr dt;
7747         char buf[512];
7748         u32 cr0;
7749
7750         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7751         memset(buf, 0, 512);
7752 #ifdef CONFIG_X86_64
7753         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7754                 enter_smm_save_state_64(vcpu, buf);
7755         else
7756 #endif
7757                 enter_smm_save_state_32(vcpu, buf);
7758
7759         /*
7760          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7761          * vCPU state (e.g. leave guest mode) after we've saved the state into
7762          * the SMM state-save area.
7763          */
7764         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7765
7766         vcpu->arch.hflags |= HF_SMM_MASK;
7767         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7768
7769         if (kvm_x86_ops->get_nmi_mask(vcpu))
7770                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7771         else
7772                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7773
7774         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7775         kvm_rip_write(vcpu, 0x8000);
7776
7777         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7778         kvm_x86_ops->set_cr0(vcpu, cr0);
7779         vcpu->arch.cr0 = cr0;
7780
7781         kvm_x86_ops->set_cr4(vcpu, 0);
7782
7783         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7784         dt.address = dt.size = 0;
7785         kvm_x86_ops->set_idt(vcpu, &dt);
7786
7787         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7788
7789         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7790         cs.base = vcpu->arch.smbase;
7791
7792         ds.selector = 0;
7793         ds.base = 0;
7794
7795         cs.limit    = ds.limit = 0xffffffff;
7796         cs.type     = ds.type = 0x3;
7797         cs.dpl      = ds.dpl = 0;
7798         cs.db       = ds.db = 0;
7799         cs.s        = ds.s = 1;
7800         cs.l        = ds.l = 0;
7801         cs.g        = ds.g = 1;
7802         cs.avl      = ds.avl = 0;
7803         cs.present  = ds.present = 1;
7804         cs.unusable = ds.unusable = 0;
7805         cs.padding  = ds.padding = 0;
7806
7807         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7808         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7809         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7810         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7811         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7812         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7813
7814 #ifdef CONFIG_X86_64
7815         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7816                 kvm_x86_ops->set_efer(vcpu, 0);
7817 #endif
7818
7819         kvm_update_cpuid(vcpu);
7820         kvm_mmu_reset_context(vcpu);
7821 }
7822
7823 static void process_smi(struct kvm_vcpu *vcpu)
7824 {
7825         vcpu->arch.smi_pending = true;
7826         kvm_make_request(KVM_REQ_EVENT, vcpu);
7827 }
7828
7829 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7830 {
7831         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7832 }
7833
7834 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7835 {
7836         if (!kvm_apic_present(vcpu))
7837                 return;
7838
7839         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7840
7841         if (irqchip_split(vcpu->kvm))
7842                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7843         else {
7844                 if (vcpu->arch.apicv_active)
7845                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7846                 if (ioapic_in_kernel(vcpu->kvm))
7847                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7848         }
7849
7850         if (is_guest_mode(vcpu))
7851                 vcpu->arch.load_eoi_exitmap_pending = true;
7852         else
7853                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7854 }
7855
7856 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7857 {
7858         u64 eoi_exit_bitmap[4];
7859
7860         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7861                 return;
7862
7863         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7864                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7865         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7866 }
7867
7868 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7869                 unsigned long start, unsigned long end,
7870                 bool blockable)
7871 {
7872         unsigned long apic_address;
7873
7874         /*
7875          * The physical address of apic access page is stored in the VMCS.
7876          * Update it when it becomes invalid.
7877          */
7878         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7879         if (start <= apic_address && apic_address < end)
7880                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7881
7882         return 0;
7883 }
7884
7885 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7886 {
7887         struct page *page = NULL;
7888
7889         if (!lapic_in_kernel(vcpu))
7890                 return;
7891
7892         if (!kvm_x86_ops->set_apic_access_page_addr)
7893                 return;
7894
7895         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7896         if (is_error_page(page))
7897                 return;
7898         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7899
7900         /*
7901          * Do not pin apic access page in memory, the MMU notifier
7902          * will call us again if it is migrated or swapped out.
7903          */
7904         put_page(page);
7905 }
7906 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7907
7908 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7909 {
7910         smp_send_reschedule(vcpu->cpu);
7911 }
7912 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7913
7914 /*
7915  * Returns 1 to let vcpu_run() continue the guest execution loop without
7916  * exiting to the userspace.  Otherwise, the value will be returned to the
7917  * userspace.
7918  */
7919 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7920 {
7921         int r;
7922         bool req_int_win =
7923                 dm_request_for_irq_injection(vcpu) &&
7924                 kvm_cpu_accept_dm_intr(vcpu);
7925
7926         bool req_immediate_exit = false;
7927
7928         if (kvm_request_pending(vcpu)) {
7929                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7930                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7931                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7932                         kvm_mmu_unload(vcpu);
7933                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7934                         __kvm_migrate_timers(vcpu);
7935                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7936                         kvm_gen_update_masterclock(vcpu->kvm);
7937                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7938                         kvm_gen_kvmclock_update(vcpu);
7939                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7940                         r = kvm_guest_time_update(vcpu);
7941                         if (unlikely(r))
7942                                 goto out;
7943                 }
7944                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7945                         kvm_mmu_sync_roots(vcpu);
7946                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7947                         kvm_mmu_load_cr3(vcpu);
7948                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7949                         kvm_vcpu_flush_tlb(vcpu, true);
7950                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7951                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7952                         r = 0;
7953                         goto out;
7954                 }
7955                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7956                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7957                         vcpu->mmio_needed = 0;
7958                         r = 0;
7959                         goto out;
7960                 }
7961                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7962                         /* Page is swapped out. Do synthetic halt */
7963                         vcpu->arch.apf.halted = true;
7964                         r = 1;
7965                         goto out;
7966                 }
7967                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7968                         record_steal_time(vcpu);
7969                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7970                         process_smi(vcpu);
7971                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7972                         process_nmi(vcpu);
7973                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7974                         kvm_pmu_handle_event(vcpu);
7975                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7976                         kvm_pmu_deliver_pmi(vcpu);
7977                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7978                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7979                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7980                                      vcpu->arch.ioapic_handled_vectors)) {
7981                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7982                                 vcpu->run->eoi.vector =
7983                                                 vcpu->arch.pending_ioapic_eoi;
7984                                 r = 0;
7985                                 goto out;
7986                         }
7987                 }
7988                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7989                         vcpu_scan_ioapic(vcpu);
7990                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7991                         vcpu_load_eoi_exitmap(vcpu);
7992                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7993                         kvm_vcpu_reload_apic_access_page(vcpu);
7994                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7995                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7996                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7997                         r = 0;
7998                         goto out;
7999                 }
8000                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8001                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8002                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8003                         r = 0;
8004                         goto out;
8005                 }
8006                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8007                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8008                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8009                         r = 0;
8010                         goto out;
8011                 }
8012
8013                 /*
8014                  * KVM_REQ_HV_STIMER has to be processed after
8015                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8016                  * depend on the guest clock being up-to-date
8017                  */
8018                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8019                         kvm_hv_process_stimers(vcpu);
8020         }
8021
8022         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8023                 ++vcpu->stat.req_event;
8024                 kvm_apic_accept_events(vcpu);
8025                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8026                         r = 1;
8027                         goto out;
8028                 }
8029
8030                 if (inject_pending_event(vcpu, req_int_win) != 0)
8031                         req_immediate_exit = true;
8032                 else {
8033                         /* Enable SMI/NMI/IRQ window open exits if needed.
8034                          *
8035                          * SMIs have three cases:
8036                          * 1) They can be nested, and then there is nothing to
8037                          *    do here because RSM will cause a vmexit anyway.
8038                          * 2) There is an ISA-specific reason why SMI cannot be
8039                          *    injected, and the moment when this changes can be
8040                          *    intercepted.
8041                          * 3) Or the SMI can be pending because
8042                          *    inject_pending_event has completed the injection
8043                          *    of an IRQ or NMI from the previous vmexit, and
8044                          *    then we request an immediate exit to inject the
8045                          *    SMI.
8046                          */
8047                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8048                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8049                                         req_immediate_exit = true;
8050                         if (vcpu->arch.nmi_pending)
8051                                 kvm_x86_ops->enable_nmi_window(vcpu);
8052                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8053                                 kvm_x86_ops->enable_irq_window(vcpu);
8054                         WARN_ON(vcpu->arch.exception.pending);
8055                 }
8056
8057                 if (kvm_lapic_enabled(vcpu)) {
8058                         update_cr8_intercept(vcpu);
8059                         kvm_lapic_sync_to_vapic(vcpu);
8060                 }
8061         }
8062
8063         r = kvm_mmu_reload(vcpu);
8064         if (unlikely(r)) {
8065                 goto cancel_injection;
8066         }
8067
8068         preempt_disable();
8069
8070         kvm_x86_ops->prepare_guest_switch(vcpu);
8071
8072         /*
8073          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8074          * IPI are then delayed after guest entry, which ensures that they
8075          * result in virtual interrupt delivery.
8076          */
8077         local_irq_disable();
8078         vcpu->mode = IN_GUEST_MODE;
8079
8080         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8081
8082         /*
8083          * 1) We should set ->mode before checking ->requests.  Please see
8084          * the comment in kvm_vcpu_exiting_guest_mode().
8085          *
8086          * 2) For APICv, we should set ->mode before checking PID.ON. This
8087          * pairs with the memory barrier implicit in pi_test_and_set_on
8088          * (see vmx_deliver_posted_interrupt).
8089          *
8090          * 3) This also orders the write to mode from any reads to the page
8091          * tables done while the VCPU is running.  Please see the comment
8092          * in kvm_flush_remote_tlbs.
8093          */
8094         smp_mb__after_srcu_read_unlock();
8095
8096         /*
8097          * This handles the case where a posted interrupt was
8098          * notified with kvm_vcpu_kick.
8099          */
8100         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8101                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8102
8103         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8104             || need_resched() || signal_pending(current)) {
8105                 vcpu->mode = OUTSIDE_GUEST_MODE;
8106                 smp_wmb();
8107                 local_irq_enable();
8108                 preempt_enable();
8109                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8110                 r = 1;
8111                 goto cancel_injection;
8112         }
8113
8114         if (req_immediate_exit) {
8115                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8116                 kvm_x86_ops->request_immediate_exit(vcpu);
8117         }
8118
8119         trace_kvm_entry(vcpu->vcpu_id);
8120         guest_enter_irqoff();
8121
8122         /* The preempt notifier should have taken care of the FPU already.  */
8123         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8124
8125         if (unlikely(vcpu->arch.switch_db_regs)) {
8126                 set_debugreg(0, 7);
8127                 set_debugreg(vcpu->arch.eff_db[0], 0);
8128                 set_debugreg(vcpu->arch.eff_db[1], 1);
8129                 set_debugreg(vcpu->arch.eff_db[2], 2);
8130                 set_debugreg(vcpu->arch.eff_db[3], 3);
8131                 set_debugreg(vcpu->arch.dr6, 6);
8132                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8133         }
8134
8135         kvm_x86_ops->run(vcpu);
8136
8137         /*
8138          * Do this here before restoring debug registers on the host.  And
8139          * since we do this before handling the vmexit, a DR access vmexit
8140          * can (a) read the correct value of the debug registers, (b) set
8141          * KVM_DEBUGREG_WONT_EXIT again.
8142          */
8143         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8144                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8145                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8146                 kvm_update_dr0123(vcpu);
8147                 kvm_update_dr6(vcpu);
8148                 kvm_update_dr7(vcpu);
8149                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8150         }
8151
8152         /*
8153          * If the guest has used debug registers, at least dr7
8154          * will be disabled while returning to the host.
8155          * If we don't have active breakpoints in the host, we don't
8156          * care about the messed up debug address registers. But if
8157          * we have some of them active, restore the old state.
8158          */
8159         if (hw_breakpoint_active())
8160                 hw_breakpoint_restore();
8161
8162         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8163
8164         vcpu->mode = OUTSIDE_GUEST_MODE;
8165         smp_wmb();
8166
8167         kvm_x86_ops->handle_exit_irqoff(vcpu);
8168
8169         /*
8170          * Consume any pending interrupts, including the possible source of
8171          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8172          * An instruction is required after local_irq_enable() to fully unblock
8173          * interrupts on processors that implement an interrupt shadow, the
8174          * stat.exits increment will do nicely.
8175          */
8176         kvm_before_interrupt(vcpu);
8177         local_irq_enable();
8178         ++vcpu->stat.exits;
8179         local_irq_disable();
8180         kvm_after_interrupt(vcpu);
8181
8182         guest_exit_irqoff();
8183         if (lapic_in_kernel(vcpu)) {
8184                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8185                 if (delta != S64_MIN) {
8186                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8187                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8188                 }
8189         }
8190
8191         local_irq_enable();
8192         preempt_enable();
8193
8194         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8195
8196         /*
8197          * Profile KVM exit RIPs:
8198          */
8199         if (unlikely(prof_on == KVM_PROFILING)) {
8200                 unsigned long rip = kvm_rip_read(vcpu);
8201                 profile_hit(KVM_PROFILING, (void *)rip);
8202         }
8203
8204         if (unlikely(vcpu->arch.tsc_always_catchup))
8205                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8206
8207         if (vcpu->arch.apic_attention)
8208                 kvm_lapic_sync_from_vapic(vcpu);
8209
8210         vcpu->arch.gpa_available = false;
8211         r = kvm_x86_ops->handle_exit(vcpu);
8212         return r;
8213
8214 cancel_injection:
8215         kvm_x86_ops->cancel_injection(vcpu);
8216         if (unlikely(vcpu->arch.apic_attention))
8217                 kvm_lapic_sync_from_vapic(vcpu);
8218 out:
8219         return r;
8220 }
8221
8222 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8223 {
8224         if (!kvm_arch_vcpu_runnable(vcpu) &&
8225             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8226                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8227                 kvm_vcpu_block(vcpu);
8228                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8229
8230                 if (kvm_x86_ops->post_block)
8231                         kvm_x86_ops->post_block(vcpu);
8232
8233                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8234                         return 1;
8235         }
8236
8237         kvm_apic_accept_events(vcpu);
8238         switch(vcpu->arch.mp_state) {
8239         case KVM_MP_STATE_HALTED:
8240                 vcpu->arch.pv.pv_unhalted = false;
8241                 vcpu->arch.mp_state =
8242                         KVM_MP_STATE_RUNNABLE;
8243                 /* fall through */
8244         case KVM_MP_STATE_RUNNABLE:
8245                 vcpu->arch.apf.halted = false;
8246                 break;
8247         case KVM_MP_STATE_INIT_RECEIVED:
8248                 break;
8249         default:
8250                 return -EINTR;
8251                 break;
8252         }
8253         return 1;
8254 }
8255
8256 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8257 {
8258         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8259                 kvm_x86_ops->check_nested_events(vcpu, false);
8260
8261         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8262                 !vcpu->arch.apf.halted);
8263 }
8264
8265 static int vcpu_run(struct kvm_vcpu *vcpu)
8266 {
8267         int r;
8268         struct kvm *kvm = vcpu->kvm;
8269
8270         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8271         vcpu->arch.l1tf_flush_l1d = true;
8272
8273         for (;;) {
8274                 if (kvm_vcpu_running(vcpu)) {
8275                         r = vcpu_enter_guest(vcpu);
8276                 } else {
8277                         r = vcpu_block(kvm, vcpu);
8278                 }
8279
8280                 if (r <= 0)
8281                         break;
8282
8283                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8284                 if (kvm_cpu_has_pending_timer(vcpu))
8285                         kvm_inject_pending_timer_irqs(vcpu);
8286
8287                 if (dm_request_for_irq_injection(vcpu) &&
8288                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8289                         r = 0;
8290                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8291                         ++vcpu->stat.request_irq_exits;
8292                         break;
8293                 }
8294
8295                 kvm_check_async_pf_completion(vcpu);
8296
8297                 if (signal_pending(current)) {
8298                         r = -EINTR;
8299                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8300                         ++vcpu->stat.signal_exits;
8301                         break;
8302                 }
8303                 if (need_resched()) {
8304                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8305                         cond_resched();
8306                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8307                 }
8308         }
8309
8310         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8311
8312         return r;
8313 }
8314
8315 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8316 {
8317         int r;
8318         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8319         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8320         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8321         if (r != EMULATE_DONE)
8322                 return 0;
8323         return 1;
8324 }
8325
8326 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8327 {
8328         BUG_ON(!vcpu->arch.pio.count);
8329
8330         return complete_emulated_io(vcpu);
8331 }
8332
8333 /*
8334  * Implements the following, as a state machine:
8335  *
8336  * read:
8337  *   for each fragment
8338  *     for each mmio piece in the fragment
8339  *       write gpa, len
8340  *       exit
8341  *       copy data
8342  *   execute insn
8343  *
8344  * write:
8345  *   for each fragment
8346  *     for each mmio piece in the fragment
8347  *       write gpa, len
8348  *       copy data
8349  *       exit
8350  */
8351 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8352 {
8353         struct kvm_run *run = vcpu->run;
8354         struct kvm_mmio_fragment *frag;
8355         unsigned len;
8356
8357         BUG_ON(!vcpu->mmio_needed);
8358
8359         /* Complete previous fragment */
8360         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8361         len = min(8u, frag->len);
8362         if (!vcpu->mmio_is_write)
8363                 memcpy(frag->data, run->mmio.data, len);
8364
8365         if (frag->len <= 8) {
8366                 /* Switch to the next fragment. */
8367                 frag++;
8368                 vcpu->mmio_cur_fragment++;
8369         } else {
8370                 /* Go forward to the next mmio piece. */
8371                 frag->data += len;
8372                 frag->gpa += len;
8373                 frag->len -= len;
8374         }
8375
8376         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8377                 vcpu->mmio_needed = 0;
8378
8379                 /* FIXME: return into emulator if single-stepping.  */
8380                 if (vcpu->mmio_is_write)
8381                         return 1;
8382                 vcpu->mmio_read_completed = 1;
8383                 return complete_emulated_io(vcpu);
8384         }
8385
8386         run->exit_reason = KVM_EXIT_MMIO;
8387         run->mmio.phys_addr = frag->gpa;
8388         if (vcpu->mmio_is_write)
8389                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8390         run->mmio.len = min(8u, frag->len);
8391         run->mmio.is_write = vcpu->mmio_is_write;
8392         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8393         return 0;
8394 }
8395
8396 /* Swap (qemu) user FPU context for the guest FPU context. */
8397 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8398 {
8399         fpregs_lock();
8400
8401         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8402         /* PKRU is separately restored in kvm_x86_ops->run.  */
8403         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8404                                 ~XFEATURE_MASK_PKRU);
8405
8406         fpregs_mark_activate();
8407         fpregs_unlock();
8408
8409         trace_kvm_fpu(1);
8410 }
8411
8412 /* When vcpu_run ends, restore user space FPU context. */
8413 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8414 {
8415         fpregs_lock();
8416
8417         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8418         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8419
8420         fpregs_mark_activate();
8421         fpregs_unlock();
8422
8423         ++vcpu->stat.fpu_reload;
8424         trace_kvm_fpu(0);
8425 }
8426
8427 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8428 {
8429         int r;
8430
8431         vcpu_load(vcpu);
8432         kvm_sigset_activate(vcpu);
8433         kvm_load_guest_fpu(vcpu);
8434
8435         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8436                 if (kvm_run->immediate_exit) {
8437                         r = -EINTR;
8438                         goto out;
8439                 }
8440                 kvm_vcpu_block(vcpu);
8441                 kvm_apic_accept_events(vcpu);
8442                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8443                 r = -EAGAIN;
8444                 if (signal_pending(current)) {
8445                         r = -EINTR;
8446                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8447                         ++vcpu->stat.signal_exits;
8448                 }
8449                 goto out;
8450         }
8451
8452         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8453                 r = -EINVAL;
8454                 goto out;
8455         }
8456
8457         if (vcpu->run->kvm_dirty_regs) {
8458                 r = sync_regs(vcpu);
8459                 if (r != 0)
8460                         goto out;
8461         }
8462
8463         /* re-sync apic's tpr */
8464         if (!lapic_in_kernel(vcpu)) {
8465                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8466                         r = -EINVAL;
8467                         goto out;
8468                 }
8469         }
8470
8471         if (unlikely(vcpu->arch.complete_userspace_io)) {
8472                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8473                 vcpu->arch.complete_userspace_io = NULL;
8474                 r = cui(vcpu);
8475                 if (r <= 0)
8476                         goto out;
8477         } else
8478                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8479
8480         if (kvm_run->immediate_exit)
8481                 r = -EINTR;
8482         else
8483                 r = vcpu_run(vcpu);
8484
8485 out:
8486         kvm_put_guest_fpu(vcpu);
8487         if (vcpu->run->kvm_valid_regs)
8488                 store_regs(vcpu);
8489         post_kvm_run_save(vcpu);
8490         kvm_sigset_deactivate(vcpu);
8491
8492         vcpu_put(vcpu);
8493         return r;
8494 }
8495
8496 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8497 {
8498         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8499                 /*
8500                  * We are here if userspace calls get_regs() in the middle of
8501                  * instruction emulation. Registers state needs to be copied
8502                  * back from emulation context to vcpu. Userspace shouldn't do
8503                  * that usually, but some bad designed PV devices (vmware
8504                  * backdoor interface) need this to work
8505                  */
8506                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8507                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8508         }
8509         regs->rax = kvm_rax_read(vcpu);
8510         regs->rbx = kvm_rbx_read(vcpu);
8511         regs->rcx = kvm_rcx_read(vcpu);
8512         regs->rdx = kvm_rdx_read(vcpu);
8513         regs->rsi = kvm_rsi_read(vcpu);
8514         regs->rdi = kvm_rdi_read(vcpu);
8515         regs->rsp = kvm_rsp_read(vcpu);
8516         regs->rbp = kvm_rbp_read(vcpu);
8517 #ifdef CONFIG_X86_64
8518         regs->r8 = kvm_r8_read(vcpu);
8519         regs->r9 = kvm_r9_read(vcpu);
8520         regs->r10 = kvm_r10_read(vcpu);
8521         regs->r11 = kvm_r11_read(vcpu);
8522         regs->r12 = kvm_r12_read(vcpu);
8523         regs->r13 = kvm_r13_read(vcpu);
8524         regs->r14 = kvm_r14_read(vcpu);
8525         regs->r15 = kvm_r15_read(vcpu);
8526 #endif
8527
8528         regs->rip = kvm_rip_read(vcpu);
8529         regs->rflags = kvm_get_rflags(vcpu);
8530 }
8531
8532 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8533 {
8534         vcpu_load(vcpu);
8535         __get_regs(vcpu, regs);
8536         vcpu_put(vcpu);
8537         return 0;
8538 }
8539
8540 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8541 {
8542         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8543         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8544
8545         kvm_rax_write(vcpu, regs->rax);
8546         kvm_rbx_write(vcpu, regs->rbx);
8547         kvm_rcx_write(vcpu, regs->rcx);
8548         kvm_rdx_write(vcpu, regs->rdx);
8549         kvm_rsi_write(vcpu, regs->rsi);
8550         kvm_rdi_write(vcpu, regs->rdi);
8551         kvm_rsp_write(vcpu, regs->rsp);
8552         kvm_rbp_write(vcpu, regs->rbp);
8553 #ifdef CONFIG_X86_64
8554         kvm_r8_write(vcpu, regs->r8);
8555         kvm_r9_write(vcpu, regs->r9);
8556         kvm_r10_write(vcpu, regs->r10);
8557         kvm_r11_write(vcpu, regs->r11);
8558         kvm_r12_write(vcpu, regs->r12);
8559         kvm_r13_write(vcpu, regs->r13);
8560         kvm_r14_write(vcpu, regs->r14);
8561         kvm_r15_write(vcpu, regs->r15);
8562 #endif
8563
8564         kvm_rip_write(vcpu, regs->rip);
8565         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8566
8567         vcpu->arch.exception.pending = false;
8568
8569         kvm_make_request(KVM_REQ_EVENT, vcpu);
8570 }
8571
8572 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8573 {
8574         vcpu_load(vcpu);
8575         __set_regs(vcpu, regs);
8576         vcpu_put(vcpu);
8577         return 0;
8578 }
8579
8580 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8581 {
8582         struct kvm_segment cs;
8583
8584         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8585         *db = cs.db;
8586         *l = cs.l;
8587 }
8588 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8589
8590 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8591 {
8592         struct desc_ptr dt;
8593
8594         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8595         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8596         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8597         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8598         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8599         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8600
8601         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8602         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8603
8604         kvm_x86_ops->get_idt(vcpu, &dt);
8605         sregs->idt.limit = dt.size;
8606         sregs->idt.base = dt.address;
8607         kvm_x86_ops->get_gdt(vcpu, &dt);
8608         sregs->gdt.limit = dt.size;
8609         sregs->gdt.base = dt.address;
8610
8611         sregs->cr0 = kvm_read_cr0(vcpu);
8612         sregs->cr2 = vcpu->arch.cr2;
8613         sregs->cr3 = kvm_read_cr3(vcpu);
8614         sregs->cr4 = kvm_read_cr4(vcpu);
8615         sregs->cr8 = kvm_get_cr8(vcpu);
8616         sregs->efer = vcpu->arch.efer;
8617         sregs->apic_base = kvm_get_apic_base(vcpu);
8618
8619         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8620
8621         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8622                 set_bit(vcpu->arch.interrupt.nr,
8623                         (unsigned long *)sregs->interrupt_bitmap);
8624 }
8625
8626 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8627                                   struct kvm_sregs *sregs)
8628 {
8629         vcpu_load(vcpu);
8630         __get_sregs(vcpu, sregs);
8631         vcpu_put(vcpu);
8632         return 0;
8633 }
8634
8635 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8636                                     struct kvm_mp_state *mp_state)
8637 {
8638         vcpu_load(vcpu);
8639
8640         kvm_apic_accept_events(vcpu);
8641         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8642                                         vcpu->arch.pv.pv_unhalted)
8643                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8644         else
8645                 mp_state->mp_state = vcpu->arch.mp_state;
8646
8647         vcpu_put(vcpu);
8648         return 0;
8649 }
8650
8651 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8652                                     struct kvm_mp_state *mp_state)
8653 {
8654         int ret = -EINVAL;
8655
8656         vcpu_load(vcpu);
8657
8658         if (!lapic_in_kernel(vcpu) &&
8659             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8660                 goto out;
8661
8662         /* INITs are latched while in SMM */
8663         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8664             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8665              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8666                 goto out;
8667
8668         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8669                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8670                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8671         } else
8672                 vcpu->arch.mp_state = mp_state->mp_state;
8673         kvm_make_request(KVM_REQ_EVENT, vcpu);
8674
8675         ret = 0;
8676 out:
8677         vcpu_put(vcpu);
8678         return ret;
8679 }
8680
8681 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8682                     int reason, bool has_error_code, u32 error_code)
8683 {
8684         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8685         int ret;
8686
8687         init_emulate_ctxt(vcpu);
8688
8689         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8690                                    has_error_code, error_code);
8691
8692         if (ret)
8693                 return EMULATE_FAIL;
8694
8695         kvm_rip_write(vcpu, ctxt->eip);
8696         kvm_set_rflags(vcpu, ctxt->eflags);
8697         kvm_make_request(KVM_REQ_EVENT, vcpu);
8698         return EMULATE_DONE;
8699 }
8700 EXPORT_SYMBOL_GPL(kvm_task_switch);
8701
8702 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8703 {
8704         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8705                         (sregs->cr4 & X86_CR4_OSXSAVE))
8706                 return  -EINVAL;
8707
8708         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8709                 /*
8710                  * When EFER.LME and CR0.PG are set, the processor is in
8711                  * 64-bit mode (though maybe in a 32-bit code segment).
8712                  * CR4.PAE and EFER.LMA must be set.
8713                  */
8714                 if (!(sregs->cr4 & X86_CR4_PAE)
8715                     || !(sregs->efer & EFER_LMA))
8716                         return -EINVAL;
8717         } else {
8718                 /*
8719                  * Not in 64-bit mode: EFER.LMA is clear and the code
8720                  * segment cannot be 64-bit.
8721                  */
8722                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8723                         return -EINVAL;
8724         }
8725
8726         return 0;
8727 }
8728
8729 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8730 {
8731         struct msr_data apic_base_msr;
8732         int mmu_reset_needed = 0;
8733         int cpuid_update_needed = 0;
8734         int pending_vec, max_bits, idx;
8735         struct desc_ptr dt;
8736         int ret = -EINVAL;
8737
8738         if (kvm_valid_sregs(vcpu, sregs))
8739                 goto out;
8740
8741         apic_base_msr.data = sregs->apic_base;
8742         apic_base_msr.host_initiated = true;
8743         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8744                 goto out;
8745
8746         dt.size = sregs->idt.limit;
8747         dt.address = sregs->idt.base;
8748         kvm_x86_ops->set_idt(vcpu, &dt);
8749         dt.size = sregs->gdt.limit;
8750         dt.address = sregs->gdt.base;
8751         kvm_x86_ops->set_gdt(vcpu, &dt);
8752
8753         vcpu->arch.cr2 = sregs->cr2;
8754         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8755         vcpu->arch.cr3 = sregs->cr3;
8756         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8757
8758         kvm_set_cr8(vcpu, sregs->cr8);
8759
8760         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8761         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8762
8763         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8764         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8765         vcpu->arch.cr0 = sregs->cr0;
8766
8767         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8768         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8769                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8770         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8771         if (cpuid_update_needed)
8772                 kvm_update_cpuid(vcpu);
8773
8774         idx = srcu_read_lock(&vcpu->kvm->srcu);
8775         if (is_pae_paging(vcpu)) {
8776                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8777                 mmu_reset_needed = 1;
8778         }
8779         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8780
8781         if (mmu_reset_needed)
8782                 kvm_mmu_reset_context(vcpu);
8783
8784         max_bits = KVM_NR_INTERRUPTS;
8785         pending_vec = find_first_bit(
8786                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8787         if (pending_vec < max_bits) {
8788                 kvm_queue_interrupt(vcpu, pending_vec, false);
8789                 pr_debug("Set back pending irq %d\n", pending_vec);
8790         }
8791
8792         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8793         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8794         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8795         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8796         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8797         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8798
8799         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8800         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8801
8802         update_cr8_intercept(vcpu);
8803
8804         /* Older userspace won't unhalt the vcpu on reset. */
8805         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8806             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8807             !is_protmode(vcpu))
8808                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8809
8810         kvm_make_request(KVM_REQ_EVENT, vcpu);
8811
8812         ret = 0;
8813 out:
8814         return ret;
8815 }
8816
8817 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8818                                   struct kvm_sregs *sregs)
8819 {
8820         int ret;
8821
8822         vcpu_load(vcpu);
8823         ret = __set_sregs(vcpu, sregs);
8824         vcpu_put(vcpu);
8825         return ret;
8826 }
8827
8828 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8829                                         struct kvm_guest_debug *dbg)
8830 {
8831         unsigned long rflags;
8832         int i, r;
8833
8834         vcpu_load(vcpu);
8835
8836         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8837                 r = -EBUSY;
8838                 if (vcpu->arch.exception.pending)
8839                         goto out;
8840                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8841                         kvm_queue_exception(vcpu, DB_VECTOR);
8842                 else
8843                         kvm_queue_exception(vcpu, BP_VECTOR);
8844         }
8845
8846         /*
8847          * Read rflags as long as potentially injected trace flags are still
8848          * filtered out.
8849          */
8850         rflags = kvm_get_rflags(vcpu);
8851
8852         vcpu->guest_debug = dbg->control;
8853         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8854                 vcpu->guest_debug = 0;
8855
8856         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8857                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8858                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8859                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8860         } else {
8861                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8862                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8863         }
8864         kvm_update_dr7(vcpu);
8865
8866         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8867                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8868                         get_segment_base(vcpu, VCPU_SREG_CS);
8869
8870         /*
8871          * Trigger an rflags update that will inject or remove the trace
8872          * flags.
8873          */
8874         kvm_set_rflags(vcpu, rflags);
8875
8876         kvm_x86_ops->update_bp_intercept(vcpu);
8877
8878         r = 0;
8879
8880 out:
8881         vcpu_put(vcpu);
8882         return r;
8883 }
8884
8885 /*
8886  * Translate a guest virtual address to a guest physical address.
8887  */
8888 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8889                                     struct kvm_translation *tr)
8890 {
8891         unsigned long vaddr = tr->linear_address;
8892         gpa_t gpa;
8893         int idx;
8894
8895         vcpu_load(vcpu);
8896
8897         idx = srcu_read_lock(&vcpu->kvm->srcu);
8898         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8899         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8900         tr->physical_address = gpa;
8901         tr->valid = gpa != UNMAPPED_GVA;
8902         tr->writeable = 1;
8903         tr->usermode = 0;
8904
8905         vcpu_put(vcpu);
8906         return 0;
8907 }
8908
8909 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8910 {
8911         struct fxregs_state *fxsave;
8912
8913         vcpu_load(vcpu);
8914
8915         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8916         memcpy(fpu->fpr, fxsave->st_space, 128);
8917         fpu->fcw = fxsave->cwd;
8918         fpu->fsw = fxsave->swd;
8919         fpu->ftwx = fxsave->twd;
8920         fpu->last_opcode = fxsave->fop;
8921         fpu->last_ip = fxsave->rip;
8922         fpu->last_dp = fxsave->rdp;
8923         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8924
8925         vcpu_put(vcpu);
8926         return 0;
8927 }
8928
8929 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8930 {
8931         struct fxregs_state *fxsave;
8932
8933         vcpu_load(vcpu);
8934
8935         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8936
8937         memcpy(fxsave->st_space, fpu->fpr, 128);
8938         fxsave->cwd = fpu->fcw;
8939         fxsave->swd = fpu->fsw;
8940         fxsave->twd = fpu->ftwx;
8941         fxsave->fop = fpu->last_opcode;
8942         fxsave->rip = fpu->last_ip;
8943         fxsave->rdp = fpu->last_dp;
8944         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8945
8946         vcpu_put(vcpu);
8947         return 0;
8948 }
8949
8950 static void store_regs(struct kvm_vcpu *vcpu)
8951 {
8952         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8953
8954         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8955                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8956
8957         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8958                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8959
8960         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8961                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8962                                 vcpu, &vcpu->run->s.regs.events);
8963 }
8964
8965 static int sync_regs(struct kvm_vcpu *vcpu)
8966 {
8967         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8968                 return -EINVAL;
8969
8970         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8971                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8972                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8973         }
8974         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8975                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8976                         return -EINVAL;
8977                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8978         }
8979         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8980                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8981                                 vcpu, &vcpu->run->s.regs.events))
8982                         return -EINVAL;
8983                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8984         }
8985
8986         return 0;
8987 }
8988
8989 static void fx_init(struct kvm_vcpu *vcpu)
8990 {
8991         fpstate_init(&vcpu->arch.guest_fpu->state);
8992         if (boot_cpu_has(X86_FEATURE_XSAVES))
8993                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
8994                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8995
8996         /*
8997          * Ensure guest xcr0 is valid for loading
8998          */
8999         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9000
9001         vcpu->arch.cr0 |= X86_CR0_ET;
9002 }
9003
9004 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9005 {
9006         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9007
9008         kvmclock_reset(vcpu);
9009
9010         kvm_x86_ops->vcpu_free(vcpu);
9011         free_cpumask_var(wbinvd_dirty_mask);
9012 }
9013
9014 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9015                                                 unsigned int id)
9016 {
9017         struct kvm_vcpu *vcpu;
9018
9019         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9020                 printk_once(KERN_WARNING
9021                 "kvm: SMP vm created on host with unstable TSC; "
9022                 "guest TSC will not be reliable\n");
9023
9024         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9025
9026         return vcpu;
9027 }
9028
9029 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9030 {
9031         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9032         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9033         kvm_vcpu_mtrr_init(vcpu);
9034         vcpu_load(vcpu);
9035         kvm_vcpu_reset(vcpu, false);
9036         kvm_init_mmu(vcpu, false);
9037         vcpu_put(vcpu);
9038         return 0;
9039 }
9040
9041 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9042 {
9043         struct msr_data msr;
9044         struct kvm *kvm = vcpu->kvm;
9045
9046         kvm_hv_vcpu_postcreate(vcpu);
9047
9048         if (mutex_lock_killable(&vcpu->mutex))
9049                 return;
9050         vcpu_load(vcpu);
9051         msr.data = 0x0;
9052         msr.index = MSR_IA32_TSC;
9053         msr.host_initiated = true;
9054         kvm_write_tsc(vcpu, &msr);
9055         vcpu_put(vcpu);
9056
9057         /* poll control enabled by default */
9058         vcpu->arch.msr_kvm_poll_control = 1;
9059
9060         mutex_unlock(&vcpu->mutex);
9061
9062         if (!kvmclock_periodic_sync)
9063                 return;
9064
9065         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9066                                         KVMCLOCK_SYNC_PERIOD);
9067 }
9068
9069 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9070 {
9071         vcpu->arch.apf.msr_val = 0;
9072
9073         vcpu_load(vcpu);
9074         kvm_mmu_unload(vcpu);
9075         vcpu_put(vcpu);
9076
9077         kvm_x86_ops->vcpu_free(vcpu);
9078 }
9079
9080 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9081 {
9082         kvm_lapic_reset(vcpu, init_event);
9083
9084         vcpu->arch.hflags = 0;
9085
9086         vcpu->arch.smi_pending = 0;
9087         vcpu->arch.smi_count = 0;
9088         atomic_set(&vcpu->arch.nmi_queued, 0);
9089         vcpu->arch.nmi_pending = 0;
9090         vcpu->arch.nmi_injected = false;
9091         kvm_clear_interrupt_queue(vcpu);
9092         kvm_clear_exception_queue(vcpu);
9093         vcpu->arch.exception.pending = false;
9094
9095         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9096         kvm_update_dr0123(vcpu);
9097         vcpu->arch.dr6 = DR6_INIT;
9098         kvm_update_dr6(vcpu);
9099         vcpu->arch.dr7 = DR7_FIXED_1;
9100         kvm_update_dr7(vcpu);
9101
9102         vcpu->arch.cr2 = 0;
9103
9104         kvm_make_request(KVM_REQ_EVENT, vcpu);
9105         vcpu->arch.apf.msr_val = 0;
9106         vcpu->arch.st.msr_val = 0;
9107
9108         kvmclock_reset(vcpu);
9109
9110         kvm_clear_async_pf_completion_queue(vcpu);
9111         kvm_async_pf_hash_reset(vcpu);
9112         vcpu->arch.apf.halted = false;
9113
9114         if (kvm_mpx_supported()) {
9115                 void *mpx_state_buffer;
9116
9117                 /*
9118                  * To avoid have the INIT path from kvm_apic_has_events() that be
9119                  * called with loaded FPU and does not let userspace fix the state.
9120                  */
9121                 if (init_event)
9122                         kvm_put_guest_fpu(vcpu);
9123                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9124                                         XFEATURE_BNDREGS);
9125                 if (mpx_state_buffer)
9126                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9127                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9128                                         XFEATURE_BNDCSR);
9129                 if (mpx_state_buffer)
9130                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9131                 if (init_event)
9132                         kvm_load_guest_fpu(vcpu);
9133         }
9134
9135         if (!init_event) {
9136                 kvm_pmu_reset(vcpu);
9137                 vcpu->arch.smbase = 0x30000;
9138
9139                 vcpu->arch.msr_misc_features_enables = 0;
9140
9141                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9142         }
9143
9144         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9145         vcpu->arch.regs_avail = ~0;
9146         vcpu->arch.regs_dirty = ~0;
9147
9148         vcpu->arch.ia32_xss = 0;
9149
9150         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9151 }
9152
9153 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9154 {
9155         struct kvm_segment cs;
9156
9157         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9158         cs.selector = vector << 8;
9159         cs.base = vector << 12;
9160         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9161         kvm_rip_write(vcpu, 0);
9162 }
9163
9164 int kvm_arch_hardware_enable(void)
9165 {
9166         struct kvm *kvm;
9167         struct kvm_vcpu *vcpu;
9168         int i;
9169         int ret;
9170         u64 local_tsc;
9171         u64 max_tsc = 0;
9172         bool stable, backwards_tsc = false;
9173
9174         kvm_shared_msr_cpu_online();
9175         ret = kvm_x86_ops->hardware_enable();
9176         if (ret != 0)
9177                 return ret;
9178
9179         local_tsc = rdtsc();
9180         stable = !kvm_check_tsc_unstable();
9181         list_for_each_entry(kvm, &vm_list, vm_list) {
9182                 kvm_for_each_vcpu(i, vcpu, kvm) {
9183                         if (!stable && vcpu->cpu == smp_processor_id())
9184                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9185                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9186                                 backwards_tsc = true;
9187                                 if (vcpu->arch.last_host_tsc > max_tsc)
9188                                         max_tsc = vcpu->arch.last_host_tsc;
9189                         }
9190                 }
9191         }
9192
9193         /*
9194          * Sometimes, even reliable TSCs go backwards.  This happens on
9195          * platforms that reset TSC during suspend or hibernate actions, but
9196          * maintain synchronization.  We must compensate.  Fortunately, we can
9197          * detect that condition here, which happens early in CPU bringup,
9198          * before any KVM threads can be running.  Unfortunately, we can't
9199          * bring the TSCs fully up to date with real time, as we aren't yet far
9200          * enough into CPU bringup that we know how much real time has actually
9201          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9202          * variables that haven't been updated yet.
9203          *
9204          * So we simply find the maximum observed TSC above, then record the
9205          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9206          * the adjustment will be applied.  Note that we accumulate
9207          * adjustments, in case multiple suspend cycles happen before some VCPU
9208          * gets a chance to run again.  In the event that no KVM threads get a
9209          * chance to run, we will miss the entire elapsed period, as we'll have
9210          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9211          * loose cycle time.  This isn't too big a deal, since the loss will be
9212          * uniform across all VCPUs (not to mention the scenario is extremely
9213          * unlikely). It is possible that a second hibernate recovery happens
9214          * much faster than a first, causing the observed TSC here to be
9215          * smaller; this would require additional padding adjustment, which is
9216          * why we set last_host_tsc to the local tsc observed here.
9217          *
9218          * N.B. - this code below runs only on platforms with reliable TSC,
9219          * as that is the only way backwards_tsc is set above.  Also note
9220          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9221          * have the same delta_cyc adjustment applied if backwards_tsc
9222          * is detected.  Note further, this adjustment is only done once,
9223          * as we reset last_host_tsc on all VCPUs to stop this from being
9224          * called multiple times (one for each physical CPU bringup).
9225          *
9226          * Platforms with unreliable TSCs don't have to deal with this, they
9227          * will be compensated by the logic in vcpu_load, which sets the TSC to
9228          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9229          * guarantee that they stay in perfect synchronization.
9230          */
9231         if (backwards_tsc) {
9232                 u64 delta_cyc = max_tsc - local_tsc;
9233                 list_for_each_entry(kvm, &vm_list, vm_list) {
9234                         kvm->arch.backwards_tsc_observed = true;
9235                         kvm_for_each_vcpu(i, vcpu, kvm) {
9236                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9237                                 vcpu->arch.last_host_tsc = local_tsc;
9238                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9239                         }
9240
9241                         /*
9242                          * We have to disable TSC offset matching.. if you were
9243                          * booting a VM while issuing an S4 host suspend....
9244                          * you may have some problem.  Solving this issue is
9245                          * left as an exercise to the reader.
9246                          */
9247                         kvm->arch.last_tsc_nsec = 0;
9248                         kvm->arch.last_tsc_write = 0;
9249                 }
9250
9251         }
9252         return 0;
9253 }
9254
9255 void kvm_arch_hardware_disable(void)
9256 {
9257         kvm_x86_ops->hardware_disable();
9258         drop_user_return_notifiers();
9259 }
9260
9261 int kvm_arch_hardware_setup(void)
9262 {
9263         int r;
9264
9265         r = kvm_x86_ops->hardware_setup();
9266         if (r != 0)
9267                 return r;
9268
9269         if (kvm_has_tsc_control) {
9270                 /*
9271                  * Make sure the user can only configure tsc_khz values that
9272                  * fit into a signed integer.
9273                  * A min value is not calculated because it will always
9274                  * be 1 on all machines.
9275                  */
9276                 u64 max = min(0x7fffffffULL,
9277                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9278                 kvm_max_guest_tsc_khz = max;
9279
9280                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9281         }
9282
9283         kvm_init_msr_list();
9284         return 0;
9285 }
9286
9287 void kvm_arch_hardware_unsetup(void)
9288 {
9289         kvm_x86_ops->hardware_unsetup();
9290 }
9291
9292 int kvm_arch_check_processor_compat(void)
9293 {
9294         return kvm_x86_ops->check_processor_compatibility();
9295 }
9296
9297 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9298 {
9299         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9300 }
9301 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9302
9303 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9304 {
9305         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9306 }
9307
9308 struct static_key kvm_no_apic_vcpu __read_mostly;
9309 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9310
9311 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9312 {
9313         struct page *page;
9314         int r;
9315
9316         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9317         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9318                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9319         else
9320                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9321
9322         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9323         if (!page) {
9324                 r = -ENOMEM;
9325                 goto fail;
9326         }
9327         vcpu->arch.pio_data = page_address(page);
9328
9329         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9330
9331         r = kvm_mmu_create(vcpu);
9332         if (r < 0)
9333                 goto fail_free_pio_data;
9334
9335         if (irqchip_in_kernel(vcpu->kvm)) {
9336                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9337                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9338                 if (r < 0)
9339                         goto fail_mmu_destroy;
9340         } else
9341                 static_key_slow_inc(&kvm_no_apic_vcpu);
9342
9343         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9344                                        GFP_KERNEL_ACCOUNT);
9345         if (!vcpu->arch.mce_banks) {
9346                 r = -ENOMEM;
9347                 goto fail_free_lapic;
9348         }
9349         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9350
9351         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9352                                 GFP_KERNEL_ACCOUNT)) {
9353                 r = -ENOMEM;
9354                 goto fail_free_mce_banks;
9355         }
9356
9357         fx_init(vcpu);
9358
9359         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9360
9361         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9362
9363         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9364
9365         kvm_async_pf_hash_reset(vcpu);
9366         kvm_pmu_init(vcpu);
9367
9368         vcpu->arch.pending_external_vector = -1;
9369         vcpu->arch.preempted_in_kernel = false;
9370
9371         kvm_hv_vcpu_init(vcpu);
9372
9373         return 0;
9374
9375 fail_free_mce_banks:
9376         kfree(vcpu->arch.mce_banks);
9377 fail_free_lapic:
9378         kvm_free_lapic(vcpu);
9379 fail_mmu_destroy:
9380         kvm_mmu_destroy(vcpu);
9381 fail_free_pio_data:
9382         free_page((unsigned long)vcpu->arch.pio_data);
9383 fail:
9384         return r;
9385 }
9386
9387 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9388 {
9389         int idx;
9390
9391         kvm_hv_vcpu_uninit(vcpu);
9392         kvm_pmu_destroy(vcpu);
9393         kfree(vcpu->arch.mce_banks);
9394         kvm_free_lapic(vcpu);
9395         idx = srcu_read_lock(&vcpu->kvm->srcu);
9396         kvm_mmu_destroy(vcpu);
9397         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9398         free_page((unsigned long)vcpu->arch.pio_data);
9399         if (!lapic_in_kernel(vcpu))
9400                 static_key_slow_dec(&kvm_no_apic_vcpu);
9401 }
9402
9403 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9404 {
9405         vcpu->arch.l1tf_flush_l1d = true;
9406         kvm_x86_ops->sched_in(vcpu, cpu);
9407 }
9408
9409 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9410 {
9411         if (type)
9412                 return -EINVAL;
9413
9414         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9415         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9416         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9417         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9418
9419         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9420         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9421         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9422         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9423                 &kvm->arch.irq_sources_bitmap);
9424
9425         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9426         mutex_init(&kvm->arch.apic_map_lock);
9427         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9428
9429         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9430         pvclock_update_vm_gtod_copy(kvm);
9431
9432         kvm->arch.guest_can_read_msr_platform_info = true;
9433
9434         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9435         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9436
9437         kvm_hv_init_vm(kvm);
9438         kvm_page_track_init(kvm);
9439         kvm_mmu_init_vm(kvm);
9440
9441         return kvm_x86_ops->vm_init(kvm);
9442 }
9443
9444 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9445 {
9446         vcpu_load(vcpu);
9447         kvm_mmu_unload(vcpu);
9448         vcpu_put(vcpu);
9449 }
9450
9451 static void kvm_free_vcpus(struct kvm *kvm)
9452 {
9453         unsigned int i;
9454         struct kvm_vcpu *vcpu;
9455
9456         /*
9457          * Unpin any mmu pages first.
9458          */
9459         kvm_for_each_vcpu(i, vcpu, kvm) {
9460                 kvm_clear_async_pf_completion_queue(vcpu);
9461                 kvm_unload_vcpu_mmu(vcpu);
9462         }
9463         kvm_for_each_vcpu(i, vcpu, kvm)
9464                 kvm_arch_vcpu_free(vcpu);
9465
9466         mutex_lock(&kvm->lock);
9467         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9468                 kvm->vcpus[i] = NULL;
9469
9470         atomic_set(&kvm->online_vcpus, 0);
9471         mutex_unlock(&kvm->lock);
9472 }
9473
9474 void kvm_arch_sync_events(struct kvm *kvm)
9475 {
9476         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9477         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9478         kvm_free_pit(kvm);
9479 }
9480
9481 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9482 {
9483         int i, r;
9484         unsigned long hva;
9485         struct kvm_memslots *slots = kvm_memslots(kvm);
9486         struct kvm_memory_slot *slot, old;
9487
9488         /* Called with kvm->slots_lock held.  */
9489         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9490                 return -EINVAL;
9491
9492         slot = id_to_memslot(slots, id);
9493         if (size) {
9494                 if (slot->npages)
9495                         return -EEXIST;
9496
9497                 /*
9498                  * MAP_SHARED to prevent internal slot pages from being moved
9499                  * by fork()/COW.
9500                  */
9501                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9502                               MAP_SHARED | MAP_ANONYMOUS, 0);
9503                 if (IS_ERR((void *)hva))
9504                         return PTR_ERR((void *)hva);
9505         } else {
9506                 if (!slot->npages)
9507                         return 0;
9508
9509                 hva = 0;
9510         }
9511
9512         old = *slot;
9513         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9514                 struct kvm_userspace_memory_region m;
9515
9516                 m.slot = id | (i << 16);
9517                 m.flags = 0;
9518                 m.guest_phys_addr = gpa;
9519                 m.userspace_addr = hva;
9520                 m.memory_size = size;
9521                 r = __kvm_set_memory_region(kvm, &m);
9522                 if (r < 0)
9523                         return r;
9524         }
9525
9526         if (!size)
9527                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9528
9529         return 0;
9530 }
9531 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9532
9533 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9534 {
9535         int r;
9536
9537         mutex_lock(&kvm->slots_lock);
9538         r = __x86_set_memory_region(kvm, id, gpa, size);
9539         mutex_unlock(&kvm->slots_lock);
9540
9541         return r;
9542 }
9543 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9544
9545 void kvm_arch_destroy_vm(struct kvm *kvm)
9546 {
9547         if (current->mm == kvm->mm) {
9548                 /*
9549                  * Free memory regions allocated on behalf of userspace,
9550                  * unless the the memory map has changed due to process exit
9551                  * or fd copying.
9552                  */
9553                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9554                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9555                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9556         }
9557         if (kvm_x86_ops->vm_destroy)
9558                 kvm_x86_ops->vm_destroy(kvm);
9559         kvm_pic_destroy(kvm);
9560         kvm_ioapic_destroy(kvm);
9561         kvm_free_vcpus(kvm);
9562         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9563         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9564         kvm_mmu_uninit_vm(kvm);
9565         kvm_page_track_cleanup(kvm);
9566         kvm_hv_destroy_vm(kvm);
9567 }
9568
9569 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9570                            struct kvm_memory_slot *dont)
9571 {
9572         int i;
9573
9574         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9575                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9576                         kvfree(free->arch.rmap[i]);
9577                         free->arch.rmap[i] = NULL;
9578                 }
9579                 if (i == 0)
9580                         continue;
9581
9582                 if (!dont || free->arch.lpage_info[i - 1] !=
9583                              dont->arch.lpage_info[i - 1]) {
9584                         kvfree(free->arch.lpage_info[i - 1]);
9585                         free->arch.lpage_info[i - 1] = NULL;
9586                 }
9587         }
9588
9589         kvm_page_track_free_memslot(free, dont);
9590 }
9591
9592 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9593                             unsigned long npages)
9594 {
9595         int i;
9596
9597         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9598                 struct kvm_lpage_info *linfo;
9599                 unsigned long ugfn;
9600                 int lpages;
9601                 int level = i + 1;
9602
9603                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9604                                       slot->base_gfn, level) + 1;
9605
9606                 slot->arch.rmap[i] =
9607                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9608                                  GFP_KERNEL_ACCOUNT);
9609                 if (!slot->arch.rmap[i])
9610                         goto out_free;
9611                 if (i == 0)
9612                         continue;
9613
9614                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9615                 if (!linfo)
9616                         goto out_free;
9617
9618                 slot->arch.lpage_info[i - 1] = linfo;
9619
9620                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9621                         linfo[0].disallow_lpage = 1;
9622                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9623                         linfo[lpages - 1].disallow_lpage = 1;
9624                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9625                 /*
9626                  * If the gfn and userspace address are not aligned wrt each
9627                  * other, or if explicitly asked to, disable large page
9628                  * support for this slot
9629                  */
9630                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9631                     !kvm_largepages_enabled()) {
9632                         unsigned long j;
9633
9634                         for (j = 0; j < lpages; ++j)
9635                                 linfo[j].disallow_lpage = 1;
9636                 }
9637         }
9638
9639         if (kvm_page_track_create_memslot(slot, npages))
9640                 goto out_free;
9641
9642         return 0;
9643
9644 out_free:
9645         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9646                 kvfree(slot->arch.rmap[i]);
9647                 slot->arch.rmap[i] = NULL;
9648                 if (i == 0)
9649                         continue;
9650
9651                 kvfree(slot->arch.lpage_info[i - 1]);
9652                 slot->arch.lpage_info[i - 1] = NULL;
9653         }
9654         return -ENOMEM;
9655 }
9656
9657 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9658 {
9659         /*
9660          * memslots->generation has been incremented.
9661          * mmio generation may have reached its maximum value.
9662          */
9663         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9664 }
9665
9666 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9667                                 struct kvm_memory_slot *memslot,
9668                                 const struct kvm_userspace_memory_region *mem,
9669                                 enum kvm_mr_change change)
9670 {
9671         return 0;
9672 }
9673
9674 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9675                                      struct kvm_memory_slot *new)
9676 {
9677         /* Still write protect RO slot */
9678         if (new->flags & KVM_MEM_READONLY) {
9679                 kvm_mmu_slot_remove_write_access(kvm, new);
9680                 return;
9681         }
9682
9683         /*
9684          * Call kvm_x86_ops dirty logging hooks when they are valid.
9685          *
9686          * kvm_x86_ops->slot_disable_log_dirty is called when:
9687          *
9688          *  - KVM_MR_CREATE with dirty logging is disabled
9689          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9690          *
9691          * The reason is, in case of PML, we need to set D-bit for any slots
9692          * with dirty logging disabled in order to eliminate unnecessary GPA
9693          * logging in PML buffer (and potential PML buffer full VMEXT). This
9694          * guarantees leaving PML enabled during guest's lifetime won't have
9695          * any additional overhead from PML when guest is running with dirty
9696          * logging disabled for memory slots.
9697          *
9698          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9699          * to dirty logging mode.
9700          *
9701          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9702          *
9703          * In case of write protect:
9704          *
9705          * Write protect all pages for dirty logging.
9706          *
9707          * All the sptes including the large sptes which point to this
9708          * slot are set to readonly. We can not create any new large
9709          * spte on this slot until the end of the logging.
9710          *
9711          * See the comments in fast_page_fault().
9712          */
9713         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9714                 if (kvm_x86_ops->slot_enable_log_dirty)
9715                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9716                 else
9717                         kvm_mmu_slot_remove_write_access(kvm, new);
9718         } else {
9719                 if (kvm_x86_ops->slot_disable_log_dirty)
9720                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9721         }
9722 }
9723
9724 void kvm_arch_commit_memory_region(struct kvm *kvm,
9725                                 const struct kvm_userspace_memory_region *mem,
9726                                 const struct kvm_memory_slot *old,
9727                                 const struct kvm_memory_slot *new,
9728                                 enum kvm_mr_change change)
9729 {
9730         if (!kvm->arch.n_requested_mmu_pages)
9731                 kvm_mmu_change_mmu_pages(kvm,
9732                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9733
9734         /*
9735          * Dirty logging tracks sptes in 4k granularity, meaning that large
9736          * sptes have to be split.  If live migration is successful, the guest
9737          * in the source machine will be destroyed and large sptes will be
9738          * created in the destination. However, if the guest continues to run
9739          * in the source machine (for example if live migration fails), small
9740          * sptes will remain around and cause bad performance.
9741          *
9742          * Scan sptes if dirty logging has been stopped, dropping those
9743          * which can be collapsed into a single large-page spte.  Later
9744          * page faults will create the large-page sptes.
9745          *
9746          * There is no need to do this in any of the following cases:
9747          * CREATE:      No dirty mappings will already exist.
9748          * MOVE/DELETE: The old mappings will already have been cleaned up by
9749          *              kvm_arch_flush_shadow_memslot()
9750          */
9751         if (change == KVM_MR_FLAGS_ONLY &&
9752                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9753                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9754                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9755
9756         /*
9757          * Set up write protection and/or dirty logging for the new slot.
9758          *
9759          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9760          * been zapped so no dirty logging staff is needed for old slot. For
9761          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9762          * new and it's also covered when dealing with the new slot.
9763          *
9764          * FIXME: const-ify all uses of struct kvm_memory_slot.
9765          */
9766         if (change != KVM_MR_DELETE)
9767                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9768 }
9769
9770 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9771 {
9772         kvm_mmu_zap_all(kvm);
9773 }
9774
9775 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9776                                    struct kvm_memory_slot *slot)
9777 {
9778         kvm_page_track_flush_slot(kvm, slot);
9779 }
9780
9781 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9782 {
9783         return (is_guest_mode(vcpu) &&
9784                         kvm_x86_ops->guest_apic_has_interrupt &&
9785                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9786 }
9787
9788 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9789 {
9790         if (!list_empty_careful(&vcpu->async_pf.done))
9791                 return true;
9792
9793         if (kvm_apic_has_events(vcpu))
9794                 return true;
9795
9796         if (vcpu->arch.pv.pv_unhalted)
9797                 return true;
9798
9799         if (vcpu->arch.exception.pending)
9800                 return true;
9801
9802         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9803             (vcpu->arch.nmi_pending &&
9804              kvm_x86_ops->nmi_allowed(vcpu)))
9805                 return true;
9806
9807         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9808             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9809                 return true;
9810
9811         if (kvm_arch_interrupt_allowed(vcpu) &&
9812             (kvm_cpu_has_interrupt(vcpu) ||
9813             kvm_guest_apic_has_interrupt(vcpu)))
9814                 return true;
9815
9816         if (kvm_hv_has_stimer_pending(vcpu))
9817                 return true;
9818
9819         return false;
9820 }
9821
9822 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9823 {
9824         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9825 }
9826
9827 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9828 {
9829         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9830                 return true;
9831
9832         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9833                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9834                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9835                 return true;
9836
9837         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9838                 return true;
9839
9840         return false;
9841 }
9842
9843 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9844 {
9845         return vcpu->arch.preempted_in_kernel;
9846 }
9847
9848 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9849 {
9850         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9851 }
9852
9853 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9854 {
9855         return kvm_x86_ops->interrupt_allowed(vcpu);
9856 }
9857
9858 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9859 {
9860         if (is_64_bit_mode(vcpu))
9861                 return kvm_rip_read(vcpu);
9862         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9863                      kvm_rip_read(vcpu));
9864 }
9865 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9866
9867 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9868 {
9869         return kvm_get_linear_rip(vcpu) == linear_rip;
9870 }
9871 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9872
9873 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9874 {
9875         unsigned long rflags;
9876
9877         rflags = kvm_x86_ops->get_rflags(vcpu);
9878         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9879                 rflags &= ~X86_EFLAGS_TF;
9880         return rflags;
9881 }
9882 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9883
9884 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9885 {
9886         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9887             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9888                 rflags |= X86_EFLAGS_TF;
9889         kvm_x86_ops->set_rflags(vcpu, rflags);
9890 }
9891
9892 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9893 {
9894         __kvm_set_rflags(vcpu, rflags);
9895         kvm_make_request(KVM_REQ_EVENT, vcpu);
9896 }
9897 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9898
9899 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9900 {
9901         int r;
9902
9903         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9904               work->wakeup_all)
9905                 return;
9906
9907         r = kvm_mmu_reload(vcpu);
9908         if (unlikely(r))
9909                 return;
9910
9911         if (!vcpu->arch.mmu->direct_map &&
9912               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9913                 return;
9914
9915         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9916 }
9917
9918 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9919 {
9920         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9921 }
9922
9923 static inline u32 kvm_async_pf_next_probe(u32 key)
9924 {
9925         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9926 }
9927
9928 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9929 {
9930         u32 key = kvm_async_pf_hash_fn(gfn);
9931
9932         while (vcpu->arch.apf.gfns[key] != ~0)
9933                 key = kvm_async_pf_next_probe(key);
9934
9935         vcpu->arch.apf.gfns[key] = gfn;
9936 }
9937
9938 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9939 {
9940         int i;
9941         u32 key = kvm_async_pf_hash_fn(gfn);
9942
9943         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9944                      (vcpu->arch.apf.gfns[key] != gfn &&
9945                       vcpu->arch.apf.gfns[key] != ~0); i++)
9946                 key = kvm_async_pf_next_probe(key);
9947
9948         return key;
9949 }
9950
9951 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9952 {
9953         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9954 }
9955
9956 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9957 {
9958         u32 i, j, k;
9959
9960         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9961         while (true) {
9962                 vcpu->arch.apf.gfns[i] = ~0;
9963                 do {
9964                         j = kvm_async_pf_next_probe(j);
9965                         if (vcpu->arch.apf.gfns[j] == ~0)
9966                                 return;
9967                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9968                         /*
9969                          * k lies cyclically in ]i,j]
9970                          * |    i.k.j |
9971                          * |....j i.k.| or  |.k..j i...|
9972                          */
9973                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9974                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9975                 i = j;
9976         }
9977 }
9978
9979 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9980 {
9981
9982         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9983                                       sizeof(val));
9984 }
9985
9986 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9987 {
9988
9989         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9990                                       sizeof(u32));
9991 }
9992
9993 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
9994 {
9995         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
9996                 return false;
9997
9998         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9999             (vcpu->arch.apf.send_user_only &&
10000              kvm_x86_ops->get_cpl(vcpu) == 0))
10001                 return false;
10002
10003         return true;
10004 }
10005
10006 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10007 {
10008         if (unlikely(!lapic_in_kernel(vcpu) ||
10009                      kvm_event_needs_reinjection(vcpu) ||
10010                      vcpu->arch.exception.pending))
10011                 return false;
10012
10013         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10014                 return false;
10015
10016         /*
10017          * If interrupts are off we cannot even use an artificial
10018          * halt state.
10019          */
10020         return kvm_x86_ops->interrupt_allowed(vcpu);
10021 }
10022
10023 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10024                                      struct kvm_async_pf *work)
10025 {
10026         struct x86_exception fault;
10027
10028         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10029         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10030
10031         if (kvm_can_deliver_async_pf(vcpu) &&
10032             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10033                 fault.vector = PF_VECTOR;
10034                 fault.error_code_valid = true;
10035                 fault.error_code = 0;
10036                 fault.nested_page_fault = false;
10037                 fault.address = work->arch.token;
10038                 fault.async_page_fault = true;
10039                 kvm_inject_page_fault(vcpu, &fault);
10040         } else {
10041                 /*
10042                  * It is not possible to deliver a paravirtualized asynchronous
10043                  * page fault, but putting the guest in an artificial halt state
10044                  * can be beneficial nevertheless: if an interrupt arrives, we
10045                  * can deliver it timely and perhaps the guest will schedule
10046                  * another process.  When the instruction that triggered a page
10047                  * fault is retried, hopefully the page will be ready in the host.
10048                  */
10049                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10050         }
10051 }
10052
10053 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10054                                  struct kvm_async_pf *work)
10055 {
10056         struct x86_exception fault;
10057         u32 val;
10058
10059         if (work->wakeup_all)
10060                 work->arch.token = ~0; /* broadcast wakeup */
10061         else
10062                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10063         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10064
10065         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10066             !apf_get_user(vcpu, &val)) {
10067                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10068                     vcpu->arch.exception.pending &&
10069                     vcpu->arch.exception.nr == PF_VECTOR &&
10070                     !apf_put_user(vcpu, 0)) {
10071                         vcpu->arch.exception.injected = false;
10072                         vcpu->arch.exception.pending = false;
10073                         vcpu->arch.exception.nr = 0;
10074                         vcpu->arch.exception.has_error_code = false;
10075                         vcpu->arch.exception.error_code = 0;
10076                         vcpu->arch.exception.has_payload = false;
10077                         vcpu->arch.exception.payload = 0;
10078                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10079                         fault.vector = PF_VECTOR;
10080                         fault.error_code_valid = true;
10081                         fault.error_code = 0;
10082                         fault.nested_page_fault = false;
10083                         fault.address = work->arch.token;
10084                         fault.async_page_fault = true;
10085                         kvm_inject_page_fault(vcpu, &fault);
10086                 }
10087         }
10088         vcpu->arch.apf.halted = false;
10089         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10090 }
10091
10092 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10093 {
10094         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10095                 return true;
10096         else
10097                 return kvm_can_do_async_pf(vcpu);
10098 }
10099
10100 void kvm_arch_start_assignment(struct kvm *kvm)
10101 {
10102         atomic_inc(&kvm->arch.assigned_device_count);
10103 }
10104 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10105
10106 void kvm_arch_end_assignment(struct kvm *kvm)
10107 {
10108         atomic_dec(&kvm->arch.assigned_device_count);
10109 }
10110 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10111
10112 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10113 {
10114         return atomic_read(&kvm->arch.assigned_device_count);
10115 }
10116 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10117
10118 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10119 {
10120         atomic_inc(&kvm->arch.noncoherent_dma_count);
10121 }
10122 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10123
10124 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10125 {
10126         atomic_dec(&kvm->arch.noncoherent_dma_count);
10127 }
10128 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10129
10130 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10131 {
10132         return atomic_read(&kvm->arch.noncoherent_dma_count);
10133 }
10134 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10135
10136 bool kvm_arch_has_irq_bypass(void)
10137 {
10138         return true;
10139 }
10140
10141 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10142                                       struct irq_bypass_producer *prod)
10143 {
10144         struct kvm_kernel_irqfd *irqfd =
10145                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10146
10147         irqfd->producer = prod;
10148
10149         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10150                                            prod->irq, irqfd->gsi, 1);
10151 }
10152
10153 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10154                                       struct irq_bypass_producer *prod)
10155 {
10156         int ret;
10157         struct kvm_kernel_irqfd *irqfd =
10158                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10159
10160         WARN_ON(irqfd->producer != prod);
10161         irqfd->producer = NULL;
10162
10163         /*
10164          * When producer of consumer is unregistered, we change back to
10165          * remapped mode, so we can re-use the current implementation
10166          * when the irq is masked/disabled or the consumer side (KVM
10167          * int this case doesn't want to receive the interrupts.
10168         */
10169         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10170         if (ret)
10171                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10172                        " fails: %d\n", irqfd->consumer.token, ret);
10173 }
10174
10175 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10176                                    uint32_t guest_irq, bool set)
10177 {
10178         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10179 }
10180
10181 bool kvm_vector_hashing_enabled(void)
10182 {
10183         return vector_hashing;
10184 }
10185 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10186
10187 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10188 {
10189         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10190 }
10191 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10192
10193
10194 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10195 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10196 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10197 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10198 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10199 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10200 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10201 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10202 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10203 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10204 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10205 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10206 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10207 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10208 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10209 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10210 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10211 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10213 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);