arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs_global {
 188         int nr;
 189         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 190 };
 191
 192 struct kvm_user_return_msrs {
 193         struct user_return_notifier urn;
 194         bool registered;
 195         struct kvm_user_return_msr_values {
 196                 u64 host;
 197                 u64 curr;
 198         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 199 };
 200
 201 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 202 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 203
 204 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 205                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 206                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 207                                 | XFEATURE_MASK_PKRU)
 208
 209 u64 __read_mostly host_efer;
 210 EXPORT_SYMBOL_GPL(host_efer);
 211
 212 bool __read_mostly allow_smaller_maxphyaddr = 0;
 213 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 214
 215 u64 __read_mostly host_xss;
 216 EXPORT_SYMBOL_GPL(host_xss);
 217 u64 __read_mostly supported_xss;
 218 EXPORT_SYMBOL_GPL(supported_xss);
 219
 220 struct kvm_stats_debugfs_item debugfs_entries[] = {
 221         VCPU_STAT("pf_fixed", pf_fixed),
 222         VCPU_STAT("pf_guest", pf_guest),
 223         VCPU_STAT("tlb_flush", tlb_flush),
 224         VCPU_STAT("invlpg", invlpg),
 225         VCPU_STAT("exits", exits),
 226         VCPU_STAT("io_exits", io_exits),
 227         VCPU_STAT("mmio_exits", mmio_exits),
 228         VCPU_STAT("signal_exits", signal_exits),
 229         VCPU_STAT("irq_window", irq_window_exits),
 230         VCPU_STAT("nmi_window", nmi_window_exits),
 231         VCPU_STAT("halt_exits", halt_exits),
 232         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 233         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 234         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 235         VCPU_STAT("halt_wakeup", halt_wakeup),
 236         VCPU_STAT("hypercalls", hypercalls),
 237         VCPU_STAT("request_irq", request_irq_exits),
 238         VCPU_STAT("irq_exits", irq_exits),
 239         VCPU_STAT("host_state_reload", host_state_reload),
 240         VCPU_STAT("fpu_reload", fpu_reload),
 241         VCPU_STAT("insn_emulation", insn_emulation),
 242         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 243         VCPU_STAT("irq_injections", irq_injections),
 244         VCPU_STAT("nmi_injections", nmi_injections),
 245         VCPU_STAT("req_event", req_event),
 246         VCPU_STAT("l1d_flush", l1d_flush),
 247         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 248         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 249         VCPU_STAT("nested_run", nested_run),
 250         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 251         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 252         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 253         VM_STAT("mmu_pte_write", mmu_pte_write),
 254         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 255         VM_STAT("mmu_flooded", mmu_flooded),
 256         VM_STAT("mmu_recycled", mmu_recycled),
 257         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 258         VM_STAT("mmu_unsync", mmu_unsync),
 259         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 260         VM_STAT("largepages", lpages, .mode = 0444),
 261         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 262         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 263         { NULL }
 264 };
 265
 266 u64 __read_mostly host_xcr0;
 267 u64 __read_mostly supported_xcr0;
 268 EXPORT_SYMBOL_GPL(supported_xcr0);
 269
 270 static struct kmem_cache *x86_fpu_cache;
 271
 272 static struct kmem_cache *x86_emulator_cache;
 273
 274 /*
 275  * When called, it means the previous get/set msr reached an invalid msr.
 276  * Return true if we want to ignore/silent this failed msr access.
 277  */
 278 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 279 {
 280         const char *op = write ? "wrmsr" : "rdmsr";
 281
 282         if (ignore_msrs) {
 283                 if (report_ignored_msrs)
 284                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 285                                       op, msr, data);
 286                 /* Mask the error */
 287                 return true;
 288         } else {
 289                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 290                                       op, msr, data);
 291                 return false;
 292         }
 293 }
 294
 295 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 296 {
 297         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 298         unsigned int size = sizeof(struct x86_emulate_ctxt);
 299
 300         return kmem_cache_create_usercopy("x86_emulator", size,
 301                                           __alignof__(struct x86_emulate_ctxt),
 302                                           SLAB_ACCOUNT, useroffset,
 303                                           size - useroffset, NULL);
 304 }
 305
 306 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 307
 308 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 309 {
 310         int i;
 311         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 312                 vcpu->arch.apf.gfns[i] = ~0;
 313 }
 314
 315 static void kvm_on_user_return(struct user_return_notifier *urn)
 316 {
 317         unsigned slot;
 318         struct kvm_user_return_msrs *msrs
 319                 = container_of(urn, struct kvm_user_return_msrs, urn);
 320         struct kvm_user_return_msr_values *values;
 321         unsigned long flags;
 322
 323         /*
 324          * Disabling irqs at this point since the following code could be
 325          * interrupted and executed through kvm_arch_hardware_disable()
 326          */
 327         local_irq_save(flags);
 328         if (msrs->registered) {
 329                 msrs->registered = false;
 330                 user_return_notifier_unregister(urn);
 331         }
 332         local_irq_restore(flags);
 333         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 334                 values = &msrs->values[slot];
 335                 if (values->host != values->curr) {
 336                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 337                         values->curr = values->host;
 338                 }
 339         }
 340 }
 341
 342 int kvm_probe_user_return_msr(u32 msr)
 343 {
 344         u64 val;
 345         int ret;
 346
 347         preempt_disable();
 348         ret = rdmsrl_safe(msr, &val);
 349         if (ret)
 350                 goto out;
 351         ret = wrmsrl_safe(msr, val);
 352 out:
 353         preempt_enable();
 354         return ret;
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_probe_user_return_msr);
 357
 358 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 359 {
 360         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 361         user_return_msrs_global.msrs[slot] = msr;
 362         if (slot >= user_return_msrs_global.nr)
 363                 user_return_msrs_global.nr = slot + 1;
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 366
 367 int kvm_find_user_return_msr(u32 msr)
 368 {
 369         int i;
 370
 371         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 372                 if (user_return_msrs_global.msrs[i] == msr)
 373                         return i;
 374         }
 375         return -1;
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 378
 379 static void kvm_user_return_msr_cpu_online(void)
 380 {
 381         unsigned int cpu = smp_processor_id();
 382         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 383         u64 value;
 384         int i;
 385
 386         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 387                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 388                 msrs->values[i].host = value;
 389                 msrs->values[i].curr = value;
 390         }
 391 }
 392
 393 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 394 {
 395         unsigned int cpu = smp_processor_id();
 396         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 397         int err;
 398
 399         value = (value & mask) | (msrs->values[slot].host & ~mask);
 400         if (value == msrs->values[slot].curr)
 401                 return 0;
 402         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 403         if (err)
 404                 return 1;
 405
 406         msrs->values[slot].curr = value;
 407         if (!msrs->registered) {
 408                 msrs->urn.on_user_return = kvm_on_user_return;
 409                 user_return_notifier_register(&msrs->urn);
 410                 msrs->registered = true;
 411         }
 412         return 0;
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 415
 416 static void drop_user_return_notifiers(void)
 417 {
 418         unsigned int cpu = smp_processor_id();
 419         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 420
 421         if (msrs->registered)
 422                 kvm_on_user_return(&msrs->urn);
 423 }
 424
 425 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 426 {
 427         return vcpu->arch.apic_base;
 428 }
 429 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 430
 431 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 432 {
 433         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 436
 437 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 438 {
 439         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 440         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 441         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 442                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 443
 444         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 445                 return 1;
 446         if (!msr_info->host_initiated) {
 447                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 448                         return 1;
 449                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 450                         return 1;
 451         }
 452
 453         kvm_lapic_set_base(vcpu, msr_info->data);
 454         kvm_recalculate_apic_map(vcpu->kvm);
 455         return 0;
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 458
 459 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 460 {
 461         /* Fault while not rebooting.  We want the trace. */
 462         BUG_ON(!kvm_rebooting);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 465
 466 #define EXCPT_BENIGN            0
 467 #define EXCPT_CONTRIBUTORY      1
 468 #define EXCPT_PF                2
 469
 470 static int exception_class(int vector)
 471 {
 472         switch (vector) {
 473         case PF_VECTOR:
 474                 return EXCPT_PF;
 475         case DE_VECTOR:
 476         case TS_VECTOR:
 477         case NP_VECTOR:
 478         case SS_VECTOR:
 479         case GP_VECTOR:
 480                 return EXCPT_CONTRIBUTORY;
 481         default:
 482                 break;
 483         }
 484         return EXCPT_BENIGN;
 485 }
 486
 487 #define EXCPT_FAULT             0
 488 #define EXCPT_TRAP              1
 489 #define EXCPT_ABORT             2
 490 #define EXCPT_INTERRUPT         3
 491
 492 static int exception_type(int vector)
 493 {
 494         unsigned int mask;
 495
 496         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 497                 return EXCPT_INTERRUPT;
 498
 499         mask = 1 << vector;
 500
 501         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 502         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 503                 return EXCPT_TRAP;
 504
 505         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 506                 return EXCPT_ABORT;
 507
 508         /* Reserved exceptions will result in fault */
 509         return EXCPT_FAULT;
 510 }
 511
 512 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 513 {
 514         unsigned nr = vcpu->arch.exception.nr;
 515         bool has_payload = vcpu->arch.exception.has_payload;
 516         unsigned long payload = vcpu->arch.exception.payload;
 517
 518         if (!has_payload)
 519                 return;
 520
 521         switch (nr) {
 522         case DB_VECTOR:
 523                 /*
 524                  * "Certain debug exceptions may clear bit 0-3.  The
 525                  * remaining contents of the DR6 register are never
 526                  * cleared by the processor".
 527                  */
 528                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 529                 /*
 530                  * In order to reflect the #DB exception payload in guest
 531                  * dr6, three components need to be considered: active low
 532                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 533                  * DR6_BS and DR6_BT)
 534                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 535                  * In the target guest dr6:
 536                  * FIXED_1 bits should always be set.
 537                  * Active low bits should be cleared if 1-setting in payload.
 538                  * Active high bits should be set if 1-setting in payload.
 539                  *
 540                  * Note, the payload is compatible with the pending debug
 541                  * exceptions/exit qualification under VMX, that active_low bits
 542                  * are active high in payload.
 543                  * So they need to be flipped for DR6.
 544                  */
 545                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 546                 vcpu->arch.dr6 |= payload;
 547                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 548
 549                 /*
 550                  * The #DB payload is defined as compatible with the 'pending
 551                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 552                  * defined in the 'pending debug exceptions' field (enabled
 553                  * breakpoint), it is reserved and must be zero in DR6.
 554                  */
 555                 vcpu->arch.dr6 &= ~BIT(12);
 556                 break;
 557         case PF_VECTOR:
 558                 vcpu->arch.cr2 = payload;
 559                 break;
 560         }
 561
 562         vcpu->arch.exception.has_payload = false;
 563         vcpu->arch.exception.payload = 0;
 564 }
 565 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 566
 567 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 568                 unsigned nr, bool has_error, u32 error_code,
 569                 bool has_payload, unsigned long payload, bool reinject)
 570 {
 571         u32 prev_nr;
 572         int class1, class2;
 573
 574         kvm_make_request(KVM_REQ_EVENT, vcpu);
 575
 576         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 577         queue:
 578                 if (reinject) {
 579                         /*
 580                          * On vmentry, vcpu->arch.exception.pending is only
 581                          * true if an event injection was blocked by
 582                          * nested_run_pending.  In that case, however,
 583                          * vcpu_enter_guest requests an immediate exit,
 584                          * and the guest shouldn't proceed far enough to
 585                          * need reinjection.
 586                          */
 587                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 588                         vcpu->arch.exception.injected = true;
 589                         if (WARN_ON_ONCE(has_payload)) {
 590                                 /*
 591                                  * A reinjected event has already
 592                                  * delivered its payload.
 593                                  */
 594                                 has_payload = false;
 595                                 payload = 0;
 596                         }
 597                 } else {
 598                         vcpu->arch.exception.pending = true;
 599                         vcpu->arch.exception.injected = false;
 600                 }
 601                 vcpu->arch.exception.has_error_code = has_error;
 602                 vcpu->arch.exception.nr = nr;
 603                 vcpu->arch.exception.error_code = error_code;
 604                 vcpu->arch.exception.has_payload = has_payload;
 605                 vcpu->arch.exception.payload = payload;
 606                 if (!is_guest_mode(vcpu))
 607                         kvm_deliver_exception_payload(vcpu);
 608                 return;
 609         }
 610
 611         /* to check exception */
 612         prev_nr = vcpu->arch.exception.nr;
 613         if (prev_nr == DF_VECTOR) {
 614                 /* triple fault -> shutdown */
 615                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 616                 return;
 617         }
 618         class1 = exception_class(prev_nr);
 619         class2 = exception_class(nr);
 620         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 621                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 622                 /*
 623                  * Generate double fault per SDM Table 5-5.  Set
 624                  * exception.pending = true so that the double fault
 625                  * can trigger a nested vmexit.
 626                  */
 627                 vcpu->arch.exception.pending = true;
 628                 vcpu->arch.exception.injected = false;
 629                 vcpu->arch.exception.has_error_code = true;
 630                 vcpu->arch.exception.nr = DF_VECTOR;
 631                 vcpu->arch.exception.error_code = 0;
 632                 vcpu->arch.exception.has_payload = false;
 633                 vcpu->arch.exception.payload = 0;
 634         } else
 635                 /* replace previous exception with a new one in a hope
 636                    that instruction re-execution will regenerate lost
 637                    exception */
 638                 goto queue;
 639 }
 640
 641 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 642 {
 643         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 644 }
 645 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 646
 647 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 648 {
 649         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 650 }
 651 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 652
 653 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 654                            unsigned long payload)
 655 {
 656         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 657 }
 658 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 659
 660 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 661                                     u32 error_code, unsigned long payload)
 662 {
 663         kvm_multiple_exception(vcpu, nr, true, error_code,
 664                                true, payload, false);
 665 }
 666
 667 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 668 {
 669         if (err)
 670                 kvm_inject_gp(vcpu, 0);
 671         else
 672                 return kvm_skip_emulated_instruction(vcpu);
 673
 674         return 1;
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 677
 678 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 679 {
 680         ++vcpu->stat.pf_guest;
 681         vcpu->arch.exception.nested_apf =
 682                 is_guest_mode(vcpu) && fault->async_page_fault;
 683         if (vcpu->arch.exception.nested_apf) {
 684                 vcpu->arch.apf.nested_apf_token = fault->address;
 685                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 686         } else {
 687                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 688                                         fault->address);
 689         }
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 692
 693 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 694                                     struct x86_exception *fault)
 695 {
 696         struct kvm_mmu *fault_mmu;
 697         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 698
 699         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 700                                                vcpu->arch.walk_mmu;
 701
 702         /*
 703          * Invalidate the TLB entry for the faulting address, if it exists,
 704          * else the access will fault indefinitely (and to emulate hardware).
 705          */
 706         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 707             !(fault->error_code & PFERR_RSVD_MASK))
 708                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 709                                        fault_mmu->root_hpa);
 710
 711         fault_mmu->inject_page_fault(vcpu, fault);
 712         return fault->nested_page_fault;
 713 }
 714 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 715
 716 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 717 {
 718         atomic_inc(&vcpu->arch.nmi_queued);
 719         kvm_make_request(KVM_REQ_NMI, vcpu);
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 722
 723 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 724 {
 725         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 726 }
 727 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 728
 729 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 730 {
 731         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 732 }
 733 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 734
 735 /*
 736  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 737  * a #GP and return false.
 738  */
 739 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 740 {
 741         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 742                 return true;
 743         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 744         return false;
 745 }
 746 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 747
 748 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 749 {
 750         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 751                 return true;
 752
 753         kvm_queue_exception(vcpu, UD_VECTOR);
 754         return false;
 755 }
 756 EXPORT_SYMBOL_GPL(kvm_require_dr);
 757
 758 /*
 759  * This function will be used to read from the physical memory of the currently
 760  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 761  * can read from guest physical or from the guest's guest physical memory.
 762  */
 763 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 764                             gfn_t ngfn, void *data, int offset, int len,
 765                             u32 access)
 766 {
 767         struct x86_exception exception;
 768         gfn_t real_gfn;
 769         gpa_t ngpa;
 770
 771         ngpa     = gfn_to_gpa(ngfn);
 772         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 773         if (real_gfn == UNMAPPED_GVA)
 774                 return -EFAULT;
 775
 776         real_gfn = gpa_to_gfn(real_gfn);
 777
 778         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 781
 782 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 783                                void *data, int offset, int len, u32 access)
 784 {
 785         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 786                                        data, offset, len, access);
 787 }
 788
 789 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 790 {
 791         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 792 }
 793
 794 /*
 795  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 796  */
 797 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 798 {
 799         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 800         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 801         int i;
 802         int ret;
 803         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 804
 805         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 806                                       offset * sizeof(u64), sizeof(pdpte),
 807                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 808         if (ret < 0) {
 809                 ret = 0;
 810                 goto out;
 811         }
 812         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 813                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 814                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 815                         ret = 0;
 816                         goto out;
 817                 }
 818         }
 819         ret = 1;
 820
 821         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 822         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 823
 824 out:
 825
 826         return ret;
 827 }
 828 EXPORT_SYMBOL_GPL(load_pdptrs);
 829
 830 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 831 {
 832         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 833         int offset;
 834         gfn_t gfn;
 835         int r;
 836
 837         if (!is_pae_paging(vcpu))
 838                 return false;
 839
 840         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 841                 return true;
 842
 843         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 844         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 845         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 846                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 847         if (r < 0)
 848                 return true;
 849
 850         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 851 }
 852 EXPORT_SYMBOL_GPL(pdptrs_changed);
 853
 854 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 855 {
 856         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 857
 858         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 859                 kvm_clear_async_pf_completion_queue(vcpu);
 860                 kvm_async_pf_hash_reset(vcpu);
 861         }
 862
 863         if ((cr0 ^ old_cr0) & update_bits)
 864                 kvm_mmu_reset_context(vcpu);
 865
 866         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 867             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 868             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 869                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 870 }
 871 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 872
 873 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 874 {
 875         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 876         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 877
 878         cr0 |= X86_CR0_ET;
 879
 880 #ifdef CONFIG_X86_64
 881         if (cr0 & 0xffffffff00000000UL)
 882                 return 1;
 883 #endif
 884
 885         cr0 &= ~CR0_RESERVED_BITS;
 886
 887         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 888                 return 1;
 889
 890         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 891                 return 1;
 892
 893 #ifdef CONFIG_X86_64
 894         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 895             (cr0 & X86_CR0_PG)) {
 896                 int cs_db, cs_l;
 897
 898                 if (!is_pae(vcpu))
 899                         return 1;
 900                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 901                 if (cs_l)
 902                         return 1;
 903         }
 904 #endif
 905         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 906             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 907             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 908                 return 1;
 909
 910         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 911                 return 1;
 912
 913         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 914
 915         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 916
 917         return 0;
 918 }
 919 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 920
 921 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 922 {
 923         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_lmsw);
 926
 927 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 928 {
 929         if (vcpu->arch.guest_state_protected)
 930                 return;
 931
 932         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 933
 934                 if (vcpu->arch.xcr0 != host_xcr0)
 935                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 936
 937                 if (vcpu->arch.xsaves_enabled &&
 938                     vcpu->arch.ia32_xss != host_xss)
 939                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 940         }
 941
 942         if (static_cpu_has(X86_FEATURE_PKU) &&
 943             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 944              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 945             vcpu->arch.pkru != vcpu->arch.host_pkru)
 946                 __write_pkru(vcpu->arch.pkru);
 947 }
 948 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 949
 950 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 951 {
 952         if (vcpu->arch.guest_state_protected)
 953                 return;
 954
 955         if (static_cpu_has(X86_FEATURE_PKU) &&
 956             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 957              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 958                 vcpu->arch.pkru = rdpkru();
 959                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 960                         __write_pkru(vcpu->arch.host_pkru);
 961         }
 962
 963         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 964
 965                 if (vcpu->arch.xcr0 != host_xcr0)
 966                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 967
 968                 if (vcpu->arch.xsaves_enabled &&
 969                     vcpu->arch.ia32_xss != host_xss)
 970                         wrmsrl(MSR_IA32_XSS, host_xss);
 971         }
 972
 973 }
 974 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 975
 976 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 977 {
 978         u64 xcr0 = xcr;
 979         u64 old_xcr0 = vcpu->arch.xcr0;
 980         u64 valid_bits;
 981
 982         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 983         if (index != XCR_XFEATURE_ENABLED_MASK)
 984                 return 1;
 985         if (!(xcr0 & XFEATURE_MASK_FP))
 986                 return 1;
 987         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 988                 return 1;
 989
 990         /*
 991          * Do not allow the guest to set bits that we do not support
 992          * saving.  However, xcr0 bit 0 is always set, even if the
 993          * emulated CPU does not support XSAVE (see fx_init).
 994          */
 995         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 996         if (xcr0 & ~valid_bits)
 997                 return 1;
 998
 999         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1000             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1001                 return 1;
1002
1003         if (xcr0 & XFEATURE_MASK_AVX512) {
1004                 if (!(xcr0 & XFEATURE_MASK_YMM))
1005                         return 1;
1006                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1007                         return 1;
1008         }
1009         vcpu->arch.xcr0 = xcr0;
1010
1011         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1012                 kvm_update_cpuid_runtime(vcpu);
1013         return 0;
1014 }
1015
1016 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1017 {
1018         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1019             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1020                 kvm_inject_gp(vcpu, 0);
1021                 return 1;
1022         }
1023
1024         return kvm_skip_emulated_instruction(vcpu);
1025 }
1026 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1027
1028 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1029 {
1030         if (cr4 & cr4_reserved_bits)
1031                 return false;
1032
1033         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1034                 return false;
1035
1036         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1037 }
1038 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1039
1040 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1041 {
1042         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1043                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1044
1045         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1046             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1047                 kvm_mmu_reset_context(vcpu);
1048 }
1049 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1050
1051 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1052 {
1053         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1054         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1055                                    X86_CR4_SMEP;
1056
1057         if (!kvm_is_valid_cr4(vcpu, cr4))
1058                 return 1;
1059
1060         if (is_long_mode(vcpu)) {
1061                 if (!(cr4 & X86_CR4_PAE))
1062                         return 1;
1063                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1064                         return 1;
1065         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1066                    && ((cr4 ^ old_cr4) & pdptr_bits)
1067                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1068                                    kvm_read_cr3(vcpu)))
1069                 return 1;
1070
1071         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1072                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1073                         return 1;
1074
1075                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1076                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1077                         return 1;
1078         }
1079
1080         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1081
1082         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1083
1084         return 0;
1085 }
1086 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1087
1088 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1089 {
1090         bool skip_tlb_flush = false;
1091 #ifdef CONFIG_X86_64
1092         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1093
1094         if (pcid_enabled) {
1095                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1096                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1097         }
1098 #endif
1099
1100         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1101                 if (!skip_tlb_flush) {
1102                         kvm_mmu_sync_roots(vcpu);
1103                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1104                 }
1105                 return 0;
1106         }
1107
1108         /*
1109          * Do not condition the GPA check on long mode, this helper is used to
1110          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1111          * the current vCPU mode is accurate.
1112          */
1113         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1114                 return 1;
1115
1116         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1117                 return 1;
1118
1119         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1120         vcpu->arch.cr3 = cr3;
1121         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1122
1123         return 0;
1124 }
1125 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1126
1127 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1128 {
1129         if (cr8 & CR8_RESERVED_BITS)
1130                 return 1;
1131         if (lapic_in_kernel(vcpu))
1132                 kvm_lapic_set_tpr(vcpu, cr8);
1133         else
1134                 vcpu->arch.cr8 = cr8;
1135         return 0;
1136 }
1137 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1138
1139 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1140 {
1141         if (lapic_in_kernel(vcpu))
1142                 return kvm_lapic_get_cr8(vcpu);
1143         else
1144                 return vcpu->arch.cr8;
1145 }
1146 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1147
1148 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1149 {
1150         int i;
1151
1152         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1153                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1154                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1155                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1156         }
1157 }
1158
1159 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1160 {
1161         unsigned long dr7;
1162
1163         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1164                 dr7 = vcpu->arch.guest_debug_dr7;
1165         else
1166                 dr7 = vcpu->arch.dr7;
1167         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1168         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1169         if (dr7 & DR7_BP_EN_MASK)
1170                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1171 }
1172 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1173
1174 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1175 {
1176         u64 fixed = DR6_FIXED_1;
1177
1178         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1179                 fixed |= DR6_RTM;
1180         return fixed;
1181 }
1182
1183 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1184 {
1185         size_t size = ARRAY_SIZE(vcpu->arch.db);
1186
1187         switch (dr) {
1188         case 0 ... 3:
1189                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1190                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1191                         vcpu->arch.eff_db[dr] = val;
1192                 break;
1193         case 4:
1194         case 6:
1195                 if (!kvm_dr6_valid(val))
1196                         return 1; /* #GP */
1197                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1198                 break;
1199         case 5:
1200         default: /* 7 */
1201                 if (!kvm_dr7_valid(val))
1202                         return 1; /* #GP */
1203                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1204                 kvm_update_dr7(vcpu);
1205                 break;
1206         }
1207
1208         return 0;
1209 }
1210 EXPORT_SYMBOL_GPL(kvm_set_dr);
1211
1212 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1213 {
1214         size_t size = ARRAY_SIZE(vcpu->arch.db);
1215
1216         switch (dr) {
1217         case 0 ... 3:
1218                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1219                 break;
1220         case 4:
1221         case 6:
1222                 *val = vcpu->arch.dr6;
1223                 break;
1224         case 5:
1225         default: /* 7 */
1226                 *val = vcpu->arch.dr7;
1227                 break;
1228         }
1229 }
1230 EXPORT_SYMBOL_GPL(kvm_get_dr);
1231
1232 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1233 {
1234         u32 ecx = kvm_rcx_read(vcpu);
1235         u64 data;
1236
1237         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1238                 kvm_inject_gp(vcpu, 0);
1239                 return 1;
1240         }
1241
1242         kvm_rax_write(vcpu, (u32)data);
1243         kvm_rdx_write(vcpu, data >> 32);
1244         return kvm_skip_emulated_instruction(vcpu);
1245 }
1246 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1247
1248 /*
1249  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1250  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1251  *
1252  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1253  * extract the supported MSRs from the related const lists.
1254  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1255  * capabilities of the host cpu. This capabilities test skips MSRs that are
1256  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1257  * may depend on host virtualization features rather than host cpu features.
1258  */
1259
1260 static const u32 msrs_to_save_all[] = {
1261         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1262         MSR_STAR,
1263 #ifdef CONFIG_X86_64
1264         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1265 #endif
1266         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1267         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1268         MSR_IA32_SPEC_CTRL,
1269         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1270         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1271         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1272         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1273         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1274         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1275         MSR_IA32_UMWAIT_CONTROL,
1276
1277         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1278         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1279         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1280         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1281         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1282         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1283         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1284         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1285         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1286         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1287         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1289         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1290         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1291         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1292         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1293         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1294         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1295         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1296         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1298         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1299 };
1300
1301 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1302 static unsigned num_msrs_to_save;
1303
1304 static const u32 emulated_msrs_all[] = {
1305         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1306         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1307         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1308         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1309         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1310         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1311         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1312         HV_X64_MSR_RESET,
1313         HV_X64_MSR_VP_INDEX,
1314         HV_X64_MSR_VP_RUNTIME,
1315         HV_X64_MSR_SCONTROL,
1316         HV_X64_MSR_STIMER0_CONFIG,
1317         HV_X64_MSR_VP_ASSIST_PAGE,
1318         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1319         HV_X64_MSR_TSC_EMULATION_STATUS,
1320         HV_X64_MSR_SYNDBG_OPTIONS,
1321         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1322         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1323         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1324
1325         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1326         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1327
1328         MSR_IA32_TSC_ADJUST,
1329         MSR_IA32_TSC_DEADLINE,
1330         MSR_IA32_ARCH_CAPABILITIES,
1331         MSR_IA32_PERF_CAPABILITIES,
1332         MSR_IA32_MISC_ENABLE,
1333         MSR_IA32_MCG_STATUS,
1334         MSR_IA32_MCG_CTL,
1335         MSR_IA32_MCG_EXT_CTL,
1336         MSR_IA32_SMBASE,
1337         MSR_SMI_COUNT,
1338         MSR_PLATFORM_INFO,
1339         MSR_MISC_FEATURES_ENABLES,
1340         MSR_AMD64_VIRT_SPEC_CTRL,
1341         MSR_IA32_POWER_CTL,
1342         MSR_IA32_UCODE_REV,
1343
1344         /*
1345          * The following list leaves out MSRs whose values are determined
1346          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1347          * We always support the "true" VMX control MSRs, even if the host
1348          * processor does not, so I am putting these registers here rather
1349          * than in msrs_to_save_all.
1350          */
1351         MSR_IA32_VMX_BASIC,
1352         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1353         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1354         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1355         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1356         MSR_IA32_VMX_MISC,
1357         MSR_IA32_VMX_CR0_FIXED0,
1358         MSR_IA32_VMX_CR4_FIXED0,
1359         MSR_IA32_VMX_VMCS_ENUM,
1360         MSR_IA32_VMX_PROCBASED_CTLS2,
1361         MSR_IA32_VMX_EPT_VPID_CAP,
1362         MSR_IA32_VMX_VMFUNC,
1363
1364         MSR_K7_HWCR,
1365         MSR_KVM_POLL_CONTROL,
1366 };
1367
1368 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1369 static unsigned num_emulated_msrs;
1370
1371 /*
1372  * List of msr numbers which are used to expose MSR-based features that
1373  * can be used by a hypervisor to validate requested CPU features.
1374  */
1375 static const u32 msr_based_features_all[] = {
1376         MSR_IA32_VMX_BASIC,
1377         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1378         MSR_IA32_VMX_PINBASED_CTLS,
1379         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1380         MSR_IA32_VMX_PROCBASED_CTLS,
1381         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1382         MSR_IA32_VMX_EXIT_CTLS,
1383         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1384         MSR_IA32_VMX_ENTRY_CTLS,
1385         MSR_IA32_VMX_MISC,
1386         MSR_IA32_VMX_CR0_FIXED0,
1387         MSR_IA32_VMX_CR0_FIXED1,
1388         MSR_IA32_VMX_CR4_FIXED0,
1389         MSR_IA32_VMX_CR4_FIXED1,
1390         MSR_IA32_VMX_VMCS_ENUM,
1391         MSR_IA32_VMX_PROCBASED_CTLS2,
1392         MSR_IA32_VMX_EPT_VPID_CAP,
1393         MSR_IA32_VMX_VMFUNC,
1394
1395         MSR_F10H_DECFG,
1396         MSR_IA32_UCODE_REV,
1397         MSR_IA32_ARCH_CAPABILITIES,
1398         MSR_IA32_PERF_CAPABILITIES,
1399 };
1400
1401 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1402 static unsigned int num_msr_based_features;
1403
1404 static u64 kvm_get_arch_capabilities(void)
1405 {
1406         u64 data = 0;
1407
1408         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1409                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1410
1411         /*
1412          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1413          * the nested hypervisor runs with NX huge pages.  If it is not,
1414          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1415          * L1 guests, so it need not worry about its own (L2) guests.
1416          */
1417         data |= ARCH_CAP_PSCHANGE_MC_NO;
1418
1419         /*
1420          * If we're doing cache flushes (either "always" or "cond")
1421          * we will do one whenever the guest does a vmlaunch/vmresume.
1422          * If an outer hypervisor is doing the cache flush for us
1423          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1424          * capability to the guest too, and if EPT is disabled we're not
1425          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1426          * require a nested hypervisor to do a flush of its own.
1427          */
1428         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1429                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1430
1431         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1432                 data |= ARCH_CAP_RDCL_NO;
1433         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1434                 data |= ARCH_CAP_SSB_NO;
1435         if (!boot_cpu_has_bug(X86_BUG_MDS))
1436                 data |= ARCH_CAP_MDS_NO;
1437
1438         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1439                 /*
1440                  * If RTM=0 because the kernel has disabled TSX, the host might
1441                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1442                  * and therefore knows that there cannot be TAA) but keep
1443                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1444                  * and we want to allow migrating those guests to tsx=off hosts.
1445                  */
1446                 data &= ~ARCH_CAP_TAA_NO;
1447         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1448                 data |= ARCH_CAP_TAA_NO;
1449         } else {
1450                 /*
1451                  * Nothing to do here; we emulate TSX_CTRL if present on the
1452                  * host so the guest can choose between disabling TSX or
1453                  * using VERW to clear CPU buffers.
1454                  */
1455         }
1456
1457         return data;
1458 }
1459
1460 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1461 {
1462         switch (msr->index) {
1463         case MSR_IA32_ARCH_CAPABILITIES:
1464                 msr->data = kvm_get_arch_capabilities();
1465                 break;
1466         case MSR_IA32_UCODE_REV:
1467                 rdmsrl_safe(msr->index, &msr->data);
1468                 break;
1469         default:
1470                 return static_call(kvm_x86_get_msr_feature)(msr);
1471         }
1472         return 0;
1473 }
1474
1475 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1476 {
1477         struct kvm_msr_entry msr;
1478         int r;
1479
1480         msr.index = index;
1481         r = kvm_get_msr_feature(&msr);
1482
1483         if (r == KVM_MSR_RET_INVALID) {
1484                 /* Unconditionally clear the output for simplicity */
1485                 *data = 0;
1486                 if (kvm_msr_ignored_check(index, 0, false))
1487                         r = 0;
1488         }
1489
1490         if (r)
1491                 return r;
1492
1493         *data = msr.data;
1494
1495         return 0;
1496 }
1497
1498 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1499 {
1500         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1501                 return false;
1502
1503         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1504                 return false;
1505
1506         if (efer & (EFER_LME | EFER_LMA) &&
1507             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1508                 return false;
1509
1510         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1511                 return false;
1512
1513         return true;
1514
1515 }
1516 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1517 {
1518         if (efer & efer_reserved_bits)
1519                 return false;
1520
1521         return __kvm_valid_efer(vcpu, efer);
1522 }
1523 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1524
1525 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1526 {
1527         u64 old_efer = vcpu->arch.efer;
1528         u64 efer = msr_info->data;
1529         int r;
1530
1531         if (efer & efer_reserved_bits)
1532                 return 1;
1533
1534         if (!msr_info->host_initiated) {
1535                 if (!__kvm_valid_efer(vcpu, efer))
1536                         return 1;
1537
1538                 if (is_paging(vcpu) &&
1539                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1540                         return 1;
1541         }
1542
1543         efer &= ~EFER_LMA;
1544         efer |= vcpu->arch.efer & EFER_LMA;
1545
1546         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1547         if (r) {
1548                 WARN_ON(r > 0);
1549                 return r;
1550         }
1551
1552         /* Update reserved bits */
1553         if ((efer ^ old_efer) & EFER_NX)
1554                 kvm_mmu_reset_context(vcpu);
1555
1556         return 0;
1557 }
1558
1559 void kvm_enable_efer_bits(u64 mask)
1560 {
1561        efer_reserved_bits &= ~mask;
1562 }
1563 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1564
1565 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1566 {
1567         struct kvm_x86_msr_filter *msr_filter;
1568         struct msr_bitmap_range *ranges;
1569         struct kvm *kvm = vcpu->kvm;
1570         bool allowed;
1571         int idx;
1572         u32 i;
1573
1574         /* x2APIC MSRs do not support filtering. */
1575         if (index >= 0x800 && index <= 0x8ff)
1576                 return true;
1577
1578         idx = srcu_read_lock(&kvm->srcu);
1579
1580         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1581         if (!msr_filter) {
1582                 allowed = true;
1583                 goto out;
1584         }
1585
1586         allowed = msr_filter->default_allow;
1587         ranges = msr_filter->ranges;
1588
1589         for (i = 0; i < msr_filter->count; i++) {
1590                 u32 start = ranges[i].base;
1591                 u32 end = start + ranges[i].nmsrs;
1592                 u32 flags = ranges[i].flags;
1593                 unsigned long *bitmap = ranges[i].bitmap;
1594
1595                 if ((index >= start) && (index < end) && (flags & type)) {
1596                         allowed = !!test_bit(index - start, bitmap);
1597                         break;
1598                 }
1599         }
1600
1601 out:
1602         srcu_read_unlock(&kvm->srcu, idx);
1603
1604         return allowed;
1605 }
1606 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1607
1608 /*
1609  * Write @data into the MSR specified by @index.  Select MSR specific fault
1610  * checks are bypassed if @host_initiated is %true.
1611  * Returns 0 on success, non-0 otherwise.
1612  * Assumes vcpu_load() was already called.
1613  */
1614 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1615                          bool host_initiated)
1616 {
1617         struct msr_data msr;
1618
1619         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1620                 return KVM_MSR_RET_FILTERED;
1621
1622         switch (index) {
1623         case MSR_FS_BASE:
1624         case MSR_GS_BASE:
1625         case MSR_KERNEL_GS_BASE:
1626         case MSR_CSTAR:
1627         case MSR_LSTAR:
1628                 if (is_noncanonical_address(data, vcpu))
1629                         return 1;
1630                 break;
1631         case MSR_IA32_SYSENTER_EIP:
1632         case MSR_IA32_SYSENTER_ESP:
1633                 /*
1634                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1635                  * non-canonical address is written on Intel but not on
1636                  * AMD (which ignores the top 32-bits, because it does
1637                  * not implement 64-bit SYSENTER).
1638                  *
1639                  * 64-bit code should hence be able to write a non-canonical
1640                  * value on AMD.  Making the address canonical ensures that
1641                  * vmentry does not fail on Intel after writing a non-canonical
1642                  * value, and that something deterministic happens if the guest
1643                  * invokes 64-bit SYSENTER.
1644                  */
1645                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1646         }
1647
1648         msr.data = data;
1649         msr.index = index;
1650         msr.host_initiated = host_initiated;
1651
1652         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1653 }
1654
1655 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1656                                      u32 index, u64 data, bool host_initiated)
1657 {
1658         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1659
1660         if (ret == KVM_MSR_RET_INVALID)
1661                 if (kvm_msr_ignored_check(index, data, true))
1662                         ret = 0;
1663
1664         return ret;
1665 }
1666
1667 /*
1668  * Read the MSR specified by @index into @data.  Select MSR specific fault
1669  * checks are bypassed if @host_initiated is %true.
1670  * Returns 0 on success, non-0 otherwise.
1671  * Assumes vcpu_load() was already called.
1672  */
1673 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1674                   bool host_initiated)
1675 {
1676         struct msr_data msr;
1677         int ret;
1678
1679         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1680                 return KVM_MSR_RET_FILTERED;
1681
1682         msr.index = index;
1683         msr.host_initiated = host_initiated;
1684
1685         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1686         if (!ret)
1687                 *data = msr.data;
1688         return ret;
1689 }
1690
1691 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1692                                      u32 index, u64 *data, bool host_initiated)
1693 {
1694         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1695
1696         if (ret == KVM_MSR_RET_INVALID) {
1697                 /* Unconditionally clear *data for simplicity */
1698                 *data = 0;
1699                 if (kvm_msr_ignored_check(index, 0, false))
1700                         ret = 0;
1701         }
1702
1703         return ret;
1704 }
1705
1706 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1707 {
1708         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1709 }
1710 EXPORT_SYMBOL_GPL(kvm_get_msr);
1711
1712 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1713 {
1714         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1715 }
1716 EXPORT_SYMBOL_GPL(kvm_set_msr);
1717
1718 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1719 {
1720         int err = vcpu->run->msr.error;
1721         if (!err) {
1722                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1723                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1724         }
1725
1726         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1727 }
1728
1729 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1730 {
1731         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1732 }
1733
1734 static u64 kvm_msr_reason(int r)
1735 {
1736         switch (r) {
1737         case KVM_MSR_RET_INVALID:
1738                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1739         case KVM_MSR_RET_FILTERED:
1740                 return KVM_MSR_EXIT_REASON_FILTER;
1741         default:
1742                 return KVM_MSR_EXIT_REASON_INVAL;
1743         }
1744 }
1745
1746 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1747                               u32 exit_reason, u64 data,
1748                               int (*completion)(struct kvm_vcpu *vcpu),
1749                               int r)
1750 {
1751         u64 msr_reason = kvm_msr_reason(r);
1752
1753         /* Check if the user wanted to know about this MSR fault */
1754         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1755                 return 0;
1756
1757         vcpu->run->exit_reason = exit_reason;
1758         vcpu->run->msr.error = 0;
1759         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1760         vcpu->run->msr.reason = msr_reason;
1761         vcpu->run->msr.index = index;
1762         vcpu->run->msr.data = data;
1763         vcpu->arch.complete_userspace_io = completion;
1764
1765         return 1;
1766 }
1767
1768 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1769 {
1770         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1771                                    complete_emulated_rdmsr, r);
1772 }
1773
1774 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1775 {
1776         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1777                                    complete_emulated_wrmsr, r);
1778 }
1779
1780 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1781 {
1782         u32 ecx = kvm_rcx_read(vcpu);
1783         u64 data;
1784         int r;
1785
1786         r = kvm_get_msr(vcpu, ecx, &data);
1787
1788         /* MSR read failed? See if we should ask user space */
1789         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1790                 /* Bounce to user space */
1791                 return 0;
1792         }
1793
1794         if (!r) {
1795                 trace_kvm_msr_read(ecx, data);
1796
1797                 kvm_rax_write(vcpu, data & -1u);
1798                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1799         } else {
1800                 trace_kvm_msr_read_ex(ecx);
1801         }
1802
1803         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1804 }
1805 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1806
1807 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1808 {
1809         u32 ecx = kvm_rcx_read(vcpu);
1810         u64 data = kvm_read_edx_eax(vcpu);
1811         int r;
1812
1813         r = kvm_set_msr(vcpu, ecx, data);
1814
1815         /* MSR write failed? See if we should ask user space */
1816         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1817                 /* Bounce to user space */
1818                 return 0;
1819
1820         /* Signal all other negative errors to userspace */
1821         if (r < 0)
1822                 return r;
1823
1824         if (!r)
1825                 trace_kvm_msr_write(ecx, data);
1826         else
1827                 trace_kvm_msr_write_ex(ecx, data);
1828
1829         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1830 }
1831 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1832
1833 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1834 {
1835         return kvm_skip_emulated_instruction(vcpu);
1836 }
1837 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1838
1839 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1840 {
1841         /* Treat an INVD instruction as a NOP and just skip it. */
1842         return kvm_emulate_as_nop(vcpu);
1843 }
1844 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1845
1846 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1847 {
1848         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1849         return kvm_emulate_as_nop(vcpu);
1850 }
1851 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1852
1853 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1854 {
1855         kvm_queue_exception(vcpu, UD_VECTOR);
1856         return 1;
1857 }
1858 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1859
1860 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1861 {
1862         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1863         return kvm_emulate_as_nop(vcpu);
1864 }
1865 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1866
1867 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1868 {
1869         xfer_to_guest_mode_prepare();
1870         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1871                 xfer_to_guest_mode_work_pending();
1872 }
1873
1874 /*
1875  * The fast path for frequent and performance sensitive wrmsr emulation,
1876  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1877  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1878  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1879  * other cases which must be called after interrupts are enabled on the host.
1880  */
1881 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1882 {
1883         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1884                 return 1;
1885
1886         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1887                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1888                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1889                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1890
1891                 data &= ~(1 << 12);
1892                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1893                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1894                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1895                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1896                 return 0;
1897         }
1898
1899         return 1;
1900 }
1901
1902 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1903 {
1904         if (!kvm_can_use_hv_timer(vcpu))
1905                 return 1;
1906
1907         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1908         return 0;
1909 }
1910
1911 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1912 {
1913         u32 msr = kvm_rcx_read(vcpu);
1914         u64 data;
1915         fastpath_t ret = EXIT_FASTPATH_NONE;
1916
1917         switch (msr) {
1918         case APIC_BASE_MSR + (APIC_ICR >> 4):
1919                 data = kvm_read_edx_eax(vcpu);
1920                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1921                         kvm_skip_emulated_instruction(vcpu);
1922                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1923                 }
1924                 break;
1925         case MSR_IA32_TSC_DEADLINE:
1926                 data = kvm_read_edx_eax(vcpu);
1927                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1928                         kvm_skip_emulated_instruction(vcpu);
1929                         ret = EXIT_FASTPATH_REENTER_GUEST;
1930                 }
1931                 break;
1932         default:
1933                 break;
1934         }
1935
1936         if (ret != EXIT_FASTPATH_NONE)
1937                 trace_kvm_msr_write(msr, data);
1938
1939         return ret;
1940 }
1941 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1942
1943 /*
1944  * Adapt set_msr() to msr_io()'s calling convention
1945  */
1946 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1947 {
1948         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1949 }
1950
1951 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1952 {
1953         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1954 }
1955
1956 #ifdef CONFIG_X86_64
1957 struct pvclock_clock {
1958         int vclock_mode;
1959         u64 cycle_last;
1960         u64 mask;
1961         u32 mult;
1962         u32 shift;
1963         u64 base_cycles;
1964         u64 offset;
1965 };
1966
1967 struct pvclock_gtod_data {
1968         seqcount_t      seq;
1969
1970         struct pvclock_clock clock; /* extract of a clocksource struct */
1971         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1972
1973         ktime_t         offs_boot;
1974         u64             wall_time_sec;
1975 };
1976
1977 static struct pvclock_gtod_data pvclock_gtod_data;
1978
1979 static void update_pvclock_gtod(struct timekeeper *tk)
1980 {
1981         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1982
1983         write_seqcount_begin(&vdata->seq);
1984
1985         /* copy pvclock gtod data */
1986         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1987         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1988         vdata->clock.mask               = tk->tkr_mono.mask;
1989         vdata->clock.mult               = tk->tkr_mono.mult;
1990         vdata->clock.shift              = tk->tkr_mono.shift;
1991         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1992         vdata->clock.offset             = tk->tkr_mono.base;
1993
1994         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1995         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1996         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1997         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1998         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1999         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2000         vdata->raw_clock.offset         = tk->tkr_raw.base;
2001
2002         vdata->wall_time_sec            = tk->xtime_sec;
2003
2004         vdata->offs_boot                = tk->offs_boot;
2005
2006         write_seqcount_end(&vdata->seq);
2007 }
2008
2009 static s64 get_kvmclock_base_ns(void)
2010 {
2011         /* Count up from boot time, but with the frequency of the raw clock.  */
2012         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2013 }
2014 #else
2015 static s64 get_kvmclock_base_ns(void)
2016 {
2017         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2018         return ktime_get_boottime_ns();
2019 }
2020 #endif
2021
2022 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2023 {
2024         int version;
2025         int r;
2026         struct pvclock_wall_clock wc;
2027         u32 wc_sec_hi;
2028         u64 wall_nsec;
2029
2030         if (!wall_clock)
2031                 return;
2032
2033         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2034         if (r)
2035                 return;
2036
2037         if (version & 1)
2038                 ++version;  /* first time write, random junk */
2039
2040         ++version;
2041
2042         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2043                 return;
2044
2045         /*
2046          * The guest calculates current wall clock time by adding
2047          * system time (updated by kvm_guest_time_update below) to the
2048          * wall clock specified here.  We do the reverse here.
2049          */
2050         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2051
2052         wc.nsec = do_div(wall_nsec, 1000000000);
2053         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2054         wc.version = version;
2055
2056         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2057
2058         if (sec_hi_ofs) {
2059                 wc_sec_hi = wall_nsec >> 32;
2060                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2061                                 &wc_sec_hi, sizeof(wc_sec_hi));
2062         }
2063
2064         version++;
2065         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2066 }
2067
2068 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2069                                   bool old_msr, bool host_initiated)
2070 {
2071         struct kvm_arch *ka = &vcpu->kvm->arch;
2072
2073         if (vcpu->vcpu_id == 0 && !host_initiated) {
2074                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2075                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2076
2077                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2078         }
2079
2080         vcpu->arch.time = system_time;
2081         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2082
2083         /* we verify if the enable bit is set... */
2084         vcpu->arch.pv_time_enabled = false;
2085         if (!(system_time & 1))
2086                 return;
2087
2088         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2089                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2090                                        sizeof(struct pvclock_vcpu_time_info)))
2091                 vcpu->arch.pv_time_enabled = true;
2092
2093         return;
2094 }
2095
2096 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2097 {
2098         do_shl32_div32(dividend, divisor);
2099         return dividend;
2100 }
2101
2102 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2103                                s8 *pshift, u32 *pmultiplier)
2104 {
2105         uint64_t scaled64;
2106         int32_t  shift = 0;
2107         uint64_t tps64;
2108         uint32_t tps32;
2109
2110         tps64 = base_hz;
2111         scaled64 = scaled_hz;
2112         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2113                 tps64 >>= 1;
2114                 shift--;
2115         }
2116
2117         tps32 = (uint32_t)tps64;
2118         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2119                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2120                         scaled64 >>= 1;
2121                 else
2122                         tps32 <<= 1;
2123                 shift++;
2124         }
2125
2126         *pshift = shift;
2127         *pmultiplier = div_frac(scaled64, tps32);
2128 }
2129
2130 #ifdef CONFIG_X86_64
2131 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2132 #endif
2133
2134 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2135 static unsigned long max_tsc_khz;
2136
2137 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2138 {
2139         u64 v = (u64)khz * (1000000 + ppm);
2140         do_div(v, 1000000);
2141         return v;
2142 }
2143
2144 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2145 {
2146         u64 ratio;
2147
2148         /* Guest TSC same frequency as host TSC? */
2149         if (!scale) {
2150                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2151                 return 0;
2152         }
2153
2154         /* TSC scaling supported? */
2155         if (!kvm_has_tsc_control) {
2156                 if (user_tsc_khz > tsc_khz) {
2157                         vcpu->arch.tsc_catchup = 1;
2158                         vcpu->arch.tsc_always_catchup = 1;
2159                         return 0;
2160                 } else {
2161                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2162                         return -1;
2163                 }
2164         }
2165
2166         /* TSC scaling required  - calculate ratio */
2167         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2168                                 user_tsc_khz, tsc_khz);
2169
2170         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2171                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2172                                     user_tsc_khz);
2173                 return -1;
2174         }
2175
2176         vcpu->arch.tsc_scaling_ratio = ratio;
2177         return 0;
2178 }
2179
2180 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2181 {
2182         u32 thresh_lo, thresh_hi;
2183         int use_scaling = 0;
2184
2185         /* tsc_khz can be zero if TSC calibration fails */
2186         if (user_tsc_khz == 0) {
2187                 /* set tsc_scaling_ratio to a safe value */
2188                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2189                 return -1;
2190         }
2191
2192         /* Compute a scale to convert nanoseconds in TSC cycles */
2193         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2194                            &vcpu->arch.virtual_tsc_shift,
2195                            &vcpu->arch.virtual_tsc_mult);
2196         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2197
2198         /*
2199          * Compute the variation in TSC rate which is acceptable
2200          * within the range of tolerance and decide if the
2201          * rate being applied is within that bounds of the hardware
2202          * rate.  If so, no scaling or compensation need be done.
2203          */
2204         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2205         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2206         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2207                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2208                 use_scaling = 1;
2209         }
2210         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2211 }
2212
2213 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2214 {
2215         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2216                                       vcpu->arch.virtual_tsc_mult,
2217                                       vcpu->arch.virtual_tsc_shift);
2218         tsc += vcpu->arch.this_tsc_write;
2219         return tsc;
2220 }
2221
2222 static inline int gtod_is_based_on_tsc(int mode)
2223 {
2224         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2225 }
2226
2227 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2228 {
2229 #ifdef CONFIG_X86_64
2230         bool vcpus_matched;
2231         struct kvm_arch *ka = &vcpu->kvm->arch;
2232         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2233
2234         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2235                          atomic_read(&vcpu->kvm->online_vcpus));
2236
2237         /*
2238          * Once the masterclock is enabled, always perform request in
2239          * order to update it.
2240          *
2241          * In order to enable masterclock, the host clocksource must be TSC
2242          * and the vcpus need to have matched TSCs.  When that happens,
2243          * perform request to enable masterclock.
2244          */
2245         if (ka->use_master_clock ||
2246             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2247                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2248
2249         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2250                             atomic_read(&vcpu->kvm->online_vcpus),
2251                             ka->use_master_clock, gtod->clock.vclock_mode);
2252 #endif
2253 }
2254
2255 /*
2256  * Multiply tsc by a fixed point number represented by ratio.
2257  *
2258  * The most significant 64-N bits (mult) of ratio represent the
2259  * integral part of the fixed point number; the remaining N bits
2260  * (frac) represent the fractional part, ie. ratio represents a fixed
2261  * point number (mult + frac * 2^(-N)).
2262  *
2263  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2264  */
2265 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2266 {
2267         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2268 }
2269
2270 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2271 {
2272         u64 _tsc = tsc;
2273         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2274
2275         if (ratio != kvm_default_tsc_scaling_ratio)
2276                 _tsc = __scale_tsc(ratio, tsc);
2277
2278         return _tsc;
2279 }
2280 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2281
2282 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2283 {
2284         u64 tsc;
2285
2286         tsc = kvm_scale_tsc(vcpu, rdtsc());
2287
2288         return target_tsc - tsc;
2289 }
2290
2291 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2292 {
2293         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2294 }
2295 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2296
2297 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2298 {
2299         vcpu->arch.l1_tsc_offset = offset;
2300         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2301 }
2302
2303 static inline bool kvm_check_tsc_unstable(void)
2304 {
2305 #ifdef CONFIG_X86_64
2306         /*
2307          * TSC is marked unstable when we're running on Hyper-V,
2308          * 'TSC page' clocksource is good.
2309          */
2310         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2311                 return false;
2312 #endif
2313         return check_tsc_unstable();
2314 }
2315
2316 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2317 {
2318         struct kvm *kvm = vcpu->kvm;
2319         u64 offset, ns, elapsed;
2320         unsigned long flags;
2321         bool matched;
2322         bool already_matched;
2323         bool synchronizing = false;
2324
2325         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2326         offset = kvm_compute_tsc_offset(vcpu, data);
2327         ns = get_kvmclock_base_ns();
2328         elapsed = ns - kvm->arch.last_tsc_nsec;
2329
2330         if (vcpu->arch.virtual_tsc_khz) {
2331                 if (data == 0) {
2332                         /*
2333                          * detection of vcpu initialization -- need to sync
2334                          * with other vCPUs. This particularly helps to keep
2335                          * kvm_clock stable after CPU hotplug
2336                          */
2337                         synchronizing = true;
2338                 } else {
2339                         u64 tsc_exp = kvm->arch.last_tsc_write +
2340                                                 nsec_to_cycles(vcpu, elapsed);
2341                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2342                         /*
2343                          * Special case: TSC write with a small delta (1 second)
2344                          * of virtual cycle time against real time is
2345                          * interpreted as an attempt to synchronize the CPU.
2346                          */
2347                         synchronizing = data < tsc_exp + tsc_hz &&
2348                                         data + tsc_hz > tsc_exp;
2349                 }
2350         }
2351
2352         /*
2353          * For a reliable TSC, we can match TSC offsets, and for an unstable
2354          * TSC, we add elapsed time in this computation.  We could let the
2355          * compensation code attempt to catch up if we fall behind, but
2356          * it's better to try to match offsets from the beginning.
2357          */
2358         if (synchronizing &&
2359             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2360                 if (!kvm_check_tsc_unstable()) {
2361                         offset = kvm->arch.cur_tsc_offset;
2362                 } else {
2363                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2364                         data += delta;
2365                         offset = kvm_compute_tsc_offset(vcpu, data);
2366                 }
2367                 matched = true;
2368                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2369         } else {
2370                 /*
2371                  * We split periods of matched TSC writes into generations.
2372                  * For each generation, we track the original measured
2373                  * nanosecond time, offset, and write, so if TSCs are in
2374                  * sync, we can match exact offset, and if not, we can match
2375                  * exact software computation in compute_guest_tsc()
2376                  *
2377                  * These values are tracked in kvm->arch.cur_xxx variables.
2378                  */
2379                 kvm->arch.cur_tsc_generation++;
2380                 kvm->arch.cur_tsc_nsec = ns;
2381                 kvm->arch.cur_tsc_write = data;
2382                 kvm->arch.cur_tsc_offset = offset;
2383                 matched = false;
2384         }
2385
2386         /*
2387          * We also track th most recent recorded KHZ, write and time to
2388          * allow the matching interval to be extended at each write.
2389          */
2390         kvm->arch.last_tsc_nsec = ns;
2391         kvm->arch.last_tsc_write = data;
2392         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2393
2394         vcpu->arch.last_guest_tsc = data;
2395
2396         /* Keep track of which generation this VCPU has synchronized to */
2397         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2398         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2399         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2400
2401         kvm_vcpu_write_tsc_offset(vcpu, offset);
2402         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2403
2404         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2405         if (!matched) {
2406                 kvm->arch.nr_vcpus_matched_tsc = 0;
2407         } else if (!already_matched) {
2408                 kvm->arch.nr_vcpus_matched_tsc++;
2409         }
2410
2411         kvm_track_tsc_matching(vcpu);
2412         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2413 }
2414
2415 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2416                                            s64 adjustment)
2417 {
2418         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2419         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2420 }
2421
2422 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2423 {
2424         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2425                 WARN_ON(adjustment < 0);
2426         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2427         adjust_tsc_offset_guest(vcpu, adjustment);
2428 }
2429
2430 #ifdef CONFIG_X86_64
2431
2432 static u64 read_tsc(void)
2433 {
2434         u64 ret = (u64)rdtsc_ordered();
2435         u64 last = pvclock_gtod_data.clock.cycle_last;
2436
2437         if (likely(ret >= last))
2438                 return ret;
2439
2440         /*
2441          * GCC likes to generate cmov here, but this branch is extremely
2442          * predictable (it's just a function of time and the likely is
2443          * very likely) and there's a data dependence, so force GCC
2444          * to generate a branch instead.  I don't barrier() because
2445          * we don't actually need a barrier, and if this function
2446          * ever gets inlined it will generate worse code.
2447          */
2448         asm volatile ("");
2449         return last;
2450 }
2451
2452 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2453                           int *mode)
2454 {
2455         long v;
2456         u64 tsc_pg_val;
2457
2458         switch (clock->vclock_mode) {
2459         case VDSO_CLOCKMODE_HVCLOCK:
2460                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2461                                                   tsc_timestamp);
2462                 if (tsc_pg_val != U64_MAX) {
2463                         /* TSC page valid */
2464                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2465                         v = (tsc_pg_val - clock->cycle_last) &
2466                                 clock->mask;
2467                 } else {
2468                         /* TSC page invalid */
2469                         *mode = VDSO_CLOCKMODE_NONE;
2470                 }
2471                 break;
2472         case VDSO_CLOCKMODE_TSC:
2473                 *mode = VDSO_CLOCKMODE_TSC;
2474                 *tsc_timestamp = read_tsc();
2475                 v = (*tsc_timestamp - clock->cycle_last) &
2476                         clock->mask;
2477                 break;
2478         default:
2479                 *mode = VDSO_CLOCKMODE_NONE;
2480         }
2481
2482         if (*mode == VDSO_CLOCKMODE_NONE)
2483                 *tsc_timestamp = v = 0;
2484
2485         return v * clock->mult;
2486 }
2487
2488 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2489 {
2490         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2491         unsigned long seq;
2492         int mode;
2493         u64 ns;
2494
2495         do {
2496                 seq = read_seqcount_begin(&gtod->seq);
2497                 ns = gtod->raw_clock.base_cycles;
2498                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2499                 ns >>= gtod->raw_clock.shift;
2500                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2501         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2502         *t = ns;
2503
2504         return mode;
2505 }
2506
2507 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2508 {
2509         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2510         unsigned long seq;
2511         int mode;
2512         u64 ns;
2513
2514         do {
2515                 seq = read_seqcount_begin(&gtod->seq);
2516                 ts->tv_sec = gtod->wall_time_sec;
2517                 ns = gtod->clock.base_cycles;
2518                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2519                 ns >>= gtod->clock.shift;
2520         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2521
2522         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2523         ts->tv_nsec = ns;
2524
2525         return mode;
2526 }
2527
2528 /* returns true if host is using TSC based clocksource */
2529 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2530 {
2531         /* checked again under seqlock below */
2532         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2533                 return false;
2534
2535         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2536                                                       tsc_timestamp));
2537 }
2538
2539 /* returns true if host is using TSC based clocksource */
2540 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2541                                            u64 *tsc_timestamp)
2542 {
2543         /* checked again under seqlock below */
2544         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2545                 return false;
2546
2547         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2548 }
2549 #endif
2550
2551 /*
2552  *
2553  * Assuming a stable TSC across physical CPUS, and a stable TSC
2554  * across virtual CPUs, the following condition is possible.
2555  * Each numbered line represents an event visible to both
2556  * CPUs at the next numbered event.
2557  *
2558  * "timespecX" represents host monotonic time. "tscX" represents
2559  * RDTSC value.
2560  *
2561  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2562  *
2563  * 1.  read timespec0,tsc0
2564  * 2.                                   | timespec1 = timespec0 + N
2565  *                                      | tsc1 = tsc0 + M
2566  * 3. transition to guest               | transition to guest
2567  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2568  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2569  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2570  *
2571  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2572  *
2573  *      - ret0 < ret1
2574  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2575  *              ...
2576  *      - 0 < N - M => M < N
2577  *
2578  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2579  * always the case (the difference between two distinct xtime instances
2580  * might be smaller then the difference between corresponding TSC reads,
2581  * when updating guest vcpus pvclock areas).
2582  *
2583  * To avoid that problem, do not allow visibility of distinct
2584  * system_timestamp/tsc_timestamp values simultaneously: use a master
2585  * copy of host monotonic time values. Update that master copy
2586  * in lockstep.
2587  *
2588  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2589  *
2590  */
2591
2592 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2593 {
2594 #ifdef CONFIG_X86_64
2595         struct kvm_arch *ka = &kvm->arch;
2596         int vclock_mode;
2597         bool host_tsc_clocksource, vcpus_matched;
2598
2599         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2600                         atomic_read(&kvm->online_vcpus));
2601
2602         /*
2603          * If the host uses TSC clock, then passthrough TSC as stable
2604          * to the guest.
2605          */
2606         host_tsc_clocksource = kvm_get_time_and_clockread(
2607                                         &ka->master_kernel_ns,
2608                                         &ka->master_cycle_now);
2609
2610         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2611                                 && !ka->backwards_tsc_observed
2612                                 && !ka->boot_vcpu_runs_old_kvmclock;
2613
2614         if (ka->use_master_clock)
2615                 atomic_set(&kvm_guest_has_master_clock, 1);
2616
2617         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2618         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2619                                         vcpus_matched);
2620 #endif
2621 }
2622
2623 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2624 {
2625         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2626 }
2627
2628 static void kvm_gen_update_masterclock(struct kvm *kvm)
2629 {
2630 #ifdef CONFIG_X86_64
2631         int i;
2632         struct kvm_vcpu *vcpu;
2633         struct kvm_arch *ka = &kvm->arch;
2634         unsigned long flags;
2635
2636         kvm_hv_invalidate_tsc_page(kvm);
2637
2638         kvm_make_mclock_inprogress_request(kvm);
2639
2640         /* no guest entries from this point */
2641         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2642         pvclock_update_vm_gtod_copy(kvm);
2643         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2644
2645         kvm_for_each_vcpu(i, vcpu, kvm)
2646                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2647
2648         /* guest entries allowed */
2649         kvm_for_each_vcpu(i, vcpu, kvm)
2650                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2651 #endif
2652 }
2653
2654 u64 get_kvmclock_ns(struct kvm *kvm)
2655 {
2656         struct kvm_arch *ka = &kvm->arch;
2657         struct pvclock_vcpu_time_info hv_clock;
2658         unsigned long flags;
2659         u64 ret;
2660
2661         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2662         if (!ka->use_master_clock) {
2663                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2664                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2665         }
2666
2667         hv_clock.tsc_timestamp = ka->master_cycle_now;
2668         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2669         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2670
2671         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2672         get_cpu();
2673
2674         if (__this_cpu_read(cpu_tsc_khz)) {
2675                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2676                                    &hv_clock.tsc_shift,
2677                                    &hv_clock.tsc_to_system_mul);
2678                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2679         } else
2680                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2681
2682         put_cpu();
2683
2684         return ret;
2685 }
2686
2687 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2688                                    struct gfn_to_hva_cache *cache,
2689                                    unsigned int offset)
2690 {
2691         struct kvm_vcpu_arch *vcpu = &v->arch;
2692         struct pvclock_vcpu_time_info guest_hv_clock;
2693
2694         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2695                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2696                 return;
2697
2698         /* This VCPU is paused, but it's legal for a guest to read another
2699          * VCPU's kvmclock, so we really have to follow the specification where
2700          * it says that version is odd if data is being modified, and even after
2701          * it is consistent.
2702          *
2703          * Version field updates must be kept separate.  This is because
2704          * kvm_write_guest_cached might use a "rep movs" instruction, and
2705          * writes within a string instruction are weakly ordered.  So there
2706          * are three writes overall.
2707          *
2708          * As a small optimization, only write the version field in the first
2709          * and third write.  The vcpu->pv_time cache is still valid, because the
2710          * version field is the first in the struct.
2711          */
2712         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2713
2714         if (guest_hv_clock.version & 1)
2715                 ++guest_hv_clock.version;  /* first time write, random junk */
2716
2717         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2718         kvm_write_guest_offset_cached(v->kvm, cache,
2719                                       &vcpu->hv_clock, offset,
2720                                       sizeof(vcpu->hv_clock.version));
2721
2722         smp_wmb();
2723
2724         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2725         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2726
2727         if (vcpu->pvclock_set_guest_stopped_request) {
2728                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2729                 vcpu->pvclock_set_guest_stopped_request = false;
2730         }
2731
2732         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2733
2734         kvm_write_guest_offset_cached(v->kvm, cache,
2735                                       &vcpu->hv_clock, offset,
2736                                       sizeof(vcpu->hv_clock));
2737
2738         smp_wmb();
2739
2740         vcpu->hv_clock.version++;
2741         kvm_write_guest_offset_cached(v->kvm, cache,
2742                                      &vcpu->hv_clock, offset,
2743                                      sizeof(vcpu->hv_clock.version));
2744 }
2745
2746 static int kvm_guest_time_update(struct kvm_vcpu *v)
2747 {
2748         unsigned long flags, tgt_tsc_khz;
2749         struct kvm_vcpu_arch *vcpu = &v->arch;
2750         struct kvm_arch *ka = &v->kvm->arch;
2751         s64 kernel_ns;
2752         u64 tsc_timestamp, host_tsc;
2753         u8 pvclock_flags;
2754         bool use_master_clock;
2755
2756         kernel_ns = 0;
2757         host_tsc = 0;
2758
2759         /*
2760          * If the host uses TSC clock, then passthrough TSC as stable
2761          * to the guest.
2762          */
2763         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2764         use_master_clock = ka->use_master_clock;
2765         if (use_master_clock) {
2766                 host_tsc = ka->master_cycle_now;
2767                 kernel_ns = ka->master_kernel_ns;
2768         }
2769         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2770
2771         /* Keep irq disabled to prevent changes to the clock */
2772         local_irq_save(flags);
2773         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2774         if (unlikely(tgt_tsc_khz == 0)) {
2775                 local_irq_restore(flags);
2776                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2777                 return 1;
2778         }
2779         if (!use_master_clock) {
2780                 host_tsc = rdtsc();
2781                 kernel_ns = get_kvmclock_base_ns();
2782         }
2783
2784         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2785
2786         /*
2787          * We may have to catch up the TSC to match elapsed wall clock
2788          * time for two reasons, even if kvmclock is used.
2789          *   1) CPU could have been running below the maximum TSC rate
2790          *   2) Broken TSC compensation resets the base at each VCPU
2791          *      entry to avoid unknown leaps of TSC even when running
2792          *      again on the same CPU.  This may cause apparent elapsed
2793          *      time to disappear, and the guest to stand still or run
2794          *      very slowly.
2795          */
2796         if (vcpu->tsc_catchup) {
2797                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2798                 if (tsc > tsc_timestamp) {
2799                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2800                         tsc_timestamp = tsc;
2801                 }
2802         }
2803
2804         local_irq_restore(flags);
2805
2806         /* With all the info we got, fill in the values */
2807
2808         if (kvm_has_tsc_control)
2809                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2810
2811         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2812                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2813                                    &vcpu->hv_clock.tsc_shift,
2814                                    &vcpu->hv_clock.tsc_to_system_mul);
2815                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2816         }
2817
2818         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2819         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2820         vcpu->last_guest_tsc = tsc_timestamp;
2821
2822         /* If the host uses TSC clocksource, then it is stable */
2823         pvclock_flags = 0;
2824         if (use_master_clock)
2825                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2826
2827         vcpu->hv_clock.flags = pvclock_flags;
2828
2829         if (vcpu->pv_time_enabled)
2830                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2831         if (vcpu->xen.vcpu_info_set)
2832                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2833                                        offsetof(struct compat_vcpu_info, time));
2834         if (vcpu->xen.vcpu_time_info_set)
2835                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2836         if (v == kvm_get_vcpu(v->kvm, 0))
2837                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2838         return 0;
2839 }
2840
2841 /*
2842  * kvmclock updates which are isolated to a given vcpu, such as
2843  * vcpu->cpu migration, should not allow system_timestamp from
2844  * the rest of the vcpus to remain static. Otherwise ntp frequency
2845  * correction applies to one vcpu's system_timestamp but not
2846  * the others.
2847  *
2848  * So in those cases, request a kvmclock update for all vcpus.
2849  * We need to rate-limit these requests though, as they can
2850  * considerably slow guests that have a large number of vcpus.
2851  * The time for a remote vcpu to update its kvmclock is bound
2852  * by the delay we use to rate-limit the updates.
2853  */
2854
2855 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2856
2857 static void kvmclock_update_fn(struct work_struct *work)
2858 {
2859         int i;
2860         struct delayed_work *dwork = to_delayed_work(work);
2861         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2862                                            kvmclock_update_work);
2863         struct kvm *kvm = container_of(ka, struct kvm, arch);
2864         struct kvm_vcpu *vcpu;
2865
2866         kvm_for_each_vcpu(i, vcpu, kvm) {
2867                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2868                 kvm_vcpu_kick(vcpu);
2869         }
2870 }
2871
2872 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2873 {
2874         struct kvm *kvm = v->kvm;
2875
2876         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2877         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2878                                         KVMCLOCK_UPDATE_DELAY);
2879 }
2880
2881 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2882
2883 static void kvmclock_sync_fn(struct work_struct *work)
2884 {
2885         struct delayed_work *dwork = to_delayed_work(work);
2886         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2887                                            kvmclock_sync_work);
2888         struct kvm *kvm = container_of(ka, struct kvm, arch);
2889
2890         if (!kvmclock_periodic_sync)
2891                 return;
2892
2893         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2894         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2895                                         KVMCLOCK_SYNC_PERIOD);
2896 }
2897
2898 /*
2899  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2900  */
2901 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2902 {
2903         /* McStatusWrEn enabled? */
2904         if (guest_cpuid_is_amd_or_hygon(vcpu))
2905                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2906
2907         return false;
2908 }
2909
2910 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2911 {
2912         u64 mcg_cap = vcpu->arch.mcg_cap;
2913         unsigned bank_num = mcg_cap & 0xff;
2914         u32 msr = msr_info->index;
2915         u64 data = msr_info->data;
2916
2917         switch (msr) {
2918         case MSR_IA32_MCG_STATUS:
2919                 vcpu->arch.mcg_status = data;
2920                 break;
2921         case MSR_IA32_MCG_CTL:
2922                 if (!(mcg_cap & MCG_CTL_P) &&
2923                     (data || !msr_info->host_initiated))
2924                         return 1;
2925                 if (data != 0 && data != ~(u64)0)
2926                         return 1;
2927                 vcpu->arch.mcg_ctl = data;
2928                 break;
2929         default:
2930                 if (msr >= MSR_IA32_MC0_CTL &&
2931                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2932                         u32 offset = array_index_nospec(
2933                                 msr - MSR_IA32_MC0_CTL,
2934                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2935
2936                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2937                          * some Linux kernels though clear bit 10 in bank 4 to
2938                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2939                          * this to avoid an uncatched #GP in the guest
2940                          */
2941                         if ((offset & 0x3) == 0 &&
2942                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2943                                 return -1;
2944
2945                         /* MCi_STATUS */
2946                         if (!msr_info->host_initiated &&
2947                             (offset & 0x3) == 1 && data != 0) {
2948                                 if (!can_set_mci_status(vcpu))
2949                                         return -1;
2950                         }
2951
2952                         vcpu->arch.mce_banks[offset] = data;
2953                         break;
2954                 }
2955                 return 1;
2956         }
2957         return 0;
2958 }
2959
2960 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2961 {
2962         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2963
2964         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2965 }
2966
2967 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2968 {
2969         gpa_t gpa = data & ~0x3f;
2970
2971         /* Bits 4:5 are reserved, Should be zero */
2972         if (data & 0x30)
2973                 return 1;
2974
2975         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2976             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2977                 return 1;
2978
2979         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2980             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2981                 return 1;
2982
2983         if (!lapic_in_kernel(vcpu))
2984                 return data ? 1 : 0;
2985
2986         vcpu->arch.apf.msr_en_val = data;
2987
2988         if (!kvm_pv_async_pf_enabled(vcpu)) {
2989                 kvm_clear_async_pf_completion_queue(vcpu);
2990                 kvm_async_pf_hash_reset(vcpu);
2991                 return 0;
2992         }
2993
2994         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2995                                         sizeof(u64)))
2996                 return 1;
2997
2998         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2999         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3000
3001         kvm_async_pf_wakeup_all(vcpu);
3002
3003         return 0;
3004 }
3005
3006 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3007 {
3008         /* Bits 8-63 are reserved */
3009         if (data >> 8)
3010                 return 1;
3011
3012         if (!lapic_in_kernel(vcpu))
3013                 return 1;
3014
3015         vcpu->arch.apf.msr_int_val = data;
3016
3017         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3018
3019         return 0;
3020 }
3021
3022 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3023 {
3024         vcpu->arch.pv_time_enabled = false;
3025         vcpu->arch.time = 0;
3026 }
3027
3028 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3029 {
3030         ++vcpu->stat.tlb_flush;
3031         static_call(kvm_x86_tlb_flush_all)(vcpu);
3032 }
3033
3034 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3035 {
3036         ++vcpu->stat.tlb_flush;
3037         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3038 }
3039
3040 static void record_steal_time(struct kvm_vcpu *vcpu)
3041 {
3042         struct kvm_host_map map;
3043         struct kvm_steal_time *st;
3044
3045         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3046                 kvm_xen_runstate_set_running(vcpu);
3047                 return;
3048         }
3049
3050         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3051                 return;
3052
3053         /* -EAGAIN is returned in atomic context so we can just return. */
3054         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3055                         &map, &vcpu->arch.st.cache, false))
3056                 return;
3057
3058         st = map.hva +
3059                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3060
3061         /*
3062          * Doing a TLB flush here, on the guest's behalf, can avoid
3063          * expensive IPIs.
3064          */
3065         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3066                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3067                                        st->preempted & KVM_VCPU_FLUSH_TLB);
3068                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
3069                         kvm_vcpu_flush_tlb_guest(vcpu);
3070         }
3071
3072         vcpu->arch.st.preempted = 0;
3073
3074         if (st->version & 1)
3075                 st->version += 1;  /* first time write, random junk */
3076
3077         st->version += 1;
3078
3079         smp_wmb();
3080
3081         st->steal += current->sched_info.run_delay -
3082                 vcpu->arch.st.last_steal;
3083         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3084
3085         smp_wmb();
3086
3087         st->version += 1;
3088
3089         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3090 }
3091
3092 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3093 {
3094         bool pr = false;
3095         u32 msr = msr_info->index;
3096         u64 data = msr_info->data;
3097
3098         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3099                 return kvm_xen_write_hypercall_page(vcpu, data);
3100
3101         switch (msr) {
3102         case MSR_AMD64_NB_CFG:
3103         case MSR_IA32_UCODE_WRITE:
3104         case MSR_VM_HSAVE_PA:
3105         case MSR_AMD64_PATCH_LOADER:
3106         case MSR_AMD64_BU_CFG2:
3107         case MSR_AMD64_DC_CFG:
3108         case MSR_F15H_EX_CFG:
3109                 break;
3110
3111         case MSR_IA32_UCODE_REV:
3112                 if (msr_info->host_initiated)
3113                         vcpu->arch.microcode_version = data;
3114                 break;
3115         case MSR_IA32_ARCH_CAPABILITIES:
3116                 if (!msr_info->host_initiated)
3117                         return 1;
3118                 vcpu->arch.arch_capabilities = data;
3119                 break;
3120         case MSR_IA32_PERF_CAPABILITIES: {
3121                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3122
3123                 if (!msr_info->host_initiated)
3124                         return 1;
3125                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3126                         return 1;
3127                 if (data & ~msr_ent.data)
3128                         return 1;
3129
3130                 vcpu->arch.perf_capabilities = data;
3131
3132                 return 0;
3133                 }
3134         case MSR_EFER:
3135                 return set_efer(vcpu, msr_info);
3136         case MSR_K7_HWCR:
3137                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3138                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3139                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3140
3141                 /* Handle McStatusWrEn */
3142                 if (data == BIT_ULL(18)) {
3143                         vcpu->arch.msr_hwcr = data;
3144                 } else if (data != 0) {
3145                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3146                                     data);
3147                         return 1;
3148                 }
3149                 break;
3150         case MSR_FAM10H_MMIO_CONF_BASE:
3151                 if (data != 0) {
3152                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3153                                     "0x%llx\n", data);
3154                         return 1;
3155                 }
3156                 break;
3157         case 0x200 ... 0x2ff:
3158                 return kvm_mtrr_set_msr(vcpu, msr, data);
3159         case MSR_IA32_APICBASE:
3160                 return kvm_set_apic_base(vcpu, msr_info);
3161         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3162                 return kvm_x2apic_msr_write(vcpu, msr, data);
3163         case MSR_IA32_TSC_DEADLINE:
3164                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3165                 break;
3166         case MSR_IA32_TSC_ADJUST:
3167                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3168                         if (!msr_info->host_initiated) {
3169                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3170                                 adjust_tsc_offset_guest(vcpu, adj);
3171                         }
3172                         vcpu->arch.ia32_tsc_adjust_msr = data;
3173                 }
3174                 break;
3175         case MSR_IA32_MISC_ENABLE:
3176                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3177                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3178                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3179                                 return 1;
3180                         vcpu->arch.ia32_misc_enable_msr = data;
3181                         kvm_update_cpuid_runtime(vcpu);
3182                 } else {
3183                         vcpu->arch.ia32_misc_enable_msr = data;
3184                 }
3185                 break;
3186         case MSR_IA32_SMBASE:
3187                 if (!msr_info->host_initiated)
3188                         return 1;
3189                 vcpu->arch.smbase = data;
3190                 break;
3191         case MSR_IA32_POWER_CTL:
3192                 vcpu->arch.msr_ia32_power_ctl = data;
3193                 break;
3194         case MSR_IA32_TSC:
3195                 if (msr_info->host_initiated) {
3196                         kvm_synchronize_tsc(vcpu, data);
3197                 } else {
3198                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3199                         adjust_tsc_offset_guest(vcpu, adj);
3200                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3201                 }
3202                 break;
3203         case MSR_IA32_XSS:
3204                 if (!msr_info->host_initiated &&
3205                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3206                         return 1;
3207                 /*
3208                  * KVM supports exposing PT to the guest, but does not support
3209                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3210                  * XSAVES/XRSTORS to save/restore PT MSRs.
3211                  */
3212                 if (data & ~supported_xss)
3213                         return 1;
3214                 vcpu->arch.ia32_xss = data;
3215                 break;
3216         case MSR_SMI_COUNT:
3217                 if (!msr_info->host_initiated)
3218                         return 1;
3219                 vcpu->arch.smi_count = data;
3220                 break;
3221         case MSR_KVM_WALL_CLOCK_NEW:
3222                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3223                         return 1;
3224
3225                 vcpu->kvm->arch.wall_clock = data;
3226                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3227                 break;
3228         case MSR_KVM_WALL_CLOCK:
3229                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3230                         return 1;
3231
3232                 vcpu->kvm->arch.wall_clock = data;
3233                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3234                 break;
3235         case MSR_KVM_SYSTEM_TIME_NEW:
3236                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3237                         return 1;
3238
3239                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3240                 break;
3241         case MSR_KVM_SYSTEM_TIME:
3242                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3243                         return 1;
3244
3245                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3246                 break;
3247         case MSR_KVM_ASYNC_PF_EN:
3248                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3249                         return 1;
3250
3251                 if (kvm_pv_enable_async_pf(vcpu, data))
3252                         return 1;
3253                 break;
3254         case MSR_KVM_ASYNC_PF_INT:
3255                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3256                         return 1;
3257
3258                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3259                         return 1;
3260                 break;
3261         case MSR_KVM_ASYNC_PF_ACK:
3262                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3263                         return 1;
3264                 if (data & 0x1) {
3265                         vcpu->arch.apf.pageready_pending = false;
3266                         kvm_check_async_pf_completion(vcpu);
3267                 }
3268                 break;
3269         case MSR_KVM_STEAL_TIME:
3270                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3271                         return 1;
3272
3273                 if (unlikely(!sched_info_on()))
3274                         return 1;
3275
3276                 if (data & KVM_STEAL_RESERVED_MASK)
3277                         return 1;
3278
3279                 vcpu->arch.st.msr_val = data;
3280
3281                 if (!(data & KVM_MSR_ENABLED))
3282                         break;
3283
3284                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3285
3286                 break;
3287         case MSR_KVM_PV_EOI_EN:
3288                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3289                         return 1;
3290
3291                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3292                         return 1;
3293                 break;
3294
3295         case MSR_KVM_POLL_CONTROL:
3296                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3297                         return 1;
3298
3299                 /* only enable bit supported */
3300                 if (data & (-1ULL << 1))
3301                         return 1;
3302
3303                 vcpu->arch.msr_kvm_poll_control = data;
3304                 break;
3305
3306         case MSR_IA32_MCG_CTL:
3307         case MSR_IA32_MCG_STATUS:
3308         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3309                 return set_msr_mce(vcpu, msr_info);
3310
3311         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3312         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3313                 pr = true;
3314                 fallthrough;
3315         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3316         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3317                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3318                         return kvm_pmu_set_msr(vcpu, msr_info);
3319
3320                 if (pr || data != 0)
3321                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3322                                     "0x%x data 0x%llx\n", msr, data);
3323                 break;
3324         case MSR_K7_CLK_CTL:
3325                 /*
3326                  * Ignore all writes to this no longer documented MSR.
3327                  * Writes are only relevant for old K7 processors,
3328                  * all pre-dating SVM, but a recommended workaround from
3329                  * AMD for these chips. It is possible to specify the
3330                  * affected processor models on the command line, hence
3331                  * the need to ignore the workaround.
3332                  */
3333                 break;
3334         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3335         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3336         case HV_X64_MSR_SYNDBG_OPTIONS:
3337         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3338         case HV_X64_MSR_CRASH_CTL:
3339         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3340         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3341         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3342         case HV_X64_MSR_TSC_EMULATION_STATUS:
3343                 return kvm_hv_set_msr_common(vcpu, msr, data,
3344                                              msr_info->host_initiated);
3345         case MSR_IA32_BBL_CR_CTL3:
3346                 /* Drop writes to this legacy MSR -- see rdmsr
3347                  * counterpart for further detail.
3348                  */
3349                 if (report_ignored_msrs)
3350                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3351                                 msr, data);
3352                 break;
3353         case MSR_AMD64_OSVW_ID_LENGTH:
3354                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3355                         return 1;
3356                 vcpu->arch.osvw.length = data;
3357                 break;
3358         case MSR_AMD64_OSVW_STATUS:
3359                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3360                         return 1;
3361                 vcpu->arch.osvw.status = data;
3362                 break;
3363         case MSR_PLATFORM_INFO:
3364                 if (!msr_info->host_initiated ||
3365                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3366                      cpuid_fault_enabled(vcpu)))
3367                         return 1;
3368                 vcpu->arch.msr_platform_info = data;
3369                 break;
3370         case MSR_MISC_FEATURES_ENABLES:
3371                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3372                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3373                      !supports_cpuid_fault(vcpu)))
3374                         return 1;
3375                 vcpu->arch.msr_misc_features_enables = data;
3376                 break;
3377         default:
3378                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3379                         return kvm_pmu_set_msr(vcpu, msr_info);
3380                 return KVM_MSR_RET_INVALID;
3381         }
3382         return 0;
3383 }
3384 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3385
3386 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3387 {
3388         u64 data;
3389         u64 mcg_cap = vcpu->arch.mcg_cap;
3390         unsigned bank_num = mcg_cap & 0xff;
3391
3392         switch (msr) {
3393         case MSR_IA32_P5_MC_ADDR:
3394         case MSR_IA32_P5_MC_TYPE:
3395                 data = 0;
3396                 break;
3397         case MSR_IA32_MCG_CAP:
3398                 data = vcpu->arch.mcg_cap;
3399                 break;
3400         case MSR_IA32_MCG_CTL:
3401                 if (!(mcg_cap & MCG_CTL_P) && !host)
3402                         return 1;
3403                 data = vcpu->arch.mcg_ctl;
3404                 break;
3405         case MSR_IA32_MCG_STATUS:
3406                 data = vcpu->arch.mcg_status;
3407                 break;
3408         default:
3409                 if (msr >= MSR_IA32_MC0_CTL &&
3410                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3411                         u32 offset = array_index_nospec(
3412                                 msr - MSR_IA32_MC0_CTL,
3413                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3414
3415                         data = vcpu->arch.mce_banks[offset];
3416                         break;
3417                 }
3418                 return 1;
3419         }
3420         *pdata = data;
3421         return 0;
3422 }
3423
3424 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3425 {
3426         switch (msr_info->index) {
3427         case MSR_IA32_PLATFORM_ID:
3428         case MSR_IA32_EBL_CR_POWERON:
3429         case MSR_IA32_LASTBRANCHFROMIP:
3430         case MSR_IA32_LASTBRANCHTOIP:
3431         case MSR_IA32_LASTINTFROMIP:
3432         case MSR_IA32_LASTINTTOIP:
3433         case MSR_K8_SYSCFG:
3434         case MSR_K8_TSEG_ADDR:
3435         case MSR_K8_TSEG_MASK:
3436         case MSR_VM_HSAVE_PA:
3437         case MSR_K8_INT_PENDING_MSG:
3438         case MSR_AMD64_NB_CFG:
3439         case MSR_FAM10H_MMIO_CONF_BASE:
3440         case MSR_AMD64_BU_CFG2:
3441         case MSR_IA32_PERF_CTL:
3442         case MSR_AMD64_DC_CFG:
3443         case MSR_F15H_EX_CFG:
3444         /*
3445          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3446          * limit) MSRs. Just return 0, as we do not want to expose the host
3447          * data here. Do not conditionalize this on CPUID, as KVM does not do
3448          * so for existing CPU-specific MSRs.
3449          */
3450         case MSR_RAPL_POWER_UNIT:
3451         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3452         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3453         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3454         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3455                 msr_info->data = 0;
3456                 break;
3457         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3458                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3459                         return kvm_pmu_get_msr(vcpu, msr_info);
3460                 if (!msr_info->host_initiated)
3461                         return 1;
3462                 msr_info->data = 0;
3463                 break;
3464         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3465         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3466         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3467         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3468                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3469                         return kvm_pmu_get_msr(vcpu, msr_info);
3470                 msr_info->data = 0;
3471                 break;
3472         case MSR_IA32_UCODE_REV:
3473                 msr_info->data = vcpu->arch.microcode_version;
3474                 break;
3475         case MSR_IA32_ARCH_CAPABILITIES:
3476                 if (!msr_info->host_initiated &&
3477                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3478                         return 1;
3479                 msr_info->data = vcpu->arch.arch_capabilities;
3480                 break;
3481         case MSR_IA32_PERF_CAPABILITIES:
3482                 if (!msr_info->host_initiated &&
3483                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3484                         return 1;
3485                 msr_info->data = vcpu->arch.perf_capabilities;
3486                 break;
3487         case MSR_IA32_POWER_CTL:
3488                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3489                 break;
3490         case MSR_IA32_TSC: {
3491                 /*
3492                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3493                  * even when not intercepted. AMD manual doesn't explicitly
3494                  * state this but appears to behave the same.
3495                  *
3496                  * On userspace reads and writes, however, we unconditionally
3497                  * return L1's TSC value to ensure backwards-compatible
3498                  * behavior for migration.
3499                  */
3500                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3501                                                             vcpu->arch.tsc_offset;
3502
3503                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3504                 break;
3505         }
3506         case MSR_MTRRcap:
3507         case 0x200 ... 0x2ff:
3508                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3509         case 0xcd: /* fsb frequency */
3510                 msr_info->data = 3;
3511                 break;
3512                 /*
3513                  * MSR_EBC_FREQUENCY_ID
3514                  * Conservative value valid for even the basic CPU models.
3515                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3516                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3517                  * and 266MHz for model 3, or 4. Set Core Clock
3518                  * Frequency to System Bus Frequency Ratio to 1 (bits
3519                  * 31:24) even though these are only valid for CPU
3520                  * models > 2, however guests may end up dividing or
3521                  * multiplying by zero otherwise.
3522                  */
3523         case MSR_EBC_FREQUENCY_ID:
3524                 msr_info->data = 1 << 24;
3525                 break;
3526         case MSR_IA32_APICBASE:
3527                 msr_info->data = kvm_get_apic_base(vcpu);
3528                 break;
3529         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3530                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3531         case MSR_IA32_TSC_DEADLINE:
3532                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3533                 break;
3534         case MSR_IA32_TSC_ADJUST:
3535                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3536                 break;
3537         case MSR_IA32_MISC_ENABLE:
3538                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3539                 break;
3540         case MSR_IA32_SMBASE:
3541                 if (!msr_info->host_initiated)
3542                         return 1;
3543                 msr_info->data = vcpu->arch.smbase;
3544                 break;
3545         case MSR_SMI_COUNT:
3546                 msr_info->data = vcpu->arch.smi_count;
3547                 break;
3548         case MSR_IA32_PERF_STATUS:
3549                 /* TSC increment by tick */
3550                 msr_info->data = 1000ULL;
3551                 /* CPU multiplier */
3552                 msr_info->data |= (((uint64_t)4ULL) << 40);
3553                 break;
3554         case MSR_EFER:
3555                 msr_info->data = vcpu->arch.efer;
3556                 break;
3557         case MSR_KVM_WALL_CLOCK:
3558                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3559                         return 1;
3560
3561                 msr_info->data = vcpu->kvm->arch.wall_clock;
3562                 break;
3563         case MSR_KVM_WALL_CLOCK_NEW:
3564                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3565                         return 1;
3566
3567                 msr_info->data = vcpu->kvm->arch.wall_clock;
3568                 break;
3569         case MSR_KVM_SYSTEM_TIME:
3570                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3571                         return 1;
3572
3573                 msr_info->data = vcpu->arch.time;
3574                 break;
3575         case MSR_KVM_SYSTEM_TIME_NEW:
3576                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3577                         return 1;
3578
3579                 msr_info->data = vcpu->arch.time;
3580                 break;
3581         case MSR_KVM_ASYNC_PF_EN:
3582                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3583                         return 1;
3584
3585                 msr_info->data = vcpu->arch.apf.msr_en_val;
3586                 break;
3587         case MSR_KVM_ASYNC_PF_INT:
3588                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3589                         return 1;
3590
3591                 msr_info->data = vcpu->arch.apf.msr_int_val;
3592                 break;
3593         case MSR_KVM_ASYNC_PF_ACK:
3594                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3595                         return 1;
3596
3597                 msr_info->data = 0;
3598                 break;
3599         case MSR_KVM_STEAL_TIME:
3600                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3601                         return 1;
3602
3603                 msr_info->data = vcpu->arch.st.msr_val;
3604                 break;
3605         case MSR_KVM_PV_EOI_EN:
3606                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3607                         return 1;
3608
3609                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3610                 break;
3611         case MSR_KVM_POLL_CONTROL:
3612                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3613                         return 1;
3614
3615                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3616                 break;
3617         case MSR_IA32_P5_MC_ADDR:
3618         case MSR_IA32_P5_MC_TYPE:
3619         case MSR_IA32_MCG_CAP:
3620         case MSR_IA32_MCG_CTL:
3621         case MSR_IA32_MCG_STATUS:
3622         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3623                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3624                                    msr_info->host_initiated);
3625         case MSR_IA32_XSS:
3626                 if (!msr_info->host_initiated &&
3627                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3628                         return 1;
3629                 msr_info->data = vcpu->arch.ia32_xss;
3630                 break;
3631         case MSR_K7_CLK_CTL:
3632                 /*
3633                  * Provide expected ramp-up count for K7. All other
3634                  * are set to zero, indicating minimum divisors for
3635                  * every field.
3636                  *
3637                  * This prevents guest kernels on AMD host with CPU
3638                  * type 6, model 8 and higher from exploding due to
3639                  * the rdmsr failing.
3640                  */
3641                 msr_info->data = 0x20000000;
3642                 break;
3643         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3644         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3645         case HV_X64_MSR_SYNDBG_OPTIONS:
3646         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3647         case HV_X64_MSR_CRASH_CTL:
3648         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3649         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3650         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3651         case HV_X64_MSR_TSC_EMULATION_STATUS:
3652                 return kvm_hv_get_msr_common(vcpu,
3653                                              msr_info->index, &msr_info->data,
3654                                              msr_info->host_initiated);
3655         case MSR_IA32_BBL_CR_CTL3:
3656                 /* This legacy MSR exists but isn't fully documented in current
3657                  * silicon.  It is however accessed by winxp in very narrow
3658                  * scenarios where it sets bit #19, itself documented as
3659                  * a "reserved" bit.  Best effort attempt to source coherent
3660                  * read data here should the balance of the register be
3661                  * interpreted by the guest:
3662                  *
3663                  * L2 cache control register 3: 64GB range, 256KB size,
3664                  * enabled, latency 0x1, configured
3665                  */
3666                 msr_info->data = 0xbe702111;
3667                 break;
3668         case MSR_AMD64_OSVW_ID_LENGTH:
3669                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3670                         return 1;
3671                 msr_info->data = vcpu->arch.osvw.length;
3672                 break;
3673         case MSR_AMD64_OSVW_STATUS:
3674                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3675                         return 1;
3676                 msr_info->data = vcpu->arch.osvw.status;
3677                 break;
3678         case MSR_PLATFORM_INFO:
3679                 if (!msr_info->host_initiated &&
3680                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3681                         return 1;
3682                 msr_info->data = vcpu->arch.msr_platform_info;
3683                 break;
3684         case MSR_MISC_FEATURES_ENABLES:
3685                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3686                 break;
3687         case MSR_K7_HWCR:
3688                 msr_info->data = vcpu->arch.msr_hwcr;
3689                 break;
3690         default:
3691                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3692                         return kvm_pmu_get_msr(vcpu, msr_info);
3693                 return KVM_MSR_RET_INVALID;
3694         }
3695         return 0;
3696 }
3697 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3698
3699 /*
3700  * Read or write a bunch of msrs. All parameters are kernel addresses.
3701  *
3702  * @return number of msrs set successfully.
3703  */
3704 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3705                     struct kvm_msr_entry *entries,
3706                     int (*do_msr)(struct kvm_vcpu *vcpu,
3707                                   unsigned index, u64 *data))
3708 {
3709         int i;
3710
3711         for (i = 0; i < msrs->nmsrs; ++i)
3712                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3713                         break;
3714
3715         return i;
3716 }
3717
3718 /*
3719  * Read or write a bunch of msrs. Parameters are user addresses.
3720  *
3721  * @return number of msrs set successfully.
3722  */
3723 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3724                   int (*do_msr)(struct kvm_vcpu *vcpu,
3725                                 unsigned index, u64 *data),
3726                   int writeback)
3727 {
3728         struct kvm_msrs msrs;
3729         struct kvm_msr_entry *entries;
3730         int r, n;
3731         unsigned size;
3732
3733         r = -EFAULT;
3734         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3735                 goto out;
3736
3737         r = -E2BIG;
3738         if (msrs.nmsrs >= MAX_IO_MSRS)
3739                 goto out;
3740
3741         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3742         entries = memdup_user(user_msrs->entries, size);
3743         if (IS_ERR(entries)) {
3744                 r = PTR_ERR(entries);
3745                 goto out;
3746         }
3747
3748         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3749         if (r < 0)
3750                 goto out_free;
3751
3752         r = -EFAULT;
3753         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3754                 goto out_free;
3755
3756         r = n;
3757
3758 out_free:
3759         kfree(entries);
3760 out:
3761         return r;
3762 }
3763
3764 static inline bool kvm_can_mwait_in_guest(void)
3765 {
3766         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3767                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3768                 boot_cpu_has(X86_FEATURE_ARAT);
3769 }
3770
3771 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3772                                             struct kvm_cpuid2 __user *cpuid_arg)
3773 {
3774         struct kvm_cpuid2 cpuid;
3775         int r;
3776
3777         r = -EFAULT;
3778         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3779                 return r;
3780
3781         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3782         if (r)
3783                 return r;
3784
3785         r = -EFAULT;
3786         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3787                 return r;
3788
3789         return 0;
3790 }
3791
3792 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3793 {
3794         int r = 0;
3795
3796         switch (ext) {
3797         case KVM_CAP_IRQCHIP:
3798         case KVM_CAP_HLT:
3799         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3800         case KVM_CAP_SET_TSS_ADDR:
3801         case KVM_CAP_EXT_CPUID:
3802         case KVM_CAP_EXT_EMUL_CPUID:
3803         case KVM_CAP_CLOCKSOURCE:
3804         case KVM_CAP_PIT:
3805         case KVM_CAP_NOP_IO_DELAY:
3806         case KVM_CAP_MP_STATE:
3807         case KVM_CAP_SYNC_MMU:
3808         case KVM_CAP_USER_NMI:
3809         case KVM_CAP_REINJECT_CONTROL:
3810         case KVM_CAP_IRQ_INJECT_STATUS:
3811         case KVM_CAP_IOEVENTFD:
3812         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3813         case KVM_CAP_PIT2:
3814         case KVM_CAP_PIT_STATE2:
3815         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3816         case KVM_CAP_VCPU_EVENTS:
3817         case KVM_CAP_HYPERV:
3818         case KVM_CAP_HYPERV_VAPIC:
3819         case KVM_CAP_HYPERV_SPIN:
3820         case KVM_CAP_HYPERV_SYNIC:
3821         case KVM_CAP_HYPERV_SYNIC2:
3822         case KVM_CAP_HYPERV_VP_INDEX:
3823         case KVM_CAP_HYPERV_EVENTFD:
3824         case KVM_CAP_HYPERV_TLBFLUSH:
3825         case KVM_CAP_HYPERV_SEND_IPI:
3826         case KVM_CAP_HYPERV_CPUID:
3827         case KVM_CAP_SYS_HYPERV_CPUID:
3828         case KVM_CAP_PCI_SEGMENT:
3829         case KVM_CAP_DEBUGREGS:
3830         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3831         case KVM_CAP_XSAVE:
3832         case KVM_CAP_ASYNC_PF:
3833         case KVM_CAP_ASYNC_PF_INT:
3834         case KVM_CAP_GET_TSC_KHZ:
3835         case KVM_CAP_KVMCLOCK_CTRL:
3836         case KVM_CAP_READONLY_MEM:
3837         case KVM_CAP_HYPERV_TIME:
3838         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3839         case KVM_CAP_TSC_DEADLINE_TIMER:
3840         case KVM_CAP_DISABLE_QUIRKS:
3841         case KVM_CAP_SET_BOOT_CPU_ID:
3842         case KVM_CAP_SPLIT_IRQCHIP:
3843         case KVM_CAP_IMMEDIATE_EXIT:
3844         case KVM_CAP_PMU_EVENT_FILTER:
3845         case KVM_CAP_GET_MSR_FEATURES:
3846         case KVM_CAP_MSR_PLATFORM_INFO:
3847         case KVM_CAP_EXCEPTION_PAYLOAD:
3848         case KVM_CAP_SET_GUEST_DEBUG:
3849         case KVM_CAP_LAST_CPU:
3850         case KVM_CAP_X86_USER_SPACE_MSR:
3851         case KVM_CAP_X86_MSR_FILTER:
3852         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3853 #ifdef CONFIG_X86_SGX_KVM
3854         case KVM_CAP_SGX_ATTRIBUTE:
3855 #endif
3856         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3857                 r = 1;
3858                 break;
3859         case KVM_CAP_SET_GUEST_DEBUG2:
3860                 return KVM_GUESTDBG_VALID_MASK;
3861 #ifdef CONFIG_KVM_XEN
3862         case KVM_CAP_XEN_HVM:
3863                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3864                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3865                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3866                 if (sched_info_on())
3867                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3868                 break;
3869 #endif
3870         case KVM_CAP_SYNC_REGS:
3871                 r = KVM_SYNC_X86_VALID_FIELDS;
3872                 break;
3873         case KVM_CAP_ADJUST_CLOCK:
3874                 r = KVM_CLOCK_TSC_STABLE;
3875                 break;
3876         case KVM_CAP_X86_DISABLE_EXITS:
3877                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3878                       KVM_X86_DISABLE_EXITS_CSTATE;
3879                 if(kvm_can_mwait_in_guest())
3880                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3881                 break;
3882         case KVM_CAP_X86_SMM:
3883                 /* SMBASE is usually relocated above 1M on modern chipsets,
3884                  * and SMM handlers might indeed rely on 4G segment limits,
3885                  * so do not report SMM to be available if real mode is
3886                  * emulated via vm86 mode.  Still, do not go to great lengths
3887                  * to avoid userspace's usage of the feature, because it is a
3888                  * fringe case that is not enabled except via specific settings
3889                  * of the module parameters.
3890                  */
3891                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3892                 break;
3893         case KVM_CAP_VAPIC:
3894                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3895                 break;
3896         case KVM_CAP_NR_VCPUS:
3897                 r = KVM_SOFT_MAX_VCPUS;
3898                 break;
3899         case KVM_CAP_MAX_VCPUS:
3900                 r = KVM_MAX_VCPUS;
3901                 break;
3902         case KVM_CAP_MAX_VCPU_ID:
3903                 r = KVM_MAX_VCPU_ID;
3904                 break;
3905         case KVM_CAP_PV_MMU:    /* obsolete */
3906                 r = 0;
3907                 break;
3908         case KVM_CAP_MCE:
3909                 r = KVM_MAX_MCE_BANKS;
3910                 break;
3911         case KVM_CAP_XCRS:
3912                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3913                 break;
3914         case KVM_CAP_TSC_CONTROL:
3915                 r = kvm_has_tsc_control;
3916                 break;
3917         case KVM_CAP_X2APIC_API:
3918                 r = KVM_X2APIC_API_VALID_FLAGS;
3919                 break;
3920         case KVM_CAP_NESTED_STATE:
3921                 r = kvm_x86_ops.nested_ops->get_state ?
3922                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3923                 break;
3924         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3925                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3926                 break;
3927         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3928                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3929                 break;
3930         case KVM_CAP_SMALLER_MAXPHYADDR:
3931                 r = (int) allow_smaller_maxphyaddr;
3932                 break;
3933         case KVM_CAP_STEAL_TIME:
3934                 r = sched_info_on();
3935                 break;
3936         case KVM_CAP_X86_BUS_LOCK_EXIT:
3937                 if (kvm_has_bus_lock_exit)
3938                         r = KVM_BUS_LOCK_DETECTION_OFF |
3939                             KVM_BUS_LOCK_DETECTION_EXIT;
3940                 else
3941                         r = 0;
3942                 break;
3943         default:
3944                 break;
3945         }
3946         return r;
3947
3948 }
3949
3950 long kvm_arch_dev_ioctl(struct file *filp,
3951                         unsigned int ioctl, unsigned long arg)
3952 {
3953         void __user *argp = (void __user *)arg;
3954         long r;
3955
3956         switch (ioctl) {
3957         case KVM_GET_MSR_INDEX_LIST: {
3958                 struct kvm_msr_list __user *user_msr_list = argp;
3959                 struct kvm_msr_list msr_list;
3960                 unsigned n;
3961
3962                 r = -EFAULT;
3963                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3964                         goto out;
3965                 n = msr_list.nmsrs;
3966                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3967                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3968                         goto out;
3969                 r = -E2BIG;
3970                 if (n < msr_list.nmsrs)
3971                         goto out;
3972                 r = -EFAULT;
3973                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3974                                  num_msrs_to_save * sizeof(u32)))
3975                         goto out;
3976                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3977                                  &emulated_msrs,
3978                                  num_emulated_msrs * sizeof(u32)))
3979                         goto out;
3980                 r = 0;
3981                 break;
3982         }
3983         case KVM_GET_SUPPORTED_CPUID:
3984         case KVM_GET_EMULATED_CPUID: {
3985                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3986                 struct kvm_cpuid2 cpuid;
3987
3988                 r = -EFAULT;
3989                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3990                         goto out;
3991
3992                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3993                                             ioctl);
3994                 if (r)
3995                         goto out;
3996
3997                 r = -EFAULT;
3998                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3999                         goto out;
4000                 r = 0;
4001                 break;
4002         }
4003         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4004                 r = -EFAULT;
4005                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4006                                  sizeof(kvm_mce_cap_supported)))
4007                         goto out;
4008                 r = 0;
4009                 break;
4010         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4011                 struct kvm_msr_list __user *user_msr_list = argp;
4012                 struct kvm_msr_list msr_list;
4013                 unsigned int n;
4014
4015                 r = -EFAULT;
4016                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4017                         goto out;
4018                 n = msr_list.nmsrs;
4019                 msr_list.nmsrs = num_msr_based_features;
4020                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4021                         goto out;
4022                 r = -E2BIG;
4023                 if (n < msr_list.nmsrs)
4024                         goto out;
4025                 r = -EFAULT;
4026                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4027                                  num_msr_based_features * sizeof(u32)))
4028                         goto out;
4029                 r = 0;
4030                 break;
4031         }
4032         case KVM_GET_MSRS:
4033                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4034                 break;
4035         case KVM_GET_SUPPORTED_HV_CPUID:
4036                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4037                 break;
4038         default:
4039                 r = -EINVAL;
4040                 break;
4041         }
4042 out:
4043         return r;
4044 }
4045
4046 static void wbinvd_ipi(void *garbage)
4047 {
4048         wbinvd();
4049 }
4050
4051 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4052 {
4053         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4054 }
4055
4056 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4057 {
4058         /* Address WBINVD may be executed by guest */
4059         if (need_emulate_wbinvd(vcpu)) {
4060                 if (static_call(kvm_x86_has_wbinvd_exit)())
4061                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4062                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4063                         smp_call_function_single(vcpu->cpu,
4064                                         wbinvd_ipi, NULL, 1);
4065         }
4066
4067         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4068
4069         /* Save host pkru register if supported */
4070         vcpu->arch.host_pkru = read_pkru();
4071
4072         /* Apply any externally detected TSC adjustments (due to suspend) */
4073         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4074                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4075                 vcpu->arch.tsc_offset_adjustment = 0;
4076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4077         }
4078
4079         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4080                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4081                                 rdtsc() - vcpu->arch.last_host_tsc;
4082                 if (tsc_delta < 0)
4083                         mark_tsc_unstable("KVM discovered backwards TSC");
4084
4085                 if (kvm_check_tsc_unstable()) {
4086                         u64 offset = kvm_compute_tsc_offset(vcpu,
4087                                                 vcpu->arch.last_guest_tsc);
4088                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4089                         vcpu->arch.tsc_catchup = 1;
4090                 }
4091
4092                 if (kvm_lapic_hv_timer_in_use(vcpu))
4093                         kvm_lapic_restart_hv_timer(vcpu);
4094
4095                 /*
4096                  * On a host with synchronized TSC, there is no need to update
4097                  * kvmclock on vcpu->cpu migration
4098                  */
4099                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4100                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4101                 if (vcpu->cpu != cpu)
4102                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4103                 vcpu->cpu = cpu;
4104         }
4105
4106         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4107 }
4108
4109 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4110 {
4111         struct kvm_host_map map;
4112         struct kvm_steal_time *st;
4113
4114         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4115                 return;
4116
4117         if (vcpu->arch.st.preempted)
4118                 return;
4119
4120         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4121                         &vcpu->arch.st.cache, true))
4122                 return;
4123
4124         st = map.hva +
4125                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4126
4127         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4128
4129         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4130 }
4131
4132 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4133 {
4134         int idx;
4135
4136         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4137                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4138
4139         /*
4140          * Take the srcu lock as memslots will be accessed to check the gfn
4141          * cache generation against the memslots generation.
4142          */
4143         idx = srcu_read_lock(&vcpu->kvm->srcu);
4144         if (kvm_xen_msr_enabled(vcpu->kvm))
4145                 kvm_xen_runstate_set_preempted(vcpu);
4146         else
4147                 kvm_steal_time_set_preempted(vcpu);
4148         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4149
4150         static_call(kvm_x86_vcpu_put)(vcpu);
4151         vcpu->arch.last_host_tsc = rdtsc();
4152         /*
4153          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4154          * on every vmexit, but if not, we might have a stale dr6 from the
4155          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4156          */
4157         set_debugreg(0, 6);
4158 }
4159
4160 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4161                                     struct kvm_lapic_state *s)
4162 {
4163         if (vcpu->arch.apicv_active)
4164                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4165
4166         return kvm_apic_get_state(vcpu, s);
4167 }
4168
4169 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4170                                     struct kvm_lapic_state *s)
4171 {
4172         int r;
4173
4174         r = kvm_apic_set_state(vcpu, s);
4175         if (r)
4176                 return r;
4177         update_cr8_intercept(vcpu);
4178
4179         return 0;
4180 }
4181
4182 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4183 {
4184         /*
4185          * We can accept userspace's request for interrupt injection
4186          * as long as we have a place to store the interrupt number.
4187          * The actual injection will happen when the CPU is able to
4188          * deliver the interrupt.
4189          */
4190         if (kvm_cpu_has_extint(vcpu))
4191                 return false;
4192
4193         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4194         return (!lapic_in_kernel(vcpu) ||
4195                 kvm_apic_accept_pic_intr(vcpu));
4196 }
4197
4198 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4199 {
4200         return kvm_arch_interrupt_allowed(vcpu) &&
4201                 kvm_cpu_accept_dm_intr(vcpu);
4202 }
4203
4204 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4205                                     struct kvm_interrupt *irq)
4206 {
4207         if (irq->irq >= KVM_NR_INTERRUPTS)
4208                 return -EINVAL;
4209
4210         if (!irqchip_in_kernel(vcpu->kvm)) {
4211                 kvm_queue_interrupt(vcpu, irq->irq, false);
4212                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4213                 return 0;
4214         }
4215
4216         /*
4217          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4218          * fail for in-kernel 8259.
4219          */
4220         if (pic_in_kernel(vcpu->kvm))
4221                 return -ENXIO;
4222
4223         if (vcpu->arch.pending_external_vector != -1)
4224                 return -EEXIST;
4225
4226         vcpu->arch.pending_external_vector = irq->irq;
4227         kvm_make_request(KVM_REQ_EVENT, vcpu);
4228         return 0;
4229 }
4230
4231 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4232 {
4233         kvm_inject_nmi(vcpu);
4234
4235         return 0;
4236 }
4237
4238 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4239 {
4240         kvm_make_request(KVM_REQ_SMI, vcpu);
4241
4242         return 0;
4243 }
4244
4245 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4246                                            struct kvm_tpr_access_ctl *tac)
4247 {
4248         if (tac->flags)
4249                 return -EINVAL;
4250         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4251         return 0;
4252 }
4253
4254 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4255                                         u64 mcg_cap)
4256 {
4257         int r;
4258         unsigned bank_num = mcg_cap & 0xff, bank;
4259
4260         r = -EINVAL;
4261         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4262                 goto out;
4263         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4264                 goto out;
4265         r = 0;
4266         vcpu->arch.mcg_cap = mcg_cap;
4267         /* Init IA32_MCG_CTL to all 1s */
4268         if (mcg_cap & MCG_CTL_P)
4269                 vcpu->arch.mcg_ctl = ~(u64)0;
4270         /* Init IA32_MCi_CTL to all 1s */
4271         for (bank = 0; bank < bank_num; bank++)
4272                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4273
4274         static_call(kvm_x86_setup_mce)(vcpu);
4275 out:
4276         return r;
4277 }
4278
4279 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4280                                       struct kvm_x86_mce *mce)
4281 {
4282         u64 mcg_cap = vcpu->arch.mcg_cap;
4283         unsigned bank_num = mcg_cap & 0xff;
4284         u64 *banks = vcpu->arch.mce_banks;
4285
4286         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4287                 return -EINVAL;
4288         /*
4289          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4290          * reporting is disabled
4291          */
4292         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4293             vcpu->arch.mcg_ctl != ~(u64)0)
4294                 return 0;
4295         banks += 4 * mce->bank;
4296         /*
4297          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4298          * reporting is disabled for the bank
4299          */
4300         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4301                 return 0;
4302         if (mce->status & MCI_STATUS_UC) {
4303                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4304                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4305                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4306                         return 0;
4307                 }
4308                 if (banks[1] & MCI_STATUS_VAL)
4309                         mce->status |= MCI_STATUS_OVER;
4310                 banks[2] = mce->addr;
4311                 banks[3] = mce->misc;
4312                 vcpu->arch.mcg_status = mce->mcg_status;
4313                 banks[1] = mce->status;
4314                 kvm_queue_exception(vcpu, MC_VECTOR);
4315         } else if (!(banks[1] & MCI_STATUS_VAL)
4316                    || !(banks[1] & MCI_STATUS_UC)) {
4317                 if (banks[1] & MCI_STATUS_VAL)
4318                         mce->status |= MCI_STATUS_OVER;
4319                 banks[2] = mce->addr;
4320                 banks[3] = mce->misc;
4321                 banks[1] = mce->status;
4322         } else
4323                 banks[1] |= MCI_STATUS_OVER;
4324         return 0;
4325 }
4326
4327 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4328                                                struct kvm_vcpu_events *events)
4329 {
4330         process_nmi(vcpu);
4331
4332         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4333                 process_smi(vcpu);
4334
4335         /*
4336          * In guest mode, payload delivery should be deferred,
4337          * so that the L1 hypervisor can intercept #PF before
4338          * CR2 is modified (or intercept #DB before DR6 is
4339          * modified under nVMX). Unless the per-VM capability,
4340          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4341          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4342          * opportunistically defer the exception payload, deliver it if the
4343          * capability hasn't been requested before processing a
4344          * KVM_GET_VCPU_EVENTS.
4345          */
4346         if (!vcpu->kvm->arch.exception_payload_enabled &&
4347             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4348                 kvm_deliver_exception_payload(vcpu);
4349
4350         /*
4351          * The API doesn't provide the instruction length for software
4352          * exceptions, so don't report them. As long as the guest RIP
4353          * isn't advanced, we should expect to encounter the exception
4354          * again.
4355          */
4356         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4357                 events->exception.injected = 0;
4358                 events->exception.pending = 0;
4359         } else {
4360                 events->exception.injected = vcpu->arch.exception.injected;
4361                 events->exception.pending = vcpu->arch.exception.pending;
4362                 /*
4363                  * For ABI compatibility, deliberately conflate
4364                  * pending and injected exceptions when
4365                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4366                  */
4367                 if (!vcpu->kvm->arch.exception_payload_enabled)
4368                         events->exception.injected |=
4369                                 vcpu->arch.exception.pending;
4370         }
4371         events->exception.nr = vcpu->arch.exception.nr;
4372         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4373         events->exception.error_code = vcpu->arch.exception.error_code;
4374         events->exception_has_payload = vcpu->arch.exception.has_payload;
4375         events->exception_payload = vcpu->arch.exception.payload;
4376
4377         events->interrupt.injected =
4378                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4379         events->interrupt.nr = vcpu->arch.interrupt.nr;
4380         events->interrupt.soft = 0;
4381         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4382
4383         events->nmi.injected = vcpu->arch.nmi_injected;
4384         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4385         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4386         events->nmi.pad = 0;
4387
4388         events->sipi_vector = 0; /* never valid when reporting to user space */
4389
4390         events->smi.smm = is_smm(vcpu);
4391         events->smi.pending = vcpu->arch.smi_pending;
4392         events->smi.smm_inside_nmi =
4393                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4394         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4395
4396         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4397                          | KVM_VCPUEVENT_VALID_SHADOW
4398                          | KVM_VCPUEVENT_VALID_SMM);
4399         if (vcpu->kvm->arch.exception_payload_enabled)
4400                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4401
4402         memset(&events->reserved, 0, sizeof(events->reserved));
4403 }
4404
4405 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4406
4407 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4408                                               struct kvm_vcpu_events *events)
4409 {
4410         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4411                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4412                               | KVM_VCPUEVENT_VALID_SHADOW
4413                               | KVM_VCPUEVENT_VALID_SMM
4414                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4415                 return -EINVAL;
4416
4417         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4418                 if (!vcpu->kvm->arch.exception_payload_enabled)
4419                         return -EINVAL;
4420                 if (events->exception.pending)
4421                         events->exception.injected = 0;
4422                 else
4423                         events->exception_has_payload = 0;
4424         } else {
4425                 events->exception.pending = 0;
4426                 events->exception_has_payload = 0;
4427         }
4428
4429         if ((events->exception.injected || events->exception.pending) &&
4430             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4431                 return -EINVAL;
4432
4433         /* INITs are latched while in SMM */
4434         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4435             (events->smi.smm || events->smi.pending) &&
4436             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4437                 return -EINVAL;
4438
4439         process_nmi(vcpu);
4440         vcpu->arch.exception.injected = events->exception.injected;
4441         vcpu->arch.exception.pending = events->exception.pending;
4442         vcpu->arch.exception.nr = events->exception.nr;
4443         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4444         vcpu->arch.exception.error_code = events->exception.error_code;
4445         vcpu->arch.exception.has_payload = events->exception_has_payload;
4446         vcpu->arch.exception.payload = events->exception_payload;
4447
4448         vcpu->arch.interrupt.injected = events->interrupt.injected;
4449         vcpu->arch.interrupt.nr = events->interrupt.nr;
4450         vcpu->arch.interrupt.soft = events->interrupt.soft;
4451         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4452                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4453                                                 events->interrupt.shadow);
4454
4455         vcpu->arch.nmi_injected = events->nmi.injected;
4456         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4457                 vcpu->arch.nmi_pending = events->nmi.pending;
4458         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4459
4460         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4461             lapic_in_kernel(vcpu))
4462                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4463
4464         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4465                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4466                         if (events->smi.smm)
4467                                 vcpu->arch.hflags |= HF_SMM_MASK;
4468                         else
4469                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4470                         kvm_smm_changed(vcpu);
4471                 }
4472
4473                 vcpu->arch.smi_pending = events->smi.pending;
4474
4475                 if (events->smi.smm) {
4476                         if (events->smi.smm_inside_nmi)
4477                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4478                         else
4479                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4480                 }
4481
4482                 if (lapic_in_kernel(vcpu)) {
4483                         if (events->smi.latched_init)
4484                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4485                         else
4486                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4487                 }
4488         }
4489
4490         kvm_make_request(KVM_REQ_EVENT, vcpu);
4491
4492         return 0;
4493 }
4494
4495 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4496                                              struct kvm_debugregs *dbgregs)
4497 {
4498         unsigned long val;
4499
4500         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4501         kvm_get_dr(vcpu, 6, &val);
4502         dbgregs->dr6 = val;
4503         dbgregs->dr7 = vcpu->arch.dr7;
4504         dbgregs->flags = 0;
4505         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4506 }
4507
4508 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4509                                             struct kvm_debugregs *dbgregs)
4510 {
4511         if (dbgregs->flags)
4512                 return -EINVAL;
4513
4514         if (!kvm_dr6_valid(dbgregs->dr6))
4515                 return -EINVAL;
4516         if (!kvm_dr7_valid(dbgregs->dr7))
4517                 return -EINVAL;
4518
4519         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4520         kvm_update_dr0123(vcpu);
4521         vcpu->arch.dr6 = dbgregs->dr6;
4522         vcpu->arch.dr7 = dbgregs->dr7;
4523         kvm_update_dr7(vcpu);
4524
4525         return 0;
4526 }
4527
4528 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4529
4530 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4531 {
4532         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4533         u64 xstate_bv = xsave->header.xfeatures;
4534         u64 valid;
4535
4536         /*
4537          * Copy legacy XSAVE area, to avoid complications with CPUID
4538          * leaves 0 and 1 in the loop below.
4539          */
4540         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4541
4542         /* Set XSTATE_BV */
4543         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4544         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4545
4546         /*
4547          * Copy each region from the possibly compacted offset to the
4548          * non-compacted offset.
4549          */
4550         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4551         while (valid) {
4552                 u64 xfeature_mask = valid & -valid;
4553                 int xfeature_nr = fls64(xfeature_mask) - 1;
4554                 void *src = get_xsave_addr(xsave, xfeature_nr);
4555
4556                 if (src) {
4557                         u32 size, offset, ecx, edx;
4558                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4559                                     &size, &offset, &ecx, &edx);
4560                         if (xfeature_nr == XFEATURE_PKRU)
4561                                 memcpy(dest + offset, &vcpu->arch.pkru,
4562                                        sizeof(vcpu->arch.pkru));
4563                         else
4564                                 memcpy(dest + offset, src, size);
4565
4566                 }
4567
4568                 valid -= xfeature_mask;
4569         }
4570 }
4571
4572 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4573 {
4574         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4575         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4576         u64 valid;
4577
4578         /*
4579          * Copy legacy XSAVE area, to avoid complications with CPUID
4580          * leaves 0 and 1 in the loop below.
4581          */
4582         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4583
4584         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4585         xsave->header.xfeatures = xstate_bv;
4586         if (boot_cpu_has(X86_FEATURE_XSAVES))
4587                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4588
4589         /*
4590          * Copy each region from the non-compacted offset to the
4591          * possibly compacted offset.
4592          */
4593         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4594         while (valid) {
4595                 u64 xfeature_mask = valid & -valid;
4596                 int xfeature_nr = fls64(xfeature_mask) - 1;
4597                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4598
4599                 if (dest) {
4600                         u32 size, offset, ecx, edx;
4601                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4602                                     &size, &offset, &ecx, &edx);
4603                         if (xfeature_nr == XFEATURE_PKRU)
4604                                 memcpy(&vcpu->arch.pkru, src + offset,
4605                                        sizeof(vcpu->arch.pkru));
4606                         else
4607                                 memcpy(dest, src + offset, size);
4608                 }
4609
4610                 valid -= xfeature_mask;
4611         }
4612 }
4613
4614 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4615                                          struct kvm_xsave *guest_xsave)
4616 {
4617         if (!vcpu->arch.guest_fpu)
4618                 return;
4619
4620         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4621                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4622                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4623         } else {
4624                 memcpy(guest_xsave->region,
4625                         &vcpu->arch.guest_fpu->state.fxsave,
4626                         sizeof(struct fxregs_state));
4627                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4628                         XFEATURE_MASK_FPSSE;
4629         }
4630 }
4631
4632 #define XSAVE_MXCSR_OFFSET 24
4633
4634 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4635                                         struct kvm_xsave *guest_xsave)
4636 {
4637         u64 xstate_bv;
4638         u32 mxcsr;
4639
4640         if (!vcpu->arch.guest_fpu)
4641                 return 0;
4642
4643         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4644         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4645
4646         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4647                 /*
4648                  * Here we allow setting states that are not present in
4649                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4650                  * with old userspace.
4651                  */
4652                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4653                         return -EINVAL;
4654                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4655         } else {
4656                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4657                         mxcsr & ~mxcsr_feature_mask)
4658                         return -EINVAL;
4659                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4660                         guest_xsave->region, sizeof(struct fxregs_state));
4661         }
4662         return 0;
4663 }
4664
4665 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4666                                         struct kvm_xcrs *guest_xcrs)
4667 {
4668         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4669                 guest_xcrs->nr_xcrs = 0;
4670                 return;
4671         }
4672
4673         guest_xcrs->nr_xcrs = 1;
4674         guest_xcrs->flags = 0;
4675         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4676         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4677 }
4678
4679 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4680                                        struct kvm_xcrs *guest_xcrs)
4681 {
4682         int i, r = 0;
4683
4684         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4685                 return -EINVAL;
4686
4687         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4688                 return -EINVAL;
4689
4690         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4691                 /* Only support XCR0 currently */
4692                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4693                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4694                                 guest_xcrs->xcrs[i].value);
4695                         break;
4696                 }
4697         if (r)
4698                 r = -EINVAL;
4699         return r;
4700 }
4701
4702 /*
4703  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4704  * stopped by the hypervisor.  This function will be called from the host only.
4705  * EINVAL is returned when the host attempts to set the flag for a guest that
4706  * does not support pv clocks.
4707  */
4708 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4709 {
4710         if (!vcpu->arch.pv_time_enabled)
4711                 return -EINVAL;
4712         vcpu->arch.pvclock_set_guest_stopped_request = true;
4713         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4714         return 0;
4715 }
4716
4717 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4718                                      struct kvm_enable_cap *cap)
4719 {
4720         int r;
4721         uint16_t vmcs_version;
4722         void __user *user_ptr;
4723
4724         if (cap->flags)
4725                 return -EINVAL;
4726
4727         switch (cap->cap) {
4728         case KVM_CAP_HYPERV_SYNIC2:
4729                 if (cap->args[0])
4730                         return -EINVAL;
4731                 fallthrough;
4732
4733         case KVM_CAP_HYPERV_SYNIC:
4734                 if (!irqchip_in_kernel(vcpu->kvm))
4735                         return -EINVAL;
4736                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4737                                              KVM_CAP_HYPERV_SYNIC2);
4738         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4739                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4740                         return -ENOTTY;
4741                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4742                 if (!r) {
4743                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4744                         if (copy_to_user(user_ptr, &vmcs_version,
4745                                          sizeof(vmcs_version)))
4746                                 r = -EFAULT;
4747                 }
4748                 return r;
4749         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4750                 if (!kvm_x86_ops.enable_direct_tlbflush)
4751                         return -ENOTTY;
4752
4753                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4754
4755         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4756                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4757                 if (vcpu->arch.pv_cpuid.enforce)
4758                         kvm_update_pv_runtime(vcpu);
4759
4760                 return 0;
4761         default:
4762                 return -EINVAL;
4763         }
4764 }
4765
4766 long kvm_arch_vcpu_ioctl(struct file *filp,
4767                          unsigned int ioctl, unsigned long arg)
4768 {
4769         struct kvm_vcpu *vcpu = filp->private_data;
4770         void __user *argp = (void __user *)arg;
4771         int r;
4772         union {
4773                 struct kvm_lapic_state *lapic;
4774                 struct kvm_xsave *xsave;
4775                 struct kvm_xcrs *xcrs;
4776                 void *buffer;
4777         } u;
4778
4779         vcpu_load(vcpu);
4780
4781         u.buffer = NULL;
4782         switch (ioctl) {
4783         case KVM_GET_LAPIC: {
4784                 r = -EINVAL;
4785                 if (!lapic_in_kernel(vcpu))
4786                         goto out;
4787                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4788                                 GFP_KERNEL_ACCOUNT);
4789
4790                 r = -ENOMEM;
4791                 if (!u.lapic)
4792                         goto out;
4793                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4794                 if (r)
4795                         goto out;
4796                 r = -EFAULT;
4797                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4798                         goto out;
4799                 r = 0;
4800                 break;
4801         }
4802         case KVM_SET_LAPIC: {
4803                 r = -EINVAL;
4804                 if (!lapic_in_kernel(vcpu))
4805                         goto out;
4806                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4807                 if (IS_ERR(u.lapic)) {
4808                         r = PTR_ERR(u.lapic);
4809                         goto out_nofree;
4810                 }
4811
4812                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4813                 break;
4814         }
4815         case KVM_INTERRUPT: {
4816                 struct kvm_interrupt irq;
4817
4818                 r = -EFAULT;
4819                 if (copy_from_user(&irq, argp, sizeof(irq)))
4820                         goto out;
4821                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4822                 break;
4823         }
4824         case KVM_NMI: {
4825                 r = kvm_vcpu_ioctl_nmi(vcpu);
4826                 break;
4827         }
4828         case KVM_SMI: {
4829                 r = kvm_vcpu_ioctl_smi(vcpu);
4830                 break;
4831         }
4832         case KVM_SET_CPUID: {
4833                 struct kvm_cpuid __user *cpuid_arg = argp;
4834                 struct kvm_cpuid cpuid;
4835
4836                 r = -EFAULT;
4837                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4838                         goto out;
4839                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4840                 break;
4841         }
4842         case KVM_SET_CPUID2: {
4843                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4844                 struct kvm_cpuid2 cpuid;
4845
4846                 r = -EFAULT;
4847                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4848                         goto out;
4849                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4850                                               cpuid_arg->entries);
4851                 break;
4852         }
4853         case KVM_GET_CPUID2: {
4854                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4855                 struct kvm_cpuid2 cpuid;
4856
4857                 r = -EFAULT;
4858                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4859                         goto out;
4860                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4861                                               cpuid_arg->entries);
4862                 if (r)
4863                         goto out;
4864                 r = -EFAULT;
4865                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4866                         goto out;
4867                 r = 0;
4868                 break;
4869         }
4870         case KVM_GET_MSRS: {
4871                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4872                 r = msr_io(vcpu, argp, do_get_msr, 1);
4873                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4874                 break;
4875         }
4876         case KVM_SET_MSRS: {
4877                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4878                 r = msr_io(vcpu, argp, do_set_msr, 0);
4879                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4880                 break;
4881         }
4882         case KVM_TPR_ACCESS_REPORTING: {
4883                 struct kvm_tpr_access_ctl tac;
4884
4885                 r = -EFAULT;
4886                 if (copy_from_user(&tac, argp, sizeof(tac)))
4887                         goto out;
4888                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4889                 if (r)
4890                         goto out;
4891                 r = -EFAULT;
4892                 if (copy_to_user(argp, &tac, sizeof(tac)))
4893                         goto out;
4894                 r = 0;
4895                 break;
4896         };
4897         case KVM_SET_VAPIC_ADDR: {
4898                 struct kvm_vapic_addr va;
4899                 int idx;
4900
4901                 r = -EINVAL;
4902                 if (!lapic_in_kernel(vcpu))
4903                         goto out;
4904                 r = -EFAULT;
4905                 if (copy_from_user(&va, argp, sizeof(va)))
4906                         goto out;
4907                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4908                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4909                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4910                 break;
4911         }
4912         case KVM_X86_SETUP_MCE: {
4913                 u64 mcg_cap;
4914
4915                 r = -EFAULT;
4916                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4917                         goto out;
4918                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4919                 break;
4920         }
4921         case KVM_X86_SET_MCE: {
4922                 struct kvm_x86_mce mce;
4923
4924                 r = -EFAULT;
4925                 if (copy_from_user(&mce, argp, sizeof(mce)))
4926                         goto out;
4927                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4928                 break;
4929         }
4930         case KVM_GET_VCPU_EVENTS: {
4931                 struct kvm_vcpu_events events;
4932
4933                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4934
4935                 r = -EFAULT;
4936                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4937                         break;
4938                 r = 0;
4939                 break;
4940         }
4941         case KVM_SET_VCPU_EVENTS: {
4942                 struct kvm_vcpu_events events;
4943
4944                 r = -EFAULT;
4945                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4946                         break;
4947
4948                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4949                 break;
4950         }
4951         case KVM_GET_DEBUGREGS: {
4952                 struct kvm_debugregs dbgregs;
4953
4954                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4955
4956                 r = -EFAULT;
4957                 if (copy_to_user(argp, &dbgregs,
4958                                  sizeof(struct kvm_debugregs)))
4959                         break;
4960                 r = 0;
4961                 break;
4962         }
4963         case KVM_SET_DEBUGREGS: {
4964                 struct kvm_debugregs dbgregs;
4965
4966                 r = -EFAULT;
4967                 if (copy_from_user(&dbgregs, argp,
4968                                    sizeof(struct kvm_debugregs)))
4969                         break;
4970
4971                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4972                 break;
4973         }
4974         case KVM_GET_XSAVE: {
4975                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4976                 r = -ENOMEM;
4977                 if (!u.xsave)
4978                         break;
4979
4980                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4981
4982                 r = -EFAULT;
4983                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4984                         break;
4985                 r = 0;
4986                 break;
4987         }
4988         case KVM_SET_XSAVE: {
4989                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4990                 if (IS_ERR(u.xsave)) {
4991                         r = PTR_ERR(u.xsave);
4992                         goto out_nofree;
4993                 }
4994
4995                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4996                 break;
4997         }
4998         case KVM_GET_XCRS: {
4999                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5000                 r = -ENOMEM;
5001                 if (!u.xcrs)
5002                         break;
5003
5004                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5005
5006                 r = -EFAULT;
5007                 if (copy_to_user(argp, u.xcrs,
5008                                  sizeof(struct kvm_xcrs)))
5009                         break;
5010                 r = 0;
5011                 break;
5012         }
5013         case KVM_SET_XCRS: {
5014                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5015                 if (IS_ERR(u.xcrs)) {
5016                         r = PTR_ERR(u.xcrs);
5017                         goto out_nofree;
5018                 }
5019
5020                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5021                 break;
5022         }
5023         case KVM_SET_TSC_KHZ: {
5024                 u32 user_tsc_khz;
5025
5026                 r = -EINVAL;
5027                 user_tsc_khz = (u32)arg;
5028
5029                 if (kvm_has_tsc_control &&
5030                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5031                         goto out;
5032
5033                 if (user_tsc_khz == 0)
5034                         user_tsc_khz = tsc_khz;
5035
5036                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5037                         r = 0;
5038
5039                 goto out;
5040         }
5041         case KVM_GET_TSC_KHZ: {
5042                 r = vcpu->arch.virtual_tsc_khz;
5043                 goto out;
5044         }
5045         case KVM_KVMCLOCK_CTRL: {
5046                 r = kvm_set_guest_paused(vcpu);
5047                 goto out;
5048         }
5049         case KVM_ENABLE_CAP: {
5050                 struct kvm_enable_cap cap;
5051
5052                 r = -EFAULT;
5053                 if (copy_from_user(&cap, argp, sizeof(cap)))
5054                         goto out;
5055                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5056                 break;
5057         }
5058         case KVM_GET_NESTED_STATE: {
5059                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5060                 u32 user_data_size;
5061
5062                 r = -EINVAL;
5063                 if (!kvm_x86_ops.nested_ops->get_state)
5064                         break;
5065
5066                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5067                 r = -EFAULT;
5068                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5069                         break;
5070
5071                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5072                                                      user_data_size);
5073                 if (r < 0)
5074                         break;
5075
5076                 if (r > user_data_size) {
5077                         if (put_user(r, &user_kvm_nested_state->size))
5078                                 r = -EFAULT;
5079                         else
5080                                 r = -E2BIG;
5081                         break;
5082                 }
5083
5084                 r = 0;
5085                 break;
5086         }
5087         case KVM_SET_NESTED_STATE: {
5088                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5089                 struct kvm_nested_state kvm_state;
5090                 int idx;
5091
5092                 r = -EINVAL;
5093                 if (!kvm_x86_ops.nested_ops->set_state)
5094                         break;
5095
5096                 r = -EFAULT;
5097                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5098                         break;
5099
5100                 r = -EINVAL;
5101                 if (kvm_state.size < sizeof(kvm_state))
5102                         break;
5103
5104                 if (kvm_state.flags &
5105                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5106                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5107                       | KVM_STATE_NESTED_GIF_SET))
5108                         break;
5109
5110                 /* nested_run_pending implies guest_mode.  */
5111                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5112                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5113                         break;
5114
5115                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5116                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5117                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5118                 break;
5119         }
5120         case KVM_GET_SUPPORTED_HV_CPUID:
5121                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5122                 break;
5123 #ifdef CONFIG_KVM_XEN
5124         case KVM_XEN_VCPU_GET_ATTR: {
5125                 struct kvm_xen_vcpu_attr xva;
5126
5127                 r = -EFAULT;
5128                 if (copy_from_user(&xva, argp, sizeof(xva)))
5129                         goto out;
5130                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5131                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5132                         r = -EFAULT;
5133                 break;
5134         }
5135         case KVM_XEN_VCPU_SET_ATTR: {
5136                 struct kvm_xen_vcpu_attr xva;
5137
5138                 r = -EFAULT;
5139                 if (copy_from_user(&xva, argp, sizeof(xva)))
5140                         goto out;
5141                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5142                 break;
5143         }
5144 #endif
5145         default:
5146                 r = -EINVAL;
5147         }
5148 out:
5149         kfree(u.buffer);
5150 out_nofree:
5151         vcpu_put(vcpu);
5152         return r;
5153 }
5154
5155 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5156 {
5157         return VM_FAULT_SIGBUS;
5158 }
5159
5160 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5161 {
5162         int ret;
5163
5164         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5165                 return -EINVAL;
5166         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5167         return ret;
5168 }
5169
5170 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5171                                               u64 ident_addr)
5172 {
5173         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5174 }
5175
5176 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5177                                          unsigned long kvm_nr_mmu_pages)
5178 {
5179         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5180                 return -EINVAL;
5181
5182         mutex_lock(&kvm->slots_lock);
5183
5184         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5185         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5186
5187         mutex_unlock(&kvm->slots_lock);
5188         return 0;
5189 }
5190
5191 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5192 {
5193         return kvm->arch.n_max_mmu_pages;
5194 }
5195
5196 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5197 {
5198         struct kvm_pic *pic = kvm->arch.vpic;
5199         int r;
5200
5201         r = 0;
5202         switch (chip->chip_id) {
5203         case KVM_IRQCHIP_PIC_MASTER:
5204                 memcpy(&chip->chip.pic, &pic->pics[0],
5205                         sizeof(struct kvm_pic_state));
5206                 break;
5207         case KVM_IRQCHIP_PIC_SLAVE:
5208                 memcpy(&chip->chip.pic, &pic->pics[1],
5209                         sizeof(struct kvm_pic_state));
5210                 break;
5211         case KVM_IRQCHIP_IOAPIC:
5212                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5213                 break;
5214         default:
5215                 r = -EINVAL;
5216                 break;
5217         }
5218         return r;
5219 }
5220
5221 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5222 {
5223         struct kvm_pic *pic = kvm->arch.vpic;
5224         int r;
5225
5226         r = 0;
5227         switch (chip->chip_id) {
5228         case KVM_IRQCHIP_PIC_MASTER:
5229                 spin_lock(&pic->lock);
5230                 memcpy(&pic->pics[0], &chip->chip.pic,
5231                         sizeof(struct kvm_pic_state));
5232                 spin_unlock(&pic->lock);
5233                 break;
5234         case KVM_IRQCHIP_PIC_SLAVE:
5235                 spin_lock(&pic->lock);
5236                 memcpy(&pic->pics[1], &chip->chip.pic,
5237                         sizeof(struct kvm_pic_state));
5238                 spin_unlock(&pic->lock);
5239                 break;
5240         case KVM_IRQCHIP_IOAPIC:
5241                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5242                 break;
5243         default:
5244                 r = -EINVAL;
5245                 break;
5246         }
5247         kvm_pic_update_irq(pic);
5248         return r;
5249 }
5250
5251 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5252 {
5253         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5254
5255         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5256
5257         mutex_lock(&kps->lock);
5258         memcpy(ps, &kps->channels, sizeof(*ps));
5259         mutex_unlock(&kps->lock);
5260         return 0;
5261 }
5262
5263 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5264 {
5265         int i;
5266         struct kvm_pit *pit = kvm->arch.vpit;
5267
5268         mutex_lock(&pit->pit_state.lock);
5269         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5270         for (i = 0; i < 3; i++)
5271                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5272         mutex_unlock(&pit->pit_state.lock);
5273         return 0;
5274 }
5275
5276 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5277 {
5278         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5279         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5280                 sizeof(ps->channels));
5281         ps->flags = kvm->arch.vpit->pit_state.flags;
5282         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5283         memset(&ps->reserved, 0, sizeof(ps->reserved));
5284         return 0;
5285 }
5286
5287 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5288 {
5289         int start = 0;
5290         int i;
5291         u32 prev_legacy, cur_legacy;
5292         struct kvm_pit *pit = kvm->arch.vpit;
5293
5294         mutex_lock(&pit->pit_state.lock);
5295         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5296         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5297         if (!prev_legacy && cur_legacy)
5298                 start = 1;
5299         memcpy(&pit->pit_state.channels, &ps->channels,
5300                sizeof(pit->pit_state.channels));
5301         pit->pit_state.flags = ps->flags;
5302         for (i = 0; i < 3; i++)
5303                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5304                                    start && i == 0);
5305         mutex_unlock(&pit->pit_state.lock);
5306         return 0;
5307 }
5308
5309 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5310                                  struct kvm_reinject_control *control)
5311 {
5312         struct kvm_pit *pit = kvm->arch.vpit;
5313
5314         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5315          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5316          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5317          */
5318         mutex_lock(&pit->pit_state.lock);
5319         kvm_pit_set_reinject(pit, control->pit_reinject);
5320         mutex_unlock(&pit->pit_state.lock);
5321
5322         return 0;
5323 }
5324
5325 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5326 {
5327
5328         /*
5329          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5330          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5331          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5332          * VM-Exit.
5333          */
5334         struct kvm_vcpu *vcpu;
5335         int i;
5336
5337         kvm_for_each_vcpu(i, vcpu, kvm)
5338                 kvm_vcpu_kick(vcpu);
5339 }
5340
5341 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5342                         bool line_status)
5343 {
5344         if (!irqchip_in_kernel(kvm))
5345                 return -ENXIO;
5346
5347         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5348                                         irq_event->irq, irq_event->level,
5349                                         line_status);
5350         return 0;
5351 }
5352
5353 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5354                             struct kvm_enable_cap *cap)
5355 {
5356         int r;
5357
5358         if (cap->flags)
5359                 return -EINVAL;
5360
5361         switch (cap->cap) {
5362         case KVM_CAP_DISABLE_QUIRKS:
5363                 kvm->arch.disabled_quirks = cap->args[0];
5364                 r = 0;
5365                 break;
5366         case KVM_CAP_SPLIT_IRQCHIP: {
5367                 mutex_lock(&kvm->lock);
5368                 r = -EINVAL;
5369                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5370                         goto split_irqchip_unlock;
5371                 r = -EEXIST;
5372                 if (irqchip_in_kernel(kvm))
5373                         goto split_irqchip_unlock;
5374                 if (kvm->created_vcpus)
5375                         goto split_irqchip_unlock;
5376                 r = kvm_setup_empty_irq_routing(kvm);
5377                 if (r)
5378                         goto split_irqchip_unlock;
5379                 /* Pairs with irqchip_in_kernel. */
5380                 smp_wmb();
5381                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5382                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5383                 r = 0;
5384 split_irqchip_unlock:
5385                 mutex_unlock(&kvm->lock);
5386                 break;
5387         }
5388         case KVM_CAP_X2APIC_API:
5389                 r = -EINVAL;
5390                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5391                         break;
5392
5393                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5394                         kvm->arch.x2apic_format = true;
5395                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5396                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5397
5398                 r = 0;
5399                 break;
5400         case KVM_CAP_X86_DISABLE_EXITS:
5401                 r = -EINVAL;
5402                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5403                         break;
5404
5405                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5406                         kvm_can_mwait_in_guest())
5407                         kvm->arch.mwait_in_guest = true;
5408                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5409                         kvm->arch.hlt_in_guest = true;
5410                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5411                         kvm->arch.pause_in_guest = true;
5412                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5413                         kvm->arch.cstate_in_guest = true;
5414                 r = 0;
5415                 break;
5416         case KVM_CAP_MSR_PLATFORM_INFO:
5417                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5418                 r = 0;
5419                 break;
5420         case KVM_CAP_EXCEPTION_PAYLOAD:
5421                 kvm->arch.exception_payload_enabled = cap->args[0];
5422                 r = 0;
5423                 break;
5424         case KVM_CAP_X86_USER_SPACE_MSR:
5425                 kvm->arch.user_space_msr_mask = cap->args[0];
5426                 r = 0;
5427                 break;
5428         case KVM_CAP_X86_BUS_LOCK_EXIT:
5429                 r = -EINVAL;
5430                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5431                         break;
5432
5433                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5434                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5435                         break;
5436
5437                 if (kvm_has_bus_lock_exit &&
5438                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5439                         kvm->arch.bus_lock_detection_enabled = true;
5440                 r = 0;
5441                 break;
5442 #ifdef CONFIG_X86_SGX_KVM
5443         case KVM_CAP_SGX_ATTRIBUTE: {
5444                 unsigned long allowed_attributes = 0;
5445
5446                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5447                 if (r)
5448                         break;
5449
5450                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5451                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5452                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5453                         kvm->arch.sgx_provisioning_allowed = true;
5454                 else
5455                         r = -EINVAL;
5456                 break;
5457         }
5458 #endif
5459         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5460                 r = -EINVAL;
5461                 if (kvm_x86_ops.vm_copy_enc_context_from)
5462                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5463                 return r;
5464         default:
5465                 r = -EINVAL;
5466                 break;
5467         }
5468         return r;
5469 }
5470
5471 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5472 {
5473         struct kvm_x86_msr_filter *msr_filter;
5474
5475         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5476         if (!msr_filter)
5477                 return NULL;
5478
5479         msr_filter->default_allow = default_allow;
5480         return msr_filter;
5481 }
5482
5483 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5484 {
5485         u32 i;
5486
5487         if (!msr_filter)
5488                 return;
5489
5490         for (i = 0; i < msr_filter->count; i++)
5491                 kfree(msr_filter->ranges[i].bitmap);
5492
5493         kfree(msr_filter);
5494 }
5495
5496 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5497                               struct kvm_msr_filter_range *user_range)
5498 {
5499         unsigned long *bitmap = NULL;
5500         size_t bitmap_size;
5501
5502         if (!user_range->nmsrs)
5503                 return 0;
5504
5505         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5506                 return -EINVAL;
5507
5508         if (!user_range->flags)
5509                 return -EINVAL;
5510
5511         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5512         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5513                 return -EINVAL;
5514
5515         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5516         if (IS_ERR(bitmap))
5517                 return PTR_ERR(bitmap);
5518
5519         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5520                 .flags = user_range->flags,
5521                 .base = user_range->base,
5522                 .nmsrs = user_range->nmsrs,
5523                 .bitmap = bitmap,
5524         };
5525
5526         msr_filter->count++;
5527         return 0;
5528 }
5529
5530 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5531 {
5532         struct kvm_msr_filter __user *user_msr_filter = argp;
5533         struct kvm_x86_msr_filter *new_filter, *old_filter;
5534         struct kvm_msr_filter filter;
5535         bool default_allow;
5536         bool empty = true;
5537         int r = 0;
5538         u32 i;
5539
5540         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5541                 return -EFAULT;
5542
5543         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5544                 empty &= !filter.ranges[i].nmsrs;
5545
5546         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5547         if (empty && !default_allow)
5548                 return -EINVAL;
5549
5550         new_filter = kvm_alloc_msr_filter(default_allow);
5551         if (!new_filter)
5552                 return -ENOMEM;
5553
5554         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5555                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5556                 if (r) {
5557                         kvm_free_msr_filter(new_filter);
5558                         return r;
5559                 }
5560         }
5561
5562         mutex_lock(&kvm->lock);
5563
5564         /* The per-VM filter is protected by kvm->lock... */
5565         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5566
5567         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5568         synchronize_srcu(&kvm->srcu);
5569
5570         kvm_free_msr_filter(old_filter);
5571
5572         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5573         mutex_unlock(&kvm->lock);
5574
5575         return 0;
5576 }
5577
5578 long kvm_arch_vm_ioctl(struct file *filp,
5579                        unsigned int ioctl, unsigned long arg)
5580 {
5581         struct kvm *kvm = filp->private_data;
5582         void __user *argp = (void __user *)arg;
5583         int r = -ENOTTY;
5584         /*
5585          * This union makes it completely explicit to gcc-3.x
5586          * that these two variables' stack usage should be
5587          * combined, not added together.
5588          */
5589         union {
5590                 struct kvm_pit_state ps;
5591                 struct kvm_pit_state2 ps2;
5592                 struct kvm_pit_config pit_config;
5593         } u;
5594
5595         switch (ioctl) {
5596         case KVM_SET_TSS_ADDR:
5597                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5598                 break;
5599         case KVM_SET_IDENTITY_MAP_ADDR: {
5600                 u64 ident_addr;
5601
5602                 mutex_lock(&kvm->lock);
5603                 r = -EINVAL;
5604                 if (kvm->created_vcpus)
5605                         goto set_identity_unlock;
5606                 r = -EFAULT;
5607                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5608                         goto set_identity_unlock;
5609                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5610 set_identity_unlock:
5611                 mutex_unlock(&kvm->lock);
5612                 break;
5613         }
5614         case KVM_SET_NR_MMU_PAGES:
5615                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5616                 break;
5617         case KVM_GET_NR_MMU_PAGES:
5618                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5619                 break;
5620         case KVM_CREATE_IRQCHIP: {
5621                 mutex_lock(&kvm->lock);
5622
5623                 r = -EEXIST;
5624                 if (irqchip_in_kernel(kvm))
5625                         goto create_irqchip_unlock;
5626
5627                 r = -EINVAL;
5628                 if (kvm->created_vcpus)
5629                         goto create_irqchip_unlock;
5630
5631                 r = kvm_pic_init(kvm);
5632                 if (r)
5633                         goto create_irqchip_unlock;
5634
5635                 r = kvm_ioapic_init(kvm);
5636                 if (r) {
5637                         kvm_pic_destroy(kvm);
5638                         goto create_irqchip_unlock;
5639                 }
5640
5641                 r = kvm_setup_default_irq_routing(kvm);
5642                 if (r) {
5643                         kvm_ioapic_destroy(kvm);
5644                         kvm_pic_destroy(kvm);
5645                         goto create_irqchip_unlock;
5646                 }
5647                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5648                 smp_wmb();
5649                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5650         create_irqchip_unlock:
5651                 mutex_unlock(&kvm->lock);
5652                 break;
5653         }
5654         case KVM_CREATE_PIT:
5655                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5656                 goto create_pit;
5657         case KVM_CREATE_PIT2:
5658                 r = -EFAULT;
5659                 if (copy_from_user(&u.pit_config, argp,
5660                                    sizeof(struct kvm_pit_config)))
5661                         goto out;
5662         create_pit:
5663                 mutex_lock(&kvm->lock);
5664                 r = -EEXIST;
5665                 if (kvm->arch.vpit)
5666                         goto create_pit_unlock;
5667                 r = -ENOMEM;
5668                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5669                 if (kvm->arch.vpit)
5670                         r = 0;
5671         create_pit_unlock:
5672                 mutex_unlock(&kvm->lock);
5673                 break;
5674         case KVM_GET_IRQCHIP: {
5675                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5676                 struct kvm_irqchip *chip;
5677
5678                 chip = memdup_user(argp, sizeof(*chip));
5679                 if (IS_ERR(chip)) {
5680                         r = PTR_ERR(chip);
5681                         goto out;
5682                 }
5683
5684                 r = -ENXIO;
5685                 if (!irqchip_kernel(kvm))
5686                         goto get_irqchip_out;
5687                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5688                 if (r)
5689                         goto get_irqchip_out;
5690                 r = -EFAULT;
5691                 if (copy_to_user(argp, chip, sizeof(*chip)))
5692                         goto get_irqchip_out;
5693                 r = 0;
5694         get_irqchip_out:
5695                 kfree(chip);
5696                 break;
5697         }
5698         case KVM_SET_IRQCHIP: {
5699                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5700                 struct kvm_irqchip *chip;
5701
5702                 chip = memdup_user(argp, sizeof(*chip));
5703                 if (IS_ERR(chip)) {
5704                         r = PTR_ERR(chip);
5705                         goto out;
5706                 }
5707
5708                 r = -ENXIO;
5709                 if (!irqchip_kernel(kvm))
5710                         goto set_irqchip_out;
5711                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5712         set_irqchip_out:
5713                 kfree(chip);
5714                 break;
5715         }
5716         case KVM_GET_PIT: {
5717                 r = -EFAULT;
5718                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5719                         goto out;
5720                 r = -ENXIO;
5721                 if (!kvm->arch.vpit)
5722                         goto out;
5723                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5724                 if (r)
5725                         goto out;
5726                 r = -EFAULT;
5727                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5728                         goto out;
5729                 r = 0;
5730                 break;
5731         }
5732         case KVM_SET_PIT: {
5733                 r = -EFAULT;
5734                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5735                         goto out;
5736                 mutex_lock(&kvm->lock);
5737                 r = -ENXIO;
5738                 if (!kvm->arch.vpit)
5739                         goto set_pit_out;
5740                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5741 set_pit_out:
5742                 mutex_unlock(&kvm->lock);
5743                 break;
5744         }
5745         case KVM_GET_PIT2: {
5746                 r = -ENXIO;
5747                 if (!kvm->arch.vpit)
5748                         goto out;
5749                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5750                 if (r)
5751                         goto out;
5752                 r = -EFAULT;
5753                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5754                         goto out;
5755                 r = 0;
5756                 break;
5757         }
5758         case KVM_SET_PIT2: {
5759                 r = -EFAULT;
5760                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5761                         goto out;
5762                 mutex_lock(&kvm->lock);
5763                 r = -ENXIO;
5764                 if (!kvm->arch.vpit)
5765                         goto set_pit2_out;
5766                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5767 set_pit2_out:
5768                 mutex_unlock(&kvm->lock);
5769                 break;
5770         }
5771         case KVM_REINJECT_CONTROL: {
5772                 struct kvm_reinject_control control;
5773                 r =  -EFAULT;
5774                 if (copy_from_user(&control, argp, sizeof(control)))
5775                         goto out;
5776                 r = -ENXIO;
5777                 if (!kvm->arch.vpit)
5778                         goto out;
5779                 r = kvm_vm_ioctl_reinject(kvm, &control);
5780                 break;
5781         }
5782         case KVM_SET_BOOT_CPU_ID:
5783                 r = 0;
5784                 mutex_lock(&kvm->lock);
5785                 if (kvm->created_vcpus)
5786                         r = -EBUSY;
5787                 else
5788                         kvm->arch.bsp_vcpu_id = arg;
5789                 mutex_unlock(&kvm->lock);
5790                 break;
5791 #ifdef CONFIG_KVM_XEN
5792         case KVM_XEN_HVM_CONFIG: {
5793                 struct kvm_xen_hvm_config xhc;
5794                 r = -EFAULT;
5795                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5796                         goto out;
5797                 r = kvm_xen_hvm_config(kvm, &xhc);
5798                 break;
5799         }
5800         case KVM_XEN_HVM_GET_ATTR: {
5801                 struct kvm_xen_hvm_attr xha;
5802
5803                 r = -EFAULT;
5804                 if (copy_from_user(&xha, argp, sizeof(xha)))
5805                         goto out;
5806                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5807                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5808                         r = -EFAULT;
5809                 break;
5810         }
5811         case KVM_XEN_HVM_SET_ATTR: {
5812                 struct kvm_xen_hvm_attr xha;
5813
5814                 r = -EFAULT;
5815                 if (copy_from_user(&xha, argp, sizeof(xha)))
5816                         goto out;
5817                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5818                 break;
5819         }
5820 #endif
5821         case KVM_SET_CLOCK: {
5822                 struct kvm_arch *ka = &kvm->arch;
5823                 struct kvm_clock_data user_ns;
5824                 u64 now_ns;
5825
5826                 r = -EFAULT;
5827                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5828                         goto out;
5829
5830                 r = -EINVAL;
5831                 if (user_ns.flags)
5832                         goto out;
5833
5834                 r = 0;
5835                 /*
5836                  * TODO: userspace has to take care of races with VCPU_RUN, so
5837                  * kvm_gen_update_masterclock() can be cut down to locked
5838                  * pvclock_update_vm_gtod_copy().
5839                  */
5840                 kvm_gen_update_masterclock(kvm);
5841
5842                 /*
5843                  * This pairs with kvm_guest_time_update(): when masterclock is
5844                  * in use, we use master_kernel_ns + kvmclock_offset to set
5845                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5846                  * is slightly ahead) here we risk going negative on unsigned
5847                  * 'system_time' when 'user_ns.clock' is very small.
5848                  */
5849                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5850                 if (kvm->arch.use_master_clock)
5851                         now_ns = ka->master_kernel_ns;
5852                 else
5853                         now_ns = get_kvmclock_base_ns();
5854                 ka->kvmclock_offset = user_ns.clock - now_ns;
5855                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5856
5857                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5858                 break;
5859         }
5860         case KVM_GET_CLOCK: {
5861                 struct kvm_clock_data user_ns;
5862                 u64 now_ns;
5863
5864                 now_ns = get_kvmclock_ns(kvm);
5865                 user_ns.clock = now_ns;
5866                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5867                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5868
5869                 r = -EFAULT;
5870                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5871                         goto out;
5872                 r = 0;
5873                 break;
5874         }
5875         case KVM_MEMORY_ENCRYPT_OP: {
5876                 r = -ENOTTY;
5877                 if (kvm_x86_ops.mem_enc_op)
5878                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5879                 break;
5880         }
5881         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5882                 struct kvm_enc_region region;
5883
5884                 r = -EFAULT;
5885                 if (copy_from_user(&region, argp, sizeof(region)))
5886                         goto out;
5887
5888                 r = -ENOTTY;
5889                 if (kvm_x86_ops.mem_enc_reg_region)
5890                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5891                 break;
5892         }
5893         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5894                 struct kvm_enc_region region;
5895
5896                 r = -EFAULT;
5897                 if (copy_from_user(&region, argp, sizeof(region)))
5898                         goto out;
5899
5900                 r = -ENOTTY;
5901                 if (kvm_x86_ops.mem_enc_unreg_region)
5902                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5903                 break;
5904         }
5905         case KVM_HYPERV_EVENTFD: {
5906                 struct kvm_hyperv_eventfd hvevfd;
5907
5908                 r = -EFAULT;
5909                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5910                         goto out;
5911                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5912                 break;
5913         }
5914         case KVM_SET_PMU_EVENT_FILTER:
5915                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5916                 break;
5917         case KVM_X86_SET_MSR_FILTER:
5918                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5919                 break;
5920         default:
5921                 r = -ENOTTY;
5922         }
5923 out:
5924         return r;
5925 }
5926
5927 static void kvm_init_msr_list(void)
5928 {
5929         struct x86_pmu_capability x86_pmu;
5930         u32 dummy[2];
5931         unsigned i;
5932
5933         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5934                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5935
5936         perf_get_x86_pmu_capability(&x86_pmu);
5937
5938         num_msrs_to_save = 0;
5939         num_emulated_msrs = 0;
5940         num_msr_based_features = 0;
5941
5942         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5943                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5944                         continue;
5945
5946                 /*
5947                  * Even MSRs that are valid in the host may not be exposed
5948                  * to the guests in some cases.
5949                  */
5950                 switch (msrs_to_save_all[i]) {
5951                 case MSR_IA32_BNDCFGS:
5952                         if (!kvm_mpx_supported())
5953                                 continue;
5954                         break;
5955                 case MSR_TSC_AUX:
5956                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
5957                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
5958                                 continue;
5959                         break;
5960                 case MSR_IA32_UMWAIT_CONTROL:
5961                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5962                                 continue;
5963                         break;
5964                 case MSR_IA32_RTIT_CTL:
5965                 case MSR_IA32_RTIT_STATUS:
5966                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5967                                 continue;
5968                         break;
5969                 case MSR_IA32_RTIT_CR3_MATCH:
5970                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5971                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5972                                 continue;
5973                         break;
5974                 case MSR_IA32_RTIT_OUTPUT_BASE:
5975                 case MSR_IA32_RTIT_OUTPUT_MASK:
5976                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5977                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5978                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5979                                 continue;
5980                         break;
5981                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5982                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5983                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5984                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5985                                 continue;
5986                         break;
5987                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5988                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5989                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5990                                 continue;
5991                         break;
5992                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5993                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5994                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5995                                 continue;
5996                         break;
5997                 default:
5998                         break;
5999                 }
6000
6001                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6002         }
6003
6004         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6005                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6006                         continue;
6007
6008                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6009         }
6010
6011         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6012                 struct kvm_msr_entry msr;
6013
6014                 msr.index = msr_based_features_all[i];
6015                 if (kvm_get_msr_feature(&msr))
6016                         continue;
6017
6018                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6019         }
6020 }
6021
6022 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6023                            const void *v)
6024 {
6025         int handled = 0;
6026         int n;
6027
6028         do {
6029                 n = min(len, 8);
6030                 if (!(lapic_in_kernel(vcpu) &&
6031                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6032                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6033                         break;
6034                 handled += n;
6035                 addr += n;
6036                 len -= n;
6037                 v += n;
6038         } while (len);
6039
6040         return handled;
6041 }
6042
6043 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6044 {
6045         int handled = 0;
6046         int n;
6047
6048         do {
6049                 n = min(len, 8);
6050                 if (!(lapic_in_kernel(vcpu) &&
6051                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6052                                          addr, n, v))
6053                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6054                         break;
6055                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6056                 handled += n;
6057                 addr += n;
6058                 len -= n;
6059                 v += n;
6060         } while (len);
6061
6062         return handled;
6063 }
6064
6065 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6066                         struct kvm_segment *var, int seg)
6067 {
6068         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6069 }
6070
6071 void kvm_get_segment(struct kvm_vcpu *vcpu,
6072                      struct kvm_segment *var, int seg)
6073 {
6074         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6075 }
6076
6077 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6078                            struct x86_exception *exception)
6079 {
6080         gpa_t t_gpa;
6081
6082         BUG_ON(!mmu_is_nested(vcpu));
6083
6084         /* NPT walks are always user-walks */
6085         access |= PFERR_USER_MASK;
6086         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6087
6088         return t_gpa;
6089 }
6090
6091 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6092                               struct x86_exception *exception)
6093 {
6094         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6095         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6096 }
6097 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6098
6099  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6100                                 struct x86_exception *exception)
6101 {
6102         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6103         access |= PFERR_FETCH_MASK;
6104         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6105 }
6106
6107 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6108                                struct x86_exception *exception)
6109 {
6110         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6111         access |= PFERR_WRITE_MASK;
6112         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6113 }
6114 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6115
6116 /* uses this to access any guest's mapped memory without checking CPL */
6117 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6118                                 struct x86_exception *exception)
6119 {
6120         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6121 }
6122
6123 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6124                                       struct kvm_vcpu *vcpu, u32 access,
6125                                       struct x86_exception *exception)
6126 {
6127         void *data = val;
6128         int r = X86EMUL_CONTINUE;
6129
6130         while (bytes) {
6131                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6132                                                             exception);
6133                 unsigned offset = addr & (PAGE_SIZE-1);
6134                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6135                 int ret;
6136
6137                 if (gpa == UNMAPPED_GVA)
6138                         return X86EMUL_PROPAGATE_FAULT;
6139                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6140                                                offset, toread);
6141                 if (ret < 0) {
6142                         r = X86EMUL_IO_NEEDED;
6143                         goto out;
6144                 }
6145
6146                 bytes -= toread;
6147                 data += toread;
6148                 addr += toread;
6149         }
6150 out:
6151         return r;
6152 }
6153
6154 /* used for instruction fetching */
6155 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6156                                 gva_t addr, void *val, unsigned int bytes,
6157                                 struct x86_exception *exception)
6158 {
6159         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6160         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6161         unsigned offset;
6162         int ret;
6163
6164         /* Inline kvm_read_guest_virt_helper for speed.  */
6165         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6166                                                     exception);
6167         if (unlikely(gpa == UNMAPPED_GVA))
6168                 return X86EMUL_PROPAGATE_FAULT;
6169
6170         offset = addr & (PAGE_SIZE-1);
6171         if (WARN_ON(offset + bytes > PAGE_SIZE))
6172                 bytes = (unsigned)PAGE_SIZE - offset;
6173         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6174                                        offset, bytes);
6175         if (unlikely(ret < 0))
6176                 return X86EMUL_IO_NEEDED;
6177
6178         return X86EMUL_CONTINUE;
6179 }
6180
6181 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6182                                gva_t addr, void *val, unsigned int bytes,
6183                                struct x86_exception *exception)
6184 {
6185         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6186
6187         /*
6188          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6189          * is returned, but our callers are not ready for that and they blindly
6190          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6191          * uninitialized kernel stack memory into cr2 and error code.
6192          */
6193         memset(exception, 0, sizeof(*exception));
6194         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6195                                           exception);
6196 }
6197 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6198
6199 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6200                              gva_t addr, void *val, unsigned int bytes,
6201                              struct x86_exception *exception, bool system)
6202 {
6203         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6204         u32 access = 0;
6205
6206         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6207                 access |= PFERR_USER_MASK;
6208
6209         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6210 }
6211
6212 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6213                 unsigned long addr, void *val, unsigned int bytes)
6214 {
6215         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6216         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6217
6218         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6219 }
6220
6221 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6222                                       struct kvm_vcpu *vcpu, u32 access,
6223                                       struct x86_exception *exception)
6224 {
6225         void *data = val;
6226         int r = X86EMUL_CONTINUE;
6227
6228         while (bytes) {
6229                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6230                                                              access,
6231                                                              exception);
6232                 unsigned offset = addr & (PAGE_SIZE-1);
6233                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6234                 int ret;
6235
6236                 if (gpa == UNMAPPED_GVA)
6237                         return X86EMUL_PROPAGATE_FAULT;
6238                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6239                 if (ret < 0) {
6240                         r = X86EMUL_IO_NEEDED;
6241                         goto out;
6242                 }
6243
6244                 bytes -= towrite;
6245                 data += towrite;
6246                 addr += towrite;
6247         }
6248 out:
6249         return r;
6250 }
6251
6252 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6253                               unsigned int bytes, struct x86_exception *exception,
6254                               bool system)
6255 {
6256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6257         u32 access = PFERR_WRITE_MASK;
6258
6259         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6260                 access |= PFERR_USER_MASK;
6261
6262         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6263                                            access, exception);
6264 }
6265
6266 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6267                                 unsigned int bytes, struct x86_exception *exception)
6268 {
6269         /* kvm_write_guest_virt_system can pull in tons of pages. */
6270         vcpu->arch.l1tf_flush_l1d = true;
6271
6272         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6273                                            PFERR_WRITE_MASK, exception);
6274 }
6275 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6276
6277 int handle_ud(struct kvm_vcpu *vcpu)
6278 {
6279         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6280         int emul_type = EMULTYPE_TRAP_UD;
6281         char sig[5]; /* ud2; .ascii "kvm" */
6282         struct x86_exception e;
6283
6284         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6285                 return 1;
6286
6287         if (force_emulation_prefix &&
6288             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6289                                 sig, sizeof(sig), &e) == 0 &&
6290             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6291                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6292                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6293         }
6294
6295         return kvm_emulate_instruction(vcpu, emul_type);
6296 }
6297 EXPORT_SYMBOL_GPL(handle_ud);
6298
6299 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6300                             gpa_t gpa, bool write)
6301 {
6302         /* For APIC access vmexit */
6303         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6304                 return 1;
6305
6306         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6307                 trace_vcpu_match_mmio(gva, gpa, write, true);
6308                 return 1;
6309         }
6310
6311         return 0;
6312 }
6313
6314 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6315                                 gpa_t *gpa, struct x86_exception *exception,
6316                                 bool write)
6317 {
6318         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6319                 | (write ? PFERR_WRITE_MASK : 0);
6320
6321         /*
6322          * currently PKRU is only applied to ept enabled guest so
6323          * there is no pkey in EPT page table for L1 guest or EPT
6324          * shadow page table for L2 guest.
6325          */
6326         if (vcpu_match_mmio_gva(vcpu, gva)
6327             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6328                                  vcpu->arch.mmio_access, 0, access)) {
6329                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6330                                         (gva & (PAGE_SIZE - 1));
6331                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6332                 return 1;
6333         }
6334
6335         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6336
6337         if (*gpa == UNMAPPED_GVA)
6338                 return -1;
6339
6340         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6341 }
6342
6343 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6344                         const void *val, int bytes)
6345 {
6346         int ret;
6347
6348         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6349         if (ret < 0)
6350                 return 0;
6351         kvm_page_track_write(vcpu, gpa, val, bytes);
6352         return 1;
6353 }
6354
6355 struct read_write_emulator_ops {
6356         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6357                                   int bytes);
6358         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6359                                   void *val, int bytes);
6360         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6361                                int bytes, void *val);
6362         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6363                                     void *val, int bytes);
6364         bool write;
6365 };
6366
6367 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6368 {
6369         if (vcpu->mmio_read_completed) {
6370                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6371                                vcpu->mmio_fragments[0].gpa, val);
6372                 vcpu->mmio_read_completed = 0;
6373                 return 1;
6374         }
6375
6376         return 0;
6377 }
6378
6379 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6380                         void *val, int bytes)
6381 {
6382         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6383 }
6384
6385 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6386                          void *val, int bytes)
6387 {
6388         return emulator_write_phys(vcpu, gpa, val, bytes);
6389 }
6390
6391 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6392 {
6393         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6394         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6395 }
6396
6397 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6398                           void *val, int bytes)
6399 {
6400         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6401         return X86EMUL_IO_NEEDED;
6402 }
6403
6404 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6405                            void *val, int bytes)
6406 {
6407         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6408
6409         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6410         return X86EMUL_CONTINUE;
6411 }
6412
6413 static const struct read_write_emulator_ops read_emultor = {
6414         .read_write_prepare = read_prepare,
6415         .read_write_emulate = read_emulate,
6416         .read_write_mmio = vcpu_mmio_read,
6417         .read_write_exit_mmio = read_exit_mmio,
6418 };
6419
6420 static const struct read_write_emulator_ops write_emultor = {
6421         .read_write_emulate = write_emulate,
6422         .read_write_mmio = write_mmio,
6423         .read_write_exit_mmio = write_exit_mmio,
6424         .write = true,
6425 };
6426
6427 static int emulator_read_write_onepage(unsigned long addr, void *val,
6428                                        unsigned int bytes,
6429                                        struct x86_exception *exception,
6430                                        struct kvm_vcpu *vcpu,
6431                                        const struct read_write_emulator_ops *ops)
6432 {
6433         gpa_t gpa;
6434         int handled, ret;
6435         bool write = ops->write;
6436         struct kvm_mmio_fragment *frag;
6437         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6438
6439         /*
6440          * If the exit was due to a NPF we may already have a GPA.
6441          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6442          * Note, this cannot be used on string operations since string
6443          * operation using rep will only have the initial GPA from the NPF
6444          * occurred.
6445          */
6446         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6447             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6448                 gpa = ctxt->gpa_val;
6449                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6450         } else {
6451                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6452                 if (ret < 0)
6453                         return X86EMUL_PROPAGATE_FAULT;
6454         }
6455
6456         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6457                 return X86EMUL_CONTINUE;
6458
6459         /*
6460          * Is this MMIO handled locally?
6461          */
6462         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6463         if (handled == bytes)
6464                 return X86EMUL_CONTINUE;
6465
6466         gpa += handled;
6467         bytes -= handled;
6468         val += handled;
6469
6470         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6471         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6472         frag->gpa = gpa;
6473         frag->data = val;
6474         frag->len = bytes;
6475         return X86EMUL_CONTINUE;
6476 }
6477
6478 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6479                         unsigned long addr,
6480                         void *val, unsigned int bytes,
6481                         struct x86_exception *exception,
6482                         const struct read_write_emulator_ops *ops)
6483 {
6484         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6485         gpa_t gpa;
6486         int rc;
6487
6488         if (ops->read_write_prepare &&
6489                   ops->read_write_prepare(vcpu, val, bytes))
6490                 return X86EMUL_CONTINUE;
6491
6492         vcpu->mmio_nr_fragments = 0;
6493
6494         /* Crossing a page boundary? */
6495         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6496                 int now;
6497
6498                 now = -addr & ~PAGE_MASK;
6499                 rc = emulator_read_write_onepage(addr, val, now, exception,
6500                                                  vcpu, ops);
6501
6502                 if (rc != X86EMUL_CONTINUE)
6503                         return rc;
6504                 addr += now;
6505                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6506                         addr = (u32)addr;
6507                 val += now;
6508                 bytes -= now;
6509         }
6510
6511         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6512                                          vcpu, ops);
6513         if (rc != X86EMUL_CONTINUE)
6514                 return rc;
6515
6516         if (!vcpu->mmio_nr_fragments)
6517                 return rc;
6518
6519         gpa = vcpu->mmio_fragments[0].gpa;
6520
6521         vcpu->mmio_needed = 1;
6522         vcpu->mmio_cur_fragment = 0;
6523
6524         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6525         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6526         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6527         vcpu->run->mmio.phys_addr = gpa;
6528
6529         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6530 }
6531
6532 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6533                                   unsigned long addr,
6534                                   void *val,
6535                                   unsigned int bytes,
6536                                   struct x86_exception *exception)
6537 {
6538         return emulator_read_write(ctxt, addr, val, bytes,
6539                                    exception, &read_emultor);
6540 }
6541
6542 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6543                             unsigned long addr,
6544                             const void *val,
6545                             unsigned int bytes,
6546                             struct x86_exception *exception)
6547 {
6548         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6549                                    exception, &write_emultor);
6550 }
6551
6552 #define CMPXCHG_TYPE(t, ptr, old, new) \
6553         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6554
6555 #ifdef CONFIG_X86_64
6556 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6557 #else
6558 #  define CMPXCHG64(ptr, old, new) \
6559         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6560 #endif
6561
6562 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6563                                      unsigned long addr,
6564                                      const void *old,
6565                                      const void *new,
6566                                      unsigned int bytes,
6567                                      struct x86_exception *exception)
6568 {
6569         struct kvm_host_map map;
6570         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6571         u64 page_line_mask;
6572         gpa_t gpa;
6573         char *kaddr;
6574         bool exchanged;
6575
6576         /* guests cmpxchg8b have to be emulated atomically */
6577         if (bytes > 8 || (bytes & (bytes - 1)))
6578                 goto emul_write;
6579
6580         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6581
6582         if (gpa == UNMAPPED_GVA ||
6583             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6584                 goto emul_write;
6585
6586         /*
6587          * Emulate the atomic as a straight write to avoid #AC if SLD is
6588          * enabled in the host and the access splits a cache line.
6589          */
6590         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6591                 page_line_mask = ~(cache_line_size() - 1);
6592         else
6593                 page_line_mask = PAGE_MASK;
6594
6595         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6596                 goto emul_write;
6597
6598         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6599                 goto emul_write;
6600
6601         kaddr = map.hva + offset_in_page(gpa);
6602
6603         switch (bytes) {
6604         case 1:
6605                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6606                 break;
6607         case 2:
6608                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6609                 break;
6610         case 4:
6611                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6612                 break;
6613         case 8:
6614                 exchanged = CMPXCHG64(kaddr, old, new);
6615                 break;
6616         default:
6617                 BUG();
6618         }
6619
6620         kvm_vcpu_unmap(vcpu, &map, true);
6621
6622         if (!exchanged)
6623                 return X86EMUL_CMPXCHG_FAILED;
6624
6625         kvm_page_track_write(vcpu, gpa, new, bytes);
6626
6627         return X86EMUL_CONTINUE;
6628
6629 emul_write:
6630         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6631
6632         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6633 }
6634
6635 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6636 {
6637         int r = 0, i;
6638
6639         for (i = 0; i < vcpu->arch.pio.count; i++) {
6640                 if (vcpu->arch.pio.in)
6641                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6642                                             vcpu->arch.pio.size, pd);
6643                 else
6644                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6645                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6646                                              pd);
6647                 if (r)
6648                         break;
6649                 pd += vcpu->arch.pio.size;
6650         }
6651         return r;
6652 }
6653
6654 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6655                                unsigned short port, void *val,
6656                                unsigned int count, bool in)
6657 {
6658         vcpu->arch.pio.port = port;
6659         vcpu->arch.pio.in = in;
6660         vcpu->arch.pio.count  = count;
6661         vcpu->arch.pio.size = size;
6662
6663         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6664                 vcpu->arch.pio.count = 0;
6665                 return 1;
6666         }
6667
6668         vcpu->run->exit_reason = KVM_EXIT_IO;
6669         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6670         vcpu->run->io.size = size;
6671         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6672         vcpu->run->io.count = count;
6673         vcpu->run->io.port = port;
6674
6675         return 0;
6676 }
6677
6678 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6679                            unsigned short port, void *val, unsigned int count)
6680 {
6681         int ret;
6682
6683         if (vcpu->arch.pio.count)
6684                 goto data_avail;
6685
6686         memset(vcpu->arch.pio_data, 0, size * count);
6687
6688         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6689         if (ret) {
6690 data_avail:
6691                 memcpy(val, vcpu->arch.pio_data, size * count);
6692                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6693                 vcpu->arch.pio.count = 0;
6694                 return 1;
6695         }
6696
6697         return 0;
6698 }
6699
6700 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6701                                     int size, unsigned short port, void *val,
6702                                     unsigned int count)
6703 {
6704         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6705
6706 }
6707
6708 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6709                             unsigned short port, const void *val,
6710                             unsigned int count)
6711 {
6712         memcpy(vcpu->arch.pio_data, val, size * count);
6713         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6714         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6715 }
6716
6717 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6718                                      int size, unsigned short port,
6719                                      const void *val, unsigned int count)
6720 {
6721         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6722 }
6723
6724 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6725 {
6726         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6727 }
6728
6729 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6730 {
6731         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6732 }
6733
6734 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6735 {
6736         if (!need_emulate_wbinvd(vcpu))
6737                 return X86EMUL_CONTINUE;
6738
6739         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6740                 int cpu = get_cpu();
6741
6742                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6743                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6744                                 wbinvd_ipi, NULL, 1);
6745                 put_cpu();
6746                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6747         } else
6748                 wbinvd();
6749         return X86EMUL_CONTINUE;
6750 }
6751
6752 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6753 {
6754         kvm_emulate_wbinvd_noskip(vcpu);
6755         return kvm_skip_emulated_instruction(vcpu);
6756 }
6757 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6758
6759
6760
6761 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6762 {
6763         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6764 }
6765
6766 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6767                             unsigned long *dest)
6768 {
6769         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6770 }
6771
6772 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6773                            unsigned long value)
6774 {
6775
6776         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6777 }
6778
6779 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6780 {
6781         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6782 }
6783
6784 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6785 {
6786         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6787         unsigned long value;
6788
6789         switch (cr) {
6790         case 0:
6791                 value = kvm_read_cr0(vcpu);
6792                 break;
6793         case 2:
6794                 value = vcpu->arch.cr2;
6795                 break;
6796         case 3:
6797                 value = kvm_read_cr3(vcpu);
6798                 break;
6799         case 4:
6800                 value = kvm_read_cr4(vcpu);
6801                 break;
6802         case 8:
6803                 value = kvm_get_cr8(vcpu);
6804                 break;
6805         default:
6806                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6807                 return 0;
6808         }
6809
6810         return value;
6811 }
6812
6813 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6814 {
6815         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6816         int res = 0;
6817
6818         switch (cr) {
6819         case 0:
6820                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6821                 break;
6822         case 2:
6823                 vcpu->arch.cr2 = val;
6824                 break;
6825         case 3:
6826                 res = kvm_set_cr3(vcpu, val);
6827                 break;
6828         case 4:
6829                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6830                 break;
6831         case 8:
6832                 res = kvm_set_cr8(vcpu, val);
6833                 break;
6834         default:
6835                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6836                 res = -1;
6837         }
6838
6839         return res;
6840 }
6841
6842 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6843 {
6844         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6845 }
6846
6847 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6848 {
6849         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6850 }
6851
6852 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6853 {
6854         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6855 }
6856
6857 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6858 {
6859         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6860 }
6861
6862 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6863 {
6864         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6865 }
6866
6867 static unsigned long emulator_get_cached_segment_base(
6868         struct x86_emulate_ctxt *ctxt, int seg)
6869 {
6870         return get_segment_base(emul_to_vcpu(ctxt), seg);
6871 }
6872
6873 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6874                                  struct desc_struct *desc, u32 *base3,
6875                                  int seg)
6876 {
6877         struct kvm_segment var;
6878
6879         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6880         *selector = var.selector;
6881
6882         if (var.unusable) {
6883                 memset(desc, 0, sizeof(*desc));
6884                 if (base3)
6885                         *base3 = 0;
6886                 return false;
6887         }
6888
6889         if (var.g)
6890                 var.limit >>= 12;
6891         set_desc_limit(desc, var.limit);
6892         set_desc_base(desc, (unsigned long)var.base);
6893 #ifdef CONFIG_X86_64
6894         if (base3)
6895                 *base3 = var.base >> 32;
6896 #endif
6897         desc->type = var.type;
6898         desc->s = var.s;
6899         desc->dpl = var.dpl;
6900         desc->p = var.present;
6901         desc->avl = var.avl;
6902         desc->l = var.l;
6903         desc->d = var.db;
6904         desc->g = var.g;
6905
6906         return true;
6907 }
6908
6909 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6910                                  struct desc_struct *desc, u32 base3,
6911                                  int seg)
6912 {
6913         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6914         struct kvm_segment var;
6915
6916         var.selector = selector;
6917         var.base = get_desc_base(desc);
6918 #ifdef CONFIG_X86_64
6919         var.base |= ((u64)base3) << 32;
6920 #endif
6921         var.limit = get_desc_limit(desc);
6922         if (desc->g)
6923                 var.limit = (var.limit << 12) | 0xfff;
6924         var.type = desc->type;
6925         var.dpl = desc->dpl;
6926         var.db = desc->d;
6927         var.s = desc->s;
6928         var.l = desc->l;
6929         var.g = desc->g;
6930         var.avl = desc->avl;
6931         var.present = desc->p;
6932         var.unusable = !var.present;
6933         var.padding = 0;
6934
6935         kvm_set_segment(vcpu, &var, seg);
6936         return;
6937 }
6938
6939 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6940                             u32 msr_index, u64 *pdata)
6941 {
6942         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6943         int r;
6944
6945         r = kvm_get_msr(vcpu, msr_index, pdata);
6946
6947         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6948                 /* Bounce to user space */
6949                 return X86EMUL_IO_NEEDED;
6950         }
6951
6952         return r;
6953 }
6954
6955 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6956                             u32 msr_index, u64 data)
6957 {
6958         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6959         int r;
6960
6961         r = kvm_set_msr(vcpu, msr_index, data);
6962
6963         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6964                 /* Bounce to user space */
6965                 return X86EMUL_IO_NEEDED;
6966         }
6967
6968         return r;
6969 }
6970
6971 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6972 {
6973         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6974
6975         return vcpu->arch.smbase;
6976 }
6977
6978 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6979 {
6980         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6981
6982         vcpu->arch.smbase = smbase;
6983 }
6984
6985 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6986                               u32 pmc)
6987 {
6988         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6989 }
6990
6991 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6992                              u32 pmc, u64 *pdata)
6993 {
6994         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6995 }
6996
6997 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6998 {
6999         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7000 }
7001
7002 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7003                               struct x86_instruction_info *info,
7004                               enum x86_intercept_stage stage)
7005 {
7006         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7007                                             &ctxt->exception);
7008 }
7009
7010 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7011                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7012                               bool exact_only)
7013 {
7014         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7015 }
7016
7017 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7018 {
7019         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7020 }
7021
7022 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7023 {
7024         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7025 }
7026
7027 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7028 {
7029         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7030 }
7031
7032 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7033 {
7034         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7035 }
7036
7037 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7038 {
7039         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7040 }
7041
7042 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7043 {
7044         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7045 }
7046
7047 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7048 {
7049         return emul_to_vcpu(ctxt)->arch.hflags;
7050 }
7051
7052 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7053 {
7054         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
7055 }
7056
7057 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7058                                   const char *smstate)
7059 {
7060         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7061 }
7062
7063 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7064 {
7065         kvm_smm_changed(emul_to_vcpu(ctxt));
7066 }
7067
7068 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7069 {
7070         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7071 }
7072
7073 static const struct x86_emulate_ops emulate_ops = {
7074         .read_gpr            = emulator_read_gpr,
7075         .write_gpr           = emulator_write_gpr,
7076         .read_std            = emulator_read_std,
7077         .write_std           = emulator_write_std,
7078         .read_phys           = kvm_read_guest_phys_system,
7079         .fetch               = kvm_fetch_guest_virt,
7080         .read_emulated       = emulator_read_emulated,
7081         .write_emulated      = emulator_write_emulated,
7082         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7083         .invlpg              = emulator_invlpg,
7084         .pio_in_emulated     = emulator_pio_in_emulated,
7085         .pio_out_emulated    = emulator_pio_out_emulated,
7086         .get_segment         = emulator_get_segment,
7087         .set_segment         = emulator_set_segment,
7088         .get_cached_segment_base = emulator_get_cached_segment_base,
7089         .get_gdt             = emulator_get_gdt,
7090         .get_idt             = emulator_get_idt,
7091         .set_gdt             = emulator_set_gdt,
7092         .set_idt             = emulator_set_idt,
7093         .get_cr              = emulator_get_cr,
7094         .set_cr              = emulator_set_cr,
7095         .cpl                 = emulator_get_cpl,
7096         .get_dr              = emulator_get_dr,
7097         .set_dr              = emulator_set_dr,
7098         .get_smbase          = emulator_get_smbase,
7099         .set_smbase          = emulator_set_smbase,
7100         .set_msr             = emulator_set_msr,
7101         .get_msr             = emulator_get_msr,
7102         .check_pmc           = emulator_check_pmc,
7103         .read_pmc            = emulator_read_pmc,
7104         .halt                = emulator_halt,
7105         .wbinvd              = emulator_wbinvd,
7106         .fix_hypercall       = emulator_fix_hypercall,
7107         .intercept           = emulator_intercept,
7108         .get_cpuid           = emulator_get_cpuid,
7109         .guest_has_long_mode = emulator_guest_has_long_mode,
7110         .guest_has_movbe     = emulator_guest_has_movbe,
7111         .guest_has_fxsr      = emulator_guest_has_fxsr,
7112         .set_nmi_mask        = emulator_set_nmi_mask,
7113         .get_hflags          = emulator_get_hflags,
7114         .set_hflags          = emulator_set_hflags,
7115         .pre_leave_smm       = emulator_pre_leave_smm,
7116         .post_leave_smm      = emulator_post_leave_smm,
7117         .set_xcr             = emulator_set_xcr,
7118 };
7119
7120 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7121 {
7122         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7123         /*
7124          * an sti; sti; sequence only disable interrupts for the first
7125          * instruction. So, if the last instruction, be it emulated or
7126          * not, left the system with the INT_STI flag enabled, it
7127          * means that the last instruction is an sti. We should not
7128          * leave the flag on in this case. The same goes for mov ss
7129          */
7130         if (int_shadow & mask)
7131                 mask = 0;
7132         if (unlikely(int_shadow || mask)) {
7133                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7134                 if (!mask)
7135                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7136         }
7137 }
7138
7139 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7140 {
7141         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7142         if (ctxt->exception.vector == PF_VECTOR)
7143                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7144
7145         if (ctxt->exception.error_code_valid)
7146                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7147                                       ctxt->exception.error_code);
7148         else
7149                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7150         return false;
7151 }
7152
7153 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7154 {
7155         struct x86_emulate_ctxt *ctxt;
7156
7157         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7158         if (!ctxt) {
7159                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7160                 return NULL;
7161         }
7162
7163         ctxt->vcpu = vcpu;
7164         ctxt->ops = &emulate_ops;
7165         vcpu->arch.emulate_ctxt = ctxt;
7166
7167         return ctxt;
7168 }
7169
7170 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7171 {
7172         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7173         int cs_db, cs_l;
7174
7175         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7176
7177         ctxt->gpa_available = false;
7178         ctxt->eflags = kvm_get_rflags(vcpu);
7179         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7180
7181         ctxt->eip = kvm_rip_read(vcpu);
7182         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7183                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7184                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7185                      cs_db                              ? X86EMUL_MODE_PROT32 :
7186                                                           X86EMUL_MODE_PROT16;
7187         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7188         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7189         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7190
7191         init_decode_cache(ctxt);
7192         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7193 }
7194
7195 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7196 {
7197         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7198         int ret;
7199
7200         init_emulate_ctxt(vcpu);
7201
7202         ctxt->op_bytes = 2;
7203         ctxt->ad_bytes = 2;
7204         ctxt->_eip = ctxt->eip + inc_eip;
7205         ret = emulate_int_real(ctxt, irq);
7206
7207         if (ret != X86EMUL_CONTINUE) {
7208                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7209         } else {
7210                 ctxt->eip = ctxt->_eip;
7211                 kvm_rip_write(vcpu, ctxt->eip);
7212                 kvm_set_rflags(vcpu, ctxt->eflags);
7213         }
7214 }
7215 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7216
7217 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7218 {
7219         ++vcpu->stat.insn_emulation_fail;
7220         trace_kvm_emulate_insn_failed(vcpu);
7221
7222         if (emulation_type & EMULTYPE_VMWARE_GP) {
7223                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7224                 return 1;
7225         }
7226
7227         if (emulation_type & EMULTYPE_SKIP) {
7228                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7229                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7230                 vcpu->run->internal.ndata = 0;
7231                 return 0;
7232         }
7233
7234         kvm_queue_exception(vcpu, UD_VECTOR);
7235
7236         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7237                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7238                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7239                 vcpu->run->internal.ndata = 0;
7240                 return 0;
7241         }
7242
7243         return 1;
7244 }
7245
7246 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7247                                   bool write_fault_to_shadow_pgtable,
7248                                   int emulation_type)
7249 {
7250         gpa_t gpa = cr2_or_gpa;
7251         kvm_pfn_t pfn;
7252
7253         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7254                 return false;
7255
7256         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7257             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7258                 return false;
7259
7260         if (!vcpu->arch.mmu->direct_map) {
7261                 /*
7262                  * Write permission should be allowed since only
7263                  * write access need to be emulated.
7264                  */
7265                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7266
7267                 /*
7268                  * If the mapping is invalid in guest, let cpu retry
7269                  * it to generate fault.
7270                  */
7271                 if (gpa == UNMAPPED_GVA)
7272                         return true;
7273         }
7274
7275         /*
7276          * Do not retry the unhandleable instruction if it faults on the
7277          * readonly host memory, otherwise it will goto a infinite loop:
7278          * retry instruction -> write #PF -> emulation fail -> retry
7279          * instruction -> ...
7280          */
7281         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7282
7283         /*
7284          * If the instruction failed on the error pfn, it can not be fixed,
7285          * report the error to userspace.
7286          */
7287         if (is_error_noslot_pfn(pfn))
7288                 return false;
7289
7290         kvm_release_pfn_clean(pfn);
7291
7292         /* The instructions are well-emulated on direct mmu. */
7293         if (vcpu->arch.mmu->direct_map) {
7294                 unsigned int indirect_shadow_pages;
7295
7296                 write_lock(&vcpu->kvm->mmu_lock);
7297                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7298                 write_unlock(&vcpu->kvm->mmu_lock);
7299
7300                 if (indirect_shadow_pages)
7301                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7302
7303                 return true;
7304         }
7305
7306         /*
7307          * if emulation was due to access to shadowed page table
7308          * and it failed try to unshadow page and re-enter the
7309          * guest to let CPU execute the instruction.
7310          */
7311         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7312
7313         /*
7314          * If the access faults on its page table, it can not
7315          * be fixed by unprotecting shadow page and it should
7316          * be reported to userspace.
7317          */
7318         return !write_fault_to_shadow_pgtable;
7319 }
7320
7321 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7322                               gpa_t cr2_or_gpa,  int emulation_type)
7323 {
7324         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7325         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7326
7327         last_retry_eip = vcpu->arch.last_retry_eip;
7328         last_retry_addr = vcpu->arch.last_retry_addr;
7329
7330         /*
7331          * If the emulation is caused by #PF and it is non-page_table
7332          * writing instruction, it means the VM-EXIT is caused by shadow
7333          * page protected, we can zap the shadow page and retry this
7334          * instruction directly.
7335          *
7336          * Note: if the guest uses a non-page-table modifying instruction
7337          * on the PDE that points to the instruction, then we will unmap
7338          * the instruction and go to an infinite loop. So, we cache the
7339          * last retried eip and the last fault address, if we meet the eip
7340          * and the address again, we can break out of the potential infinite
7341          * loop.
7342          */
7343         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7344
7345         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7346                 return false;
7347
7348         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7349             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7350                 return false;
7351
7352         if (x86_page_table_writing_insn(ctxt))
7353                 return false;
7354
7355         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7356                 return false;
7357
7358         vcpu->arch.last_retry_eip = ctxt->eip;
7359         vcpu->arch.last_retry_addr = cr2_or_gpa;
7360
7361         if (!vcpu->arch.mmu->direct_map)
7362                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7363
7364         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7365
7366         return true;
7367 }
7368
7369 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7370 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7371
7372 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7373 {
7374         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7375                 /* This is a good place to trace that we are exiting SMM.  */
7376                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7377
7378                 /* Process a latched INIT or SMI, if any.  */
7379                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7380         }
7381
7382         kvm_mmu_reset_context(vcpu);
7383 }
7384
7385 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7386                                 unsigned long *db)
7387 {
7388         u32 dr6 = 0;
7389         int i;
7390         u32 enable, rwlen;
7391
7392         enable = dr7;
7393         rwlen = dr7 >> 16;
7394         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7395                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7396                         dr6 |= (1 << i);
7397         return dr6;
7398 }
7399
7400 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7401 {
7402         struct kvm_run *kvm_run = vcpu->run;
7403
7404         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7405                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7406                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7407                 kvm_run->debug.arch.exception = DB_VECTOR;
7408                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7409                 return 0;
7410         }
7411         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7412         return 1;
7413 }
7414
7415 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7416 {
7417         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7418         int r;
7419
7420         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7421         if (unlikely(!r))
7422                 return 0;
7423
7424         /*
7425          * rflags is the old, "raw" value of the flags.  The new value has
7426          * not been saved yet.
7427          *
7428          * This is correct even for TF set by the guest, because "the
7429          * processor will not generate this exception after the instruction
7430          * that sets the TF flag".
7431          */
7432         if (unlikely(rflags & X86_EFLAGS_TF))
7433                 r = kvm_vcpu_do_singlestep(vcpu);
7434         return r;
7435 }
7436 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7437
7438 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7439 {
7440         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7441             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7442                 struct kvm_run *kvm_run = vcpu->run;
7443                 unsigned long eip = kvm_get_linear_rip(vcpu);
7444                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7445                                            vcpu->arch.guest_debug_dr7,
7446                                            vcpu->arch.eff_db);
7447
7448                 if (dr6 != 0) {
7449                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7450                         kvm_run->debug.arch.pc = eip;
7451                         kvm_run->debug.arch.exception = DB_VECTOR;
7452                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7453                         *r = 0;
7454                         return true;
7455                 }
7456         }
7457
7458         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7459             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7460                 unsigned long eip = kvm_get_linear_rip(vcpu);
7461                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7462                                            vcpu->arch.dr7,
7463                                            vcpu->arch.db);
7464
7465                 if (dr6 != 0) {
7466                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7467                         *r = 1;
7468                         return true;
7469                 }
7470         }
7471
7472         return false;
7473 }
7474
7475 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7476 {
7477         switch (ctxt->opcode_len) {
7478         case 1:
7479                 switch (ctxt->b) {
7480                 case 0xe4:      /* IN */
7481                 case 0xe5:
7482                 case 0xec:
7483                 case 0xed:
7484                 case 0xe6:      /* OUT */
7485                 case 0xe7:
7486                 case 0xee:
7487                 case 0xef:
7488                 case 0x6c:      /* INS */
7489                 case 0x6d:
7490                 case 0x6e:      /* OUTS */
7491                 case 0x6f:
7492                         return true;
7493                 }
7494                 break;
7495         case 2:
7496                 switch (ctxt->b) {
7497                 case 0x33:      /* RDPMC */
7498                         return true;
7499                 }
7500                 break;
7501         }
7502
7503         return false;
7504 }
7505
7506 /*
7507  * Decode to be emulated instruction. Return EMULATION_OK if success.
7508  */
7509 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7510                                     void *insn, int insn_len)
7511 {
7512         int r = EMULATION_OK;
7513         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7514
7515         init_emulate_ctxt(vcpu);
7516
7517         /*
7518          * We will reenter on the same instruction since we do not set
7519          * complete_userspace_io. This does not handle watchpoints yet,
7520          * those would be handled in the emulate_ops.
7521          */
7522         if (!(emulation_type & EMULTYPE_SKIP) &&
7523             kvm_vcpu_check_breakpoint(vcpu, &r))
7524                 return r;
7525
7526         ctxt->interruptibility = 0;
7527         ctxt->have_exception = false;
7528         ctxt->exception.vector = -1;
7529         ctxt->perm_ok = false;
7530
7531         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7532
7533         r = x86_decode_insn(ctxt, insn, insn_len);
7534
7535         trace_kvm_emulate_insn_start(vcpu);
7536         ++vcpu->stat.insn_emulation;
7537
7538         return r;
7539 }
7540 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7541
7542 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7543                             int emulation_type, void *insn, int insn_len)
7544 {
7545         int r;
7546         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7547         bool writeback = true;
7548         bool write_fault_to_spt;
7549
7550         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7551                 return 1;
7552
7553         vcpu->arch.l1tf_flush_l1d = true;
7554
7555         /*
7556          * Clear write_fault_to_shadow_pgtable here to ensure it is
7557          * never reused.
7558          */
7559         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7560         vcpu->arch.write_fault_to_shadow_pgtable = false;
7561
7562         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7563                 kvm_clear_exception_queue(vcpu);
7564
7565                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7566                                                     insn, insn_len);
7567                 if (r != EMULATION_OK)  {
7568                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7569                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7570                                 kvm_queue_exception(vcpu, UD_VECTOR);
7571                                 return 1;
7572                         }
7573                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7574                                                   write_fault_to_spt,
7575                                                   emulation_type))
7576                                 return 1;
7577                         if (ctxt->have_exception) {
7578                                 /*
7579                                  * #UD should result in just EMULATION_FAILED, and trap-like
7580                                  * exception should not be encountered during decode.
7581                                  */
7582                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7583                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7584                                 inject_emulated_exception(vcpu);
7585                                 return 1;
7586                         }
7587                         return handle_emulation_failure(vcpu, emulation_type);
7588                 }
7589         }
7590
7591         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7592             !is_vmware_backdoor_opcode(ctxt)) {
7593                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7594                 return 1;
7595         }
7596
7597         /*
7598          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7599          * for kvm_skip_emulated_instruction().  The caller is responsible for
7600          * updating interruptibility state and injecting single-step #DBs.
7601          */
7602         if (emulation_type & EMULTYPE_SKIP) {
7603                 kvm_rip_write(vcpu, ctxt->_eip);
7604                 if (ctxt->eflags & X86_EFLAGS_RF)
7605                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7606                 return 1;
7607         }
7608
7609         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7610                 return 1;
7611
7612         /* this is needed for vmware backdoor interface to work since it
7613            changes registers values  during IO operation */
7614         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7615                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7616                 emulator_invalidate_register_cache(ctxt);
7617         }
7618
7619 restart:
7620         if (emulation_type & EMULTYPE_PF) {
7621                 /* Save the faulting GPA (cr2) in the address field */
7622                 ctxt->exception.address = cr2_or_gpa;
7623
7624                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7625                 if (vcpu->arch.mmu->direct_map) {
7626                         ctxt->gpa_available = true;
7627                         ctxt->gpa_val = cr2_or_gpa;
7628                 }
7629         } else {
7630                 /* Sanitize the address out of an abundance of paranoia. */
7631                 ctxt->exception.address = 0;
7632         }
7633
7634         r = x86_emulate_insn(ctxt);
7635
7636         if (r == EMULATION_INTERCEPTED)
7637                 return 1;
7638
7639         if (r == EMULATION_FAILED) {
7640                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7641                                         emulation_type))
7642                         return 1;
7643
7644                 return handle_emulation_failure(vcpu, emulation_type);
7645         }
7646
7647         if (ctxt->have_exception) {
7648                 r = 1;
7649                 if (inject_emulated_exception(vcpu))
7650                         return r;
7651         } else if (vcpu->arch.pio.count) {
7652                 if (!vcpu->arch.pio.in) {
7653                         /* FIXME: return into emulator if single-stepping.  */
7654                         vcpu->arch.pio.count = 0;
7655                 } else {
7656                         writeback = false;
7657                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7658                 }
7659                 r = 0;
7660         } else if (vcpu->mmio_needed) {
7661                 ++vcpu->stat.mmio_exits;
7662
7663                 if (!vcpu->mmio_is_write)
7664                         writeback = false;
7665                 r = 0;
7666                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7667         } else if (r == EMULATION_RESTART)
7668                 goto restart;
7669         else
7670                 r = 1;
7671
7672         if (writeback) {
7673                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7674                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7675                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7676                 if (!ctxt->have_exception ||
7677                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7678                         kvm_rip_write(vcpu, ctxt->eip);
7679                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7680                                 r = kvm_vcpu_do_singlestep(vcpu);
7681                         if (kvm_x86_ops.update_emulated_instruction)
7682                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7683                         __kvm_set_rflags(vcpu, ctxt->eflags);
7684                 }
7685
7686                 /*
7687                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7688                  * do nothing, and it will be requested again as soon as
7689                  * the shadow expires.  But we still need to check here,
7690                  * because POPF has no interrupt shadow.
7691                  */
7692                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7693                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7694         } else
7695                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7696
7697         return r;
7698 }
7699
7700 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7701 {
7702         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7703 }
7704 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7705
7706 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7707                                         void *insn, int insn_len)
7708 {
7709         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7710 }
7711 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7712
7713 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7714 {
7715         vcpu->arch.pio.count = 0;
7716         return 1;
7717 }
7718
7719 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7720 {
7721         vcpu->arch.pio.count = 0;
7722
7723         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7724                 return 1;
7725
7726         return kvm_skip_emulated_instruction(vcpu);
7727 }
7728
7729 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7730                             unsigned short port)
7731 {
7732         unsigned long val = kvm_rax_read(vcpu);
7733         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7734
7735         if (ret)
7736                 return ret;
7737
7738         /*
7739          * Workaround userspace that relies on old KVM behavior of %rip being
7740          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7741          */
7742         if (port == 0x7e &&
7743             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7744                 vcpu->arch.complete_userspace_io =
7745                         complete_fast_pio_out_port_0x7e;
7746                 kvm_skip_emulated_instruction(vcpu);
7747         } else {
7748                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7749                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7750         }
7751         return 0;
7752 }
7753
7754 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7755 {
7756         unsigned long val;
7757
7758         /* We should only ever be called with arch.pio.count equal to 1 */
7759         BUG_ON(vcpu->arch.pio.count != 1);
7760
7761         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7762                 vcpu->arch.pio.count = 0;
7763                 return 1;
7764         }
7765
7766         /* For size less than 4 we merge, else we zero extend */
7767         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7768
7769         /*
7770          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7771          * the copy and tracing
7772          */
7773         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7774         kvm_rax_write(vcpu, val);
7775
7776         return kvm_skip_emulated_instruction(vcpu);
7777 }
7778
7779 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7780                            unsigned short port)
7781 {
7782         unsigned long val;
7783         int ret;
7784
7785         /* For size less than 4 we merge, else we zero extend */
7786         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7787
7788         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7789         if (ret) {
7790                 kvm_rax_write(vcpu, val);
7791                 return ret;
7792         }
7793
7794         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7795         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7796
7797         return 0;
7798 }
7799
7800 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7801 {
7802         int ret;
7803
7804         if (in)
7805                 ret = kvm_fast_pio_in(vcpu, size, port);
7806         else
7807                 ret = kvm_fast_pio_out(vcpu, size, port);
7808         return ret && kvm_skip_emulated_instruction(vcpu);
7809 }
7810 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7811
7812 static int kvmclock_cpu_down_prep(unsigned int cpu)
7813 {
7814         __this_cpu_write(cpu_tsc_khz, 0);
7815         return 0;
7816 }
7817
7818 static void tsc_khz_changed(void *data)
7819 {
7820         struct cpufreq_freqs *freq = data;
7821         unsigned long khz = 0;
7822
7823         if (data)
7824                 khz = freq->new;
7825         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7826                 khz = cpufreq_quick_get(raw_smp_processor_id());
7827         if (!khz)
7828                 khz = tsc_khz;
7829         __this_cpu_write(cpu_tsc_khz, khz);
7830 }
7831
7832 #ifdef CONFIG_X86_64
7833 static void kvm_hyperv_tsc_notifier(void)
7834 {
7835         struct kvm *kvm;
7836         struct kvm_vcpu *vcpu;
7837         int cpu;
7838         unsigned long flags;
7839
7840         mutex_lock(&kvm_lock);
7841         list_for_each_entry(kvm, &vm_list, vm_list)
7842                 kvm_make_mclock_inprogress_request(kvm);
7843
7844         hyperv_stop_tsc_emulation();
7845
7846         /* TSC frequency always matches when on Hyper-V */
7847         for_each_present_cpu(cpu)
7848                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7849         kvm_max_guest_tsc_khz = tsc_khz;
7850
7851         list_for_each_entry(kvm, &vm_list, vm_list) {
7852                 struct kvm_arch *ka = &kvm->arch;
7853
7854                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7855                 pvclock_update_vm_gtod_copy(kvm);
7856                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7857
7858                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7859                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7860
7861                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7862                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7863         }
7864         mutex_unlock(&kvm_lock);
7865 }
7866 #endif
7867
7868 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7869 {
7870         struct kvm *kvm;
7871         struct kvm_vcpu *vcpu;
7872         int i, send_ipi = 0;
7873
7874         /*
7875          * We allow guests to temporarily run on slowing clocks,
7876          * provided we notify them after, or to run on accelerating
7877          * clocks, provided we notify them before.  Thus time never
7878          * goes backwards.
7879          *
7880          * However, we have a problem.  We can't atomically update
7881          * the frequency of a given CPU from this function; it is
7882          * merely a notifier, which can be called from any CPU.
7883          * Changing the TSC frequency at arbitrary points in time
7884          * requires a recomputation of local variables related to
7885          * the TSC for each VCPU.  We must flag these local variables
7886          * to be updated and be sure the update takes place with the
7887          * new frequency before any guests proceed.
7888          *
7889          * Unfortunately, the combination of hotplug CPU and frequency
7890          * change creates an intractable locking scenario; the order
7891          * of when these callouts happen is undefined with respect to
7892          * CPU hotplug, and they can race with each other.  As such,
7893          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7894          * undefined; you can actually have a CPU frequency change take
7895          * place in between the computation of X and the setting of the
7896          * variable.  To protect against this problem, all updates of
7897          * the per_cpu tsc_khz variable are done in an interrupt
7898          * protected IPI, and all callers wishing to update the value
7899          * must wait for a synchronous IPI to complete (which is trivial
7900          * if the caller is on the CPU already).  This establishes the
7901          * necessary total order on variable updates.
7902          *
7903          * Note that because a guest time update may take place
7904          * anytime after the setting of the VCPU's request bit, the
7905          * correct TSC value must be set before the request.  However,
7906          * to ensure the update actually makes it to any guest which
7907          * starts running in hardware virtualization between the set
7908          * and the acquisition of the spinlock, we must also ping the
7909          * CPU after setting the request bit.
7910          *
7911          */
7912
7913         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7914
7915         mutex_lock(&kvm_lock);
7916         list_for_each_entry(kvm, &vm_list, vm_list) {
7917                 kvm_for_each_vcpu(i, vcpu, kvm) {
7918                         if (vcpu->cpu != cpu)
7919                                 continue;
7920                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7921                         if (vcpu->cpu != raw_smp_processor_id())
7922                                 send_ipi = 1;
7923                 }
7924         }
7925         mutex_unlock(&kvm_lock);
7926
7927         if (freq->old < freq->new && send_ipi) {
7928                 /*
7929                  * We upscale the frequency.  Must make the guest
7930                  * doesn't see old kvmclock values while running with
7931                  * the new frequency, otherwise we risk the guest sees
7932                  * time go backwards.
7933                  *
7934                  * In case we update the frequency for another cpu
7935                  * (which might be in guest context) send an interrupt
7936                  * to kick the cpu out of guest context.  Next time
7937                  * guest context is entered kvmclock will be updated,
7938                  * so the guest will not see stale values.
7939                  */
7940                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7941         }
7942 }
7943
7944 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7945                                      void *data)
7946 {
7947         struct cpufreq_freqs *freq = data;
7948         int cpu;
7949
7950         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7951                 return 0;
7952         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7953                 return 0;
7954
7955         for_each_cpu(cpu, freq->policy->cpus)
7956                 __kvmclock_cpufreq_notifier(freq, cpu);
7957
7958         return 0;
7959 }
7960
7961 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7962         .notifier_call  = kvmclock_cpufreq_notifier
7963 };
7964
7965 static int kvmclock_cpu_online(unsigned int cpu)
7966 {
7967         tsc_khz_changed(NULL);
7968         return 0;
7969 }
7970
7971 static void kvm_timer_init(void)
7972 {
7973         max_tsc_khz = tsc_khz;
7974
7975         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7976 #ifdef CONFIG_CPU_FREQ
7977                 struct cpufreq_policy *policy;
7978                 int cpu;
7979
7980                 cpu = get_cpu();
7981                 policy = cpufreq_cpu_get(cpu);
7982                 if (policy) {
7983                         if (policy->cpuinfo.max_freq)
7984                                 max_tsc_khz = policy->cpuinfo.max_freq;
7985                         cpufreq_cpu_put(policy);
7986                 }
7987                 put_cpu();
7988 #endif
7989                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7990                                           CPUFREQ_TRANSITION_NOTIFIER);
7991         }
7992
7993         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7994                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7995 }
7996
7997 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7998 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7999
8000 int kvm_is_in_guest(void)
8001 {
8002         return __this_cpu_read(current_vcpu) != NULL;
8003 }
8004
8005 static int kvm_is_user_mode(void)
8006 {
8007         int user_mode = 3;
8008
8009         if (__this_cpu_read(current_vcpu))
8010                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8011
8012         return user_mode != 0;
8013 }
8014
8015 static unsigned long kvm_get_guest_ip(void)
8016 {
8017         unsigned long ip = 0;
8018
8019         if (__this_cpu_read(current_vcpu))
8020                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8021
8022         return ip;
8023 }
8024
8025 static void kvm_handle_intel_pt_intr(void)
8026 {
8027         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8028
8029         kvm_make_request(KVM_REQ_PMI, vcpu);
8030         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8031                         (unsigned long *)&vcpu->arch.pmu.global_status);
8032 }
8033
8034 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8035         .is_in_guest            = kvm_is_in_guest,
8036         .is_user_mode           = kvm_is_user_mode,
8037         .get_guest_ip           = kvm_get_guest_ip,
8038         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8039 };
8040
8041 #ifdef CONFIG_X86_64
8042 static void pvclock_gtod_update_fn(struct work_struct *work)
8043 {
8044         struct kvm *kvm;
8045
8046         struct kvm_vcpu *vcpu;
8047         int i;
8048
8049         mutex_lock(&kvm_lock);
8050         list_for_each_entry(kvm, &vm_list, vm_list)
8051                 kvm_for_each_vcpu(i, vcpu, kvm)
8052                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8053         atomic_set(&kvm_guest_has_master_clock, 0);
8054         mutex_unlock(&kvm_lock);
8055 }
8056
8057 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8058
8059 /*
8060  * Notification about pvclock gtod data update.
8061  */
8062 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8063                                void *priv)
8064 {
8065         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8066         struct timekeeper *tk = priv;
8067
8068         update_pvclock_gtod(tk);
8069
8070         /* disable master clock if host does not trust, or does not
8071          * use, TSC based clocksource.
8072          */
8073         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8074             atomic_read(&kvm_guest_has_master_clock) != 0)
8075                 queue_work(system_long_wq, &pvclock_gtod_work);
8076
8077         return 0;
8078 }
8079
8080 static struct notifier_block pvclock_gtod_notifier = {
8081         .notifier_call = pvclock_gtod_notify,
8082 };
8083 #endif
8084
8085 int kvm_arch_init(void *opaque)
8086 {
8087         struct kvm_x86_init_ops *ops = opaque;
8088         int r;
8089
8090         if (kvm_x86_ops.hardware_enable) {
8091                 printk(KERN_ERR "kvm: already loaded the other module\n");
8092                 r = -EEXIST;
8093                 goto out;
8094         }
8095
8096         if (!ops->cpu_has_kvm_support()) {
8097                 pr_err_ratelimited("kvm: no hardware support\n");
8098                 r = -EOPNOTSUPP;
8099                 goto out;
8100         }
8101         if (ops->disabled_by_bios()) {
8102                 pr_err_ratelimited("kvm: disabled by bios\n");
8103                 r = -EOPNOTSUPP;
8104                 goto out;
8105         }
8106
8107         /*
8108          * KVM explicitly assumes that the guest has an FPU and
8109          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8110          * vCPU's FPU state as a fxregs_state struct.
8111          */
8112         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8113                 printk(KERN_ERR "kvm: inadequate fpu\n");
8114                 r = -EOPNOTSUPP;
8115                 goto out;
8116         }
8117
8118         r = -ENOMEM;
8119         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8120                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8121                                           NULL);
8122         if (!x86_fpu_cache) {
8123                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8124                 goto out;
8125         }
8126
8127         x86_emulator_cache = kvm_alloc_emulator_cache();
8128         if (!x86_emulator_cache) {
8129                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8130                 goto out_free_x86_fpu_cache;
8131         }
8132
8133         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8134         if (!user_return_msrs) {
8135                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8136                 goto out_free_x86_emulator_cache;
8137         }
8138
8139         r = kvm_mmu_module_init();
8140         if (r)
8141                 goto out_free_percpu;
8142
8143         kvm_timer_init();
8144
8145         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8146
8147         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8148                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8149                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8150         }
8151
8152         if (pi_inject_timer == -1)
8153                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8154 #ifdef CONFIG_X86_64
8155         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8156
8157         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8158                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8159 #endif
8160
8161         return 0;
8162
8163 out_free_percpu:
8164         free_percpu(user_return_msrs);
8165 out_free_x86_emulator_cache:
8166         kmem_cache_destroy(x86_emulator_cache);
8167 out_free_x86_fpu_cache:
8168         kmem_cache_destroy(x86_fpu_cache);
8169 out:
8170         return r;
8171 }
8172
8173 void kvm_arch_exit(void)
8174 {
8175 #ifdef CONFIG_X86_64
8176         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8177                 clear_hv_tscchange_cb();
8178 #endif
8179         kvm_lapic_exit();
8180         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8181
8182         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8183                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8184                                             CPUFREQ_TRANSITION_NOTIFIER);
8185         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8186 #ifdef CONFIG_X86_64
8187         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8188 #endif
8189         kvm_x86_ops.hardware_enable = NULL;
8190         kvm_mmu_module_exit();
8191         free_percpu(user_return_msrs);
8192         kmem_cache_destroy(x86_fpu_cache);
8193 #ifdef CONFIG_KVM_XEN
8194         static_key_deferred_flush(&kvm_xen_enabled);
8195         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8196 #endif
8197 }
8198
8199 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8200 {
8201         ++vcpu->stat.halt_exits;
8202         if (lapic_in_kernel(vcpu)) {
8203                 vcpu->arch.mp_state = state;
8204                 return 1;
8205         } else {
8206                 vcpu->run->exit_reason = reason;
8207                 return 0;
8208         }
8209 }
8210
8211 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8212 {
8213         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8214 }
8215 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8216
8217 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8218 {
8219         int ret = kvm_skip_emulated_instruction(vcpu);
8220         /*
8221          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8222          * KVM_EXIT_DEBUG here.
8223          */
8224         return kvm_vcpu_halt(vcpu) && ret;
8225 }
8226 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8227
8228 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8229 {
8230         int ret = kvm_skip_emulated_instruction(vcpu);
8231
8232         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8233 }
8234 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8235
8236 #ifdef CONFIG_X86_64
8237 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8238                                 unsigned long clock_type)
8239 {
8240         struct kvm_clock_pairing clock_pairing;
8241         struct timespec64 ts;
8242         u64 cycle;
8243         int ret;
8244
8245         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8246                 return -KVM_EOPNOTSUPP;
8247
8248         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8249                 return -KVM_EOPNOTSUPP;
8250
8251         clock_pairing.sec = ts.tv_sec;
8252         clock_pairing.nsec = ts.tv_nsec;
8253         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8254         clock_pairing.flags = 0;
8255         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8256
8257         ret = 0;
8258         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8259                             sizeof(struct kvm_clock_pairing)))
8260                 ret = -KVM_EFAULT;
8261
8262         return ret;
8263 }
8264 #endif
8265
8266 /*
8267  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8268  *
8269  * @apicid - apicid of vcpu to be kicked.
8270  */
8271 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8272 {
8273         struct kvm_lapic_irq lapic_irq;
8274
8275         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8276         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8277         lapic_irq.level = 0;
8278         lapic_irq.dest_id = apicid;
8279         lapic_irq.msi_redir_hint = false;
8280
8281         lapic_irq.delivery_mode = APIC_DM_REMRD;
8282         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8283 }
8284
8285 bool kvm_apicv_activated(struct kvm *kvm)
8286 {
8287         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8288 }
8289 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8290
8291 void kvm_apicv_init(struct kvm *kvm, bool enable)
8292 {
8293         if (enable)
8294                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8295                           &kvm->arch.apicv_inhibit_reasons);
8296         else
8297                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8298                         &kvm->arch.apicv_inhibit_reasons);
8299 }
8300 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8301
8302 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8303 {
8304         struct kvm_vcpu *target = NULL;
8305         struct kvm_apic_map *map;
8306
8307         vcpu->stat.directed_yield_attempted++;
8308
8309         rcu_read_lock();
8310         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8311
8312         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8313                 target = map->phys_map[dest_id]->vcpu;
8314
8315         rcu_read_unlock();
8316
8317         if (!target || !READ_ONCE(target->ready))
8318                 goto no_yield;
8319
8320         /* Ignore requests to yield to self */
8321         if (vcpu == target)
8322                 goto no_yield;
8323
8324         if (kvm_vcpu_yield_to(target) <= 0)
8325                 goto no_yield;
8326
8327         vcpu->stat.directed_yield_successful++;
8328
8329 no_yield:
8330         return;
8331 }
8332
8333 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8334 {
8335         unsigned long nr, a0, a1, a2, a3, ret;
8336         int op_64_bit;
8337
8338         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8339                 return kvm_xen_hypercall(vcpu);
8340
8341         if (kvm_hv_hypercall_enabled(vcpu))
8342                 return kvm_hv_hypercall(vcpu);
8343
8344         nr = kvm_rax_read(vcpu);
8345         a0 = kvm_rbx_read(vcpu);
8346         a1 = kvm_rcx_read(vcpu);
8347         a2 = kvm_rdx_read(vcpu);
8348         a3 = kvm_rsi_read(vcpu);
8349
8350         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8351
8352         op_64_bit = is_64_bit_mode(vcpu);
8353         if (!op_64_bit) {
8354                 nr &= 0xFFFFFFFF;
8355                 a0 &= 0xFFFFFFFF;
8356                 a1 &= 0xFFFFFFFF;
8357                 a2 &= 0xFFFFFFFF;
8358                 a3 &= 0xFFFFFFFF;
8359         }
8360
8361         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8362                 ret = -KVM_EPERM;
8363                 goto out;
8364         }
8365
8366         ret = -KVM_ENOSYS;
8367
8368         switch (nr) {
8369         case KVM_HC_VAPIC_POLL_IRQ:
8370                 ret = 0;
8371                 break;
8372         case KVM_HC_KICK_CPU:
8373                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8374                         break;
8375
8376                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8377                 kvm_sched_yield(vcpu, a1);
8378                 ret = 0;
8379                 break;
8380 #ifdef CONFIG_X86_64
8381         case KVM_HC_CLOCK_PAIRING:
8382                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8383                 break;
8384 #endif
8385         case KVM_HC_SEND_IPI:
8386                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8387                         break;
8388
8389                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8390                 break;
8391         case KVM_HC_SCHED_YIELD:
8392                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8393                         break;
8394
8395                 kvm_sched_yield(vcpu, a0);
8396                 ret = 0;
8397                 break;
8398         default:
8399                 ret = -KVM_ENOSYS;
8400                 break;
8401         }
8402 out:
8403         if (!op_64_bit)
8404                 ret = (u32)ret;
8405         kvm_rax_write(vcpu, ret);
8406
8407         ++vcpu->stat.hypercalls;
8408         return kvm_skip_emulated_instruction(vcpu);
8409 }
8410 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8411
8412 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8413 {
8414         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8415         char instruction[3];
8416         unsigned long rip = kvm_rip_read(vcpu);
8417
8418         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8419
8420         return emulator_write_emulated(ctxt, rip, instruction, 3,
8421                 &ctxt->exception);
8422 }
8423
8424 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8425 {
8426         return vcpu->run->request_interrupt_window &&
8427                 likely(!pic_in_kernel(vcpu->kvm));
8428 }
8429
8430 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8431 {
8432         struct kvm_run *kvm_run = vcpu->run;
8433
8434         /*
8435          * if_flag is obsolete and useless, so do not bother
8436          * setting it for SEV-ES guests.  Userspace can just
8437          * use kvm_run->ready_for_interrupt_injection.
8438          */
8439         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8440                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8441
8442         kvm_run->cr8 = kvm_get_cr8(vcpu);
8443         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8444         kvm_run->ready_for_interrupt_injection =
8445                 pic_in_kernel(vcpu->kvm) ||
8446                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8447
8448         if (is_smm(vcpu))
8449                 kvm_run->flags |= KVM_RUN_X86_SMM;
8450 }
8451
8452 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8453 {
8454         int max_irr, tpr;
8455
8456         if (!kvm_x86_ops.update_cr8_intercept)
8457                 return;
8458
8459         if (!lapic_in_kernel(vcpu))
8460                 return;
8461
8462         if (vcpu->arch.apicv_active)
8463                 return;
8464
8465         if (!vcpu->arch.apic->vapic_addr)
8466                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8467         else
8468                 max_irr = -1;
8469
8470         if (max_irr != -1)
8471                 max_irr >>= 4;
8472
8473         tpr = kvm_lapic_get_cr8(vcpu);
8474
8475         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8476 }
8477
8478
8479 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8480 {
8481         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8482                 return -EIO;
8483
8484         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8485                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8486                 return 1;
8487         }
8488
8489         return kvm_x86_ops.nested_ops->check_events(vcpu);
8490 }
8491
8492 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8493 {
8494         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8495                 vcpu->arch.exception.error_code = false;
8496         static_call(kvm_x86_queue_exception)(vcpu);
8497 }
8498
8499 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8500 {
8501         int r;
8502         bool can_inject = true;
8503
8504         /* try to reinject previous events if any */
8505
8506         if (vcpu->arch.exception.injected) {
8507                 kvm_inject_exception(vcpu);
8508                 can_inject = false;
8509         }
8510         /*
8511          * Do not inject an NMI or interrupt if there is a pending
8512          * exception.  Exceptions and interrupts are recognized at
8513          * instruction boundaries, i.e. the start of an instruction.
8514          * Trap-like exceptions, e.g. #DB, have higher priority than
8515          * NMIs and interrupts, i.e. traps are recognized before an
8516          * NMI/interrupt that's pending on the same instruction.
8517          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8518          * priority, but are only generated (pended) during instruction
8519          * execution, i.e. a pending fault-like exception means the
8520          * fault occurred on the *previous* instruction and must be
8521          * serviced prior to recognizing any new events in order to
8522          * fully complete the previous instruction.
8523          */
8524         else if (!vcpu->arch.exception.pending) {
8525                 if (vcpu->arch.nmi_injected) {
8526                         static_call(kvm_x86_set_nmi)(vcpu);
8527                         can_inject = false;
8528                 } else if (vcpu->arch.interrupt.injected) {
8529                         static_call(kvm_x86_set_irq)(vcpu);
8530                         can_inject = false;
8531                 }
8532         }
8533
8534         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8535                      vcpu->arch.exception.pending);
8536
8537         /*
8538          * Call check_nested_events() even if we reinjected a previous event
8539          * in order for caller to determine if it should require immediate-exit
8540          * from L2 to L1 due to pending L1 events which require exit
8541          * from L2 to L1.
8542          */
8543         if (is_guest_mode(vcpu)) {
8544                 r = kvm_check_nested_events(vcpu);
8545                 if (r < 0)
8546                         goto busy;
8547         }
8548
8549         /* try to inject new event if pending */
8550         if (vcpu->arch.exception.pending) {
8551                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8552                                         vcpu->arch.exception.has_error_code,
8553                                         vcpu->arch.exception.error_code);
8554
8555                 vcpu->arch.exception.pending = false;
8556                 vcpu->arch.exception.injected = true;
8557
8558                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8559                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8560                                              X86_EFLAGS_RF);
8561
8562                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8563                         kvm_deliver_exception_payload(vcpu);
8564                         if (vcpu->arch.dr7 & DR7_GD) {
8565                                 vcpu->arch.dr7 &= ~DR7_GD;
8566                                 kvm_update_dr7(vcpu);
8567                         }
8568                 }
8569
8570                 kvm_inject_exception(vcpu);
8571                 can_inject = false;
8572         }
8573
8574         /*
8575          * Finally, inject interrupt events.  If an event cannot be injected
8576          * due to architectural conditions (e.g. IF=0) a window-open exit
8577          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8578          * and can architecturally be injected, but we cannot do it right now:
8579          * an interrupt could have arrived just now and we have to inject it
8580          * as a vmexit, or there could already an event in the queue, which is
8581          * indicated by can_inject.  In that case we request an immediate exit
8582          * in order to make progress and get back here for another iteration.
8583          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8584          */
8585         if (vcpu->arch.smi_pending) {
8586                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8587                 if (r < 0)
8588                         goto busy;
8589                 if (r) {
8590                         vcpu->arch.smi_pending = false;
8591                         ++vcpu->arch.smi_count;
8592                         enter_smm(vcpu);
8593                         can_inject = false;
8594                 } else
8595                         static_call(kvm_x86_enable_smi_window)(vcpu);
8596         }
8597
8598         if (vcpu->arch.nmi_pending) {
8599                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8600                 if (r < 0)
8601                         goto busy;
8602                 if (r) {
8603                         --vcpu->arch.nmi_pending;
8604                         vcpu->arch.nmi_injected = true;
8605                         static_call(kvm_x86_set_nmi)(vcpu);
8606                         can_inject = false;
8607                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8608                 }
8609                 if (vcpu->arch.nmi_pending)
8610                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8611         }
8612
8613         if (kvm_cpu_has_injectable_intr(vcpu)) {
8614                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8615                 if (r < 0)
8616                         goto busy;
8617                 if (r) {
8618                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8619                         static_call(kvm_x86_set_irq)(vcpu);
8620                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8621                 }
8622                 if (kvm_cpu_has_injectable_intr(vcpu))
8623                         static_call(kvm_x86_enable_irq_window)(vcpu);
8624         }
8625
8626         if (is_guest_mode(vcpu) &&
8627             kvm_x86_ops.nested_ops->hv_timer_pending &&
8628             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8629                 *req_immediate_exit = true;
8630
8631         WARN_ON(vcpu->arch.exception.pending);
8632         return;
8633
8634 busy:
8635         *req_immediate_exit = true;
8636         return;
8637 }
8638
8639 static void process_nmi(struct kvm_vcpu *vcpu)
8640 {
8641         unsigned limit = 2;
8642
8643         /*
8644          * x86 is limited to one NMI running, and one NMI pending after it.
8645          * If an NMI is already in progress, limit further NMIs to just one.
8646          * Otherwise, allow two (and we'll inject the first one immediately).
8647          */
8648         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8649                 limit = 1;
8650
8651         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8652         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8653         kvm_make_request(KVM_REQ_EVENT, vcpu);
8654 }
8655
8656 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8657 {
8658         u32 flags = 0;
8659         flags |= seg->g       << 23;
8660         flags |= seg->db      << 22;
8661         flags |= seg->l       << 21;
8662         flags |= seg->avl     << 20;
8663         flags |= seg->present << 15;
8664         flags |= seg->dpl     << 13;
8665         flags |= seg->s       << 12;
8666         flags |= seg->type    << 8;
8667         return flags;
8668 }
8669
8670 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8671 {
8672         struct kvm_segment seg;
8673         int offset;
8674
8675         kvm_get_segment(vcpu, &seg, n);
8676         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8677
8678         if (n < 3)
8679                 offset = 0x7f84 + n * 12;
8680         else
8681                 offset = 0x7f2c + (n - 3) * 12;
8682
8683         put_smstate(u32, buf, offset + 8, seg.base);
8684         put_smstate(u32, buf, offset + 4, seg.limit);
8685         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8686 }
8687
8688 #ifdef CONFIG_X86_64
8689 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8690 {
8691         struct kvm_segment seg;
8692         int offset;
8693         u16 flags;
8694
8695         kvm_get_segment(vcpu, &seg, n);
8696         offset = 0x7e00 + n * 16;
8697
8698         flags = enter_smm_get_segment_flags(&seg) >> 8;
8699         put_smstate(u16, buf, offset, seg.selector);
8700         put_smstate(u16, buf, offset + 2, flags);
8701         put_smstate(u32, buf, offset + 4, seg.limit);
8702         put_smstate(u64, buf, offset + 8, seg.base);
8703 }
8704 #endif
8705
8706 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8707 {
8708         struct desc_ptr dt;
8709         struct kvm_segment seg;
8710         unsigned long val;
8711         int i;
8712
8713         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8714         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8715         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8716         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8717
8718         for (i = 0; i < 8; i++)
8719                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8720
8721         kvm_get_dr(vcpu, 6, &val);
8722         put_smstate(u32, buf, 0x7fcc, (u32)val);
8723         kvm_get_dr(vcpu, 7, &val);
8724         put_smstate(u32, buf, 0x7fc8, (u32)val);
8725
8726         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8727         put_smstate(u32, buf, 0x7fc4, seg.selector);
8728         put_smstate(u32, buf, 0x7f64, seg.base);
8729         put_smstate(u32, buf, 0x7f60, seg.limit);
8730         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8731
8732         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8733         put_smstate(u32, buf, 0x7fc0, seg.selector);
8734         put_smstate(u32, buf, 0x7f80, seg.base);
8735         put_smstate(u32, buf, 0x7f7c, seg.limit);
8736         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8737
8738         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8739         put_smstate(u32, buf, 0x7f74, dt.address);
8740         put_smstate(u32, buf, 0x7f70, dt.size);
8741
8742         static_call(kvm_x86_get_idt)(vcpu, &dt);
8743         put_smstate(u32, buf, 0x7f58, dt.address);
8744         put_smstate(u32, buf, 0x7f54, dt.size);
8745
8746         for (i = 0; i < 6; i++)
8747                 enter_smm_save_seg_32(vcpu, buf, i);
8748
8749         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8750
8751         /* revision id */
8752         put_smstate(u32, buf, 0x7efc, 0x00020000);
8753         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8754 }
8755
8756 #ifdef CONFIG_X86_64
8757 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8758 {
8759         struct desc_ptr dt;
8760         struct kvm_segment seg;
8761         unsigned long val;
8762         int i;
8763
8764         for (i = 0; i < 16; i++)
8765                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8766
8767         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8768         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8769
8770         kvm_get_dr(vcpu, 6, &val);
8771         put_smstate(u64, buf, 0x7f68, val);
8772         kvm_get_dr(vcpu, 7, &val);
8773         put_smstate(u64, buf, 0x7f60, val);
8774
8775         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8776         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8777         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8778
8779         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8780
8781         /* revision id */
8782         put_smstate(u32, buf, 0x7efc, 0x00020064);
8783
8784         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8785
8786         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8787         put_smstate(u16, buf, 0x7e90, seg.selector);
8788         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8789         put_smstate(u32, buf, 0x7e94, seg.limit);
8790         put_smstate(u64, buf, 0x7e98, seg.base);
8791
8792         static_call(kvm_x86_get_idt)(vcpu, &dt);
8793         put_smstate(u32, buf, 0x7e84, dt.size);
8794         put_smstate(u64, buf, 0x7e88, dt.address);
8795
8796         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8797         put_smstate(u16, buf, 0x7e70, seg.selector);
8798         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8799         put_smstate(u32, buf, 0x7e74, seg.limit);
8800         put_smstate(u64, buf, 0x7e78, seg.base);
8801
8802         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8803         put_smstate(u32, buf, 0x7e64, dt.size);
8804         put_smstate(u64, buf, 0x7e68, dt.address);
8805
8806         for (i = 0; i < 6; i++)
8807                 enter_smm_save_seg_64(vcpu, buf, i);
8808 }
8809 #endif
8810
8811 static void enter_smm(struct kvm_vcpu *vcpu)
8812 {
8813         struct kvm_segment cs, ds;
8814         struct desc_ptr dt;
8815         char buf[512];
8816         u32 cr0;
8817
8818         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8819         memset(buf, 0, 512);
8820 #ifdef CONFIG_X86_64
8821         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8822                 enter_smm_save_state_64(vcpu, buf);
8823         else
8824 #endif
8825                 enter_smm_save_state_32(vcpu, buf);
8826
8827         /*
8828          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8829          * vCPU state (e.g. leave guest mode) after we've saved the state into
8830          * the SMM state-save area.
8831          */
8832         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8833
8834         vcpu->arch.hflags |= HF_SMM_MASK;
8835         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8836
8837         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8838                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8839         else
8840                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8841
8842         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8843         kvm_rip_write(vcpu, 0x8000);
8844
8845         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8846         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8847         vcpu->arch.cr0 = cr0;
8848
8849         static_call(kvm_x86_set_cr4)(vcpu, 0);
8850
8851         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8852         dt.address = dt.size = 0;
8853         static_call(kvm_x86_set_idt)(vcpu, &dt);
8854
8855         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8856
8857         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8858         cs.base = vcpu->arch.smbase;
8859
8860         ds.selector = 0;
8861         ds.base = 0;
8862
8863         cs.limit    = ds.limit = 0xffffffff;
8864         cs.type     = ds.type = 0x3;
8865         cs.dpl      = ds.dpl = 0;
8866         cs.db       = ds.db = 0;
8867         cs.s        = ds.s = 1;
8868         cs.l        = ds.l = 0;
8869         cs.g        = ds.g = 1;
8870         cs.avl      = ds.avl = 0;
8871         cs.present  = ds.present = 1;
8872         cs.unusable = ds.unusable = 0;
8873         cs.padding  = ds.padding = 0;
8874
8875         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8876         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8877         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8878         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8879         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8880         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8881
8882 #ifdef CONFIG_X86_64
8883         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8884                 static_call(kvm_x86_set_efer)(vcpu, 0);
8885 #endif
8886
8887         kvm_update_cpuid_runtime(vcpu);
8888         kvm_mmu_reset_context(vcpu);
8889 }
8890
8891 static void process_smi(struct kvm_vcpu *vcpu)
8892 {
8893         vcpu->arch.smi_pending = true;
8894         kvm_make_request(KVM_REQ_EVENT, vcpu);
8895 }
8896
8897 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8898                                        unsigned long *vcpu_bitmap)
8899 {
8900         cpumask_var_t cpus;
8901
8902         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8903
8904         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8905                                     NULL, vcpu_bitmap, cpus);
8906
8907         free_cpumask_var(cpus);
8908 }
8909
8910 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8911 {
8912         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8913 }
8914
8915 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8916 {
8917         if (!lapic_in_kernel(vcpu))
8918                 return;
8919
8920         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8921         kvm_apic_update_apicv(vcpu);
8922         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8923 }
8924 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8925
8926 /*
8927  * NOTE: Do not hold any lock prior to calling this.
8928  *
8929  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8930  * locked, because it calls __x86_set_memory_region() which does
8931  * synchronize_srcu(&kvm->srcu).
8932  */
8933 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8934 {
8935         struct kvm_vcpu *except;
8936         unsigned long old, new, expected;
8937
8938         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8939             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8940                 return;
8941
8942         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8943         do {
8944                 expected = new = old;
8945                 if (activate)
8946                         __clear_bit(bit, &new);
8947                 else
8948                         __set_bit(bit, &new);
8949                 if (new == old)
8950                         break;
8951                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8952         } while (old != expected);
8953
8954         if (!!old == !!new)
8955                 return;
8956
8957         trace_kvm_apicv_update_request(activate, bit);
8958         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8959                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8960
8961         /*
8962          * Sending request to update APICV for all other vcpus,
8963          * while update the calling vcpu immediately instead of
8964          * waiting for another #VMEXIT to handle the request.
8965          */
8966         except = kvm_get_running_vcpu();
8967         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8968                                          except);
8969         if (except)
8970                 kvm_vcpu_update_apicv(except);
8971 }
8972 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8973
8974 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8975 {
8976         if (!kvm_apic_present(vcpu))
8977                 return;
8978
8979         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8980
8981         if (irqchip_split(vcpu->kvm))
8982                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8983         else {
8984                 if (vcpu->arch.apicv_active)
8985                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8986                 if (ioapic_in_kernel(vcpu->kvm))
8987                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8988         }
8989
8990         if (is_guest_mode(vcpu))
8991                 vcpu->arch.load_eoi_exitmap_pending = true;
8992         else
8993                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8994 }
8995
8996 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8997 {
8998         u64 eoi_exit_bitmap[4];
8999
9000         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9001                 return;
9002
9003         if (to_hv_vcpu(vcpu))
9004                 bitmap_or((ulong *)eoi_exit_bitmap,
9005                           vcpu->arch.ioapic_handled_vectors,
9006                           to_hv_synic(vcpu)->vec_bitmap, 256);
9007
9008         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9009 }
9010
9011 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9012                                             unsigned long start, unsigned long end)
9013 {
9014         unsigned long apic_address;
9015
9016         /*
9017          * The physical address of apic access page is stored in the VMCS.
9018          * Update it when it becomes invalid.
9019          */
9020         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9021         if (start <= apic_address && apic_address < end)
9022                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9023 }
9024
9025 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9026 {
9027         if (!lapic_in_kernel(vcpu))
9028                 return;
9029
9030         if (!kvm_x86_ops.set_apic_access_page_addr)
9031                 return;
9032
9033         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9034 }
9035
9036 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9037 {
9038         smp_send_reschedule(vcpu->cpu);
9039 }
9040 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9041
9042 /*
9043  * Returns 1 to let vcpu_run() continue the guest execution loop without
9044  * exiting to the userspace.  Otherwise, the value will be returned to the
9045  * userspace.
9046  */
9047 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9048 {
9049         int r;
9050         bool req_int_win =
9051                 dm_request_for_irq_injection(vcpu) &&
9052                 kvm_cpu_accept_dm_intr(vcpu);
9053         fastpath_t exit_fastpath;
9054
9055         bool req_immediate_exit = false;
9056
9057         /* Forbid vmenter if vcpu dirty ring is soft-full */
9058         if (unlikely(vcpu->kvm->dirty_ring_size &&
9059                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9060                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9061                 trace_kvm_dirty_ring_exit(vcpu);
9062                 r = 0;
9063                 goto out;
9064         }
9065
9066         if (kvm_request_pending(vcpu)) {
9067                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9068                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9069                                 r = 0;
9070                                 goto out;
9071                         }
9072                 }
9073                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9074                         kvm_mmu_unload(vcpu);
9075                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9076                         __kvm_migrate_timers(vcpu);
9077                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9078                         kvm_gen_update_masterclock(vcpu->kvm);
9079                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9080                         kvm_gen_kvmclock_update(vcpu);
9081                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9082                         r = kvm_guest_time_update(vcpu);
9083                         if (unlikely(r))
9084                                 goto out;
9085                 }
9086                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9087                         kvm_mmu_sync_roots(vcpu);
9088                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9089                         kvm_mmu_load_pgd(vcpu);
9090                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9091                         kvm_vcpu_flush_tlb_all(vcpu);
9092
9093                         /* Flushing all ASIDs flushes the current ASID... */
9094                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9095                 }
9096                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9097                         kvm_vcpu_flush_tlb_current(vcpu);
9098                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9099                         kvm_vcpu_flush_tlb_guest(vcpu);
9100
9101                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9102                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9103                         r = 0;
9104                         goto out;
9105                 }
9106                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9107                         if (is_guest_mode(vcpu)) {
9108                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9109                         } else {
9110                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9111                                 vcpu->mmio_needed = 0;
9112                                 r = 0;
9113                                 goto out;
9114                         }
9115                 }
9116                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9117                         /* Page is swapped out. Do synthetic halt */
9118                         vcpu->arch.apf.halted = true;
9119                         r = 1;
9120                         goto out;
9121                 }
9122                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9123                         record_steal_time(vcpu);
9124                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9125                         process_smi(vcpu);
9126                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9127                         process_nmi(vcpu);
9128                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9129                         kvm_pmu_handle_event(vcpu);
9130                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9131                         kvm_pmu_deliver_pmi(vcpu);
9132                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9133                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9134                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9135                                      vcpu->arch.ioapic_handled_vectors)) {
9136                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9137                                 vcpu->run->eoi.vector =
9138                                                 vcpu->arch.pending_ioapic_eoi;
9139                                 r = 0;
9140                                 goto out;
9141                         }
9142                 }
9143                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9144                         vcpu_scan_ioapic(vcpu);
9145                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9146                         vcpu_load_eoi_exitmap(vcpu);
9147                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9148                         kvm_vcpu_reload_apic_access_page(vcpu);
9149                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9150                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9151                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9152                         r = 0;
9153                         goto out;
9154                 }
9155                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9156                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9157                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9158                         r = 0;
9159                         goto out;
9160                 }
9161                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9162                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9163
9164                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9165                         vcpu->run->hyperv = hv_vcpu->exit;
9166                         r = 0;
9167                         goto out;
9168                 }
9169
9170                 /*
9171                  * KVM_REQ_HV_STIMER has to be processed after
9172                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9173                  * depend on the guest clock being up-to-date
9174                  */
9175                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9176                         kvm_hv_process_stimers(vcpu);
9177                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9178                         kvm_vcpu_update_apicv(vcpu);
9179                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9180                         kvm_check_async_pf_completion(vcpu);
9181                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9182                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9183
9184                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9185                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9186         }
9187
9188         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9189             kvm_xen_has_interrupt(vcpu)) {
9190                 ++vcpu->stat.req_event;
9191                 kvm_apic_accept_events(vcpu);
9192                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9193                         r = 1;
9194                         goto out;
9195                 }
9196
9197                 inject_pending_event(vcpu, &req_immediate_exit);
9198                 if (req_int_win)
9199                         static_call(kvm_x86_enable_irq_window)(vcpu);
9200
9201                 if (kvm_lapic_enabled(vcpu)) {
9202                         update_cr8_intercept(vcpu);
9203                         kvm_lapic_sync_to_vapic(vcpu);
9204                 }
9205         }
9206
9207         r = kvm_mmu_reload(vcpu);
9208         if (unlikely(r)) {
9209                 goto cancel_injection;
9210         }
9211
9212         preempt_disable();
9213
9214         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9215
9216         /*
9217          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9218          * IPI are then delayed after guest entry, which ensures that they
9219          * result in virtual interrupt delivery.
9220          */
9221         local_irq_disable();
9222         vcpu->mode = IN_GUEST_MODE;
9223
9224         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9225
9226         /*
9227          * 1) We should set ->mode before checking ->requests.  Please see
9228          * the comment in kvm_vcpu_exiting_guest_mode().
9229          *
9230          * 2) For APICv, we should set ->mode before checking PID.ON. This
9231          * pairs with the memory barrier implicit in pi_test_and_set_on
9232          * (see vmx_deliver_posted_interrupt).
9233          *
9234          * 3) This also orders the write to mode from any reads to the page
9235          * tables done while the VCPU is running.  Please see the comment
9236          * in kvm_flush_remote_tlbs.
9237          */
9238         smp_mb__after_srcu_read_unlock();
9239
9240         /*
9241          * This handles the case where a posted interrupt was
9242          * notified with kvm_vcpu_kick.
9243          */
9244         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9245                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9246
9247         if (kvm_vcpu_exit_request(vcpu)) {
9248                 vcpu->mode = OUTSIDE_GUEST_MODE;
9249                 smp_wmb();
9250                 local_irq_enable();
9251                 preempt_enable();
9252                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9253                 r = 1;
9254                 goto cancel_injection;
9255         }
9256
9257         if (req_immediate_exit) {
9258                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9259                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9260         }
9261
9262         fpregs_assert_state_consistent();
9263         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9264                 switch_fpu_return();
9265
9266         if (unlikely(vcpu->arch.switch_db_regs)) {
9267                 set_debugreg(0, 7);
9268                 set_debugreg(vcpu->arch.eff_db[0], 0);
9269                 set_debugreg(vcpu->arch.eff_db[1], 1);
9270                 set_debugreg(vcpu->arch.eff_db[2], 2);
9271                 set_debugreg(vcpu->arch.eff_db[3], 3);
9272                 set_debugreg(vcpu->arch.dr6, 6);
9273                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9274         }
9275
9276         for (;;) {
9277                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9278                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9279                         break;
9280
9281                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9282                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9283                         break;
9284                 }
9285
9286                 if (vcpu->arch.apicv_active)
9287                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9288         }
9289
9290         /*
9291          * Do this here before restoring debug registers on the host.  And
9292          * since we do this before handling the vmexit, a DR access vmexit
9293          * can (a) read the correct value of the debug registers, (b) set
9294          * KVM_DEBUGREG_WONT_EXIT again.
9295          */
9296         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9297                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9298                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9299                 kvm_update_dr0123(vcpu);
9300                 kvm_update_dr7(vcpu);
9301                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9302         }
9303
9304         /*
9305          * If the guest has used debug registers, at least dr7
9306          * will be disabled while returning to the host.
9307          * If we don't have active breakpoints in the host, we don't
9308          * care about the messed up debug address registers. But if
9309          * we have some of them active, restore the old state.
9310          */
9311         if (hw_breakpoint_active())
9312                 hw_breakpoint_restore();
9313
9314         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9315         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9316
9317         vcpu->mode = OUTSIDE_GUEST_MODE;
9318         smp_wmb();
9319
9320         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9321
9322         /*
9323          * Consume any pending interrupts, including the possible source of
9324          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9325          * An instruction is required after local_irq_enable() to fully unblock
9326          * interrupts on processors that implement an interrupt shadow, the
9327          * stat.exits increment will do nicely.
9328          */
9329         kvm_before_interrupt(vcpu);
9330         local_irq_enable();
9331         ++vcpu->stat.exits;
9332         local_irq_disable();
9333         kvm_after_interrupt(vcpu);
9334
9335         if (lapic_in_kernel(vcpu)) {
9336                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9337                 if (delta != S64_MIN) {
9338                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9339                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9340                 }
9341         }
9342
9343         local_irq_enable();
9344         preempt_enable();
9345
9346         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9347
9348         /*
9349          * Profile KVM exit RIPs:
9350          */
9351         if (unlikely(prof_on == KVM_PROFILING)) {
9352                 unsigned long rip = kvm_rip_read(vcpu);
9353                 profile_hit(KVM_PROFILING, (void *)rip);
9354         }
9355
9356         if (unlikely(vcpu->arch.tsc_always_catchup))
9357                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9358
9359         if (vcpu->arch.apic_attention)
9360                 kvm_lapic_sync_from_vapic(vcpu);
9361
9362         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9363         return r;
9364
9365 cancel_injection:
9366         if (req_immediate_exit)
9367                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9368         static_call(kvm_x86_cancel_injection)(vcpu);
9369         if (unlikely(vcpu->arch.apic_attention))
9370                 kvm_lapic_sync_from_vapic(vcpu);
9371 out:
9372         return r;
9373 }
9374
9375 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9376 {
9377         if (!kvm_arch_vcpu_runnable(vcpu) &&
9378             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9379                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9380                 kvm_vcpu_block(vcpu);
9381                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9382
9383                 if (kvm_x86_ops.post_block)
9384                         static_call(kvm_x86_post_block)(vcpu);
9385
9386                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9387                         return 1;
9388         }
9389
9390         kvm_apic_accept_events(vcpu);
9391         switch(vcpu->arch.mp_state) {
9392         case KVM_MP_STATE_HALTED:
9393         case KVM_MP_STATE_AP_RESET_HOLD:
9394                 vcpu->arch.pv.pv_unhalted = false;
9395                 vcpu->arch.mp_state =
9396                         KVM_MP_STATE_RUNNABLE;
9397                 fallthrough;
9398         case KVM_MP_STATE_RUNNABLE:
9399                 vcpu->arch.apf.halted = false;
9400                 break;
9401         case KVM_MP_STATE_INIT_RECEIVED:
9402                 break;
9403         default:
9404                 return -EINTR;
9405         }
9406         return 1;
9407 }
9408
9409 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9410 {
9411         if (is_guest_mode(vcpu))
9412                 kvm_check_nested_events(vcpu);
9413
9414         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9415                 !vcpu->arch.apf.halted);
9416 }
9417
9418 static int vcpu_run(struct kvm_vcpu *vcpu)
9419 {
9420         int r;
9421         struct kvm *kvm = vcpu->kvm;
9422
9423         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9424         vcpu->arch.l1tf_flush_l1d = true;
9425
9426         for (;;) {
9427                 if (kvm_vcpu_running(vcpu)) {
9428                         r = vcpu_enter_guest(vcpu);
9429                 } else {
9430                         r = vcpu_block(kvm, vcpu);
9431                 }
9432
9433                 if (r <= 0)
9434                         break;
9435
9436                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9437                 if (kvm_cpu_has_pending_timer(vcpu))
9438                         kvm_inject_pending_timer_irqs(vcpu);
9439
9440                 if (dm_request_for_irq_injection(vcpu) &&
9441                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9442                         r = 0;
9443                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9444                         ++vcpu->stat.request_irq_exits;
9445                         break;
9446                 }
9447
9448                 if (__xfer_to_guest_mode_work_pending()) {
9449                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9450                         r = xfer_to_guest_mode_handle_work(vcpu);
9451                         if (r)
9452                                 return r;
9453                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9454                 }
9455         }
9456
9457         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9458
9459         return r;
9460 }
9461
9462 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9463 {
9464         int r;
9465
9466         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9467         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9468         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9469         return r;
9470 }
9471
9472 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9473 {
9474         BUG_ON(!vcpu->arch.pio.count);
9475
9476         return complete_emulated_io(vcpu);
9477 }
9478
9479 /*
9480  * Implements the following, as a state machine:
9481  *
9482  * read:
9483  *   for each fragment
9484  *     for each mmio piece in the fragment
9485  *       write gpa, len
9486  *       exit
9487  *       copy data
9488  *   execute insn
9489  *
9490  * write:
9491  *   for each fragment
9492  *     for each mmio piece in the fragment
9493  *       write gpa, len
9494  *       copy data
9495  *       exit
9496  */
9497 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9498 {
9499         struct kvm_run *run = vcpu->run;
9500         struct kvm_mmio_fragment *frag;
9501         unsigned len;
9502
9503         BUG_ON(!vcpu->mmio_needed);
9504
9505         /* Complete previous fragment */
9506         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9507         len = min(8u, frag->len);
9508         if (!vcpu->mmio_is_write)
9509                 memcpy(frag->data, run->mmio.data, len);
9510
9511         if (frag->len <= 8) {
9512                 /* Switch to the next fragment. */
9513                 frag++;
9514                 vcpu->mmio_cur_fragment++;
9515         } else {
9516                 /* Go forward to the next mmio piece. */
9517                 frag->data += len;
9518                 frag->gpa += len;
9519                 frag->len -= len;
9520         }
9521
9522         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9523                 vcpu->mmio_needed = 0;
9524
9525                 /* FIXME: return into emulator if single-stepping.  */
9526                 if (vcpu->mmio_is_write)
9527                         return 1;
9528                 vcpu->mmio_read_completed = 1;
9529                 return complete_emulated_io(vcpu);
9530         }
9531
9532         run->exit_reason = KVM_EXIT_MMIO;
9533         run->mmio.phys_addr = frag->gpa;
9534         if (vcpu->mmio_is_write)
9535                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9536         run->mmio.len = min(8u, frag->len);
9537         run->mmio.is_write = vcpu->mmio_is_write;
9538         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9539         return 0;
9540 }
9541
9542 static void kvm_save_current_fpu(struct fpu *fpu)
9543 {
9544         /*
9545          * If the target FPU state is not resident in the CPU registers, just
9546          * memcpy() from current, else save CPU state directly to the target.
9547          */
9548         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9549                 memcpy(&fpu->state, &current->thread.fpu.state,
9550                        fpu_kernel_xstate_size);
9551         else
9552                 copy_fpregs_to_fpstate(fpu);
9553 }
9554
9555 /* Swap (qemu) user FPU context for the guest FPU context. */
9556 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9557 {
9558         fpregs_lock();
9559
9560         kvm_save_current_fpu(vcpu->arch.user_fpu);
9561
9562         /*
9563          * Guests with protected state can't have it set by the hypervisor,
9564          * so skip trying to set it.
9565          */
9566         if (vcpu->arch.guest_fpu)
9567                 /* PKRU is separately restored in kvm_x86_ops.run. */
9568                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9569                                         ~XFEATURE_MASK_PKRU);
9570
9571         fpregs_mark_activate();
9572         fpregs_unlock();
9573
9574         trace_kvm_fpu(1);
9575 }
9576
9577 /* When vcpu_run ends, restore user space FPU context. */
9578 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9579 {
9580         fpregs_lock();
9581
9582         /*
9583          * Guests with protected state can't have it read by the hypervisor,
9584          * so skip trying to save it.
9585          */
9586         if (vcpu->arch.guest_fpu)
9587                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9588
9589         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9590
9591         fpregs_mark_activate();
9592         fpregs_unlock();
9593
9594         ++vcpu->stat.fpu_reload;
9595         trace_kvm_fpu(0);
9596 }
9597
9598 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9599 {
9600         struct kvm_run *kvm_run = vcpu->run;
9601         int r;
9602
9603         vcpu_load(vcpu);
9604         kvm_sigset_activate(vcpu);
9605         kvm_run->flags = 0;
9606         kvm_load_guest_fpu(vcpu);
9607
9608         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9609                 if (kvm_run->immediate_exit) {
9610                         r = -EINTR;
9611                         goto out;
9612                 }
9613                 kvm_vcpu_block(vcpu);
9614                 kvm_apic_accept_events(vcpu);
9615                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9616                 r = -EAGAIN;
9617                 if (signal_pending(current)) {
9618                         r = -EINTR;
9619                         kvm_run->exit_reason = KVM_EXIT_INTR;
9620                         ++vcpu->stat.signal_exits;
9621                 }
9622                 goto out;
9623         }
9624
9625         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9626                 r = -EINVAL;
9627                 goto out;
9628         }
9629
9630         if (kvm_run->kvm_dirty_regs) {
9631                 r = sync_regs(vcpu);
9632                 if (r != 0)
9633                         goto out;
9634         }
9635
9636         /* re-sync apic's tpr */
9637         if (!lapic_in_kernel(vcpu)) {
9638                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9639                         r = -EINVAL;
9640                         goto out;
9641                 }
9642         }
9643
9644         if (unlikely(vcpu->arch.complete_userspace_io)) {
9645                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9646                 vcpu->arch.complete_userspace_io = NULL;
9647                 r = cui(vcpu);
9648                 if (r <= 0)
9649                         goto out;
9650         } else
9651                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9652
9653         if (kvm_run->immediate_exit)
9654                 r = -EINTR;
9655         else
9656                 r = vcpu_run(vcpu);
9657
9658 out:
9659         kvm_put_guest_fpu(vcpu);
9660         if (kvm_run->kvm_valid_regs)
9661                 store_regs(vcpu);
9662         post_kvm_run_save(vcpu);
9663         kvm_sigset_deactivate(vcpu);
9664
9665         vcpu_put(vcpu);
9666         return r;
9667 }
9668
9669 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9670 {
9671         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9672                 /*
9673                  * We are here if userspace calls get_regs() in the middle of
9674                  * instruction emulation. Registers state needs to be copied
9675                  * back from emulation context to vcpu. Userspace shouldn't do
9676                  * that usually, but some bad designed PV devices (vmware
9677                  * backdoor interface) need this to work
9678                  */
9679                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9680                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9681         }
9682         regs->rax = kvm_rax_read(vcpu);
9683         regs->rbx = kvm_rbx_read(vcpu);
9684         regs->rcx = kvm_rcx_read(vcpu);
9685         regs->rdx = kvm_rdx_read(vcpu);
9686         regs->rsi = kvm_rsi_read(vcpu);
9687         regs->rdi = kvm_rdi_read(vcpu);
9688         regs->rsp = kvm_rsp_read(vcpu);
9689         regs->rbp = kvm_rbp_read(vcpu);
9690 #ifdef CONFIG_X86_64
9691         regs->r8 = kvm_r8_read(vcpu);
9692         regs->r9 = kvm_r9_read(vcpu);
9693         regs->r10 = kvm_r10_read(vcpu);
9694         regs->r11 = kvm_r11_read(vcpu);
9695         regs->r12 = kvm_r12_read(vcpu);
9696         regs->r13 = kvm_r13_read(vcpu);
9697         regs->r14 = kvm_r14_read(vcpu);
9698         regs->r15 = kvm_r15_read(vcpu);
9699 #endif
9700
9701         regs->rip = kvm_rip_read(vcpu);
9702         regs->rflags = kvm_get_rflags(vcpu);
9703 }
9704
9705 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9706 {
9707         vcpu_load(vcpu);
9708         __get_regs(vcpu, regs);
9709         vcpu_put(vcpu);
9710         return 0;
9711 }
9712
9713 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9714 {
9715         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9716         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9717
9718         kvm_rax_write(vcpu, regs->rax);
9719         kvm_rbx_write(vcpu, regs->rbx);
9720         kvm_rcx_write(vcpu, regs->rcx);
9721         kvm_rdx_write(vcpu, regs->rdx);
9722         kvm_rsi_write(vcpu, regs->rsi);
9723         kvm_rdi_write(vcpu, regs->rdi);
9724         kvm_rsp_write(vcpu, regs->rsp);
9725         kvm_rbp_write(vcpu, regs->rbp);
9726 #ifdef CONFIG_X86_64
9727         kvm_r8_write(vcpu, regs->r8);
9728         kvm_r9_write(vcpu, regs->r9);
9729         kvm_r10_write(vcpu, regs->r10);
9730         kvm_r11_write(vcpu, regs->r11);
9731         kvm_r12_write(vcpu, regs->r12);
9732         kvm_r13_write(vcpu, regs->r13);
9733         kvm_r14_write(vcpu, regs->r14);
9734         kvm_r15_write(vcpu, regs->r15);
9735 #endif
9736
9737         kvm_rip_write(vcpu, regs->rip);
9738         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9739
9740         vcpu->arch.exception.pending = false;
9741
9742         kvm_make_request(KVM_REQ_EVENT, vcpu);
9743 }
9744
9745 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9746 {
9747         vcpu_load(vcpu);
9748         __set_regs(vcpu, regs);
9749         vcpu_put(vcpu);
9750         return 0;
9751 }
9752
9753 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9754 {
9755         struct kvm_segment cs;
9756
9757         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9758         *db = cs.db;
9759         *l = cs.l;
9760 }
9761 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9762
9763 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9764 {
9765         struct desc_ptr dt;
9766
9767         if (vcpu->arch.guest_state_protected)
9768                 goto skip_protected_regs;
9769
9770         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9771         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9772         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9773         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9774         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9775         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9776
9777         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9778         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9779
9780         static_call(kvm_x86_get_idt)(vcpu, &dt);
9781         sregs->idt.limit = dt.size;
9782         sregs->idt.base = dt.address;
9783         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9784         sregs->gdt.limit = dt.size;
9785         sregs->gdt.base = dt.address;
9786
9787         sregs->cr2 = vcpu->arch.cr2;
9788         sregs->cr3 = kvm_read_cr3(vcpu);
9789
9790 skip_protected_regs:
9791         sregs->cr0 = kvm_read_cr0(vcpu);
9792         sregs->cr4 = kvm_read_cr4(vcpu);
9793         sregs->cr8 = kvm_get_cr8(vcpu);
9794         sregs->efer = vcpu->arch.efer;
9795         sregs->apic_base = kvm_get_apic_base(vcpu);
9796
9797         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9798
9799         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9800                 set_bit(vcpu->arch.interrupt.nr,
9801                         (unsigned long *)sregs->interrupt_bitmap);
9802 }
9803
9804 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9805                                   struct kvm_sregs *sregs)
9806 {
9807         vcpu_load(vcpu);
9808         __get_sregs(vcpu, sregs);
9809         vcpu_put(vcpu);
9810         return 0;
9811 }
9812
9813 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9814                                     struct kvm_mp_state *mp_state)
9815 {
9816         vcpu_load(vcpu);
9817         if (kvm_mpx_supported())
9818                 kvm_load_guest_fpu(vcpu);
9819
9820         kvm_apic_accept_events(vcpu);
9821         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9822              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9823             vcpu->arch.pv.pv_unhalted)
9824                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9825         else
9826                 mp_state->mp_state = vcpu->arch.mp_state;
9827
9828         if (kvm_mpx_supported())
9829                 kvm_put_guest_fpu(vcpu);
9830         vcpu_put(vcpu);
9831         return 0;
9832 }
9833
9834 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9835                                     struct kvm_mp_state *mp_state)
9836 {
9837         int ret = -EINVAL;
9838
9839         vcpu_load(vcpu);
9840
9841         if (!lapic_in_kernel(vcpu) &&
9842             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9843                 goto out;
9844
9845         /*
9846          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9847          * INIT state; latched init should be reported using
9848          * KVM_SET_VCPU_EVENTS, so reject it here.
9849          */
9850         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9851             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9852              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9853                 goto out;
9854
9855         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9856                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9857                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9858         } else
9859                 vcpu->arch.mp_state = mp_state->mp_state;
9860         kvm_make_request(KVM_REQ_EVENT, vcpu);
9861
9862         ret = 0;
9863 out:
9864         vcpu_put(vcpu);
9865         return ret;
9866 }
9867
9868 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9869                     int reason, bool has_error_code, u32 error_code)
9870 {
9871         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9872         int ret;
9873
9874         init_emulate_ctxt(vcpu);
9875
9876         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9877                                    has_error_code, error_code);
9878         if (ret) {
9879                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9880                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9881                 vcpu->run->internal.ndata = 0;
9882                 return 0;
9883         }
9884
9885         kvm_rip_write(vcpu, ctxt->eip);
9886         kvm_set_rflags(vcpu, ctxt->eflags);
9887         return 1;
9888 }
9889 EXPORT_SYMBOL_GPL(kvm_task_switch);
9890
9891 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9892 {
9893         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9894                 /*
9895                  * When EFER.LME and CR0.PG are set, the processor is in
9896                  * 64-bit mode (though maybe in a 32-bit code segment).
9897                  * CR4.PAE and EFER.LMA must be set.
9898                  */
9899                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9900                         return false;
9901                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9902                         return false;
9903         } else {
9904                 /*
9905                  * Not in 64-bit mode: EFER.LMA is clear and the code
9906                  * segment cannot be 64-bit.
9907                  */
9908                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9909                         return false;
9910         }
9911
9912         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9913 }
9914
9915 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9916 {
9917         struct msr_data apic_base_msr;
9918         int mmu_reset_needed = 0;
9919         int pending_vec, max_bits, idx;
9920         struct desc_ptr dt;
9921         int ret = -EINVAL;
9922
9923         if (!kvm_is_valid_sregs(vcpu, sregs))
9924                 goto out;
9925
9926         apic_base_msr.data = sregs->apic_base;
9927         apic_base_msr.host_initiated = true;
9928         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9929                 goto out;
9930
9931         if (vcpu->arch.guest_state_protected)
9932                 goto skip_protected_regs;
9933
9934         dt.size = sregs->idt.limit;
9935         dt.address = sregs->idt.base;
9936         static_call(kvm_x86_set_idt)(vcpu, &dt);
9937         dt.size = sregs->gdt.limit;
9938         dt.address = sregs->gdt.base;
9939         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9940
9941         vcpu->arch.cr2 = sregs->cr2;
9942         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9943         vcpu->arch.cr3 = sregs->cr3;
9944         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9945
9946         kvm_set_cr8(vcpu, sregs->cr8);
9947
9948         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9949         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9950
9951         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9952         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9953         vcpu->arch.cr0 = sregs->cr0;
9954
9955         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9956         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9957
9958         idx = srcu_read_lock(&vcpu->kvm->srcu);
9959         if (is_pae_paging(vcpu)) {
9960                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9961                 mmu_reset_needed = 1;
9962         }
9963         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9964
9965         if (mmu_reset_needed)
9966                 kvm_mmu_reset_context(vcpu);
9967
9968         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9969         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9970         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9971         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9972         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9973         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9974
9975         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9976         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9977
9978         update_cr8_intercept(vcpu);
9979
9980         /* Older userspace won't unhalt the vcpu on reset. */
9981         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9982             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9983             !is_protmode(vcpu))
9984                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9985
9986 skip_protected_regs:
9987         max_bits = KVM_NR_INTERRUPTS;
9988         pending_vec = find_first_bit(
9989                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9990         if (pending_vec < max_bits) {
9991                 kvm_queue_interrupt(vcpu, pending_vec, false);
9992                 pr_debug("Set back pending irq %d\n", pending_vec);
9993         }
9994
9995         kvm_make_request(KVM_REQ_EVENT, vcpu);
9996
9997         ret = 0;
9998 out:
9999         return ret;
10000 }
10001
10002 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10003                                   struct kvm_sregs *sregs)
10004 {
10005         int ret;
10006
10007         vcpu_load(vcpu);
10008         ret = __set_sregs(vcpu, sregs);
10009         vcpu_put(vcpu);
10010         return ret;
10011 }
10012
10013 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10014                                         struct kvm_guest_debug *dbg)
10015 {
10016         unsigned long rflags;
10017         int i, r;
10018
10019         if (vcpu->arch.guest_state_protected)
10020                 return -EINVAL;
10021
10022         vcpu_load(vcpu);
10023
10024         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10025                 r = -EBUSY;
10026                 if (vcpu->arch.exception.pending)
10027                         goto out;
10028                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10029                         kvm_queue_exception(vcpu, DB_VECTOR);
10030                 else
10031                         kvm_queue_exception(vcpu, BP_VECTOR);
10032         }
10033
10034         /*
10035          * Read rflags as long as potentially injected trace flags are still
10036          * filtered out.
10037          */
10038         rflags = kvm_get_rflags(vcpu);
10039
10040         vcpu->guest_debug = dbg->control;
10041         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10042                 vcpu->guest_debug = 0;
10043
10044         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10045                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10046                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10047                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10048         } else {
10049                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10050                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10051         }
10052         kvm_update_dr7(vcpu);
10053
10054         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10055                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
10056                         get_segment_base(vcpu, VCPU_SREG_CS);
10057
10058         /*
10059          * Trigger an rflags update that will inject or remove the trace
10060          * flags.
10061          */
10062         kvm_set_rflags(vcpu, rflags);
10063
10064         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10065
10066         r = 0;
10067
10068 out:
10069         vcpu_put(vcpu);
10070         return r;
10071 }
10072
10073 /*
10074  * Translate a guest virtual address to a guest physical address.
10075  */
10076 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10077                                     struct kvm_translation *tr)
10078 {
10079         unsigned long vaddr = tr->linear_address;
10080         gpa_t gpa;
10081         int idx;
10082
10083         vcpu_load(vcpu);
10084
10085         idx = srcu_read_lock(&vcpu->kvm->srcu);
10086         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10087         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10088         tr->physical_address = gpa;
10089         tr->valid = gpa != UNMAPPED_GVA;
10090         tr->writeable = 1;
10091         tr->usermode = 0;
10092
10093         vcpu_put(vcpu);
10094         return 0;
10095 }
10096
10097 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10098 {
10099         struct fxregs_state *fxsave;
10100
10101         if (!vcpu->arch.guest_fpu)
10102                 return 0;
10103
10104         vcpu_load(vcpu);
10105
10106         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10107         memcpy(fpu->fpr, fxsave->st_space, 128);
10108         fpu->fcw = fxsave->cwd;
10109         fpu->fsw = fxsave->swd;
10110         fpu->ftwx = fxsave->twd;
10111         fpu->last_opcode = fxsave->fop;
10112         fpu->last_ip = fxsave->rip;
10113         fpu->last_dp = fxsave->rdp;
10114         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10115
10116         vcpu_put(vcpu);
10117         return 0;
10118 }
10119
10120 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10121 {
10122         struct fxregs_state *fxsave;
10123
10124         if (!vcpu->arch.guest_fpu)
10125                 return 0;
10126
10127         vcpu_load(vcpu);
10128
10129         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10130
10131         memcpy(fxsave->st_space, fpu->fpr, 128);
10132         fxsave->cwd = fpu->fcw;
10133         fxsave->swd = fpu->fsw;
10134         fxsave->twd = fpu->ftwx;
10135         fxsave->fop = fpu->last_opcode;
10136         fxsave->rip = fpu->last_ip;
10137         fxsave->rdp = fpu->last_dp;
10138         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10139
10140         vcpu_put(vcpu);
10141         return 0;
10142 }
10143
10144 static void store_regs(struct kvm_vcpu *vcpu)
10145 {
10146         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10147
10148         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10149                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10150
10151         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10152                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10153
10154         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10155                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10156                                 vcpu, &vcpu->run->s.regs.events);
10157 }
10158
10159 static int sync_regs(struct kvm_vcpu *vcpu)
10160 {
10161         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10162                 return -EINVAL;
10163
10164         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10165                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10166                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10167         }
10168         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10169                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10170                         return -EINVAL;
10171                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10172         }
10173         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10174                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10175                                 vcpu, &vcpu->run->s.regs.events))
10176                         return -EINVAL;
10177                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10178         }
10179
10180         return 0;
10181 }
10182
10183 static void fx_init(struct kvm_vcpu *vcpu)
10184 {
10185         if (!vcpu->arch.guest_fpu)
10186                 return;
10187
10188         fpstate_init(&vcpu->arch.guest_fpu->state);
10189         if (boot_cpu_has(X86_FEATURE_XSAVES))
10190                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10191                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10192
10193         /*
10194          * Ensure guest xcr0 is valid for loading
10195          */
10196         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10197
10198         vcpu->arch.cr0 |= X86_CR0_ET;
10199 }
10200
10201 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10202 {
10203         if (vcpu->arch.guest_fpu) {
10204                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10205                 vcpu->arch.guest_fpu = NULL;
10206         }
10207 }
10208 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10209
10210 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10211 {
10212         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10213                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10214                              "guest TSC will not be reliable\n");
10215
10216         return 0;
10217 }
10218
10219 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10220 {
10221         struct page *page;
10222         int r;
10223
10224         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10225                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10226         else
10227                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10228
10229         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10230
10231         r = kvm_mmu_create(vcpu);
10232         if (r < 0)
10233                 return r;
10234
10235         if (irqchip_in_kernel(vcpu->kvm)) {
10236                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10237                 if (r < 0)
10238                         goto fail_mmu_destroy;
10239                 if (kvm_apicv_activated(vcpu->kvm))
10240                         vcpu->arch.apicv_active = true;
10241         } else
10242                 static_branch_inc(&kvm_has_noapic_vcpu);
10243
10244         r = -ENOMEM;
10245
10246         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10247         if (!page)
10248                 goto fail_free_lapic;
10249         vcpu->arch.pio_data = page_address(page);
10250
10251         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10252                                        GFP_KERNEL_ACCOUNT);
10253         if (!vcpu->arch.mce_banks)
10254                 goto fail_free_pio_data;
10255         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10256
10257         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10258                                 GFP_KERNEL_ACCOUNT))
10259                 goto fail_free_mce_banks;
10260
10261         if (!alloc_emulate_ctxt(vcpu))
10262                 goto free_wbinvd_dirty_mask;
10263
10264         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10265                                                 GFP_KERNEL_ACCOUNT);
10266         if (!vcpu->arch.user_fpu) {
10267                 pr_err("kvm: failed to allocate userspace's fpu\n");
10268                 goto free_emulate_ctxt;
10269         }
10270
10271         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10272                                                  GFP_KERNEL_ACCOUNT);
10273         if (!vcpu->arch.guest_fpu) {
10274                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10275                 goto free_user_fpu;
10276         }
10277         fx_init(vcpu);
10278
10279         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10280         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10281
10282         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10283
10284         kvm_async_pf_hash_reset(vcpu);
10285         kvm_pmu_init(vcpu);
10286
10287         vcpu->arch.pending_external_vector = -1;
10288         vcpu->arch.preempted_in_kernel = false;
10289
10290         r = static_call(kvm_x86_vcpu_create)(vcpu);
10291         if (r)
10292                 goto free_guest_fpu;
10293
10294         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10295         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10296         kvm_vcpu_mtrr_init(vcpu);
10297         vcpu_load(vcpu);
10298         kvm_vcpu_reset(vcpu, false);
10299         kvm_init_mmu(vcpu, false);
10300         vcpu_put(vcpu);
10301         return 0;
10302
10303 free_guest_fpu:
10304         kvm_free_guest_fpu(vcpu);
10305 free_user_fpu:
10306         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10307 free_emulate_ctxt:
10308         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10309 free_wbinvd_dirty_mask:
10310         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10311 fail_free_mce_banks:
10312         kfree(vcpu->arch.mce_banks);
10313 fail_free_pio_data:
10314         free_page((unsigned long)vcpu->arch.pio_data);
10315 fail_free_lapic:
10316         kvm_free_lapic(vcpu);
10317 fail_mmu_destroy:
10318         kvm_mmu_destroy(vcpu);
10319         return r;
10320 }
10321
10322 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10323 {
10324         struct kvm *kvm = vcpu->kvm;
10325
10326         if (mutex_lock_killable(&vcpu->mutex))
10327                 return;
10328         vcpu_load(vcpu);
10329         kvm_synchronize_tsc(vcpu, 0);
10330         vcpu_put(vcpu);
10331
10332         /* poll control enabled by default */
10333         vcpu->arch.msr_kvm_poll_control = 1;
10334
10335         mutex_unlock(&vcpu->mutex);
10336
10337         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10338                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10339                                                 KVMCLOCK_SYNC_PERIOD);
10340 }
10341
10342 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10343 {
10344         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10345         int idx;
10346
10347         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10348
10349         kvmclock_reset(vcpu);
10350
10351         static_call(kvm_x86_vcpu_free)(vcpu);
10352
10353         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10354         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10355         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10356         kvm_free_guest_fpu(vcpu);
10357
10358         kvm_hv_vcpu_uninit(vcpu);
10359         kvm_pmu_destroy(vcpu);
10360         kfree(vcpu->arch.mce_banks);
10361         kvm_free_lapic(vcpu);
10362         idx = srcu_read_lock(&vcpu->kvm->srcu);
10363         kvm_mmu_destroy(vcpu);
10364         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10365         free_page((unsigned long)vcpu->arch.pio_data);
10366         kvfree(vcpu->arch.cpuid_entries);
10367         if (!lapic_in_kernel(vcpu))
10368                 static_branch_dec(&kvm_has_noapic_vcpu);
10369 }
10370
10371 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10372 {
10373         kvm_lapic_reset(vcpu, init_event);
10374
10375         vcpu->arch.hflags = 0;
10376
10377         vcpu->arch.smi_pending = 0;
10378         vcpu->arch.smi_count = 0;
10379         atomic_set(&vcpu->arch.nmi_queued, 0);
10380         vcpu->arch.nmi_pending = 0;
10381         vcpu->arch.nmi_injected = false;
10382         kvm_clear_interrupt_queue(vcpu);
10383         kvm_clear_exception_queue(vcpu);
10384
10385         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10386         kvm_update_dr0123(vcpu);
10387         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10388         vcpu->arch.dr7 = DR7_FIXED_1;
10389         kvm_update_dr7(vcpu);
10390
10391         vcpu->arch.cr2 = 0;
10392
10393         kvm_make_request(KVM_REQ_EVENT, vcpu);
10394         vcpu->arch.apf.msr_en_val = 0;
10395         vcpu->arch.apf.msr_int_val = 0;
10396         vcpu->arch.st.msr_val = 0;
10397
10398         kvmclock_reset(vcpu);
10399
10400         kvm_clear_async_pf_completion_queue(vcpu);
10401         kvm_async_pf_hash_reset(vcpu);
10402         vcpu->arch.apf.halted = false;
10403
10404         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10405                 void *mpx_state_buffer;
10406
10407                 /*
10408                  * To avoid have the INIT path from kvm_apic_has_events() that be
10409                  * called with loaded FPU and does not let userspace fix the state.
10410                  */
10411                 if (init_event)
10412                         kvm_put_guest_fpu(vcpu);
10413                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10414                                         XFEATURE_BNDREGS);
10415                 if (mpx_state_buffer)
10416                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10417                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10418                                         XFEATURE_BNDCSR);
10419                 if (mpx_state_buffer)
10420                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10421                 if (init_event)
10422                         kvm_load_guest_fpu(vcpu);
10423         }
10424
10425         if (!init_event) {
10426                 kvm_pmu_reset(vcpu);
10427                 vcpu->arch.smbase = 0x30000;
10428
10429                 vcpu->arch.msr_misc_features_enables = 0;
10430
10431                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10432         }
10433
10434         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10435         vcpu->arch.regs_avail = ~0;
10436         vcpu->arch.regs_dirty = ~0;
10437
10438         vcpu->arch.ia32_xss = 0;
10439
10440         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10441 }
10442
10443 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10444 {
10445         struct kvm_segment cs;
10446
10447         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10448         cs.selector = vector << 8;
10449         cs.base = vector << 12;
10450         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10451         kvm_rip_write(vcpu, 0);
10452 }
10453 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10454
10455 int kvm_arch_hardware_enable(void)
10456 {
10457         struct kvm *kvm;
10458         struct kvm_vcpu *vcpu;
10459         int i;
10460         int ret;
10461         u64 local_tsc;
10462         u64 max_tsc = 0;
10463         bool stable, backwards_tsc = false;
10464
10465         kvm_user_return_msr_cpu_online();
10466         ret = static_call(kvm_x86_hardware_enable)();
10467         if (ret != 0)
10468                 return ret;
10469
10470         local_tsc = rdtsc();
10471         stable = !kvm_check_tsc_unstable();
10472         list_for_each_entry(kvm, &vm_list, vm_list) {
10473                 kvm_for_each_vcpu(i, vcpu, kvm) {
10474                         if (!stable && vcpu->cpu == smp_processor_id())
10475                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10476                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10477                                 backwards_tsc = true;
10478                                 if (vcpu->arch.last_host_tsc > max_tsc)
10479                                         max_tsc = vcpu->arch.last_host_tsc;
10480                         }
10481                 }
10482         }
10483
10484         /*
10485          * Sometimes, even reliable TSCs go backwards.  This happens on
10486          * platforms that reset TSC during suspend or hibernate actions, but
10487          * maintain synchronization.  We must compensate.  Fortunately, we can
10488          * detect that condition here, which happens early in CPU bringup,
10489          * before any KVM threads can be running.  Unfortunately, we can't
10490          * bring the TSCs fully up to date with real time, as we aren't yet far
10491          * enough into CPU bringup that we know how much real time has actually
10492          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10493          * variables that haven't been updated yet.
10494          *
10495          * So we simply find the maximum observed TSC above, then record the
10496          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10497          * the adjustment will be applied.  Note that we accumulate
10498          * adjustments, in case multiple suspend cycles happen before some VCPU
10499          * gets a chance to run again.  In the event that no KVM threads get a
10500          * chance to run, we will miss the entire elapsed period, as we'll have
10501          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10502          * loose cycle time.  This isn't too big a deal, since the loss will be
10503          * uniform across all VCPUs (not to mention the scenario is extremely
10504          * unlikely). It is possible that a second hibernate recovery happens
10505          * much faster than a first, causing the observed TSC here to be
10506          * smaller; this would require additional padding adjustment, which is
10507          * why we set last_host_tsc to the local tsc observed here.
10508          *
10509          * N.B. - this code below runs only on platforms with reliable TSC,
10510          * as that is the only way backwards_tsc is set above.  Also note
10511          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10512          * have the same delta_cyc adjustment applied if backwards_tsc
10513          * is detected.  Note further, this adjustment is only done once,
10514          * as we reset last_host_tsc on all VCPUs to stop this from being
10515          * called multiple times (one for each physical CPU bringup).
10516          *
10517          * Platforms with unreliable TSCs don't have to deal with this, they
10518          * will be compensated by the logic in vcpu_load, which sets the TSC to
10519          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10520          * guarantee that they stay in perfect synchronization.
10521          */
10522         if (backwards_tsc) {
10523                 u64 delta_cyc = max_tsc - local_tsc;
10524                 list_for_each_entry(kvm, &vm_list, vm_list) {
10525                         kvm->arch.backwards_tsc_observed = true;
10526                         kvm_for_each_vcpu(i, vcpu, kvm) {
10527                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10528                                 vcpu->arch.last_host_tsc = local_tsc;
10529                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10530                         }
10531
10532                         /*
10533                          * We have to disable TSC offset matching.. if you were
10534                          * booting a VM while issuing an S4 host suspend....
10535                          * you may have some problem.  Solving this issue is
10536                          * left as an exercise to the reader.
10537                          */
10538                         kvm->arch.last_tsc_nsec = 0;
10539                         kvm->arch.last_tsc_write = 0;
10540                 }
10541
10542         }
10543         return 0;
10544 }
10545
10546 void kvm_arch_hardware_disable(void)
10547 {
10548         static_call(kvm_x86_hardware_disable)();
10549         drop_user_return_notifiers();
10550 }
10551
10552 int kvm_arch_hardware_setup(void *opaque)
10553 {
10554         struct kvm_x86_init_ops *ops = opaque;
10555         int r;
10556
10557         rdmsrl_safe(MSR_EFER, &host_efer);
10558
10559         if (boot_cpu_has(X86_FEATURE_XSAVES))
10560                 rdmsrl(MSR_IA32_XSS, host_xss);
10561
10562         r = ops->hardware_setup();
10563         if (r != 0)
10564                 return r;
10565
10566         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10567         kvm_ops_static_call_update();
10568
10569         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10570                 supported_xss = 0;
10571
10572 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10573         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10574 #undef __kvm_cpu_cap_has
10575
10576         if (kvm_has_tsc_control) {
10577                 /*
10578                  * Make sure the user can only configure tsc_khz values that
10579                  * fit into a signed integer.
10580                  * A min value is not calculated because it will always
10581                  * be 1 on all machines.
10582                  */
10583                 u64 max = min(0x7fffffffULL,
10584                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10585                 kvm_max_guest_tsc_khz = max;
10586
10587                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10588         }
10589
10590         kvm_init_msr_list();
10591         return 0;
10592 }
10593
10594 void kvm_arch_hardware_unsetup(void)
10595 {
10596         static_call(kvm_x86_hardware_unsetup)();
10597 }
10598
10599 int kvm_arch_check_processor_compat(void *opaque)
10600 {
10601         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10602         struct kvm_x86_init_ops *ops = opaque;
10603
10604         WARN_ON(!irqs_disabled());
10605
10606         if (__cr4_reserved_bits(cpu_has, c) !=
10607             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10608                 return -EIO;
10609
10610         return ops->check_processor_compatibility();
10611 }
10612
10613 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10614 {
10615         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10616 }
10617 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10618
10619 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10620 {
10621         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10622 }
10623
10624 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10625 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10626
10627 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10628 {
10629         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10630
10631         vcpu->arch.l1tf_flush_l1d = true;
10632         if (pmu->version && unlikely(pmu->event_count)) {
10633                 pmu->need_cleanup = true;
10634                 kvm_make_request(KVM_REQ_PMU, vcpu);
10635         }
10636         static_call(kvm_x86_sched_in)(vcpu, cpu);
10637 }
10638
10639 void kvm_arch_free_vm(struct kvm *kvm)
10640 {
10641         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10642         vfree(kvm);
10643 }
10644
10645
10646 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10647 {
10648         if (type)
10649                 return -EINVAL;
10650
10651         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10652         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10653         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10654         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10655         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10656         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10657
10658         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10659         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10660         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10661         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10662                 &kvm->arch.irq_sources_bitmap);
10663
10664         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10665         mutex_init(&kvm->arch.apic_map_lock);
10666         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10667
10668         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10669         pvclock_update_vm_gtod_copy(kvm);
10670
10671         kvm->arch.guest_can_read_msr_platform_info = true;
10672
10673         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10674         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10675
10676         kvm_hv_init_vm(kvm);
10677         kvm_page_track_init(kvm);
10678         kvm_mmu_init_vm(kvm);
10679
10680         return static_call(kvm_x86_vm_init)(kvm);
10681 }
10682
10683 int kvm_arch_post_init_vm(struct kvm *kvm)
10684 {
10685         return kvm_mmu_post_init_vm(kvm);
10686 }
10687
10688 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10689 {
10690         vcpu_load(vcpu);
10691         kvm_mmu_unload(vcpu);
10692         vcpu_put(vcpu);
10693 }
10694
10695 static void kvm_free_vcpus(struct kvm *kvm)
10696 {
10697         unsigned int i;
10698         struct kvm_vcpu *vcpu;
10699
10700         /*
10701          * Unpin any mmu pages first.
10702          */
10703         kvm_for_each_vcpu(i, vcpu, kvm) {
10704                 kvm_clear_async_pf_completion_queue(vcpu);
10705                 kvm_unload_vcpu_mmu(vcpu);
10706         }
10707         kvm_for_each_vcpu(i, vcpu, kvm)
10708                 kvm_vcpu_destroy(vcpu);
10709
10710         mutex_lock(&kvm->lock);
10711         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10712                 kvm->vcpus[i] = NULL;
10713
10714         atomic_set(&kvm->online_vcpus, 0);
10715         mutex_unlock(&kvm->lock);
10716 }
10717
10718 void kvm_arch_sync_events(struct kvm *kvm)
10719 {
10720         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10721         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10722         kvm_free_pit(kvm);
10723 }
10724
10725 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10726
10727 /**
10728  * __x86_set_memory_region: Setup KVM internal memory slot
10729  *
10730  * @kvm: the kvm pointer to the VM.
10731  * @id: the slot ID to setup.
10732  * @gpa: the GPA to install the slot (unused when @size == 0).
10733  * @size: the size of the slot. Set to zero to uninstall a slot.
10734  *
10735  * This function helps to setup a KVM internal memory slot.  Specify
10736  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10737  * slot.  The return code can be one of the following:
10738  *
10739  *   HVA:           on success (uninstall will return a bogus HVA)
10740  *   -errno:        on error
10741  *
10742  * The caller should always use IS_ERR() to check the return value
10743  * before use.  Note, the KVM internal memory slots are guaranteed to
10744  * remain valid and unchanged until the VM is destroyed, i.e., the
10745  * GPA->HVA translation will not change.  However, the HVA is a user
10746  * address, i.e. its accessibility is not guaranteed, and must be
10747  * accessed via __copy_{to,from}_user().
10748  */
10749 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10750                                       u32 size)
10751 {
10752         int i, r;
10753         unsigned long hva, old_npages;
10754         struct kvm_memslots *slots = kvm_memslots(kvm);
10755         struct kvm_memory_slot *slot;
10756
10757         /* Called with kvm->slots_lock held.  */
10758         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10759                 return ERR_PTR_USR(-EINVAL);
10760
10761         slot = id_to_memslot(slots, id);
10762         if (size) {
10763                 if (slot && slot->npages)
10764                         return ERR_PTR_USR(-EEXIST);
10765
10766                 /*
10767                  * MAP_SHARED to prevent internal slot pages from being moved
10768                  * by fork()/COW.
10769                  */
10770                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10771                               MAP_SHARED | MAP_ANONYMOUS, 0);
10772                 if (IS_ERR((void *)hva))
10773                         return (void __user *)hva;
10774         } else {
10775                 if (!slot || !slot->npages)
10776                         return NULL;
10777
10778                 old_npages = slot->npages;
10779                 hva = slot->userspace_addr;
10780         }
10781
10782         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10783                 struct kvm_userspace_memory_region m;
10784
10785                 m.slot = id | (i << 16);
10786                 m.flags = 0;
10787                 m.guest_phys_addr = gpa;
10788                 m.userspace_addr = hva;
10789                 m.memory_size = size;
10790                 r = __kvm_set_memory_region(kvm, &m);
10791                 if (r < 0)
10792                         return ERR_PTR_USR(r);
10793         }
10794
10795         if (!size)
10796                 vm_munmap(hva, old_npages * PAGE_SIZE);
10797
10798         return (void __user *)hva;
10799 }
10800 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10801
10802 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10803 {
10804         kvm_mmu_pre_destroy_vm(kvm);
10805 }
10806
10807 void kvm_arch_destroy_vm(struct kvm *kvm)
10808 {
10809         if (current->mm == kvm->mm) {
10810                 /*
10811                  * Free memory regions allocated on behalf of userspace,
10812                  * unless the the memory map has changed due to process exit
10813                  * or fd copying.
10814                  */
10815                 mutex_lock(&kvm->slots_lock);
10816                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10817                                         0, 0);
10818                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10819                                         0, 0);
10820                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10821                 mutex_unlock(&kvm->slots_lock);
10822         }
10823         static_call_cond(kvm_x86_vm_destroy)(kvm);
10824         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10825         kvm_pic_destroy(kvm);
10826         kvm_ioapic_destroy(kvm);
10827         kvm_free_vcpus(kvm);
10828         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10829         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10830         kvm_mmu_uninit_vm(kvm);
10831         kvm_page_track_cleanup(kvm);
10832         kvm_xen_destroy_vm(kvm);
10833         kvm_hv_destroy_vm(kvm);
10834 }
10835
10836 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10837 {
10838         int i;
10839
10840         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10841                 kvfree(slot->arch.rmap[i]);
10842                 slot->arch.rmap[i] = NULL;
10843
10844                 if (i == 0)
10845                         continue;
10846
10847                 kvfree(slot->arch.lpage_info[i - 1]);
10848                 slot->arch.lpage_info[i - 1] = NULL;
10849         }
10850
10851         kvm_page_track_free_memslot(slot);
10852 }
10853
10854 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10855                                       unsigned long npages)
10856 {
10857         int i;
10858
10859         /*
10860          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10861          * old arrays will be freed by __kvm_set_memory_region() if installing
10862          * the new memslot is successful.
10863          */
10864         memset(&slot->arch, 0, sizeof(slot->arch));
10865
10866         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10867                 struct kvm_lpage_info *linfo;
10868                 unsigned long ugfn;
10869                 int lpages;
10870                 int level = i + 1;
10871
10872                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10873                                       slot->base_gfn, level) + 1;
10874
10875                 slot->arch.rmap[i] =
10876                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10877                                  GFP_KERNEL_ACCOUNT);
10878                 if (!slot->arch.rmap[i])
10879                         goto out_free;
10880                 if (i == 0)
10881                         continue;
10882
10883                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10884                 if (!linfo)
10885                         goto out_free;
10886
10887                 slot->arch.lpage_info[i - 1] = linfo;
10888
10889                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10890                         linfo[0].disallow_lpage = 1;
10891                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10892                         linfo[lpages - 1].disallow_lpage = 1;
10893                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10894                 /*
10895                  * If the gfn and userspace address are not aligned wrt each
10896                  * other, disable large page support for this slot.
10897                  */
10898                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10899                         unsigned long j;
10900
10901                         for (j = 0; j < lpages; ++j)
10902                                 linfo[j].disallow_lpage = 1;
10903                 }
10904         }
10905
10906         if (kvm_page_track_create_memslot(slot, npages))
10907                 goto out_free;
10908
10909         return 0;
10910
10911 out_free:
10912         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10913                 kvfree(slot->arch.rmap[i]);
10914                 slot->arch.rmap[i] = NULL;
10915                 if (i == 0)
10916                         continue;
10917
10918                 kvfree(slot->arch.lpage_info[i - 1]);
10919                 slot->arch.lpage_info[i - 1] = NULL;
10920         }
10921         return -ENOMEM;
10922 }
10923
10924 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10925 {
10926         struct kvm_vcpu *vcpu;
10927         int i;
10928
10929         /*
10930          * memslots->generation has been incremented.
10931          * mmio generation may have reached its maximum value.
10932          */
10933         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10934
10935         /* Force re-initialization of steal_time cache */
10936         kvm_for_each_vcpu(i, vcpu, kvm)
10937                 kvm_vcpu_kick(vcpu);
10938 }
10939
10940 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10941                                 struct kvm_memory_slot *memslot,
10942                                 const struct kvm_userspace_memory_region *mem,
10943                                 enum kvm_mr_change change)
10944 {
10945         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10946                 return kvm_alloc_memslot_metadata(memslot,
10947                                                   mem->memory_size >> PAGE_SHIFT);
10948         return 0;
10949 }
10950
10951
10952 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10953 {
10954         struct kvm_arch *ka = &kvm->arch;
10955
10956         if (!kvm_x86_ops.cpu_dirty_log_size)
10957                 return;
10958
10959         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10960             (!enable && --ka->cpu_dirty_logging_count == 0))
10961                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10962
10963         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10964 }
10965
10966 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10967                                      struct kvm_memory_slot *old,
10968                                      struct kvm_memory_slot *new,
10969                                      enum kvm_mr_change change)
10970 {
10971         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10972
10973         /*
10974          * Update CPU dirty logging if dirty logging is being toggled.  This
10975          * applies to all operations.
10976          */
10977         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10978                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10979
10980         /*
10981          * Nothing more to do for RO slots (which can't be dirtied and can't be
10982          * made writable) or CREATE/MOVE/DELETE of a slot.
10983          *
10984          * For a memslot with dirty logging disabled:
10985          * CREATE:      No dirty mappings will already exist.
10986          * MOVE/DELETE: The old mappings will already have been cleaned up by
10987          *              kvm_arch_flush_shadow_memslot()
10988          *
10989          * For a memslot with dirty logging enabled:
10990          * CREATE:      No shadow pages exist, thus nothing to write-protect
10991          *              and no dirty bits to clear.
10992          * MOVE/DELETE: The old mappings will already have been cleaned up by
10993          *              kvm_arch_flush_shadow_memslot().
10994          */
10995         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10996                 return;
10997
10998         /*
10999          * READONLY and non-flags changes were filtered out above, and the only
11000          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11001          * logging isn't being toggled on or off.
11002          */
11003         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11004                 return;
11005
11006         if (!log_dirty_pages) {
11007                 /*
11008                  * Dirty logging tracks sptes in 4k granularity, meaning that
11009                  * large sptes have to be split.  If live migration succeeds,
11010                  * the guest in the source machine will be destroyed and large
11011                  * sptes will be created in the destination.  However, if the
11012                  * guest continues to run in the source machine (for example if
11013                  * live migration fails), small sptes will remain around and
11014                  * cause bad performance.
11015                  *
11016                  * Scan sptes if dirty logging has been stopped, dropping those
11017                  * which can be collapsed into a single large-page spte.  Later
11018                  * page faults will create the large-page sptes.
11019                  */
11020                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11021         } else {
11022                 /* By default, write-protect everything to log writes. */
11023                 int level = PG_LEVEL_4K;
11024
11025                 if (kvm_x86_ops.cpu_dirty_log_size) {
11026                         /*
11027                          * Clear all dirty bits, unless pages are treated as
11028                          * dirty from the get-go.
11029                          */
11030                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
11031                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11032
11033                         /*
11034                          * Write-protect large pages on write so that dirty
11035                          * logging happens at 4k granularity.  No need to
11036                          * write-protect small SPTEs since write accesses are
11037                          * logged by the CPU via dirty bits.
11038                          */
11039                         level = PG_LEVEL_2M;
11040                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
11041                         /*
11042                          * If we're with initial-all-set, we don't need
11043                          * to write protect any small page because
11044                          * they're reported as dirty already.  However
11045                          * we still need to write-protect huge pages
11046                          * so that the page split can happen lazily on
11047                          * the first write to the huge page.
11048                          */
11049                         level = PG_LEVEL_2M;
11050                 }
11051                 kvm_mmu_slot_remove_write_access(kvm, new, level);
11052         }
11053 }
11054
11055 void kvm_arch_commit_memory_region(struct kvm *kvm,
11056                                 const struct kvm_userspace_memory_region *mem,
11057                                 struct kvm_memory_slot *old,
11058                                 const struct kvm_memory_slot *new,
11059                                 enum kvm_mr_change change)
11060 {
11061         if (!kvm->arch.n_requested_mmu_pages)
11062                 kvm_mmu_change_mmu_pages(kvm,
11063                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11064
11065         /*
11066          * FIXME: const-ify all uses of struct kvm_memory_slot.
11067          */
11068         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11069
11070         /* Free the arrays associated with the old memslot. */
11071         if (change == KVM_MR_MOVE)
11072                 kvm_arch_free_memslot(kvm, old);
11073 }
11074
11075 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11076 {
11077         kvm_mmu_zap_all(kvm);
11078 }
11079
11080 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11081                                    struct kvm_memory_slot *slot)
11082 {
11083         kvm_page_track_flush_slot(kvm, slot);
11084 }
11085
11086 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11087 {
11088         return (is_guest_mode(vcpu) &&
11089                         kvm_x86_ops.guest_apic_has_interrupt &&
11090                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11091 }
11092
11093 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11094 {
11095         if (!list_empty_careful(&vcpu->async_pf.done))
11096                 return true;
11097
11098         if (kvm_apic_has_events(vcpu))
11099                 return true;
11100
11101         if (vcpu->arch.pv.pv_unhalted)
11102                 return true;
11103
11104         if (vcpu->arch.exception.pending)
11105                 return true;
11106
11107         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11108             (vcpu->arch.nmi_pending &&
11109              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11110                 return true;
11111
11112         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11113             (vcpu->arch.smi_pending &&
11114              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11115                 return true;
11116
11117         if (kvm_arch_interrupt_allowed(vcpu) &&
11118             (kvm_cpu_has_interrupt(vcpu) ||
11119             kvm_guest_apic_has_interrupt(vcpu)))
11120                 return true;
11121
11122         if (kvm_hv_has_stimer_pending(vcpu))
11123                 return true;
11124
11125         if (is_guest_mode(vcpu) &&
11126             kvm_x86_ops.nested_ops->hv_timer_pending &&
11127             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11128                 return true;
11129
11130         return false;
11131 }
11132
11133 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11134 {
11135         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11136 }
11137
11138 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11139 {
11140         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11141                 return true;
11142
11143         return false;
11144 }
11145
11146 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11147 {
11148         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11149                 return true;
11150
11151         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11152                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11153                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11154                 return true;
11155
11156         return kvm_arch_dy_has_pending_interrupt(vcpu);
11157 }
11158
11159 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11160 {
11161         if (vcpu->arch.guest_state_protected)
11162                 return true;
11163
11164         return vcpu->arch.preempted_in_kernel;
11165 }
11166
11167 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11168 {
11169         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11170 }
11171
11172 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11173 {
11174         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11175 }
11176
11177 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11178 {
11179         /* Can't read the RIP when guest state is protected, just return 0 */
11180         if (vcpu->arch.guest_state_protected)
11181                 return 0;
11182
11183         if (is_64_bit_mode(vcpu))
11184                 return kvm_rip_read(vcpu);
11185         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11186                      kvm_rip_read(vcpu));
11187 }
11188 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11189
11190 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11191 {
11192         return kvm_get_linear_rip(vcpu) == linear_rip;
11193 }
11194 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11195
11196 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11197 {
11198         unsigned long rflags;
11199
11200         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11201         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11202                 rflags &= ~X86_EFLAGS_TF;
11203         return rflags;
11204 }
11205 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11206
11207 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11208 {
11209         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11210             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11211                 rflags |= X86_EFLAGS_TF;
11212         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11213 }
11214
11215 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11216 {
11217         __kvm_set_rflags(vcpu, rflags);
11218         kvm_make_request(KVM_REQ_EVENT, vcpu);
11219 }
11220 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11221
11222 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11223 {
11224         int r;
11225
11226         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11227               work->wakeup_all)
11228                 return;
11229
11230         r = kvm_mmu_reload(vcpu);
11231         if (unlikely(r))
11232                 return;
11233
11234         if (!vcpu->arch.mmu->direct_map &&
11235               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11236                 return;
11237
11238         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11239 }
11240
11241 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11242 {
11243         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11244
11245         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11246 }
11247
11248 static inline u32 kvm_async_pf_next_probe(u32 key)
11249 {
11250         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11251 }
11252
11253 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11254 {
11255         u32 key = kvm_async_pf_hash_fn(gfn);
11256
11257         while (vcpu->arch.apf.gfns[key] != ~0)
11258                 key = kvm_async_pf_next_probe(key);
11259
11260         vcpu->arch.apf.gfns[key] = gfn;
11261 }
11262
11263 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11264 {
11265         int i;
11266         u32 key = kvm_async_pf_hash_fn(gfn);
11267
11268         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11269                      (vcpu->arch.apf.gfns[key] != gfn &&
11270                       vcpu->arch.apf.gfns[key] != ~0); i++)
11271                 key = kvm_async_pf_next_probe(key);
11272
11273         return key;
11274 }
11275
11276 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11277 {
11278         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11279 }
11280
11281 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11282 {
11283         u32 i, j, k;
11284
11285         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11286
11287         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11288                 return;
11289
11290         while (true) {
11291                 vcpu->arch.apf.gfns[i] = ~0;
11292                 do {
11293                         j = kvm_async_pf_next_probe(j);
11294                         if (vcpu->arch.apf.gfns[j] == ~0)
11295                                 return;
11296                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11297                         /*
11298                          * k lies cyclically in ]i,j]
11299                          * |    i.k.j |
11300                          * |....j i.k.| or  |.k..j i...|
11301                          */
11302                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11303                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11304                 i = j;
11305         }
11306 }
11307
11308 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11309 {
11310         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11311
11312         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11313                                       sizeof(reason));
11314 }
11315
11316 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11317 {
11318         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11319
11320         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11321                                              &token, offset, sizeof(token));
11322 }
11323
11324 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11325 {
11326         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11327         u32 val;
11328
11329         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11330                                          &val, offset, sizeof(val)))
11331                 return false;
11332
11333         return !val;
11334 }
11335
11336 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11337 {
11338         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11339                 return false;
11340
11341         if (!kvm_pv_async_pf_enabled(vcpu) ||
11342             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11343                 return false;
11344
11345         return true;
11346 }
11347
11348 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11349 {
11350         if (unlikely(!lapic_in_kernel(vcpu) ||
11351                      kvm_event_needs_reinjection(vcpu) ||
11352                      vcpu->arch.exception.pending))
11353                 return false;
11354
11355         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11356                 return false;
11357
11358         /*
11359          * If interrupts are off we cannot even use an artificial
11360          * halt state.
11361          */
11362         return kvm_arch_interrupt_allowed(vcpu);
11363 }
11364
11365 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11366                                      struct kvm_async_pf *work)
11367 {
11368         struct x86_exception fault;
11369
11370         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11371         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11372
11373         if (kvm_can_deliver_async_pf(vcpu) &&
11374             !apf_put_user_notpresent(vcpu)) {
11375                 fault.vector = PF_VECTOR;
11376                 fault.error_code_valid = true;
11377                 fault.error_code = 0;
11378                 fault.nested_page_fault = false;
11379                 fault.address = work->arch.token;
11380                 fault.async_page_fault = true;
11381                 kvm_inject_page_fault(vcpu, &fault);
11382                 return true;
11383         } else {
11384                 /*
11385                  * It is not possible to deliver a paravirtualized asynchronous
11386                  * page fault, but putting the guest in an artificial halt state
11387                  * can be beneficial nevertheless: if an interrupt arrives, we
11388                  * can deliver it timely and perhaps the guest will schedule
11389                  * another process.  When the instruction that triggered a page
11390                  * fault is retried, hopefully the page will be ready in the host.
11391                  */
11392                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11393                 return false;
11394         }
11395 }
11396
11397 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11398                                  struct kvm_async_pf *work)
11399 {
11400         struct kvm_lapic_irq irq = {
11401                 .delivery_mode = APIC_DM_FIXED,
11402                 .vector = vcpu->arch.apf.vec
11403         };
11404
11405         if (work->wakeup_all)
11406                 work->arch.token = ~0; /* broadcast wakeup */
11407         else
11408                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11409         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11410
11411         if ((work->wakeup_all || work->notpresent_injected) &&
11412             kvm_pv_async_pf_enabled(vcpu) &&
11413             !apf_put_user_ready(vcpu, work->arch.token)) {
11414                 vcpu->arch.apf.pageready_pending = true;
11415                 kvm_apic_set_irq(vcpu, &irq, NULL);
11416         }
11417
11418         vcpu->arch.apf.halted = false;
11419         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11420 }
11421
11422 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11423 {
11424         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11425         if (!vcpu->arch.apf.pageready_pending)
11426                 kvm_vcpu_kick(vcpu);
11427 }
11428
11429 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11430 {
11431         if (!kvm_pv_async_pf_enabled(vcpu))
11432                 return true;
11433         else
11434                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11435 }
11436
11437 void kvm_arch_start_assignment(struct kvm *kvm)
11438 {
11439         atomic_inc(&kvm->arch.assigned_device_count);
11440 }
11441 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11442
11443 void kvm_arch_end_assignment(struct kvm *kvm)
11444 {
11445         atomic_dec(&kvm->arch.assigned_device_count);
11446 }
11447 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11448
11449 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11450 {
11451         return atomic_read(&kvm->arch.assigned_device_count);
11452 }
11453 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11454
11455 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11456 {
11457         atomic_inc(&kvm->arch.noncoherent_dma_count);
11458 }
11459 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11460
11461 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11462 {
11463         atomic_dec(&kvm->arch.noncoherent_dma_count);
11464 }
11465 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11466
11467 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11468 {
11469         return atomic_read(&kvm->arch.noncoherent_dma_count);
11470 }
11471 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11472
11473 bool kvm_arch_has_irq_bypass(void)
11474 {
11475         return true;
11476 }
11477
11478 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11479                                       struct irq_bypass_producer *prod)
11480 {
11481         struct kvm_kernel_irqfd *irqfd =
11482                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11483         int ret;
11484
11485         irqfd->producer = prod;
11486         kvm_arch_start_assignment(irqfd->kvm);
11487         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11488                                          prod->irq, irqfd->gsi, 1);
11489
11490         if (ret)
11491                 kvm_arch_end_assignment(irqfd->kvm);
11492
11493         return ret;
11494 }
11495
11496 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11497                                       struct irq_bypass_producer *prod)
11498 {
11499         int ret;
11500         struct kvm_kernel_irqfd *irqfd =
11501                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11502
11503         WARN_ON(irqfd->producer != prod);
11504         irqfd->producer = NULL;
11505
11506         /*
11507          * When producer of consumer is unregistered, we change back to
11508          * remapped mode, so we can re-use the current implementation
11509          * when the irq is masked/disabled or the consumer side (KVM
11510          * int this case doesn't want to receive the interrupts.
11511         */
11512         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11513         if (ret)
11514                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11515                        " fails: %d\n", irqfd->consumer.token, ret);
11516
11517         kvm_arch_end_assignment(irqfd->kvm);
11518 }
11519
11520 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11521                                    uint32_t guest_irq, bool set)
11522 {
11523         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11524 }
11525
11526 bool kvm_vector_hashing_enabled(void)
11527 {
11528         return vector_hashing;
11529 }
11530
11531 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11532 {
11533         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11534 }
11535 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11536
11537
11538 int kvm_spec_ctrl_test_value(u64 value)
11539 {
11540         /*
11541          * test that setting IA32_SPEC_CTRL to given value
11542          * is allowed by the host processor
11543          */
11544
11545         u64 saved_value;
11546         unsigned long flags;
11547         int ret = 0;
11548
11549         local_irq_save(flags);
11550
11551         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11552                 ret = 1;
11553         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11554                 ret = 1;
11555         else
11556                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11557
11558         local_irq_restore(flags);
11559
11560         return ret;
11561 }
11562 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11563
11564 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11565 {
11566         struct x86_exception fault;
11567         u32 access = error_code &
11568                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11569
11570         if (!(error_code & PFERR_PRESENT_MASK) ||
11571             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11572                 /*
11573                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11574                  * tables probably do not match the TLB.  Just proceed
11575                  * with the error code that the processor gave.
11576                  */
11577                 fault.vector = PF_VECTOR;
11578                 fault.error_code_valid = true;
11579                 fault.error_code = error_code;
11580                 fault.nested_page_fault = false;
11581                 fault.address = gva;
11582         }
11583         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11584 }
11585 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11586
11587 /*
11588  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11589  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11590  * indicates whether exit to userspace is needed.
11591  */
11592 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11593                               struct x86_exception *e)
11594 {
11595         if (r == X86EMUL_PROPAGATE_FAULT) {
11596                 kvm_inject_emulated_page_fault(vcpu, e);
11597                 return 1;
11598         }
11599
11600         /*
11601          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11602          * while handling a VMX instruction KVM could've handled the request
11603          * correctly by exiting to userspace and performing I/O but there
11604          * doesn't seem to be a real use-case behind such requests, just return
11605          * KVM_EXIT_INTERNAL_ERROR for now.
11606          */
11607         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11608         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11609         vcpu->run->internal.ndata = 0;
11610
11611         return 0;
11612 }
11613 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11614
11615 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11616 {
11617         bool pcid_enabled;
11618         struct x86_exception e;
11619         unsigned i;
11620         unsigned long roots_to_free = 0;
11621         struct {
11622                 u64 pcid;
11623                 u64 gla;
11624         } operand;
11625         int r;
11626
11627         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11628         if (r != X86EMUL_CONTINUE)
11629                 return kvm_handle_memory_failure(vcpu, r, &e);
11630
11631         if (operand.pcid >> 12 != 0) {
11632                 kvm_inject_gp(vcpu, 0);
11633                 return 1;
11634         }
11635
11636         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11637
11638         switch (type) {
11639         case INVPCID_TYPE_INDIV_ADDR:
11640                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11641                     is_noncanonical_address(operand.gla, vcpu)) {
11642                         kvm_inject_gp(vcpu, 0);
11643                         return 1;
11644                 }
11645                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11646                 return kvm_skip_emulated_instruction(vcpu);
11647
11648         case INVPCID_TYPE_SINGLE_CTXT:
11649                 if (!pcid_enabled && (operand.pcid != 0)) {
11650                         kvm_inject_gp(vcpu, 0);
11651                         return 1;
11652                 }
11653
11654                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11655                         kvm_mmu_sync_roots(vcpu);
11656                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11657                 }
11658
11659                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11660                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11661                             == operand.pcid)
11662                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11663
11664                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11665                 /*
11666                  * If neither the current cr3 nor any of the prev_roots use the
11667                  * given PCID, then nothing needs to be done here because a
11668                  * resync will happen anyway before switching to any other CR3.
11669                  */
11670
11671                 return kvm_skip_emulated_instruction(vcpu);
11672
11673         case INVPCID_TYPE_ALL_NON_GLOBAL:
11674                 /*
11675                  * Currently, KVM doesn't mark global entries in the shadow
11676                  * page tables, so a non-global flush just degenerates to a
11677                  * global flush. If needed, we could optimize this later by
11678                  * keeping track of global entries in shadow page tables.
11679                  */
11680
11681                 fallthrough;
11682         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11683                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11684                 return kvm_skip_emulated_instruction(vcpu);
11685
11686         default:
11687                 BUG(); /* We have already checked above that type <= 3 */
11688         }
11689 }
11690 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11691
11692 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11693 {
11694         struct kvm_run *run = vcpu->run;
11695         struct kvm_mmio_fragment *frag;
11696         unsigned int len;
11697
11698         BUG_ON(!vcpu->mmio_needed);
11699
11700         /* Complete previous fragment */
11701         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11702         len = min(8u, frag->len);
11703         if (!vcpu->mmio_is_write)
11704                 memcpy(frag->data, run->mmio.data, len);
11705
11706         if (frag->len <= 8) {
11707                 /* Switch to the next fragment. */
11708                 frag++;
11709                 vcpu->mmio_cur_fragment++;
11710         } else {
11711                 /* Go forward to the next mmio piece. */
11712                 frag->data += len;
11713                 frag->gpa += len;
11714                 frag->len -= len;
11715         }
11716
11717         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11718                 vcpu->mmio_needed = 0;
11719
11720                 // VMG change, at this point, we're always done
11721                 // RIP has already been advanced
11722                 return 1;
11723         }
11724
11725         // More MMIO is needed
11726         run->mmio.phys_addr = frag->gpa;
11727         run->mmio.len = min(8u, frag->len);
11728         run->mmio.is_write = vcpu->mmio_is_write;
11729         if (run->mmio.is_write)
11730                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11731         run->exit_reason = KVM_EXIT_MMIO;
11732
11733         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11734
11735         return 0;
11736 }
11737
11738 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11739                           void *data)
11740 {
11741         int handled;
11742         struct kvm_mmio_fragment *frag;
11743
11744         if (!data)
11745                 return -EINVAL;
11746
11747         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11748         if (handled == bytes)
11749                 return 1;
11750
11751         bytes -= handled;
11752         gpa += handled;
11753         data += handled;
11754
11755         /*TODO: Check if need to increment number of frags */
11756         frag = vcpu->mmio_fragments;
11757         vcpu->mmio_nr_fragments = 1;
11758         frag->len = bytes;
11759         frag->gpa = gpa;
11760         frag->data = data;
11761
11762         vcpu->mmio_needed = 1;
11763         vcpu->mmio_cur_fragment = 0;
11764
11765         vcpu->run->mmio.phys_addr = gpa;
11766         vcpu->run->mmio.len = min(8u, frag->len);
11767         vcpu->run->mmio.is_write = 1;
11768         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11769         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11770
11771         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11772
11773         return 0;
11774 }
11775 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11776
11777 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11778                          void *data)
11779 {
11780         int handled;
11781         struct kvm_mmio_fragment *frag;
11782
11783         if (!data)
11784                 return -EINVAL;
11785
11786         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11787         if (handled == bytes)
11788                 return 1;
11789
11790         bytes -= handled;
11791         gpa += handled;
11792         data += handled;
11793
11794         /*TODO: Check if need to increment number of frags */
11795         frag = vcpu->mmio_fragments;
11796         vcpu->mmio_nr_fragments = 1;
11797         frag->len = bytes;
11798         frag->gpa = gpa;
11799         frag->data = data;
11800
11801         vcpu->mmio_needed = 1;
11802         vcpu->mmio_cur_fragment = 0;
11803
11804         vcpu->run->mmio.phys_addr = gpa;
11805         vcpu->run->mmio.len = min(8u, frag->len);
11806         vcpu->run->mmio.is_write = 0;
11807         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11808
11809         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11810
11811         return 0;
11812 }
11813 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11814
11815 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11816 {
11817         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11818                vcpu->arch.pio.count * vcpu->arch.pio.size);
11819         vcpu->arch.pio.count = 0;
11820
11821         return 1;
11822 }
11823
11824 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11825                            unsigned int port, void *data,  unsigned int count)
11826 {
11827         int ret;
11828
11829         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11830                                         data, count);
11831         if (ret)
11832                 return ret;
11833
11834         vcpu->arch.pio.count = 0;
11835
11836         return 0;
11837 }
11838
11839 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11840                           unsigned int port, void *data, unsigned int count)
11841 {
11842         int ret;
11843
11844         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11845                                        data, count);
11846         if (ret) {
11847                 vcpu->arch.pio.count = 0;
11848         } else {
11849                 vcpu->arch.guest_ins_data = data;
11850                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11851         }
11852
11853         return 0;
11854 }
11855
11856 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11857                          unsigned int port, void *data,  unsigned int count,
11858                          int in)
11859 {
11860         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11861                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11862 }
11863 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11864
11865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11879 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11880 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11881 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11882 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11883 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11884 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11885 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);