arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
  96 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages, .mode = 0444) },
 216         { "max_mmu_page_hash_collisions",
 217                 VM_STAT(max_mmu_page_hash_collisions) },
 218         { NULL }
 219 };
 220
 221 u64 __read_mostly host_xcr0;
 222
 223 struct kmem_cache *x86_fpu_cache;
 224 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 225
 226 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 227
 228 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 229 {
 230         int i;
 231         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 232                 vcpu->arch.apf.gfns[i] = ~0;
 233 }
 234
 235 static void kvm_on_user_return(struct user_return_notifier *urn)
 236 {
 237         unsigned slot;
 238         struct kvm_shared_msrs *locals
 239                 = container_of(urn, struct kvm_shared_msrs, urn);
 240         struct kvm_shared_msr_values *values;
 241         unsigned long flags;
 242
 243         /*
 244          * Disabling irqs at this point since the following code could be
 245          * interrupted and executed through kvm_arch_hardware_disable()
 246          */
 247         local_irq_save(flags);
 248         if (locals->registered) {
 249                 locals->registered = false;
 250                 user_return_notifier_unregister(urn);
 251         }
 252         local_irq_restore(flags);
 253         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 254                 values = &locals->values[slot];
 255                 if (values->host != values->curr) {
 256                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 257                         values->curr = values->host;
 258                 }
 259         }
 260 }
 261
 262 static void shared_msr_update(unsigned slot, u32 msr)
 263 {
 264         u64 value;
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         /* only read, and nobody should modify it at this time,
 269          * so don't need lock */
 270         if (slot >= shared_msrs_global.nr) {
 271                 printk(KERN_ERR "kvm: invalid MSR slot!");
 272                 return;
 273         }
 274         rdmsrl_safe(msr, &value);
 275         smsr->values[slot].host = value;
 276         smsr->values[slot].curr = value;
 277 }
 278
 279 void kvm_define_shared_msr(unsigned slot, u32 msr)
 280 {
 281         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 282         shared_msrs_global.msrs[slot] = msr;
 283         if (slot >= shared_msrs_global.nr)
 284                 shared_msrs_global.nr = slot + 1;
 285 }
 286 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 287
 288 static void kvm_shared_msr_cpu_online(void)
 289 {
 290         unsigned i;
 291
 292         for (i = 0; i < shared_msrs_global.nr; ++i)
 293                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 294 }
 295
 296 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 297 {
 298         unsigned int cpu = smp_processor_id();
 299         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 300         int err;
 301
 302         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 303                 return 0;
 304         smsr->values[slot].curr = value;
 305         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 306         if (err)
 307                 return 1;
 308
 309         if (!smsr->registered) {
 310                 smsr->urn.on_user_return = kvm_on_user_return;
 311                 user_return_notifier_register(&smsr->urn);
 312                 smsr->registered = true;
 313         }
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 317
 318 static void drop_user_return_notifiers(void)
 319 {
 320         unsigned int cpu = smp_processor_id();
 321         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 322
 323         if (smsr->registered)
 324                 kvm_on_user_return(&smsr->urn);
 325 }
 326
 327 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 328 {
 329         return vcpu->arch.apic_base;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 332
 333 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 334 {
 335         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 338
 339 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 340 {
 341         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 342         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 343         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 344                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 345
 346         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 347                 return 1;
 348         if (!msr_info->host_initiated) {
 349                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 350                         return 1;
 351                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 352                         return 1;
 353         }
 354
 355         kvm_lapic_set_base(vcpu, msr_info->data);
 356         return 0;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 359
 360 asmlinkage __visible void kvm_spurious_fault(void)
 361 {
 362         /* Fault while not rebooting.  We want the trace. */
 363         BUG_ON(!kvm_rebooting);
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 366
 367 #define EXCPT_BENIGN            0
 368 #define EXCPT_CONTRIBUTORY      1
 369 #define EXCPT_PF                2
 370
 371 static int exception_class(int vector)
 372 {
 373         switch (vector) {
 374         case PF_VECTOR:
 375                 return EXCPT_PF;
 376         case DE_VECTOR:
 377         case TS_VECTOR:
 378         case NP_VECTOR:
 379         case SS_VECTOR:
 380         case GP_VECTOR:
 381                 return EXCPT_CONTRIBUTORY;
 382         default:
 383                 break;
 384         }
 385         return EXCPT_BENIGN;
 386 }
 387
 388 #define EXCPT_FAULT             0
 389 #define EXCPT_TRAP              1
 390 #define EXCPT_ABORT             2
 391 #define EXCPT_INTERRUPT         3
 392
 393 static int exception_type(int vector)
 394 {
 395         unsigned int mask;
 396
 397         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 398                 return EXCPT_INTERRUPT;
 399
 400         mask = 1 << vector;
 401
 402         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 403         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 404                 return EXCPT_TRAP;
 405
 406         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 407                 return EXCPT_ABORT;
 408
 409         /* Reserved exceptions will result in fault */
 410         return EXCPT_FAULT;
 411 }
 412
 413 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 414 {
 415         unsigned nr = vcpu->arch.exception.nr;
 416         bool has_payload = vcpu->arch.exception.has_payload;
 417         unsigned long payload = vcpu->arch.exception.payload;
 418
 419         if (!has_payload)
 420                 return;
 421
 422         switch (nr) {
 423         case DB_VECTOR:
 424                 /*
 425                  * "Certain debug exceptions may clear bit 0-3.  The
 426                  * remaining contents of the DR6 register are never
 427                  * cleared by the processor".
 428                  */
 429                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 430                 /*
 431                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 432                  */
 433                 vcpu->arch.dr6 |= DR6_RTM;
 434                 vcpu->arch.dr6 |= payload;
 435                 /*
 436                  * Bit 16 should be set in the payload whenever the #DB
 437                  * exception should clear DR6.RTM. This makes the payload
 438                  * compatible with the pending debug exceptions under VMX.
 439                  * Though not currently documented in the SDM, this also
 440                  * makes the payload compatible with the exit qualification
 441                  * for #DB exceptions under VMX.
 442                  */
 443                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 444                 break;
 445         case PF_VECTOR:
 446                 vcpu->arch.cr2 = payload;
 447                 break;
 448         }
 449
 450         vcpu->arch.exception.has_payload = false;
 451         vcpu->arch.exception.payload = 0;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 454
 455 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 456                 unsigned nr, bool has_error, u32 error_code,
 457                 bool has_payload, unsigned long payload, bool reinject)
 458 {
 459         u32 prev_nr;
 460         int class1, class2;
 461
 462         kvm_make_request(KVM_REQ_EVENT, vcpu);
 463
 464         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 465         queue:
 466                 if (has_error && !is_protmode(vcpu))
 467                         has_error = false;
 468                 if (reinject) {
 469                         /*
 470                          * On vmentry, vcpu->arch.exception.pending is only
 471                          * true if an event injection was blocked by
 472                          * nested_run_pending.  In that case, however,
 473                          * vcpu_enter_guest requests an immediate exit,
 474                          * and the guest shouldn't proceed far enough to
 475                          * need reinjection.
 476                          */
 477                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 478                         vcpu->arch.exception.injected = true;
 479                         if (WARN_ON_ONCE(has_payload)) {
 480                                 /*
 481                                  * A reinjected event has already
 482                                  * delivered its payload.
 483                                  */
 484                                 has_payload = false;
 485                                 payload = 0;
 486                         }
 487                 } else {
 488                         vcpu->arch.exception.pending = true;
 489                         vcpu->arch.exception.injected = false;
 490                 }
 491                 vcpu->arch.exception.has_error_code = has_error;
 492                 vcpu->arch.exception.nr = nr;
 493                 vcpu->arch.exception.error_code = error_code;
 494                 vcpu->arch.exception.has_payload = has_payload;
 495                 vcpu->arch.exception.payload = payload;
 496                 /*
 497                  * In guest mode, payload delivery should be deferred,
 498                  * so that the L1 hypervisor can intercept #PF before
 499                  * CR2 is modified (or intercept #DB before DR6 is
 500                  * modified under nVMX).  However, for ABI
 501                  * compatibility with KVM_GET_VCPU_EVENTS and
 502                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 503                  * delivery unless userspace has enabled this
 504                  * functionality via the per-VM capability,
 505                  * KVM_CAP_EXCEPTION_PAYLOAD.
 506                  */
 507                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 508                     !is_guest_mode(vcpu))
 509                         kvm_deliver_exception_payload(vcpu);
 510                 return;
 511         }
 512
 513         /* to check exception */
 514         prev_nr = vcpu->arch.exception.nr;
 515         if (prev_nr == DF_VECTOR) {
 516                 /* triple fault -> shutdown */
 517                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 518                 return;
 519         }
 520         class1 = exception_class(prev_nr);
 521         class2 = exception_class(nr);
 522         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 523                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 524                 /*
 525                  * Generate double fault per SDM Table 5-5.  Set
 526                  * exception.pending = true so that the double fault
 527                  * can trigger a nested vmexit.
 528                  */
 529                 vcpu->arch.exception.pending = true;
 530                 vcpu->arch.exception.injected = false;
 531                 vcpu->arch.exception.has_error_code = true;
 532                 vcpu->arch.exception.nr = DF_VECTOR;
 533                 vcpu->arch.exception.error_code = 0;
 534                 vcpu->arch.exception.has_payload = false;
 535                 vcpu->arch.exception.payload = 0;
 536         } else
 537                 /* replace previous exception with a new one in a hope
 538                    that instruction re-execution will regenerate lost
 539                    exception */
 540                 goto queue;
 541 }
 542
 543 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 544 {
 545         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 548
 549 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 550 {
 551         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 554
 555 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 556                                   unsigned long payload)
 557 {
 558         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 559 }
 560
 561 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 562                                     u32 error_code, unsigned long payload)
 563 {
 564         kvm_multiple_exception(vcpu, nr, true, error_code,
 565                                true, payload, false);
 566 }
 567
 568 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 569 {
 570         if (err)
 571                 kvm_inject_gp(vcpu, 0);
 572         else
 573                 return kvm_skip_emulated_instruction(vcpu);
 574
 575         return 1;
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 578
 579 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 580 {
 581         ++vcpu->stat.pf_guest;
 582         vcpu->arch.exception.nested_apf =
 583                 is_guest_mode(vcpu) && fault->async_page_fault;
 584         if (vcpu->arch.exception.nested_apf) {
 585                 vcpu->arch.apf.nested_apf_token = fault->address;
 586                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 587         } else {
 588                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 589                                         fault->address);
 590         }
 591 }
 592 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 593
 594 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 595 {
 596         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 597                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 598         else
 599                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 600
 601         return fault->nested_page_fault;
 602 }
 603
 604 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 605 {
 606         atomic_inc(&vcpu->arch.nmi_queued);
 607         kvm_make_request(KVM_REQ_NMI, vcpu);
 608 }
 609 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 610
 611 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 612 {
 613         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 616
 617 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 618 {
 619         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 622
 623 /*
 624  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 625  * a #GP and return false.
 626  */
 627 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 628 {
 629         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 630                 return true;
 631         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 635
 636 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 637 {
 638         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 639                 return true;
 640
 641         kvm_queue_exception(vcpu, UD_VECTOR);
 642         return false;
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_require_dr);
 645
 646 /*
 647  * This function will be used to read from the physical memory of the currently
 648  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 649  * can read from guest physical or from the guest's guest physical memory.
 650  */
 651 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 652                             gfn_t ngfn, void *data, int offset, int len,
 653                             u32 access)
 654 {
 655         struct x86_exception exception;
 656         gfn_t real_gfn;
 657         gpa_t ngpa;
 658
 659         ngpa     = gfn_to_gpa(ngfn);
 660         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 661         if (real_gfn == UNMAPPED_GVA)
 662                 return -EFAULT;
 663
 664         real_gfn = gpa_to_gfn(real_gfn);
 665
 666         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 669
 670 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 671                                void *data, int offset, int len, u32 access)
 672 {
 673         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 674                                        data, offset, len, access);
 675 }
 676
 677 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 678 {
 679         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 680                rsvd_bits(1, 2);
 681 }
 682
 683 /*
 684  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 685  */
 686 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 687 {
 688         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 689         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 690         int i;
 691         int ret;
 692         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 693
 694         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 695                                       offset * sizeof(u64), sizeof(pdpte),
 696                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 697         if (ret < 0) {
 698                 ret = 0;
 699                 goto out;
 700         }
 701         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 702                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 703                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 704                         ret = 0;
 705                         goto out;
 706                 }
 707         }
 708         ret = 1;
 709
 710         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 711         __set_bit(VCPU_EXREG_PDPTR,
 712                   (unsigned long *)&vcpu->arch.regs_avail);
 713         __set_bit(VCPU_EXREG_PDPTR,
 714                   (unsigned long *)&vcpu->arch.regs_dirty);
 715 out:
 716
 717         return ret;
 718 }
 719 EXPORT_SYMBOL_GPL(load_pdptrs);
 720
 721 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 722 {
 723         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 724         bool changed = true;
 725         int offset;
 726         gfn_t gfn;
 727         int r;
 728
 729         if (!is_pae_paging(vcpu))
 730                 return false;
 731
 732         if (!test_bit(VCPU_EXREG_PDPTR,
 733                       (unsigned long *)&vcpu->arch.regs_avail))
 734                 return true;
 735
 736         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 737         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 738         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 739                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 740         if (r < 0)
 741                 goto out;
 742         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 743 out:
 744
 745         return changed;
 746 }
 747 EXPORT_SYMBOL_GPL(pdptrs_changed);
 748
 749 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 750 {
 751         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 752         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 753
 754         cr0 |= X86_CR0_ET;
 755
 756 #ifdef CONFIG_X86_64
 757         if (cr0 & 0xffffffff00000000UL)
 758                 return 1;
 759 #endif
 760
 761         cr0 &= ~CR0_RESERVED_BITS;
 762
 763         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 764                 return 1;
 765
 766         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 767                 return 1;
 768
 769         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 770 #ifdef CONFIG_X86_64
 771                 if ((vcpu->arch.efer & EFER_LME)) {
 772                         int cs_db, cs_l;
 773
 774                         if (!is_pae(vcpu))
 775                                 return 1;
 776                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 777                         if (cs_l)
 778                                 return 1;
 779                 } else
 780 #endif
 781                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 782                                                  kvm_read_cr3(vcpu)))
 783                         return 1;
 784         }
 785
 786         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 787                 return 1;
 788
 789         kvm_x86_ops->set_cr0(vcpu, cr0);
 790
 791         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 792                 kvm_clear_async_pf_completion_queue(vcpu);
 793                 kvm_async_pf_hash_reset(vcpu);
 794         }
 795
 796         if ((cr0 ^ old_cr0) & update_bits)
 797                 kvm_mmu_reset_context(vcpu);
 798
 799         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 800             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 801             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 802                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 803
 804         return 0;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 807
 808 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 809 {
 810         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 811 }
 812 EXPORT_SYMBOL_GPL(kvm_lmsw);
 813
 814 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 815 {
 816         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 817                         !vcpu->guest_xcr0_loaded) {
 818                 /* kvm_set_xcr() also depends on this */
 819                 if (vcpu->arch.xcr0 != host_xcr0)
 820                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 821                 vcpu->guest_xcr0_loaded = 1;
 822         }
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 825
 826 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 827 {
 828         if (vcpu->guest_xcr0_loaded) {
 829                 if (vcpu->arch.xcr0 != host_xcr0)
 830                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 831                 vcpu->guest_xcr0_loaded = 0;
 832         }
 833 }
 834 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 835
 836 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 837 {
 838         u64 xcr0 = xcr;
 839         u64 old_xcr0 = vcpu->arch.xcr0;
 840         u64 valid_bits;
 841
 842         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 843         if (index != XCR_XFEATURE_ENABLED_MASK)
 844                 return 1;
 845         if (!(xcr0 & XFEATURE_MASK_FP))
 846                 return 1;
 847         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 848                 return 1;
 849
 850         /*
 851          * Do not allow the guest to set bits that we do not support
 852          * saving.  However, xcr0 bit 0 is always set, even if the
 853          * emulated CPU does not support XSAVE (see fx_init).
 854          */
 855         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 856         if (xcr0 & ~valid_bits)
 857                 return 1;
 858
 859         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 860             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 861                 return 1;
 862
 863         if (xcr0 & XFEATURE_MASK_AVX512) {
 864                 if (!(xcr0 & XFEATURE_MASK_YMM))
 865                         return 1;
 866                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 867                         return 1;
 868         }
 869         vcpu->arch.xcr0 = xcr0;
 870
 871         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 872                 kvm_update_cpuid(vcpu);
 873         return 0;
 874 }
 875
 876 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 877 {
 878         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 879             __kvm_set_xcr(vcpu, index, xcr)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 886
 887 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 888 {
 889         if (cr4 & CR4_RESERVED_BITS)
 890                 return -EINVAL;
 891
 892         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 893                 return -EINVAL;
 894
 895         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 896                 return -EINVAL;
 897
 898         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 899                 return -EINVAL;
 900
 901         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 902                 return -EINVAL;
 903
 904         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 905                 return -EINVAL;
 906
 907         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 908                 return -EINVAL;
 909
 910         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 911                 return -EINVAL;
 912
 913         return 0;
 914 }
 915
 916 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 917 {
 918         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 919         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 920                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 921
 922         if (kvm_valid_cr4(vcpu, cr4))
 923                 return 1;
 924
 925         if (is_long_mode(vcpu)) {
 926                 if (!(cr4 & X86_CR4_PAE))
 927                         return 1;
 928         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 929                    && ((cr4 ^ old_cr4) & pdptr_bits)
 930                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 931                                    kvm_read_cr3(vcpu)))
 932                 return 1;
 933
 934         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 935                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 936                         return 1;
 937
 938                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 939                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 940                         return 1;
 941         }
 942
 943         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 944                 return 1;
 945
 946         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 947             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 948                 kvm_mmu_reset_context(vcpu);
 949
 950         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 951                 kvm_update_cpuid(vcpu);
 952
 953         return 0;
 954 }
 955 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 956
 957 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 958 {
 959         bool skip_tlb_flush = false;
 960 #ifdef CONFIG_X86_64
 961         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 962
 963         if (pcid_enabled) {
 964                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 965                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 966         }
 967 #endif
 968
 969         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 970                 if (!skip_tlb_flush) {
 971                         kvm_mmu_sync_roots(vcpu);
 972                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 973                 }
 974                 return 0;
 975         }
 976
 977         if (is_long_mode(vcpu) &&
 978             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 979                 return 1;
 980         else if (is_pae_paging(vcpu) &&
 981                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 982                 return 1;
 983
 984         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 985         vcpu->arch.cr3 = cr3;
 986         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 987
 988         return 0;
 989 }
 990 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 991
 992 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 993 {
 994         if (cr8 & CR8_RESERVED_BITS)
 995                 return 1;
 996         if (lapic_in_kernel(vcpu))
 997                 kvm_lapic_set_tpr(vcpu, cr8);
 998         else
 999                 vcpu->arch.cr8 = cr8;
1000         return 0;
1001 }
1002 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1003
1004 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1005 {
1006         if (lapic_in_kernel(vcpu))
1007                 return kvm_lapic_get_cr8(vcpu);
1008         else
1009                 return vcpu->arch.cr8;
1010 }
1011 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1012
1013 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1014 {
1015         int i;
1016
1017         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1018                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1019                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1020                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1021         }
1022 }
1023
1024 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1025 {
1026         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1027                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1028 }
1029
1030 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1031 {
1032         unsigned long dr7;
1033
1034         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1035                 dr7 = vcpu->arch.guest_debug_dr7;
1036         else
1037                 dr7 = vcpu->arch.dr7;
1038         kvm_x86_ops->set_dr7(vcpu, dr7);
1039         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1040         if (dr7 & DR7_BP_EN_MASK)
1041                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1042 }
1043
1044 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1045 {
1046         u64 fixed = DR6_FIXED_1;
1047
1048         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1049                 fixed |= DR6_RTM;
1050         return fixed;
1051 }
1052
1053 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1054 {
1055         switch (dr) {
1056         case 0 ... 3:
1057                 vcpu->arch.db[dr] = val;
1058                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1059                         vcpu->arch.eff_db[dr] = val;
1060                 break;
1061         case 4:
1062                 /* fall through */
1063         case 6:
1064                 if (val & 0xffffffff00000000ULL)
1065                         return -1; /* #GP */
1066                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1067                 kvm_update_dr6(vcpu);
1068                 break;
1069         case 5:
1070                 /* fall through */
1071         default: /* 7 */
1072                 if (val & 0xffffffff00000000ULL)
1073                         return -1; /* #GP */
1074                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1075                 kvm_update_dr7(vcpu);
1076                 break;
1077         }
1078
1079         return 0;
1080 }
1081
1082 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1083 {
1084         if (__kvm_set_dr(vcpu, dr, val)) {
1085                 kvm_inject_gp(vcpu, 0);
1086                 return 1;
1087         }
1088         return 0;
1089 }
1090 EXPORT_SYMBOL_GPL(kvm_set_dr);
1091
1092 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1093 {
1094         switch (dr) {
1095         case 0 ... 3:
1096                 *val = vcpu->arch.db[dr];
1097                 break;
1098         case 4:
1099                 /* fall through */
1100         case 6:
1101                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1102                         *val = vcpu->arch.dr6;
1103                 else
1104                         *val = kvm_x86_ops->get_dr6(vcpu);
1105                 break;
1106         case 5:
1107                 /* fall through */
1108         default: /* 7 */
1109                 *val = vcpu->arch.dr7;
1110                 break;
1111         }
1112         return 0;
1113 }
1114 EXPORT_SYMBOL_GPL(kvm_get_dr);
1115
1116 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1117 {
1118         u32 ecx = kvm_rcx_read(vcpu);
1119         u64 data;
1120         int err;
1121
1122         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1123         if (err)
1124                 return err;
1125         kvm_rax_write(vcpu, (u32)data);
1126         kvm_rdx_write(vcpu, data >> 32);
1127         return err;
1128 }
1129 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1130
1131 /*
1132  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1133  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1134  *
1135  * This list is modified at module load time to reflect the
1136  * capabilities of the host cpu. This capabilities test skips MSRs that are
1137  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1138  * may depend on host virtualization features rather than host cpu features.
1139  */
1140
1141 static u32 msrs_to_save[] = {
1142         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1143         MSR_STAR,
1144 #ifdef CONFIG_X86_64
1145         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1146 #endif
1147         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1148         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1149         MSR_IA32_SPEC_CTRL,
1150         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1151         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1152         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1153         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1154         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1155         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1156         MSR_IA32_UMWAIT_CONTROL,
1157
1158         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1159         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1160         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1161         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1162         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1163         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1168         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1169         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1170         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1171         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1172         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1180 };
1181
1182 static unsigned num_msrs_to_save;
1183
1184 static u32 emulated_msrs[] = {
1185         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1186         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1187         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1188         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1189         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1190         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1191         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1192         HV_X64_MSR_RESET,
1193         HV_X64_MSR_VP_INDEX,
1194         HV_X64_MSR_VP_RUNTIME,
1195         HV_X64_MSR_SCONTROL,
1196         HV_X64_MSR_STIMER0_CONFIG,
1197         HV_X64_MSR_VP_ASSIST_PAGE,
1198         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1199         HV_X64_MSR_TSC_EMULATION_STATUS,
1200
1201         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1202         MSR_KVM_PV_EOI_EN,
1203
1204         MSR_IA32_TSC_ADJUST,
1205         MSR_IA32_TSCDEADLINE,
1206         MSR_IA32_ARCH_CAPABILITIES,
1207         MSR_IA32_MISC_ENABLE,
1208         MSR_IA32_MCG_STATUS,
1209         MSR_IA32_MCG_CTL,
1210         MSR_IA32_MCG_EXT_CTL,
1211         MSR_IA32_SMBASE,
1212         MSR_SMI_COUNT,
1213         MSR_PLATFORM_INFO,
1214         MSR_MISC_FEATURES_ENABLES,
1215         MSR_AMD64_VIRT_SPEC_CTRL,
1216         MSR_IA32_POWER_CTL,
1217
1218         /*
1219          * The following list leaves out MSRs whose values are determined
1220          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1221          * We always support the "true" VMX control MSRs, even if the host
1222          * processor does not, so I am putting these registers here rather
1223          * than in msrs_to_save.
1224          */
1225         MSR_IA32_VMX_BASIC,
1226         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1227         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1228         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1229         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1230         MSR_IA32_VMX_MISC,
1231         MSR_IA32_VMX_CR0_FIXED0,
1232         MSR_IA32_VMX_CR4_FIXED0,
1233         MSR_IA32_VMX_VMCS_ENUM,
1234         MSR_IA32_VMX_PROCBASED_CTLS2,
1235         MSR_IA32_VMX_EPT_VPID_CAP,
1236         MSR_IA32_VMX_VMFUNC,
1237
1238         MSR_K7_HWCR,
1239         MSR_KVM_POLL_CONTROL,
1240 };
1241
1242 static unsigned num_emulated_msrs;
1243
1244 /*
1245  * List of msr numbers which are used to expose MSR-based features that
1246  * can be used by a hypervisor to validate requested CPU features.
1247  */
1248 static u32 msr_based_features[] = {
1249         MSR_IA32_VMX_BASIC,
1250         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1251         MSR_IA32_VMX_PINBASED_CTLS,
1252         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1253         MSR_IA32_VMX_PROCBASED_CTLS,
1254         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1255         MSR_IA32_VMX_EXIT_CTLS,
1256         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1257         MSR_IA32_VMX_ENTRY_CTLS,
1258         MSR_IA32_VMX_MISC,
1259         MSR_IA32_VMX_CR0_FIXED0,
1260         MSR_IA32_VMX_CR0_FIXED1,
1261         MSR_IA32_VMX_CR4_FIXED0,
1262         MSR_IA32_VMX_CR4_FIXED1,
1263         MSR_IA32_VMX_VMCS_ENUM,
1264         MSR_IA32_VMX_PROCBASED_CTLS2,
1265         MSR_IA32_VMX_EPT_VPID_CAP,
1266         MSR_IA32_VMX_VMFUNC,
1267
1268         MSR_F10H_DECFG,
1269         MSR_IA32_UCODE_REV,
1270         MSR_IA32_ARCH_CAPABILITIES,
1271 };
1272
1273 static unsigned int num_msr_based_features;
1274
1275 static u64 kvm_get_arch_capabilities(void)
1276 {
1277         u64 data = 0;
1278
1279         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1280                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1281
1282         /*
1283          * If we're doing cache flushes (either "always" or "cond")
1284          * we will do one whenever the guest does a vmlaunch/vmresume.
1285          * If an outer hypervisor is doing the cache flush for us
1286          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1287          * capability to the guest too, and if EPT is disabled we're not
1288          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1289          * require a nested hypervisor to do a flush of its own.
1290          */
1291         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1292                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1293
1294         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1295                 data |= ARCH_CAP_RDCL_NO;
1296         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1297                 data |= ARCH_CAP_SSB_NO;
1298         if (!boot_cpu_has_bug(X86_BUG_MDS))
1299                 data |= ARCH_CAP_MDS_NO;
1300
1301         return data;
1302 }
1303
1304 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1305 {
1306         switch (msr->index) {
1307         case MSR_IA32_ARCH_CAPABILITIES:
1308                 msr->data = kvm_get_arch_capabilities();
1309                 break;
1310         case MSR_IA32_UCODE_REV:
1311                 rdmsrl_safe(msr->index, &msr->data);
1312                 break;
1313         default:
1314                 if (kvm_x86_ops->get_msr_feature(msr))
1315                         return 1;
1316         }
1317         return 0;
1318 }
1319
1320 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1321 {
1322         struct kvm_msr_entry msr;
1323         int r;
1324
1325         msr.index = index;
1326         r = kvm_get_msr_feature(&msr);
1327         if (r)
1328                 return r;
1329
1330         *data = msr.data;
1331
1332         return 0;
1333 }
1334
1335 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1336 {
1337         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1338                 return false;
1339
1340         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1341                 return false;
1342
1343         if (efer & (EFER_LME | EFER_LMA) &&
1344             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1345                 return false;
1346
1347         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1348                 return false;
1349
1350         return true;
1351
1352 }
1353 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1354 {
1355         if (efer & efer_reserved_bits)
1356                 return false;
1357
1358         return __kvm_valid_efer(vcpu, efer);
1359 }
1360 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1361
1362 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1363 {
1364         u64 old_efer = vcpu->arch.efer;
1365         u64 efer = msr_info->data;
1366
1367         if (efer & efer_reserved_bits)
1368                 return 1;
1369
1370         if (!msr_info->host_initiated) {
1371                 if (!__kvm_valid_efer(vcpu, efer))
1372                         return 1;
1373
1374                 if (is_paging(vcpu) &&
1375                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1376                         return 1;
1377         }
1378
1379         efer &= ~EFER_LMA;
1380         efer |= vcpu->arch.efer & EFER_LMA;
1381
1382         kvm_x86_ops->set_efer(vcpu, efer);
1383
1384         /* Update reserved bits */
1385         if ((efer ^ old_efer) & EFER_NX)
1386                 kvm_mmu_reset_context(vcpu);
1387
1388         return 0;
1389 }
1390
1391 void kvm_enable_efer_bits(u64 mask)
1392 {
1393        efer_reserved_bits &= ~mask;
1394 }
1395 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1396
1397 /*
1398  * Write @data into the MSR specified by @index.  Select MSR specific fault
1399  * checks are bypassed if @host_initiated is %true.
1400  * Returns 0 on success, non-0 otherwise.
1401  * Assumes vcpu_load() was already called.
1402  */
1403 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1404                          bool host_initiated)
1405 {
1406         struct msr_data msr;
1407
1408         switch (index) {
1409         case MSR_FS_BASE:
1410         case MSR_GS_BASE:
1411         case MSR_KERNEL_GS_BASE:
1412         case MSR_CSTAR:
1413         case MSR_LSTAR:
1414                 if (is_noncanonical_address(data, vcpu))
1415                         return 1;
1416                 break;
1417         case MSR_IA32_SYSENTER_EIP:
1418         case MSR_IA32_SYSENTER_ESP:
1419                 /*
1420                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1421                  * non-canonical address is written on Intel but not on
1422                  * AMD (which ignores the top 32-bits, because it does
1423                  * not implement 64-bit SYSENTER).
1424                  *
1425                  * 64-bit code should hence be able to write a non-canonical
1426                  * value on AMD.  Making the address canonical ensures that
1427                  * vmentry does not fail on Intel after writing a non-canonical
1428                  * value, and that something deterministic happens if the guest
1429                  * invokes 64-bit SYSENTER.
1430                  */
1431                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1432         }
1433
1434         msr.data = data;
1435         msr.index = index;
1436         msr.host_initiated = host_initiated;
1437
1438         return kvm_x86_ops->set_msr(vcpu, &msr);
1439 }
1440
1441 /*
1442  * Read the MSR specified by @index into @data.  Select MSR specific fault
1443  * checks are bypassed if @host_initiated is %true.
1444  * Returns 0 on success, non-0 otherwise.
1445  * Assumes vcpu_load() was already called.
1446  */
1447 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1448                          bool host_initiated)
1449 {
1450         struct msr_data msr;
1451         int ret;
1452
1453         msr.index = index;
1454         msr.host_initiated = host_initiated;
1455
1456         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1457         if (!ret)
1458                 *data = msr.data;
1459         return ret;
1460 }
1461
1462 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1463 {
1464         return __kvm_get_msr(vcpu, index, data, false);
1465 }
1466 EXPORT_SYMBOL_GPL(kvm_get_msr);
1467
1468 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1469 {
1470         return __kvm_set_msr(vcpu, index, data, false);
1471 }
1472 EXPORT_SYMBOL_GPL(kvm_set_msr);
1473
1474 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1475 {
1476         u32 ecx = kvm_rcx_read(vcpu);
1477         u64 data;
1478
1479         if (kvm_get_msr(vcpu, ecx, &data)) {
1480                 trace_kvm_msr_read_ex(ecx);
1481                 kvm_inject_gp(vcpu, 0);
1482                 return 1;
1483         }
1484
1485         trace_kvm_msr_read(ecx, data);
1486
1487         kvm_rax_write(vcpu, data & -1u);
1488         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1489         return kvm_skip_emulated_instruction(vcpu);
1490 }
1491 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1492
1493 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1494 {
1495         u32 ecx = kvm_rcx_read(vcpu);
1496         u64 data = kvm_read_edx_eax(vcpu);
1497
1498         if (kvm_set_msr(vcpu, ecx, data)) {
1499                 trace_kvm_msr_write_ex(ecx, data);
1500                 kvm_inject_gp(vcpu, 0);
1501                 return 1;
1502         }
1503
1504         trace_kvm_msr_write(ecx, data);
1505         return kvm_skip_emulated_instruction(vcpu);
1506 }
1507 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1508
1509 /*
1510  * Adapt set_msr() to msr_io()'s calling convention
1511  */
1512 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1513 {
1514         return __kvm_get_msr(vcpu, index, data, true);
1515 }
1516
1517 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1518 {
1519         return __kvm_set_msr(vcpu, index, *data, true);
1520 }
1521
1522 #ifdef CONFIG_X86_64
1523 struct pvclock_gtod_data {
1524         seqcount_t      seq;
1525
1526         struct { /* extract of a clocksource struct */
1527                 int vclock_mode;
1528                 u64     cycle_last;
1529                 u64     mask;
1530                 u32     mult;
1531                 u32     shift;
1532         } clock;
1533
1534         u64             boot_ns;
1535         u64             nsec_base;
1536         u64             wall_time_sec;
1537 };
1538
1539 static struct pvclock_gtod_data pvclock_gtod_data;
1540
1541 static void update_pvclock_gtod(struct timekeeper *tk)
1542 {
1543         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1544         u64 boot_ns;
1545
1546         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1547
1548         write_seqcount_begin(&vdata->seq);
1549
1550         /* copy pvclock gtod data */
1551         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1552         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1553         vdata->clock.mask               = tk->tkr_mono.mask;
1554         vdata->clock.mult               = tk->tkr_mono.mult;
1555         vdata->clock.shift              = tk->tkr_mono.shift;
1556
1557         vdata->boot_ns                  = boot_ns;
1558         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1559
1560         vdata->wall_time_sec            = tk->xtime_sec;
1561
1562         write_seqcount_end(&vdata->seq);
1563 }
1564 #endif
1565
1566 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1567 {
1568         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1569         kvm_vcpu_kick(vcpu);
1570 }
1571
1572 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1573 {
1574         int version;
1575         int r;
1576         struct pvclock_wall_clock wc;
1577         struct timespec64 boot;
1578
1579         if (!wall_clock)
1580                 return;
1581
1582         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1583         if (r)
1584                 return;
1585
1586         if (version & 1)
1587                 ++version;  /* first time write, random junk */
1588
1589         ++version;
1590
1591         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1592                 return;
1593
1594         /*
1595          * The guest calculates current wall clock time by adding
1596          * system time (updated by kvm_guest_time_update below) to the
1597          * wall clock specified here.  guest system time equals host
1598          * system time for us, thus we must fill in host boot time here.
1599          */
1600         getboottime64(&boot);
1601
1602         if (kvm->arch.kvmclock_offset) {
1603                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1604                 boot = timespec64_sub(boot, ts);
1605         }
1606         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1607         wc.nsec = boot.tv_nsec;
1608         wc.version = version;
1609
1610         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1611
1612         version++;
1613         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1614 }
1615
1616 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1617 {
1618         do_shl32_div32(dividend, divisor);
1619         return dividend;
1620 }
1621
1622 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1623                                s8 *pshift, u32 *pmultiplier)
1624 {
1625         uint64_t scaled64;
1626         int32_t  shift = 0;
1627         uint64_t tps64;
1628         uint32_t tps32;
1629
1630         tps64 = base_hz;
1631         scaled64 = scaled_hz;
1632         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1633                 tps64 >>= 1;
1634                 shift--;
1635         }
1636
1637         tps32 = (uint32_t)tps64;
1638         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1639                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1640                         scaled64 >>= 1;
1641                 else
1642                         tps32 <<= 1;
1643                 shift++;
1644         }
1645
1646         *pshift = shift;
1647         *pmultiplier = div_frac(scaled64, tps32);
1648 }
1649
1650 #ifdef CONFIG_X86_64
1651 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1652 #endif
1653
1654 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1655 static unsigned long max_tsc_khz;
1656
1657 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1658 {
1659         u64 v = (u64)khz * (1000000 + ppm);
1660         do_div(v, 1000000);
1661         return v;
1662 }
1663
1664 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1665 {
1666         u64 ratio;
1667
1668         /* Guest TSC same frequency as host TSC? */
1669         if (!scale) {
1670                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1671                 return 0;
1672         }
1673
1674         /* TSC scaling supported? */
1675         if (!kvm_has_tsc_control) {
1676                 if (user_tsc_khz > tsc_khz) {
1677                         vcpu->arch.tsc_catchup = 1;
1678                         vcpu->arch.tsc_always_catchup = 1;
1679                         return 0;
1680                 } else {
1681                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1682                         return -1;
1683                 }
1684         }
1685
1686         /* TSC scaling required  - calculate ratio */
1687         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1688                                 user_tsc_khz, tsc_khz);
1689
1690         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1691                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1692                                     user_tsc_khz);
1693                 return -1;
1694         }
1695
1696         vcpu->arch.tsc_scaling_ratio = ratio;
1697         return 0;
1698 }
1699
1700 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1701 {
1702         u32 thresh_lo, thresh_hi;
1703         int use_scaling = 0;
1704
1705         /* tsc_khz can be zero if TSC calibration fails */
1706         if (user_tsc_khz == 0) {
1707                 /* set tsc_scaling_ratio to a safe value */
1708                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1709                 return -1;
1710         }
1711
1712         /* Compute a scale to convert nanoseconds in TSC cycles */
1713         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1714                            &vcpu->arch.virtual_tsc_shift,
1715                            &vcpu->arch.virtual_tsc_mult);
1716         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1717
1718         /*
1719          * Compute the variation in TSC rate which is acceptable
1720          * within the range of tolerance and decide if the
1721          * rate being applied is within that bounds of the hardware
1722          * rate.  If so, no scaling or compensation need be done.
1723          */
1724         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1725         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1726         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1727                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1728                 use_scaling = 1;
1729         }
1730         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1731 }
1732
1733 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1734 {
1735         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1736                                       vcpu->arch.virtual_tsc_mult,
1737                                       vcpu->arch.virtual_tsc_shift);
1738         tsc += vcpu->arch.this_tsc_write;
1739         return tsc;
1740 }
1741
1742 static inline int gtod_is_based_on_tsc(int mode)
1743 {
1744         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1745 }
1746
1747 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1748 {
1749 #ifdef CONFIG_X86_64
1750         bool vcpus_matched;
1751         struct kvm_arch *ka = &vcpu->kvm->arch;
1752         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1753
1754         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1755                          atomic_read(&vcpu->kvm->online_vcpus));
1756
1757         /*
1758          * Once the masterclock is enabled, always perform request in
1759          * order to update it.
1760          *
1761          * In order to enable masterclock, the host clocksource must be TSC
1762          * and the vcpus need to have matched TSCs.  When that happens,
1763          * perform request to enable masterclock.
1764          */
1765         if (ka->use_master_clock ||
1766             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1767                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1768
1769         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1770                             atomic_read(&vcpu->kvm->online_vcpus),
1771                             ka->use_master_clock, gtod->clock.vclock_mode);
1772 #endif
1773 }
1774
1775 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1776 {
1777         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1778         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1779 }
1780
1781 /*
1782  * Multiply tsc by a fixed point number represented by ratio.
1783  *
1784  * The most significant 64-N bits (mult) of ratio represent the
1785  * integral part of the fixed point number; the remaining N bits
1786  * (frac) represent the fractional part, ie. ratio represents a fixed
1787  * point number (mult + frac * 2^(-N)).
1788  *
1789  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1790  */
1791 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1792 {
1793         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1794 }
1795
1796 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1797 {
1798         u64 _tsc = tsc;
1799         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1800
1801         if (ratio != kvm_default_tsc_scaling_ratio)
1802                 _tsc = __scale_tsc(ratio, tsc);
1803
1804         return _tsc;
1805 }
1806 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1807
1808 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1809 {
1810         u64 tsc;
1811
1812         tsc = kvm_scale_tsc(vcpu, rdtsc());
1813
1814         return target_tsc - tsc;
1815 }
1816
1817 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1818 {
1819         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1820
1821         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1822 }
1823 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1824
1825 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1826 {
1827         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1828 }
1829
1830 static inline bool kvm_check_tsc_unstable(void)
1831 {
1832 #ifdef CONFIG_X86_64
1833         /*
1834          * TSC is marked unstable when we're running on Hyper-V,
1835          * 'TSC page' clocksource is good.
1836          */
1837         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1838                 return false;
1839 #endif
1840         return check_tsc_unstable();
1841 }
1842
1843 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1844 {
1845         struct kvm *kvm = vcpu->kvm;
1846         u64 offset, ns, elapsed;
1847         unsigned long flags;
1848         bool matched;
1849         bool already_matched;
1850         u64 data = msr->data;
1851         bool synchronizing = false;
1852
1853         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1854         offset = kvm_compute_tsc_offset(vcpu, data);
1855         ns = ktime_get_boottime_ns();
1856         elapsed = ns - kvm->arch.last_tsc_nsec;
1857
1858         if (vcpu->arch.virtual_tsc_khz) {
1859                 if (data == 0 && msr->host_initiated) {
1860                         /*
1861                          * detection of vcpu initialization -- need to sync
1862                          * with other vCPUs. This particularly helps to keep
1863                          * kvm_clock stable after CPU hotplug
1864                          */
1865                         synchronizing = true;
1866                 } else {
1867                         u64 tsc_exp = kvm->arch.last_tsc_write +
1868                                                 nsec_to_cycles(vcpu, elapsed);
1869                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1870                         /*
1871                          * Special case: TSC write with a small delta (1 second)
1872                          * of virtual cycle time against real time is
1873                          * interpreted as an attempt to synchronize the CPU.
1874                          */
1875                         synchronizing = data < tsc_exp + tsc_hz &&
1876                                         data + tsc_hz > tsc_exp;
1877                 }
1878         }
1879
1880         /*
1881          * For a reliable TSC, we can match TSC offsets, and for an unstable
1882          * TSC, we add elapsed time in this computation.  We could let the
1883          * compensation code attempt to catch up if we fall behind, but
1884          * it's better to try to match offsets from the beginning.
1885          */
1886         if (synchronizing &&
1887             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1888                 if (!kvm_check_tsc_unstable()) {
1889                         offset = kvm->arch.cur_tsc_offset;
1890                 } else {
1891                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1892                         data += delta;
1893                         offset = kvm_compute_tsc_offset(vcpu, data);
1894                 }
1895                 matched = true;
1896                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1897         } else {
1898                 /*
1899                  * We split periods of matched TSC writes into generations.
1900                  * For each generation, we track the original measured
1901                  * nanosecond time, offset, and write, so if TSCs are in
1902                  * sync, we can match exact offset, and if not, we can match
1903                  * exact software computation in compute_guest_tsc()
1904                  *
1905                  * These values are tracked in kvm->arch.cur_xxx variables.
1906                  */
1907                 kvm->arch.cur_tsc_generation++;
1908                 kvm->arch.cur_tsc_nsec = ns;
1909                 kvm->arch.cur_tsc_write = data;
1910                 kvm->arch.cur_tsc_offset = offset;
1911                 matched = false;
1912         }
1913
1914         /*
1915          * We also track th most recent recorded KHZ, write and time to
1916          * allow the matching interval to be extended at each write.
1917          */
1918         kvm->arch.last_tsc_nsec = ns;
1919         kvm->arch.last_tsc_write = data;
1920         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1921
1922         vcpu->arch.last_guest_tsc = data;
1923
1924         /* Keep track of which generation this VCPU has synchronized to */
1925         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1926         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1927         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1928
1929         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1930                 update_ia32_tsc_adjust_msr(vcpu, offset);
1931
1932         kvm_vcpu_write_tsc_offset(vcpu, offset);
1933         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1934
1935         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1936         if (!matched) {
1937                 kvm->arch.nr_vcpus_matched_tsc = 0;
1938         } else if (!already_matched) {
1939                 kvm->arch.nr_vcpus_matched_tsc++;
1940         }
1941
1942         kvm_track_tsc_matching(vcpu);
1943         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1944 }
1945
1946 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1947
1948 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1949                                            s64 adjustment)
1950 {
1951         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1952         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1953 }
1954
1955 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1956 {
1957         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1958                 WARN_ON(adjustment < 0);
1959         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1960         adjust_tsc_offset_guest(vcpu, adjustment);
1961 }
1962
1963 #ifdef CONFIG_X86_64
1964
1965 static u64 read_tsc(void)
1966 {
1967         u64 ret = (u64)rdtsc_ordered();
1968         u64 last = pvclock_gtod_data.clock.cycle_last;
1969
1970         if (likely(ret >= last))
1971                 return ret;
1972
1973         /*
1974          * GCC likes to generate cmov here, but this branch is extremely
1975          * predictable (it's just a function of time and the likely is
1976          * very likely) and there's a data dependence, so force GCC
1977          * to generate a branch instead.  I don't barrier() because
1978          * we don't actually need a barrier, and if this function
1979          * ever gets inlined it will generate worse code.
1980          */
1981         asm volatile ("");
1982         return last;
1983 }
1984
1985 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1986 {
1987         long v;
1988         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1989         u64 tsc_pg_val;
1990
1991         switch (gtod->clock.vclock_mode) {
1992         case VCLOCK_HVCLOCK:
1993                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1994                                                   tsc_timestamp);
1995                 if (tsc_pg_val != U64_MAX) {
1996                         /* TSC page valid */
1997                         *mode = VCLOCK_HVCLOCK;
1998                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1999                                 gtod->clock.mask;
2000                 } else {
2001                         /* TSC page invalid */
2002                         *mode = VCLOCK_NONE;
2003                 }
2004                 break;
2005         case VCLOCK_TSC:
2006                 *mode = VCLOCK_TSC;
2007                 *tsc_timestamp = read_tsc();
2008                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2009                         gtod->clock.mask;
2010                 break;
2011         default:
2012                 *mode = VCLOCK_NONE;
2013         }
2014
2015         if (*mode == VCLOCK_NONE)
2016                 *tsc_timestamp = v = 0;
2017
2018         return v * gtod->clock.mult;
2019 }
2020
2021 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2022 {
2023         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2024         unsigned long seq;
2025         int mode;
2026         u64 ns;
2027
2028         do {
2029                 seq = read_seqcount_begin(&gtod->seq);
2030                 ns = gtod->nsec_base;
2031                 ns += vgettsc(tsc_timestamp, &mode);
2032                 ns >>= gtod->clock.shift;
2033                 ns += gtod->boot_ns;
2034         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2035         *t = ns;
2036
2037         return mode;
2038 }
2039
2040 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2041 {
2042         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2043         unsigned long seq;
2044         int mode;
2045         u64 ns;
2046
2047         do {
2048                 seq = read_seqcount_begin(&gtod->seq);
2049                 ts->tv_sec = gtod->wall_time_sec;
2050                 ns = gtod->nsec_base;
2051                 ns += vgettsc(tsc_timestamp, &mode);
2052                 ns >>= gtod->clock.shift;
2053         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2054
2055         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2056         ts->tv_nsec = ns;
2057
2058         return mode;
2059 }
2060
2061 /* returns true if host is using TSC based clocksource */
2062 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2063 {
2064         /* checked again under seqlock below */
2065         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2066                 return false;
2067
2068         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2069                                                       tsc_timestamp));
2070 }
2071
2072 /* returns true if host is using TSC based clocksource */
2073 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2074                                            u64 *tsc_timestamp)
2075 {
2076         /* checked again under seqlock below */
2077         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2078                 return false;
2079
2080         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2081 }
2082 #endif
2083
2084 /*
2085  *
2086  * Assuming a stable TSC across physical CPUS, and a stable TSC
2087  * across virtual CPUs, the following condition is possible.
2088  * Each numbered line represents an event visible to both
2089  * CPUs at the next numbered event.
2090  *
2091  * "timespecX" represents host monotonic time. "tscX" represents
2092  * RDTSC value.
2093  *
2094  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2095  *
2096  * 1.  read timespec0,tsc0
2097  * 2.                                   | timespec1 = timespec0 + N
2098  *                                      | tsc1 = tsc0 + M
2099  * 3. transition to guest               | transition to guest
2100  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2101  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2102  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2103  *
2104  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2105  *
2106  *      - ret0 < ret1
2107  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2108  *              ...
2109  *      - 0 < N - M => M < N
2110  *
2111  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2112  * always the case (the difference between two distinct xtime instances
2113  * might be smaller then the difference between corresponding TSC reads,
2114  * when updating guest vcpus pvclock areas).
2115  *
2116  * To avoid that problem, do not allow visibility of distinct
2117  * system_timestamp/tsc_timestamp values simultaneously: use a master
2118  * copy of host monotonic time values. Update that master copy
2119  * in lockstep.
2120  *
2121  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2122  *
2123  */
2124
2125 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2126 {
2127 #ifdef CONFIG_X86_64
2128         struct kvm_arch *ka = &kvm->arch;
2129         int vclock_mode;
2130         bool host_tsc_clocksource, vcpus_matched;
2131
2132         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2133                         atomic_read(&kvm->online_vcpus));
2134
2135         /*
2136          * If the host uses TSC clock, then passthrough TSC as stable
2137          * to the guest.
2138          */
2139         host_tsc_clocksource = kvm_get_time_and_clockread(
2140                                         &ka->master_kernel_ns,
2141                                         &ka->master_cycle_now);
2142
2143         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2144                                 && !ka->backwards_tsc_observed
2145                                 && !ka->boot_vcpu_runs_old_kvmclock;
2146
2147         if (ka->use_master_clock)
2148                 atomic_set(&kvm_guest_has_master_clock, 1);
2149
2150         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2151         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2152                                         vcpus_matched);
2153 #endif
2154 }
2155
2156 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2157 {
2158         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2159 }
2160
2161 static void kvm_gen_update_masterclock(struct kvm *kvm)
2162 {
2163 #ifdef CONFIG_X86_64
2164         int i;
2165         struct kvm_vcpu *vcpu;
2166         struct kvm_arch *ka = &kvm->arch;
2167
2168         spin_lock(&ka->pvclock_gtod_sync_lock);
2169         kvm_make_mclock_inprogress_request(kvm);
2170         /* no guest entries from this point */
2171         pvclock_update_vm_gtod_copy(kvm);
2172
2173         kvm_for_each_vcpu(i, vcpu, kvm)
2174                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2175
2176         /* guest entries allowed */
2177         kvm_for_each_vcpu(i, vcpu, kvm)
2178                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2179
2180         spin_unlock(&ka->pvclock_gtod_sync_lock);
2181 #endif
2182 }
2183
2184 u64 get_kvmclock_ns(struct kvm *kvm)
2185 {
2186         struct kvm_arch *ka = &kvm->arch;
2187         struct pvclock_vcpu_time_info hv_clock;
2188         u64 ret;
2189
2190         spin_lock(&ka->pvclock_gtod_sync_lock);
2191         if (!ka->use_master_clock) {
2192                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2193                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2194         }
2195
2196         hv_clock.tsc_timestamp = ka->master_cycle_now;
2197         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2198         spin_unlock(&ka->pvclock_gtod_sync_lock);
2199
2200         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2201         get_cpu();
2202
2203         if (__this_cpu_read(cpu_tsc_khz)) {
2204                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2205                                    &hv_clock.tsc_shift,
2206                                    &hv_clock.tsc_to_system_mul);
2207                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2208         } else
2209                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2210
2211         put_cpu();
2212
2213         return ret;
2214 }
2215
2216 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2217 {
2218         struct kvm_vcpu_arch *vcpu = &v->arch;
2219         struct pvclock_vcpu_time_info guest_hv_clock;
2220
2221         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2222                 &guest_hv_clock, sizeof(guest_hv_clock))))
2223                 return;
2224
2225         /* This VCPU is paused, but it's legal for a guest to read another
2226          * VCPU's kvmclock, so we really have to follow the specification where
2227          * it says that version is odd if data is being modified, and even after
2228          * it is consistent.
2229          *
2230          * Version field updates must be kept separate.  This is because
2231          * kvm_write_guest_cached might use a "rep movs" instruction, and
2232          * writes within a string instruction are weakly ordered.  So there
2233          * are three writes overall.
2234          *
2235          * As a small optimization, only write the version field in the first
2236          * and third write.  The vcpu->pv_time cache is still valid, because the
2237          * version field is the first in the struct.
2238          */
2239         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2240
2241         if (guest_hv_clock.version & 1)
2242                 ++guest_hv_clock.version;  /* first time write, random junk */
2243
2244         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2245         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2246                                 &vcpu->hv_clock,
2247                                 sizeof(vcpu->hv_clock.version));
2248
2249         smp_wmb();
2250
2251         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2252         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2253
2254         if (vcpu->pvclock_set_guest_stopped_request) {
2255                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2256                 vcpu->pvclock_set_guest_stopped_request = false;
2257         }
2258
2259         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2260
2261         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2262                                 &vcpu->hv_clock,
2263                                 sizeof(vcpu->hv_clock));
2264
2265         smp_wmb();
2266
2267         vcpu->hv_clock.version++;
2268         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2269                                 &vcpu->hv_clock,
2270                                 sizeof(vcpu->hv_clock.version));
2271 }
2272
2273 static int kvm_guest_time_update(struct kvm_vcpu *v)
2274 {
2275         unsigned long flags, tgt_tsc_khz;
2276         struct kvm_vcpu_arch *vcpu = &v->arch;
2277         struct kvm_arch *ka = &v->kvm->arch;
2278         s64 kernel_ns;
2279         u64 tsc_timestamp, host_tsc;
2280         u8 pvclock_flags;
2281         bool use_master_clock;
2282
2283         kernel_ns = 0;
2284         host_tsc = 0;
2285
2286         /*
2287          * If the host uses TSC clock, then passthrough TSC as stable
2288          * to the guest.
2289          */
2290         spin_lock(&ka->pvclock_gtod_sync_lock);
2291         use_master_clock = ka->use_master_clock;
2292         if (use_master_clock) {
2293                 host_tsc = ka->master_cycle_now;
2294                 kernel_ns = ka->master_kernel_ns;
2295         }
2296         spin_unlock(&ka->pvclock_gtod_sync_lock);
2297
2298         /* Keep irq disabled to prevent changes to the clock */
2299         local_irq_save(flags);
2300         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2301         if (unlikely(tgt_tsc_khz == 0)) {
2302                 local_irq_restore(flags);
2303                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2304                 return 1;
2305         }
2306         if (!use_master_clock) {
2307                 host_tsc = rdtsc();
2308                 kernel_ns = ktime_get_boottime_ns();
2309         }
2310
2311         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2312
2313         /*
2314          * We may have to catch up the TSC to match elapsed wall clock
2315          * time for two reasons, even if kvmclock is used.
2316          *   1) CPU could have been running below the maximum TSC rate
2317          *   2) Broken TSC compensation resets the base at each VCPU
2318          *      entry to avoid unknown leaps of TSC even when running
2319          *      again on the same CPU.  This may cause apparent elapsed
2320          *      time to disappear, and the guest to stand still or run
2321          *      very slowly.
2322          */
2323         if (vcpu->tsc_catchup) {
2324                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2325                 if (tsc > tsc_timestamp) {
2326                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2327                         tsc_timestamp = tsc;
2328                 }
2329         }
2330
2331         local_irq_restore(flags);
2332
2333         /* With all the info we got, fill in the values */
2334
2335         if (kvm_has_tsc_control)
2336                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2337
2338         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2339                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2340                                    &vcpu->hv_clock.tsc_shift,
2341                                    &vcpu->hv_clock.tsc_to_system_mul);
2342                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2343         }
2344
2345         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2346         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2347         vcpu->last_guest_tsc = tsc_timestamp;
2348
2349         /* If the host uses TSC clocksource, then it is stable */
2350         pvclock_flags = 0;
2351         if (use_master_clock)
2352                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2353
2354         vcpu->hv_clock.flags = pvclock_flags;
2355
2356         if (vcpu->pv_time_enabled)
2357                 kvm_setup_pvclock_page(v);
2358         if (v == kvm_get_vcpu(v->kvm, 0))
2359                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2360         return 0;
2361 }
2362
2363 /*
2364  * kvmclock updates which are isolated to a given vcpu, such as
2365  * vcpu->cpu migration, should not allow system_timestamp from
2366  * the rest of the vcpus to remain static. Otherwise ntp frequency
2367  * correction applies to one vcpu's system_timestamp but not
2368  * the others.
2369  *
2370  * So in those cases, request a kvmclock update for all vcpus.
2371  * We need to rate-limit these requests though, as they can
2372  * considerably slow guests that have a large number of vcpus.
2373  * The time for a remote vcpu to update its kvmclock is bound
2374  * by the delay we use to rate-limit the updates.
2375  */
2376
2377 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2378
2379 static void kvmclock_update_fn(struct work_struct *work)
2380 {
2381         int i;
2382         struct delayed_work *dwork = to_delayed_work(work);
2383         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2384                                            kvmclock_update_work);
2385         struct kvm *kvm = container_of(ka, struct kvm, arch);
2386         struct kvm_vcpu *vcpu;
2387
2388         kvm_for_each_vcpu(i, vcpu, kvm) {
2389                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2390                 kvm_vcpu_kick(vcpu);
2391         }
2392 }
2393
2394 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2395 {
2396         struct kvm *kvm = v->kvm;
2397
2398         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2399         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2400                                         KVMCLOCK_UPDATE_DELAY);
2401 }
2402
2403 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2404
2405 static void kvmclock_sync_fn(struct work_struct *work)
2406 {
2407         struct delayed_work *dwork = to_delayed_work(work);
2408         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2409                                            kvmclock_sync_work);
2410         struct kvm *kvm = container_of(ka, struct kvm, arch);
2411
2412         if (!kvmclock_periodic_sync)
2413                 return;
2414
2415         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2416         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2417                                         KVMCLOCK_SYNC_PERIOD);
2418 }
2419
2420 /*
2421  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2422  */
2423 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2424 {
2425         /* McStatusWrEn enabled? */
2426         if (guest_cpuid_is_amd(vcpu))
2427                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2428
2429         return false;
2430 }
2431
2432 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2433 {
2434         u64 mcg_cap = vcpu->arch.mcg_cap;
2435         unsigned bank_num = mcg_cap & 0xff;
2436         u32 msr = msr_info->index;
2437         u64 data = msr_info->data;
2438
2439         switch (msr) {
2440         case MSR_IA32_MCG_STATUS:
2441                 vcpu->arch.mcg_status = data;
2442                 break;
2443         case MSR_IA32_MCG_CTL:
2444                 if (!(mcg_cap & MCG_CTL_P) &&
2445                     (data || !msr_info->host_initiated))
2446                         return 1;
2447                 if (data != 0 && data != ~(u64)0)
2448                         return 1;
2449                 vcpu->arch.mcg_ctl = data;
2450                 break;
2451         default:
2452                 if (msr >= MSR_IA32_MC0_CTL &&
2453                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2454                         u32 offset = msr - MSR_IA32_MC0_CTL;
2455                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2456                          * some Linux kernels though clear bit 10 in bank 4 to
2457                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2458                          * this to avoid an uncatched #GP in the guest
2459                          */
2460                         if ((offset & 0x3) == 0 &&
2461                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2462                                 return -1;
2463
2464                         /* MCi_STATUS */
2465                         if (!msr_info->host_initiated &&
2466                             (offset & 0x3) == 1 && data != 0) {
2467                                 if (!can_set_mci_status(vcpu))
2468                                         return -1;
2469                         }
2470
2471                         vcpu->arch.mce_banks[offset] = data;
2472                         break;
2473                 }
2474                 return 1;
2475         }
2476         return 0;
2477 }
2478
2479 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2480 {
2481         struct kvm *kvm = vcpu->kvm;
2482         int lm = is_long_mode(vcpu);
2483         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2484                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2485         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2486                 : kvm->arch.xen_hvm_config.blob_size_32;
2487         u32 page_num = data & ~PAGE_MASK;
2488         u64 page_addr = data & PAGE_MASK;
2489         u8 *page;
2490         int r;
2491
2492         r = -E2BIG;
2493         if (page_num >= blob_size)
2494                 goto out;
2495         r = -ENOMEM;
2496         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2497         if (IS_ERR(page)) {
2498                 r = PTR_ERR(page);
2499                 goto out;
2500         }
2501         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2502                 goto out_free;
2503         r = 0;
2504 out_free:
2505         kfree(page);
2506 out:
2507         return r;
2508 }
2509
2510 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2511 {
2512         gpa_t gpa = data & ~0x3f;
2513
2514         /* Bits 3:5 are reserved, Should be zero */
2515         if (data & 0x38)
2516                 return 1;
2517
2518         vcpu->arch.apf.msr_val = data;
2519
2520         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2521                 kvm_clear_async_pf_completion_queue(vcpu);
2522                 kvm_async_pf_hash_reset(vcpu);
2523                 return 0;
2524         }
2525
2526         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2527                                         sizeof(u32)))
2528                 return 1;
2529
2530         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2531         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2532         kvm_async_pf_wakeup_all(vcpu);
2533         return 0;
2534 }
2535
2536 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2537 {
2538         vcpu->arch.pv_time_enabled = false;
2539         vcpu->arch.time = 0;
2540 }
2541
2542 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2543 {
2544         ++vcpu->stat.tlb_flush;
2545         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2546 }
2547
2548 static void record_steal_time(struct kvm_vcpu *vcpu)
2549 {
2550         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2551                 return;
2552
2553         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2554                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2555                 return;
2556
2557         /*
2558          * Doing a TLB flush here, on the guest's behalf, can avoid
2559          * expensive IPIs.
2560          */
2561         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2562                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2563         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2564                 kvm_vcpu_flush_tlb(vcpu, false);
2565
2566         if (vcpu->arch.st.steal.version & 1)
2567                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2568
2569         vcpu->arch.st.steal.version += 1;
2570
2571         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2572                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2573
2574         smp_wmb();
2575
2576         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2577                 vcpu->arch.st.last_steal;
2578         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2579
2580         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2581                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2582
2583         smp_wmb();
2584
2585         vcpu->arch.st.steal.version += 1;
2586
2587         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2588                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2589 }
2590
2591 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2592 {
2593         bool pr = false;
2594         u32 msr = msr_info->index;
2595         u64 data = msr_info->data;
2596
2597         switch (msr) {
2598         case MSR_AMD64_NB_CFG:
2599         case MSR_IA32_UCODE_WRITE:
2600         case MSR_VM_HSAVE_PA:
2601         case MSR_AMD64_PATCH_LOADER:
2602         case MSR_AMD64_BU_CFG2:
2603         case MSR_AMD64_DC_CFG:
2604         case MSR_F15H_EX_CFG:
2605                 break;
2606
2607         case MSR_IA32_UCODE_REV:
2608                 if (msr_info->host_initiated)
2609                         vcpu->arch.microcode_version = data;
2610                 break;
2611         case MSR_IA32_ARCH_CAPABILITIES:
2612                 if (!msr_info->host_initiated)
2613                         return 1;
2614                 vcpu->arch.arch_capabilities = data;
2615                 break;
2616         case MSR_EFER:
2617                 return set_efer(vcpu, msr_info);
2618         case MSR_K7_HWCR:
2619                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2620                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2621                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2622
2623                 /* Handle McStatusWrEn */
2624                 if (data == BIT_ULL(18)) {
2625                         vcpu->arch.msr_hwcr = data;
2626                 } else if (data != 0) {
2627                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2628                                     data);
2629                         return 1;
2630                 }
2631                 break;
2632         case MSR_FAM10H_MMIO_CONF_BASE:
2633                 if (data != 0) {
2634                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2635                                     "0x%llx\n", data);
2636                         return 1;
2637                 }
2638                 break;
2639         case MSR_IA32_DEBUGCTLMSR:
2640                 if (!data) {
2641                         /* We support the non-activated case already */
2642                         break;
2643                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2644                         /* Values other than LBR and BTF are vendor-specific,
2645                            thus reserved and should throw a #GP */
2646                         return 1;
2647                 }
2648                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2649                             __func__, data);
2650                 break;
2651         case 0x200 ... 0x2ff:
2652                 return kvm_mtrr_set_msr(vcpu, msr, data);
2653         case MSR_IA32_APICBASE:
2654                 return kvm_set_apic_base(vcpu, msr_info);
2655         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2656                 return kvm_x2apic_msr_write(vcpu, msr, data);
2657         case MSR_IA32_TSCDEADLINE:
2658                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2659                 break;
2660         case MSR_IA32_TSC_ADJUST:
2661                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2662                         if (!msr_info->host_initiated) {
2663                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2664                                 adjust_tsc_offset_guest(vcpu, adj);
2665                         }
2666                         vcpu->arch.ia32_tsc_adjust_msr = data;
2667                 }
2668                 break;
2669         case MSR_IA32_MISC_ENABLE:
2670                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2671                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2672                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2673                                 return 1;
2674                         vcpu->arch.ia32_misc_enable_msr = data;
2675                         kvm_update_cpuid(vcpu);
2676                 } else {
2677                         vcpu->arch.ia32_misc_enable_msr = data;
2678                 }
2679                 break;
2680         case MSR_IA32_SMBASE:
2681                 if (!msr_info->host_initiated)
2682                         return 1;
2683                 vcpu->arch.smbase = data;
2684                 break;
2685         case MSR_IA32_POWER_CTL:
2686                 vcpu->arch.msr_ia32_power_ctl = data;
2687                 break;
2688         case MSR_IA32_TSC:
2689                 kvm_write_tsc(vcpu, msr_info);
2690                 break;
2691         case MSR_SMI_COUNT:
2692                 if (!msr_info->host_initiated)
2693                         return 1;
2694                 vcpu->arch.smi_count = data;
2695                 break;
2696         case MSR_KVM_WALL_CLOCK_NEW:
2697         case MSR_KVM_WALL_CLOCK:
2698                 vcpu->kvm->arch.wall_clock = data;
2699                 kvm_write_wall_clock(vcpu->kvm, data);
2700                 break;
2701         case MSR_KVM_SYSTEM_TIME_NEW:
2702         case MSR_KVM_SYSTEM_TIME: {
2703                 struct kvm_arch *ka = &vcpu->kvm->arch;
2704
2705                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2706                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2707
2708                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2709                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2710
2711                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2712                 }
2713
2714                 vcpu->arch.time = data;
2715                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2716
2717                 /* we verify if the enable bit is set... */
2718                 vcpu->arch.pv_time_enabled = false;
2719                 if (!(data & 1))
2720                         break;
2721
2722                 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2723                      &vcpu->arch.pv_time, data & ~1ULL,
2724                      sizeof(struct pvclock_vcpu_time_info)))
2725                         vcpu->arch.pv_time_enabled = true;
2726
2727                 break;
2728         }
2729         case MSR_KVM_ASYNC_PF_EN:
2730                 if (kvm_pv_enable_async_pf(vcpu, data))
2731                         return 1;
2732                 break;
2733         case MSR_KVM_STEAL_TIME:
2734
2735                 if (unlikely(!sched_info_on()))
2736                         return 1;
2737
2738                 if (data & KVM_STEAL_RESERVED_MASK)
2739                         return 1;
2740
2741                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2742                                                 data & KVM_STEAL_VALID_BITS,
2743                                                 sizeof(struct kvm_steal_time)))
2744                         return 1;
2745
2746                 vcpu->arch.st.msr_val = data;
2747
2748                 if (!(data & KVM_MSR_ENABLED))
2749                         break;
2750
2751                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2752
2753                 break;
2754         case MSR_KVM_PV_EOI_EN:
2755                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2756                         return 1;
2757                 break;
2758
2759         case MSR_KVM_POLL_CONTROL:
2760                 /* only enable bit supported */
2761                 if (data & (-1ULL << 1))
2762                         return 1;
2763
2764                 vcpu->arch.msr_kvm_poll_control = data;
2765                 break;
2766
2767         case MSR_IA32_MCG_CTL:
2768         case MSR_IA32_MCG_STATUS:
2769         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2770                 return set_msr_mce(vcpu, msr_info);
2771
2772         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2773         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2774                 pr = true; /* fall through */
2775         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2776         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2777                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2778                         return kvm_pmu_set_msr(vcpu, msr_info);
2779
2780                 if (pr || data != 0)
2781                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2782                                     "0x%x data 0x%llx\n", msr, data);
2783                 break;
2784         case MSR_K7_CLK_CTL:
2785                 /*
2786                  * Ignore all writes to this no longer documented MSR.
2787                  * Writes are only relevant for old K7 processors,
2788                  * all pre-dating SVM, but a recommended workaround from
2789                  * AMD for these chips. It is possible to specify the
2790                  * affected processor models on the command line, hence
2791                  * the need to ignore the workaround.
2792                  */
2793                 break;
2794         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2795         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2796         case HV_X64_MSR_CRASH_CTL:
2797         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2798         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2799         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2800         case HV_X64_MSR_TSC_EMULATION_STATUS:
2801                 return kvm_hv_set_msr_common(vcpu, msr, data,
2802                                              msr_info->host_initiated);
2803         case MSR_IA32_BBL_CR_CTL3:
2804                 /* Drop writes to this legacy MSR -- see rdmsr
2805                  * counterpart for further detail.
2806                  */
2807                 if (report_ignored_msrs)
2808                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2809                                 msr, data);
2810                 break;
2811         case MSR_AMD64_OSVW_ID_LENGTH:
2812                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2813                         return 1;
2814                 vcpu->arch.osvw.length = data;
2815                 break;
2816         case MSR_AMD64_OSVW_STATUS:
2817                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2818                         return 1;
2819                 vcpu->arch.osvw.status = data;
2820                 break;
2821         case MSR_PLATFORM_INFO:
2822                 if (!msr_info->host_initiated ||
2823                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2824                      cpuid_fault_enabled(vcpu)))
2825                         return 1;
2826                 vcpu->arch.msr_platform_info = data;
2827                 break;
2828         case MSR_MISC_FEATURES_ENABLES:
2829                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2830                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2831                      !supports_cpuid_fault(vcpu)))
2832                         return 1;
2833                 vcpu->arch.msr_misc_features_enables = data;
2834                 break;
2835         default:
2836                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2837                         return xen_hvm_config(vcpu, data);
2838                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2839                         return kvm_pmu_set_msr(vcpu, msr_info);
2840                 if (!ignore_msrs) {
2841                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2842                                     msr, data);
2843                         return 1;
2844                 } else {
2845                         if (report_ignored_msrs)
2846                                 vcpu_unimpl(vcpu,
2847                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2848                                         msr, data);
2849                         break;
2850                 }
2851         }
2852         return 0;
2853 }
2854 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2855
2856 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2857 {
2858         u64 data;
2859         u64 mcg_cap = vcpu->arch.mcg_cap;
2860         unsigned bank_num = mcg_cap & 0xff;
2861
2862         switch (msr) {
2863         case MSR_IA32_P5_MC_ADDR:
2864         case MSR_IA32_P5_MC_TYPE:
2865                 data = 0;
2866                 break;
2867         case MSR_IA32_MCG_CAP:
2868                 data = vcpu->arch.mcg_cap;
2869                 break;
2870         case MSR_IA32_MCG_CTL:
2871                 if (!(mcg_cap & MCG_CTL_P) && !host)
2872                         return 1;
2873                 data = vcpu->arch.mcg_ctl;
2874                 break;
2875         case MSR_IA32_MCG_STATUS:
2876                 data = vcpu->arch.mcg_status;
2877                 break;
2878         default:
2879                 if (msr >= MSR_IA32_MC0_CTL &&
2880                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2881                         u32 offset = msr - MSR_IA32_MC0_CTL;
2882                         data = vcpu->arch.mce_banks[offset];
2883                         break;
2884                 }
2885                 return 1;
2886         }
2887         *pdata = data;
2888         return 0;
2889 }
2890
2891 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2892 {
2893         switch (msr_info->index) {
2894         case MSR_IA32_PLATFORM_ID:
2895         case MSR_IA32_EBL_CR_POWERON:
2896         case MSR_IA32_DEBUGCTLMSR:
2897         case MSR_IA32_LASTBRANCHFROMIP:
2898         case MSR_IA32_LASTBRANCHTOIP:
2899         case MSR_IA32_LASTINTFROMIP:
2900         case MSR_IA32_LASTINTTOIP:
2901         case MSR_K8_SYSCFG:
2902         case MSR_K8_TSEG_ADDR:
2903         case MSR_K8_TSEG_MASK:
2904         case MSR_VM_HSAVE_PA:
2905         case MSR_K8_INT_PENDING_MSG:
2906         case MSR_AMD64_NB_CFG:
2907         case MSR_FAM10H_MMIO_CONF_BASE:
2908         case MSR_AMD64_BU_CFG2:
2909         case MSR_IA32_PERF_CTL:
2910         case MSR_AMD64_DC_CFG:
2911         case MSR_F15H_EX_CFG:
2912                 msr_info->data = 0;
2913                 break;
2914         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2915         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2916         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2917         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2918         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2919                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2920                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2921                 msr_info->data = 0;
2922                 break;
2923         case MSR_IA32_UCODE_REV:
2924                 msr_info->data = vcpu->arch.microcode_version;
2925                 break;
2926         case MSR_IA32_ARCH_CAPABILITIES:
2927                 if (!msr_info->host_initiated &&
2928                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2929                         return 1;
2930                 msr_info->data = vcpu->arch.arch_capabilities;
2931                 break;
2932         case MSR_IA32_POWER_CTL:
2933                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2934                 break;
2935         case MSR_IA32_TSC:
2936                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2937                 break;
2938         case MSR_MTRRcap:
2939         case 0x200 ... 0x2ff:
2940                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2941         case 0xcd: /* fsb frequency */
2942                 msr_info->data = 3;
2943                 break;
2944                 /*
2945                  * MSR_EBC_FREQUENCY_ID
2946                  * Conservative value valid for even the basic CPU models.
2947                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2948                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2949                  * and 266MHz for model 3, or 4. Set Core Clock
2950                  * Frequency to System Bus Frequency Ratio to 1 (bits
2951                  * 31:24) even though these are only valid for CPU
2952                  * models > 2, however guests may end up dividing or
2953                  * multiplying by zero otherwise.
2954                  */
2955         case MSR_EBC_FREQUENCY_ID:
2956                 msr_info->data = 1 << 24;
2957                 break;
2958         case MSR_IA32_APICBASE:
2959                 msr_info->data = kvm_get_apic_base(vcpu);
2960                 break;
2961         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2962                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2963                 break;
2964         case MSR_IA32_TSCDEADLINE:
2965                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2966                 break;
2967         case MSR_IA32_TSC_ADJUST:
2968                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2969                 break;
2970         case MSR_IA32_MISC_ENABLE:
2971                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2972                 break;
2973         case MSR_IA32_SMBASE:
2974                 if (!msr_info->host_initiated)
2975                         return 1;
2976                 msr_info->data = vcpu->arch.smbase;
2977                 break;
2978         case MSR_SMI_COUNT:
2979                 msr_info->data = vcpu->arch.smi_count;
2980                 break;
2981         case MSR_IA32_PERF_STATUS:
2982                 /* TSC increment by tick */
2983                 msr_info->data = 1000ULL;
2984                 /* CPU multiplier */
2985                 msr_info->data |= (((uint64_t)4ULL) << 40);
2986                 break;
2987         case MSR_EFER:
2988                 msr_info->data = vcpu->arch.efer;
2989                 break;
2990         case MSR_KVM_WALL_CLOCK:
2991         case MSR_KVM_WALL_CLOCK_NEW:
2992                 msr_info->data = vcpu->kvm->arch.wall_clock;
2993                 break;
2994         case MSR_KVM_SYSTEM_TIME:
2995         case MSR_KVM_SYSTEM_TIME_NEW:
2996                 msr_info->data = vcpu->arch.time;
2997                 break;
2998         case MSR_KVM_ASYNC_PF_EN:
2999                 msr_info->data = vcpu->arch.apf.msr_val;
3000                 break;
3001         case MSR_KVM_STEAL_TIME:
3002                 msr_info->data = vcpu->arch.st.msr_val;
3003                 break;
3004         case MSR_KVM_PV_EOI_EN:
3005                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3006                 break;
3007         case MSR_KVM_POLL_CONTROL:
3008                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3009                 break;
3010         case MSR_IA32_P5_MC_ADDR:
3011         case MSR_IA32_P5_MC_TYPE:
3012         case MSR_IA32_MCG_CAP:
3013         case MSR_IA32_MCG_CTL:
3014         case MSR_IA32_MCG_STATUS:
3015         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3016                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3017                                    msr_info->host_initiated);
3018         case MSR_K7_CLK_CTL:
3019                 /*
3020                  * Provide expected ramp-up count for K7. All other
3021                  * are set to zero, indicating minimum divisors for
3022                  * every field.
3023                  *
3024                  * This prevents guest kernels on AMD host with CPU
3025                  * type 6, model 8 and higher from exploding due to
3026                  * the rdmsr failing.
3027                  */
3028                 msr_info->data = 0x20000000;
3029                 break;
3030         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3031         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3032         case HV_X64_MSR_CRASH_CTL:
3033         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3034         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3035         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3036         case HV_X64_MSR_TSC_EMULATION_STATUS:
3037                 return kvm_hv_get_msr_common(vcpu,
3038                                              msr_info->index, &msr_info->data,
3039                                              msr_info->host_initiated);
3040                 break;
3041         case MSR_IA32_BBL_CR_CTL3:
3042                 /* This legacy MSR exists but isn't fully documented in current
3043                  * silicon.  It is however accessed by winxp in very narrow
3044                  * scenarios where it sets bit #19, itself documented as
3045                  * a "reserved" bit.  Best effort attempt to source coherent
3046                  * read data here should the balance of the register be
3047                  * interpreted by the guest:
3048                  *
3049                  * L2 cache control register 3: 64GB range, 256KB size,
3050                  * enabled, latency 0x1, configured
3051                  */
3052                 msr_info->data = 0xbe702111;
3053                 break;
3054         case MSR_AMD64_OSVW_ID_LENGTH:
3055                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3056                         return 1;
3057                 msr_info->data = vcpu->arch.osvw.length;
3058                 break;
3059         case MSR_AMD64_OSVW_STATUS:
3060                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3061                         return 1;
3062                 msr_info->data = vcpu->arch.osvw.status;
3063                 break;
3064         case MSR_PLATFORM_INFO:
3065                 if (!msr_info->host_initiated &&
3066                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3067                         return 1;
3068                 msr_info->data = vcpu->arch.msr_platform_info;
3069                 break;
3070         case MSR_MISC_FEATURES_ENABLES:
3071                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3072                 break;
3073         case MSR_K7_HWCR:
3074                 msr_info->data = vcpu->arch.msr_hwcr;
3075                 break;
3076         default:
3077                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3078                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3079                 if (!ignore_msrs) {
3080                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3081                                                msr_info->index);
3082                         return 1;
3083                 } else {
3084                         if (report_ignored_msrs)
3085                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3086                                         msr_info->index);
3087                         msr_info->data = 0;
3088                 }
3089                 break;
3090         }
3091         return 0;
3092 }
3093 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3094
3095 /*
3096  * Read or write a bunch of msrs. All parameters are kernel addresses.
3097  *
3098  * @return number of msrs set successfully.
3099  */
3100 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3101                     struct kvm_msr_entry *entries,
3102                     int (*do_msr)(struct kvm_vcpu *vcpu,
3103                                   unsigned index, u64 *data))
3104 {
3105         int i;
3106
3107         for (i = 0; i < msrs->nmsrs; ++i)
3108                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3109                         break;
3110
3111         return i;
3112 }
3113
3114 /*
3115  * Read or write a bunch of msrs. Parameters are user addresses.
3116  *
3117  * @return number of msrs set successfully.
3118  */
3119 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3120                   int (*do_msr)(struct kvm_vcpu *vcpu,
3121                                 unsigned index, u64 *data),
3122                   int writeback)
3123 {
3124         struct kvm_msrs msrs;
3125         struct kvm_msr_entry *entries;
3126         int r, n;
3127         unsigned size;
3128
3129         r = -EFAULT;
3130         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3131                 goto out;
3132
3133         r = -E2BIG;
3134         if (msrs.nmsrs >= MAX_IO_MSRS)
3135                 goto out;
3136
3137         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3138         entries = memdup_user(user_msrs->entries, size);
3139         if (IS_ERR(entries)) {
3140                 r = PTR_ERR(entries);
3141                 goto out;
3142         }
3143
3144         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3145         if (r < 0)
3146                 goto out_free;
3147
3148         r = -EFAULT;
3149         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3150                 goto out_free;
3151
3152         r = n;
3153
3154 out_free:
3155         kfree(entries);
3156 out:
3157         return r;
3158 }
3159
3160 static inline bool kvm_can_mwait_in_guest(void)
3161 {
3162         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3163                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3164                 boot_cpu_has(X86_FEATURE_ARAT);
3165 }
3166
3167 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3168 {
3169         int r = 0;
3170
3171         switch (ext) {
3172         case KVM_CAP_IRQCHIP:
3173         case KVM_CAP_HLT:
3174         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3175         case KVM_CAP_SET_TSS_ADDR:
3176         case KVM_CAP_EXT_CPUID:
3177         case KVM_CAP_EXT_EMUL_CPUID:
3178         case KVM_CAP_CLOCKSOURCE:
3179         case KVM_CAP_PIT:
3180         case KVM_CAP_NOP_IO_DELAY:
3181         case KVM_CAP_MP_STATE:
3182         case KVM_CAP_SYNC_MMU:
3183         case KVM_CAP_USER_NMI:
3184         case KVM_CAP_REINJECT_CONTROL:
3185         case KVM_CAP_IRQ_INJECT_STATUS:
3186         case KVM_CAP_IOEVENTFD:
3187         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3188         case KVM_CAP_PIT2:
3189         case KVM_CAP_PIT_STATE2:
3190         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3191         case KVM_CAP_XEN_HVM:
3192         case KVM_CAP_VCPU_EVENTS:
3193         case KVM_CAP_HYPERV:
3194         case KVM_CAP_HYPERV_VAPIC:
3195         case KVM_CAP_HYPERV_SPIN:
3196         case KVM_CAP_HYPERV_SYNIC:
3197         case KVM_CAP_HYPERV_SYNIC2:
3198         case KVM_CAP_HYPERV_VP_INDEX:
3199         case KVM_CAP_HYPERV_EVENTFD:
3200         case KVM_CAP_HYPERV_TLBFLUSH:
3201         case KVM_CAP_HYPERV_SEND_IPI:
3202         case KVM_CAP_HYPERV_CPUID:
3203         case KVM_CAP_PCI_SEGMENT:
3204         case KVM_CAP_DEBUGREGS:
3205         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3206         case KVM_CAP_XSAVE:
3207         case KVM_CAP_ASYNC_PF:
3208         case KVM_CAP_GET_TSC_KHZ:
3209         case KVM_CAP_KVMCLOCK_CTRL:
3210         case KVM_CAP_READONLY_MEM:
3211         case KVM_CAP_HYPERV_TIME:
3212         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3213         case KVM_CAP_TSC_DEADLINE_TIMER:
3214         case KVM_CAP_DISABLE_QUIRKS:
3215         case KVM_CAP_SET_BOOT_CPU_ID:
3216         case KVM_CAP_SPLIT_IRQCHIP:
3217         case KVM_CAP_IMMEDIATE_EXIT:
3218         case KVM_CAP_PMU_EVENT_FILTER:
3219         case KVM_CAP_GET_MSR_FEATURES:
3220         case KVM_CAP_MSR_PLATFORM_INFO:
3221         case KVM_CAP_EXCEPTION_PAYLOAD:
3222                 r = 1;
3223                 break;
3224         case KVM_CAP_SYNC_REGS:
3225                 r = KVM_SYNC_X86_VALID_FIELDS;
3226                 break;
3227         case KVM_CAP_ADJUST_CLOCK:
3228                 r = KVM_CLOCK_TSC_STABLE;
3229                 break;
3230         case KVM_CAP_X86_DISABLE_EXITS:
3231                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3232                       KVM_X86_DISABLE_EXITS_CSTATE;
3233                 if(kvm_can_mwait_in_guest())
3234                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3235                 break;
3236         case KVM_CAP_X86_SMM:
3237                 /* SMBASE is usually relocated above 1M on modern chipsets,
3238                  * and SMM handlers might indeed rely on 4G segment limits,
3239                  * so do not report SMM to be available if real mode is
3240                  * emulated via vm86 mode.  Still, do not go to great lengths
3241                  * to avoid userspace's usage of the feature, because it is a
3242                  * fringe case that is not enabled except via specific settings
3243                  * of the module parameters.
3244                  */
3245                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3246                 break;
3247         case KVM_CAP_VAPIC:
3248                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3249                 break;
3250         case KVM_CAP_NR_VCPUS:
3251                 r = KVM_SOFT_MAX_VCPUS;
3252                 break;
3253         case KVM_CAP_MAX_VCPUS:
3254                 r = KVM_MAX_VCPUS;
3255                 break;
3256         case KVM_CAP_MAX_VCPU_ID:
3257                 r = KVM_MAX_VCPU_ID;
3258                 break;
3259         case KVM_CAP_PV_MMU:    /* obsolete */
3260                 r = 0;
3261                 break;
3262         case KVM_CAP_MCE:
3263                 r = KVM_MAX_MCE_BANKS;
3264                 break;
3265         case KVM_CAP_XCRS:
3266                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3267                 break;
3268         case KVM_CAP_TSC_CONTROL:
3269                 r = kvm_has_tsc_control;
3270                 break;
3271         case KVM_CAP_X2APIC_API:
3272                 r = KVM_X2APIC_API_VALID_FLAGS;
3273                 break;
3274         case KVM_CAP_NESTED_STATE:
3275                 r = kvm_x86_ops->get_nested_state ?
3276                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3277                 break;
3278         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3279                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3280                 break;
3281         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3282                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3283                 break;
3284         default:
3285                 break;
3286         }
3287         return r;
3288
3289 }
3290
3291 long kvm_arch_dev_ioctl(struct file *filp,
3292                         unsigned int ioctl, unsigned long arg)
3293 {
3294         void __user *argp = (void __user *)arg;
3295         long r;
3296
3297         switch (ioctl) {
3298         case KVM_GET_MSR_INDEX_LIST: {
3299                 struct kvm_msr_list __user *user_msr_list = argp;
3300                 struct kvm_msr_list msr_list;
3301                 unsigned n;
3302
3303                 r = -EFAULT;
3304                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3305                         goto out;
3306                 n = msr_list.nmsrs;
3307                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3308                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3309                         goto out;
3310                 r = -E2BIG;
3311                 if (n < msr_list.nmsrs)
3312                         goto out;
3313                 r = -EFAULT;
3314                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3315                                  num_msrs_to_save * sizeof(u32)))
3316                         goto out;
3317                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3318                                  &emulated_msrs,
3319                                  num_emulated_msrs * sizeof(u32)))
3320                         goto out;
3321                 r = 0;
3322                 break;
3323         }
3324         case KVM_GET_SUPPORTED_CPUID:
3325         case KVM_GET_EMULATED_CPUID: {
3326                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3327                 struct kvm_cpuid2 cpuid;
3328
3329                 r = -EFAULT;
3330                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3331                         goto out;
3332
3333                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3334                                             ioctl);
3335                 if (r)
3336                         goto out;
3337
3338                 r = -EFAULT;
3339                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3340                         goto out;
3341                 r = 0;
3342                 break;
3343         }
3344         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3345                 r = -EFAULT;
3346                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3347                                  sizeof(kvm_mce_cap_supported)))
3348                         goto out;
3349                 r = 0;
3350                 break;
3351         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3352                 struct kvm_msr_list __user *user_msr_list = argp;
3353                 struct kvm_msr_list msr_list;
3354                 unsigned int n;
3355
3356                 r = -EFAULT;
3357                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3358                         goto out;
3359                 n = msr_list.nmsrs;
3360                 msr_list.nmsrs = num_msr_based_features;
3361                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3362                         goto out;
3363                 r = -E2BIG;
3364                 if (n < msr_list.nmsrs)
3365                         goto out;
3366                 r = -EFAULT;
3367                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3368                                  num_msr_based_features * sizeof(u32)))
3369                         goto out;
3370                 r = 0;
3371                 break;
3372         }
3373         case KVM_GET_MSRS:
3374                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3375                 break;
3376         }
3377         default:
3378                 r = -EINVAL;
3379         }
3380 out:
3381         return r;
3382 }
3383
3384 static void wbinvd_ipi(void *garbage)
3385 {
3386         wbinvd();
3387 }
3388
3389 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3390 {
3391         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3392 }
3393
3394 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3395 {
3396         /* Address WBINVD may be executed by guest */
3397         if (need_emulate_wbinvd(vcpu)) {
3398                 if (kvm_x86_ops->has_wbinvd_exit())
3399                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3400                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3401                         smp_call_function_single(vcpu->cpu,
3402                                         wbinvd_ipi, NULL, 1);
3403         }
3404
3405         kvm_x86_ops->vcpu_load(vcpu, cpu);
3406
3407         fpregs_assert_state_consistent();
3408         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3409                 switch_fpu_return();
3410
3411         /* Apply any externally detected TSC adjustments (due to suspend) */
3412         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3413                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3414                 vcpu->arch.tsc_offset_adjustment = 0;
3415                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3416         }
3417
3418         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3419                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3420                                 rdtsc() - vcpu->arch.last_host_tsc;
3421                 if (tsc_delta < 0)
3422                         mark_tsc_unstable("KVM discovered backwards TSC");
3423
3424                 if (kvm_check_tsc_unstable()) {
3425                         u64 offset = kvm_compute_tsc_offset(vcpu,
3426                                                 vcpu->arch.last_guest_tsc);
3427                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3428                         vcpu->arch.tsc_catchup = 1;
3429                 }
3430
3431                 if (kvm_lapic_hv_timer_in_use(vcpu))
3432                         kvm_lapic_restart_hv_timer(vcpu);
3433
3434                 /*
3435                  * On a host with synchronized TSC, there is no need to update
3436                  * kvmclock on vcpu->cpu migration
3437                  */
3438                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3439                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3440                 if (vcpu->cpu != cpu)
3441                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3442                 vcpu->cpu = cpu;
3443         }
3444
3445         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3446 }
3447
3448 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3449 {
3450         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3451                 return;
3452
3453         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3454
3455         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3456                         &vcpu->arch.st.steal.preempted,
3457                         offsetof(struct kvm_steal_time, preempted),
3458                         sizeof(vcpu->arch.st.steal.preempted));
3459 }
3460
3461 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3462 {
3463         int idx;
3464
3465         if (vcpu->preempted)
3466                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3467
3468         /*
3469          * Disable page faults because we're in atomic context here.
3470          * kvm_write_guest_offset_cached() would call might_fault()
3471          * that relies on pagefault_disable() to tell if there's a
3472          * bug. NOTE: the write to guest memory may not go through if
3473          * during postcopy live migration or if there's heavy guest
3474          * paging.
3475          */
3476         pagefault_disable();
3477         /*
3478          * kvm_memslots() will be called by
3479          * kvm_write_guest_offset_cached() so take the srcu lock.
3480          */
3481         idx = srcu_read_lock(&vcpu->kvm->srcu);
3482         kvm_steal_time_set_preempted(vcpu);
3483         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3484         pagefault_enable();
3485         kvm_x86_ops->vcpu_put(vcpu);
3486         vcpu->arch.last_host_tsc = rdtsc();
3487         /*
3488          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3489          * on every vmexit, but if not, we might have a stale dr6 from the
3490          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3491          */
3492         set_debugreg(0, 6);
3493 }
3494
3495 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3496                                     struct kvm_lapic_state *s)
3497 {
3498         if (vcpu->arch.apicv_active)
3499                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3500
3501         return kvm_apic_get_state(vcpu, s);
3502 }
3503
3504 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3505                                     struct kvm_lapic_state *s)
3506 {
3507         int r;
3508
3509         r = kvm_apic_set_state(vcpu, s);
3510         if (r)
3511                 return r;
3512         update_cr8_intercept(vcpu);
3513
3514         return 0;
3515 }
3516
3517 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3518 {
3519         return (!lapic_in_kernel(vcpu) ||
3520                 kvm_apic_accept_pic_intr(vcpu));
3521 }
3522
3523 /*
3524  * if userspace requested an interrupt window, check that the
3525  * interrupt window is open.
3526  *
3527  * No need to exit to userspace if we already have an interrupt queued.
3528  */
3529 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3530 {
3531         return kvm_arch_interrupt_allowed(vcpu) &&
3532                 !kvm_cpu_has_interrupt(vcpu) &&
3533                 !kvm_event_needs_reinjection(vcpu) &&
3534                 kvm_cpu_accept_dm_intr(vcpu);
3535 }
3536
3537 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3538                                     struct kvm_interrupt *irq)
3539 {
3540         if (irq->irq >= KVM_NR_INTERRUPTS)
3541                 return -EINVAL;
3542
3543         if (!irqchip_in_kernel(vcpu->kvm)) {
3544                 kvm_queue_interrupt(vcpu, irq->irq, false);
3545                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3546                 return 0;
3547         }
3548
3549         /*
3550          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3551          * fail for in-kernel 8259.
3552          */
3553         if (pic_in_kernel(vcpu->kvm))
3554                 return -ENXIO;
3555
3556         if (vcpu->arch.pending_external_vector != -1)
3557                 return -EEXIST;
3558
3559         vcpu->arch.pending_external_vector = irq->irq;
3560         kvm_make_request(KVM_REQ_EVENT, vcpu);
3561         return 0;
3562 }
3563
3564 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3565 {
3566         kvm_inject_nmi(vcpu);
3567
3568         return 0;
3569 }
3570
3571 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3572 {
3573         kvm_make_request(KVM_REQ_SMI, vcpu);
3574
3575         return 0;
3576 }
3577
3578 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3579                                            struct kvm_tpr_access_ctl *tac)
3580 {
3581         if (tac->flags)
3582                 return -EINVAL;
3583         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3584         return 0;
3585 }
3586
3587 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3588                                         u64 mcg_cap)
3589 {
3590         int r;
3591         unsigned bank_num = mcg_cap & 0xff, bank;
3592
3593         r = -EINVAL;
3594         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3595                 goto out;
3596         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3597                 goto out;
3598         r = 0;
3599         vcpu->arch.mcg_cap = mcg_cap;
3600         /* Init IA32_MCG_CTL to all 1s */
3601         if (mcg_cap & MCG_CTL_P)
3602                 vcpu->arch.mcg_ctl = ~(u64)0;
3603         /* Init IA32_MCi_CTL to all 1s */
3604         for (bank = 0; bank < bank_num; bank++)
3605                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3606
3607         kvm_x86_ops->setup_mce(vcpu);
3608 out:
3609         return r;
3610 }
3611
3612 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3613                                       struct kvm_x86_mce *mce)
3614 {
3615         u64 mcg_cap = vcpu->arch.mcg_cap;
3616         unsigned bank_num = mcg_cap & 0xff;
3617         u64 *banks = vcpu->arch.mce_banks;
3618
3619         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3620                 return -EINVAL;
3621         /*
3622          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3623          * reporting is disabled
3624          */
3625         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3626             vcpu->arch.mcg_ctl != ~(u64)0)
3627                 return 0;
3628         banks += 4 * mce->bank;
3629         /*
3630          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3631          * reporting is disabled for the bank
3632          */
3633         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3634                 return 0;
3635         if (mce->status & MCI_STATUS_UC) {
3636                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3637                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3638                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3639                         return 0;
3640                 }
3641                 if (banks[1] & MCI_STATUS_VAL)
3642                         mce->status |= MCI_STATUS_OVER;
3643                 banks[2] = mce->addr;
3644                 banks[3] = mce->misc;
3645                 vcpu->arch.mcg_status = mce->mcg_status;
3646                 banks[1] = mce->status;
3647                 kvm_queue_exception(vcpu, MC_VECTOR);
3648         } else if (!(banks[1] & MCI_STATUS_VAL)
3649                    || !(banks[1] & MCI_STATUS_UC)) {
3650                 if (banks[1] & MCI_STATUS_VAL)
3651                         mce->status |= MCI_STATUS_OVER;
3652                 banks[2] = mce->addr;
3653                 banks[3] = mce->misc;
3654                 banks[1] = mce->status;
3655         } else
3656                 banks[1] |= MCI_STATUS_OVER;
3657         return 0;
3658 }
3659
3660 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3661                                                struct kvm_vcpu_events *events)
3662 {
3663         process_nmi(vcpu);
3664
3665         /*
3666          * The API doesn't provide the instruction length for software
3667          * exceptions, so don't report them. As long as the guest RIP
3668          * isn't advanced, we should expect to encounter the exception
3669          * again.
3670          */
3671         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3672                 events->exception.injected = 0;
3673                 events->exception.pending = 0;
3674         } else {
3675                 events->exception.injected = vcpu->arch.exception.injected;
3676                 events->exception.pending = vcpu->arch.exception.pending;
3677                 /*
3678                  * For ABI compatibility, deliberately conflate
3679                  * pending and injected exceptions when
3680                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3681                  */
3682                 if (!vcpu->kvm->arch.exception_payload_enabled)
3683                         events->exception.injected |=
3684                                 vcpu->arch.exception.pending;
3685         }
3686         events->exception.nr = vcpu->arch.exception.nr;
3687         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3688         events->exception.error_code = vcpu->arch.exception.error_code;
3689         events->exception_has_payload = vcpu->arch.exception.has_payload;
3690         events->exception_payload = vcpu->arch.exception.payload;
3691
3692         events->interrupt.injected =
3693                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3694         events->interrupt.nr = vcpu->arch.interrupt.nr;
3695         events->interrupt.soft = 0;
3696         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3697
3698         events->nmi.injected = vcpu->arch.nmi_injected;
3699         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3700         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3701         events->nmi.pad = 0;
3702
3703         events->sipi_vector = 0; /* never valid when reporting to user space */
3704
3705         events->smi.smm = is_smm(vcpu);
3706         events->smi.pending = vcpu->arch.smi_pending;
3707         events->smi.smm_inside_nmi =
3708                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3709         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3710
3711         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3712                          | KVM_VCPUEVENT_VALID_SHADOW
3713                          | KVM_VCPUEVENT_VALID_SMM);
3714         if (vcpu->kvm->arch.exception_payload_enabled)
3715                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3716
3717         memset(&events->reserved, 0, sizeof(events->reserved));
3718 }
3719
3720 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3721
3722 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3723                                               struct kvm_vcpu_events *events)
3724 {
3725         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3726                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3727                               | KVM_VCPUEVENT_VALID_SHADOW
3728                               | KVM_VCPUEVENT_VALID_SMM
3729                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3730                 return -EINVAL;
3731
3732         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3733                 if (!vcpu->kvm->arch.exception_payload_enabled)
3734                         return -EINVAL;
3735                 if (events->exception.pending)
3736                         events->exception.injected = 0;
3737                 else
3738                         events->exception_has_payload = 0;
3739         } else {
3740                 events->exception.pending = 0;
3741                 events->exception_has_payload = 0;
3742         }
3743
3744         if ((events->exception.injected || events->exception.pending) &&
3745             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3746                 return -EINVAL;
3747
3748         /* INITs are latched while in SMM */
3749         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3750             (events->smi.smm || events->smi.pending) &&
3751             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3752                 return -EINVAL;
3753
3754         process_nmi(vcpu);
3755         vcpu->arch.exception.injected = events->exception.injected;
3756         vcpu->arch.exception.pending = events->exception.pending;
3757         vcpu->arch.exception.nr = events->exception.nr;
3758         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3759         vcpu->arch.exception.error_code = events->exception.error_code;
3760         vcpu->arch.exception.has_payload = events->exception_has_payload;
3761         vcpu->arch.exception.payload = events->exception_payload;
3762
3763         vcpu->arch.interrupt.injected = events->interrupt.injected;
3764         vcpu->arch.interrupt.nr = events->interrupt.nr;
3765         vcpu->arch.interrupt.soft = events->interrupt.soft;
3766         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3767                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3768                                                   events->interrupt.shadow);
3769
3770         vcpu->arch.nmi_injected = events->nmi.injected;
3771         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3772                 vcpu->arch.nmi_pending = events->nmi.pending;
3773         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3774
3775         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3776             lapic_in_kernel(vcpu))
3777                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3778
3779         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3780                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3781                         if (events->smi.smm)
3782                                 vcpu->arch.hflags |= HF_SMM_MASK;
3783                         else
3784                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3785                         kvm_smm_changed(vcpu);
3786                 }
3787
3788                 vcpu->arch.smi_pending = events->smi.pending;
3789
3790                 if (events->smi.smm) {
3791                         if (events->smi.smm_inside_nmi)
3792                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3793                         else
3794                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3795                         if (lapic_in_kernel(vcpu)) {
3796                                 if (events->smi.latched_init)
3797                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3798                                 else
3799                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3800                         }
3801                 }
3802         }
3803
3804         kvm_make_request(KVM_REQ_EVENT, vcpu);
3805
3806         return 0;
3807 }
3808
3809 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3810                                              struct kvm_debugregs *dbgregs)
3811 {
3812         unsigned long val;
3813
3814         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3815         kvm_get_dr(vcpu, 6, &val);
3816         dbgregs->dr6 = val;
3817         dbgregs->dr7 = vcpu->arch.dr7;
3818         dbgregs->flags = 0;
3819         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3820 }
3821
3822 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3823                                             struct kvm_debugregs *dbgregs)
3824 {
3825         if (dbgregs->flags)
3826                 return -EINVAL;
3827
3828         if (dbgregs->dr6 & ~0xffffffffull)
3829                 return -EINVAL;
3830         if (dbgregs->dr7 & ~0xffffffffull)
3831                 return -EINVAL;
3832
3833         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3834         kvm_update_dr0123(vcpu);
3835         vcpu->arch.dr6 = dbgregs->dr6;
3836         kvm_update_dr6(vcpu);
3837         vcpu->arch.dr7 = dbgregs->dr7;
3838         kvm_update_dr7(vcpu);
3839
3840         return 0;
3841 }
3842
3843 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3844
3845 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3846 {
3847         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3848         u64 xstate_bv = xsave->header.xfeatures;
3849         u64 valid;
3850
3851         /*
3852          * Copy legacy XSAVE area, to avoid complications with CPUID
3853          * leaves 0 and 1 in the loop below.
3854          */
3855         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3856
3857         /* Set XSTATE_BV */
3858         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3859         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3860
3861         /*
3862          * Copy each region from the possibly compacted offset to the
3863          * non-compacted offset.
3864          */
3865         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3866         while (valid) {
3867                 u64 xfeature_mask = valid & -valid;
3868                 int xfeature_nr = fls64(xfeature_mask) - 1;
3869                 void *src = get_xsave_addr(xsave, xfeature_nr);
3870
3871                 if (src) {
3872                         u32 size, offset, ecx, edx;
3873                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3874                                     &size, &offset, &ecx, &edx);
3875                         if (xfeature_nr == XFEATURE_PKRU)
3876                                 memcpy(dest + offset, &vcpu->arch.pkru,
3877                                        sizeof(vcpu->arch.pkru));
3878                         else
3879                                 memcpy(dest + offset, src, size);
3880
3881                 }
3882
3883                 valid -= xfeature_mask;
3884         }
3885 }
3886
3887 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3888 {
3889         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3890         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3891         u64 valid;
3892
3893         /*
3894          * Copy legacy XSAVE area, to avoid complications with CPUID
3895          * leaves 0 and 1 in the loop below.
3896          */
3897         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3898
3899         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3900         xsave->header.xfeatures = xstate_bv;
3901         if (boot_cpu_has(X86_FEATURE_XSAVES))
3902                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3903
3904         /*
3905          * Copy each region from the non-compacted offset to the
3906          * possibly compacted offset.
3907          */
3908         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3909         while (valid) {
3910                 u64 xfeature_mask = valid & -valid;
3911                 int xfeature_nr = fls64(xfeature_mask) - 1;
3912                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3913
3914                 if (dest) {
3915                         u32 size, offset, ecx, edx;
3916                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3917                                     &size, &offset, &ecx, &edx);
3918                         if (xfeature_nr == XFEATURE_PKRU)
3919                                 memcpy(&vcpu->arch.pkru, src + offset,
3920                                        sizeof(vcpu->arch.pkru));
3921                         else
3922                                 memcpy(dest, src + offset, size);
3923                 }
3924
3925                 valid -= xfeature_mask;
3926         }
3927 }
3928
3929 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3930                                          struct kvm_xsave *guest_xsave)
3931 {
3932         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3933                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3934                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3935         } else {
3936                 memcpy(guest_xsave->region,
3937                         &vcpu->arch.guest_fpu->state.fxsave,
3938                         sizeof(struct fxregs_state));
3939                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3940                         XFEATURE_MASK_FPSSE;
3941         }
3942 }
3943
3944 #define XSAVE_MXCSR_OFFSET 24
3945
3946 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3947                                         struct kvm_xsave *guest_xsave)
3948 {
3949         u64 xstate_bv =
3950                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3951         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3952
3953         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3954                 /*
3955                  * Here we allow setting states that are not present in
3956                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3957                  * with old userspace.
3958                  */
3959                 if (xstate_bv & ~kvm_supported_xcr0() ||
3960                         mxcsr & ~mxcsr_feature_mask)
3961                         return -EINVAL;
3962                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3963         } else {
3964                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3965                         mxcsr & ~mxcsr_feature_mask)
3966                         return -EINVAL;
3967                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3968                         guest_xsave->region, sizeof(struct fxregs_state));
3969         }
3970         return 0;
3971 }
3972
3973 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3974                                         struct kvm_xcrs *guest_xcrs)
3975 {
3976         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3977                 guest_xcrs->nr_xcrs = 0;
3978                 return;
3979         }
3980
3981         guest_xcrs->nr_xcrs = 1;
3982         guest_xcrs->flags = 0;
3983         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3984         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3985 }
3986
3987 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3988                                        struct kvm_xcrs *guest_xcrs)
3989 {
3990         int i, r = 0;
3991
3992         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3993                 return -EINVAL;
3994
3995         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3996                 return -EINVAL;
3997
3998         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3999                 /* Only support XCR0 currently */
4000                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4001                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4002                                 guest_xcrs->xcrs[i].value);
4003                         break;
4004                 }
4005         if (r)
4006                 r = -EINVAL;
4007         return r;
4008 }
4009
4010 /*
4011  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4012  * stopped by the hypervisor.  This function will be called from the host only.
4013  * EINVAL is returned when the host attempts to set the flag for a guest that
4014  * does not support pv clocks.
4015  */
4016 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4017 {
4018         if (!vcpu->arch.pv_time_enabled)
4019                 return -EINVAL;
4020         vcpu->arch.pvclock_set_guest_stopped_request = true;
4021         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4022         return 0;
4023 }
4024
4025 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4026                                      struct kvm_enable_cap *cap)
4027 {
4028         int r;
4029         uint16_t vmcs_version;
4030         void __user *user_ptr;
4031
4032         if (cap->flags)
4033                 return -EINVAL;
4034
4035         switch (cap->cap) {
4036         case KVM_CAP_HYPERV_SYNIC2:
4037                 if (cap->args[0])
4038                         return -EINVAL;
4039                 /* fall through */
4040
4041         case KVM_CAP_HYPERV_SYNIC:
4042                 if (!irqchip_in_kernel(vcpu->kvm))
4043                         return -EINVAL;
4044                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4045                                              KVM_CAP_HYPERV_SYNIC2);
4046         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4047                 if (!kvm_x86_ops->nested_enable_evmcs)
4048                         return -ENOTTY;
4049                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4050                 if (!r) {
4051                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4052                         if (copy_to_user(user_ptr, &vmcs_version,
4053                                          sizeof(vmcs_version)))
4054                                 r = -EFAULT;
4055                 }
4056                 return r;
4057         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4058                 if (!kvm_x86_ops->enable_direct_tlbflush)
4059                         return -ENOTTY;
4060
4061                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4062
4063         default:
4064                 return -EINVAL;
4065         }
4066 }
4067
4068 long kvm_arch_vcpu_ioctl(struct file *filp,
4069                          unsigned int ioctl, unsigned long arg)
4070 {
4071         struct kvm_vcpu *vcpu = filp->private_data;
4072         void __user *argp = (void __user *)arg;
4073         int r;
4074         union {
4075                 struct kvm_lapic_state *lapic;
4076                 struct kvm_xsave *xsave;
4077                 struct kvm_xcrs *xcrs;
4078                 void *buffer;
4079         } u;
4080
4081         vcpu_load(vcpu);
4082
4083         u.buffer = NULL;
4084         switch (ioctl) {
4085         case KVM_GET_LAPIC: {
4086                 r = -EINVAL;
4087                 if (!lapic_in_kernel(vcpu))
4088                         goto out;
4089                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4090                                 GFP_KERNEL_ACCOUNT);
4091
4092                 r = -ENOMEM;
4093                 if (!u.lapic)
4094                         goto out;
4095                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4096                 if (r)
4097                         goto out;
4098                 r = -EFAULT;
4099                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4100                         goto out;
4101                 r = 0;
4102                 break;
4103         }
4104         case KVM_SET_LAPIC: {
4105                 r = -EINVAL;
4106                 if (!lapic_in_kernel(vcpu))
4107                         goto out;
4108                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4109                 if (IS_ERR(u.lapic)) {
4110                         r = PTR_ERR(u.lapic);
4111                         goto out_nofree;
4112                 }
4113
4114                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4115                 break;
4116         }
4117         case KVM_INTERRUPT: {
4118                 struct kvm_interrupt irq;
4119
4120                 r = -EFAULT;
4121                 if (copy_from_user(&irq, argp, sizeof(irq)))
4122                         goto out;
4123                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4124                 break;
4125         }
4126         case KVM_NMI: {
4127                 r = kvm_vcpu_ioctl_nmi(vcpu);
4128                 break;
4129         }
4130         case KVM_SMI: {
4131                 r = kvm_vcpu_ioctl_smi(vcpu);
4132                 break;
4133         }
4134         case KVM_SET_CPUID: {
4135                 struct kvm_cpuid __user *cpuid_arg = argp;
4136                 struct kvm_cpuid cpuid;
4137
4138                 r = -EFAULT;
4139                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4140                         goto out;
4141                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4142                 break;
4143         }
4144         case KVM_SET_CPUID2: {
4145                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4146                 struct kvm_cpuid2 cpuid;
4147
4148                 r = -EFAULT;
4149                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4150                         goto out;
4151                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4152                                               cpuid_arg->entries);
4153                 break;
4154         }
4155         case KVM_GET_CPUID2: {
4156                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4157                 struct kvm_cpuid2 cpuid;
4158
4159                 r = -EFAULT;
4160                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4161                         goto out;
4162                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4163                                               cpuid_arg->entries);
4164                 if (r)
4165                         goto out;
4166                 r = -EFAULT;
4167                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4168                         goto out;
4169                 r = 0;
4170                 break;
4171         }
4172         case KVM_GET_MSRS: {
4173                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4174                 r = msr_io(vcpu, argp, do_get_msr, 1);
4175                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4176                 break;
4177         }
4178         case KVM_SET_MSRS: {
4179                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4180                 r = msr_io(vcpu, argp, do_set_msr, 0);
4181                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4182                 break;
4183         }
4184         case KVM_TPR_ACCESS_REPORTING: {
4185                 struct kvm_tpr_access_ctl tac;
4186
4187                 r = -EFAULT;
4188                 if (copy_from_user(&tac, argp, sizeof(tac)))
4189                         goto out;
4190                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4191                 if (r)
4192                         goto out;
4193                 r = -EFAULT;
4194                 if (copy_to_user(argp, &tac, sizeof(tac)))
4195                         goto out;
4196                 r = 0;
4197                 break;
4198         };
4199         case KVM_SET_VAPIC_ADDR: {
4200                 struct kvm_vapic_addr va;
4201                 int idx;
4202
4203                 r = -EINVAL;
4204                 if (!lapic_in_kernel(vcpu))
4205                         goto out;
4206                 r = -EFAULT;
4207                 if (copy_from_user(&va, argp, sizeof(va)))
4208                         goto out;
4209                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4210                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4211                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4212                 break;
4213         }
4214         case KVM_X86_SETUP_MCE: {
4215                 u64 mcg_cap;
4216
4217                 r = -EFAULT;
4218                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4219                         goto out;
4220                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4221                 break;
4222         }
4223         case KVM_X86_SET_MCE: {
4224                 struct kvm_x86_mce mce;
4225
4226                 r = -EFAULT;
4227                 if (copy_from_user(&mce, argp, sizeof(mce)))
4228                         goto out;
4229                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4230                 break;
4231         }
4232         case KVM_GET_VCPU_EVENTS: {
4233                 struct kvm_vcpu_events events;
4234
4235                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4236
4237                 r = -EFAULT;
4238                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4239                         break;
4240                 r = 0;
4241                 break;
4242         }
4243         case KVM_SET_VCPU_EVENTS: {
4244                 struct kvm_vcpu_events events;
4245
4246                 r = -EFAULT;
4247                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4248                         break;
4249
4250                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4251                 break;
4252         }
4253         case KVM_GET_DEBUGREGS: {
4254                 struct kvm_debugregs dbgregs;
4255
4256                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4257
4258                 r = -EFAULT;
4259                 if (copy_to_user(argp, &dbgregs,
4260                                  sizeof(struct kvm_debugregs)))
4261                         break;
4262                 r = 0;
4263                 break;
4264         }
4265         case KVM_SET_DEBUGREGS: {
4266                 struct kvm_debugregs dbgregs;
4267
4268                 r = -EFAULT;
4269                 if (copy_from_user(&dbgregs, argp,
4270                                    sizeof(struct kvm_debugregs)))
4271                         break;
4272
4273                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4274                 break;
4275         }
4276         case KVM_GET_XSAVE: {
4277                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4278                 r = -ENOMEM;
4279                 if (!u.xsave)
4280                         break;
4281
4282                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4283
4284                 r = -EFAULT;
4285                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4286                         break;
4287                 r = 0;
4288                 break;
4289         }
4290         case KVM_SET_XSAVE: {
4291                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4292                 if (IS_ERR(u.xsave)) {
4293                         r = PTR_ERR(u.xsave);
4294                         goto out_nofree;
4295                 }
4296
4297                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4298                 break;
4299         }
4300         case KVM_GET_XCRS: {
4301                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4302                 r = -ENOMEM;
4303                 if (!u.xcrs)
4304                         break;
4305
4306                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4307
4308                 r = -EFAULT;
4309                 if (copy_to_user(argp, u.xcrs,
4310                                  sizeof(struct kvm_xcrs)))
4311                         break;
4312                 r = 0;
4313                 break;
4314         }
4315         case KVM_SET_XCRS: {
4316                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4317                 if (IS_ERR(u.xcrs)) {
4318                         r = PTR_ERR(u.xcrs);
4319                         goto out_nofree;
4320                 }
4321
4322                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4323                 break;
4324         }
4325         case KVM_SET_TSC_KHZ: {
4326                 u32 user_tsc_khz;
4327
4328                 r = -EINVAL;
4329                 user_tsc_khz = (u32)arg;
4330
4331                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4332                         goto out;
4333
4334                 if (user_tsc_khz == 0)
4335                         user_tsc_khz = tsc_khz;
4336
4337                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4338                         r = 0;
4339
4340                 goto out;
4341         }
4342         case KVM_GET_TSC_KHZ: {
4343                 r = vcpu->arch.virtual_tsc_khz;
4344                 goto out;
4345         }
4346         case KVM_KVMCLOCK_CTRL: {
4347                 r = kvm_set_guest_paused(vcpu);
4348                 goto out;
4349         }
4350         case KVM_ENABLE_CAP: {
4351                 struct kvm_enable_cap cap;
4352
4353                 r = -EFAULT;
4354                 if (copy_from_user(&cap, argp, sizeof(cap)))
4355                         goto out;
4356                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4357                 break;
4358         }
4359         case KVM_GET_NESTED_STATE: {
4360                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4361                 u32 user_data_size;
4362
4363                 r = -EINVAL;
4364                 if (!kvm_x86_ops->get_nested_state)
4365                         break;
4366
4367                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4368                 r = -EFAULT;
4369                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4370                         break;
4371
4372                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4373                                                   user_data_size);
4374                 if (r < 0)
4375                         break;
4376
4377                 if (r > user_data_size) {
4378                         if (put_user(r, &user_kvm_nested_state->size))
4379                                 r = -EFAULT;
4380                         else
4381                                 r = -E2BIG;
4382                         break;
4383                 }
4384
4385                 r = 0;
4386                 break;
4387         }
4388         case KVM_SET_NESTED_STATE: {
4389                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4390                 struct kvm_nested_state kvm_state;
4391
4392                 r = -EINVAL;
4393                 if (!kvm_x86_ops->set_nested_state)
4394                         break;
4395
4396                 r = -EFAULT;
4397                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4398                         break;
4399
4400                 r = -EINVAL;
4401                 if (kvm_state.size < sizeof(kvm_state))
4402                         break;
4403
4404                 if (kvm_state.flags &
4405                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4406                       | KVM_STATE_NESTED_EVMCS))
4407                         break;
4408
4409                 /* nested_run_pending implies guest_mode.  */
4410                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4411                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4412                         break;
4413
4414                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4415                 break;
4416         }
4417         case KVM_GET_SUPPORTED_HV_CPUID: {
4418                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4419                 struct kvm_cpuid2 cpuid;
4420
4421                 r = -EFAULT;
4422                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4423                         goto out;
4424
4425                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4426                                                 cpuid_arg->entries);
4427                 if (r)
4428                         goto out;
4429
4430                 r = -EFAULT;
4431                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4432                         goto out;
4433                 r = 0;
4434                 break;
4435         }
4436         default:
4437                 r = -EINVAL;
4438         }
4439 out:
4440         kfree(u.buffer);
4441 out_nofree:
4442         vcpu_put(vcpu);
4443         return r;
4444 }
4445
4446 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4447 {
4448         return VM_FAULT_SIGBUS;
4449 }
4450
4451 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4452 {
4453         int ret;
4454
4455         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4456                 return -EINVAL;
4457         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4458         return ret;
4459 }
4460
4461 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4462                                               u64 ident_addr)
4463 {
4464         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4465 }
4466
4467 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4468                                          unsigned long kvm_nr_mmu_pages)
4469 {
4470         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4471                 return -EINVAL;
4472
4473         mutex_lock(&kvm->slots_lock);
4474
4475         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4476         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4477
4478         mutex_unlock(&kvm->slots_lock);
4479         return 0;
4480 }
4481
4482 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4483 {
4484         return kvm->arch.n_max_mmu_pages;
4485 }
4486
4487 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4488 {
4489         struct kvm_pic *pic = kvm->arch.vpic;
4490         int r;
4491
4492         r = 0;
4493         switch (chip->chip_id) {
4494         case KVM_IRQCHIP_PIC_MASTER:
4495                 memcpy(&chip->chip.pic, &pic->pics[0],
4496                         sizeof(struct kvm_pic_state));
4497                 break;
4498         case KVM_IRQCHIP_PIC_SLAVE:
4499                 memcpy(&chip->chip.pic, &pic->pics[1],
4500                         sizeof(struct kvm_pic_state));
4501                 break;
4502         case KVM_IRQCHIP_IOAPIC:
4503                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4504                 break;
4505         default:
4506                 r = -EINVAL;
4507                 break;
4508         }
4509         return r;
4510 }
4511
4512 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4513 {
4514         struct kvm_pic *pic = kvm->arch.vpic;
4515         int r;
4516
4517         r = 0;
4518         switch (chip->chip_id) {
4519         case KVM_IRQCHIP_PIC_MASTER:
4520                 spin_lock(&pic->lock);
4521                 memcpy(&pic->pics[0], &chip->chip.pic,
4522                         sizeof(struct kvm_pic_state));
4523                 spin_unlock(&pic->lock);
4524                 break;
4525         case KVM_IRQCHIP_PIC_SLAVE:
4526                 spin_lock(&pic->lock);
4527                 memcpy(&pic->pics[1], &chip->chip.pic,
4528                         sizeof(struct kvm_pic_state));
4529                 spin_unlock(&pic->lock);
4530                 break;
4531         case KVM_IRQCHIP_IOAPIC:
4532                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4533                 break;
4534         default:
4535                 r = -EINVAL;
4536                 break;
4537         }
4538         kvm_pic_update_irq(pic);
4539         return r;
4540 }
4541
4542 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4543 {
4544         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4545
4546         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4547
4548         mutex_lock(&kps->lock);
4549         memcpy(ps, &kps->channels, sizeof(*ps));
4550         mutex_unlock(&kps->lock);
4551         return 0;
4552 }
4553
4554 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4555 {
4556         int i;
4557         struct kvm_pit *pit = kvm->arch.vpit;
4558
4559         mutex_lock(&pit->pit_state.lock);
4560         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4561         for (i = 0; i < 3; i++)
4562                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4563         mutex_unlock(&pit->pit_state.lock);
4564         return 0;
4565 }
4566
4567 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4568 {
4569         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4570         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4571                 sizeof(ps->channels));
4572         ps->flags = kvm->arch.vpit->pit_state.flags;
4573         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4574         memset(&ps->reserved, 0, sizeof(ps->reserved));
4575         return 0;
4576 }
4577
4578 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4579 {
4580         int start = 0;
4581         int i;
4582         u32 prev_legacy, cur_legacy;
4583         struct kvm_pit *pit = kvm->arch.vpit;
4584
4585         mutex_lock(&pit->pit_state.lock);
4586         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4587         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4588         if (!prev_legacy && cur_legacy)
4589                 start = 1;
4590         memcpy(&pit->pit_state.channels, &ps->channels,
4591                sizeof(pit->pit_state.channels));
4592         pit->pit_state.flags = ps->flags;
4593         for (i = 0; i < 3; i++)
4594                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4595                                    start && i == 0);
4596         mutex_unlock(&pit->pit_state.lock);
4597         return 0;
4598 }
4599
4600 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4601                                  struct kvm_reinject_control *control)
4602 {
4603         struct kvm_pit *pit = kvm->arch.vpit;
4604
4605         if (!pit)
4606                 return -ENXIO;
4607
4608         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4609          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4610          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4611          */
4612         mutex_lock(&pit->pit_state.lock);
4613         kvm_pit_set_reinject(pit, control->pit_reinject);
4614         mutex_unlock(&pit->pit_state.lock);
4615
4616         return 0;
4617 }
4618
4619 /**
4620  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4621  * @kvm: kvm instance
4622  * @log: slot id and address to which we copy the log
4623  *
4624  * Steps 1-4 below provide general overview of dirty page logging. See
4625  * kvm_get_dirty_log_protect() function description for additional details.
4626  *
4627  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4628  * always flush the TLB (step 4) even if previous step failed  and the dirty
4629  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4630  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4631  * writes will be marked dirty for next log read.
4632  *
4633  *   1. Take a snapshot of the bit and clear it if needed.
4634  *   2. Write protect the corresponding page.
4635  *   3. Copy the snapshot to the userspace.
4636  *   4. Flush TLB's if needed.
4637  */
4638 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4639 {
4640         bool flush = false;
4641         int r;
4642
4643         mutex_lock(&kvm->slots_lock);
4644
4645         /*
4646          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4647          */
4648         if (kvm_x86_ops->flush_log_dirty)
4649                 kvm_x86_ops->flush_log_dirty(kvm);
4650
4651         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4652
4653         /*
4654          * All the TLBs can be flushed out of mmu lock, see the comments in
4655          * kvm_mmu_slot_remove_write_access().
4656          */
4657         lockdep_assert_held(&kvm->slots_lock);
4658         if (flush)
4659                 kvm_flush_remote_tlbs(kvm);
4660
4661         mutex_unlock(&kvm->slots_lock);
4662         return r;
4663 }
4664
4665 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4666 {
4667         bool flush = false;
4668         int r;
4669
4670         mutex_lock(&kvm->slots_lock);
4671
4672         /*
4673          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4674          */
4675         if (kvm_x86_ops->flush_log_dirty)
4676                 kvm_x86_ops->flush_log_dirty(kvm);
4677
4678         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4679
4680         /*
4681          * All the TLBs can be flushed out of mmu lock, see the comments in
4682          * kvm_mmu_slot_remove_write_access().
4683          */
4684         lockdep_assert_held(&kvm->slots_lock);
4685         if (flush)
4686                 kvm_flush_remote_tlbs(kvm);
4687
4688         mutex_unlock(&kvm->slots_lock);
4689         return r;
4690 }
4691
4692 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4693                         bool line_status)
4694 {
4695         if (!irqchip_in_kernel(kvm))
4696                 return -ENXIO;
4697
4698         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4699                                         irq_event->irq, irq_event->level,
4700                                         line_status);
4701         return 0;
4702 }
4703
4704 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4705                             struct kvm_enable_cap *cap)
4706 {
4707         int r;
4708
4709         if (cap->flags)
4710                 return -EINVAL;
4711
4712         switch (cap->cap) {
4713         case KVM_CAP_DISABLE_QUIRKS:
4714                 kvm->arch.disabled_quirks = cap->args[0];
4715                 r = 0;
4716                 break;
4717         case KVM_CAP_SPLIT_IRQCHIP: {
4718                 mutex_lock(&kvm->lock);
4719                 r = -EINVAL;
4720                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4721                         goto split_irqchip_unlock;
4722                 r = -EEXIST;
4723                 if (irqchip_in_kernel(kvm))
4724                         goto split_irqchip_unlock;
4725                 if (kvm->created_vcpus)
4726                         goto split_irqchip_unlock;
4727                 r = kvm_setup_empty_irq_routing(kvm);
4728                 if (r)
4729                         goto split_irqchip_unlock;
4730                 /* Pairs with irqchip_in_kernel. */
4731                 smp_wmb();
4732                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4733                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4734                 r = 0;
4735 split_irqchip_unlock:
4736                 mutex_unlock(&kvm->lock);
4737                 break;
4738         }
4739         case KVM_CAP_X2APIC_API:
4740                 r = -EINVAL;
4741                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4742                         break;
4743
4744                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4745                         kvm->arch.x2apic_format = true;
4746                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4747                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4748
4749                 r = 0;
4750                 break;
4751         case KVM_CAP_X86_DISABLE_EXITS:
4752                 r = -EINVAL;
4753                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4754                         break;
4755
4756                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4757                         kvm_can_mwait_in_guest())
4758                         kvm->arch.mwait_in_guest = true;
4759                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4760                         kvm->arch.hlt_in_guest = true;
4761                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4762                         kvm->arch.pause_in_guest = true;
4763                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4764                         kvm->arch.cstate_in_guest = true;
4765                 r = 0;
4766                 break;
4767         case KVM_CAP_MSR_PLATFORM_INFO:
4768                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4769                 r = 0;
4770                 break;
4771         case KVM_CAP_EXCEPTION_PAYLOAD:
4772                 kvm->arch.exception_payload_enabled = cap->args[0];
4773                 r = 0;
4774                 break;
4775         default:
4776                 r = -EINVAL;
4777                 break;
4778         }
4779         return r;
4780 }
4781
4782 long kvm_arch_vm_ioctl(struct file *filp,
4783                        unsigned int ioctl, unsigned long arg)
4784 {
4785         struct kvm *kvm = filp->private_data;
4786         void __user *argp = (void __user *)arg;
4787         int r = -ENOTTY;
4788         /*
4789          * This union makes it completely explicit to gcc-3.x
4790          * that these two variables' stack usage should be
4791          * combined, not added together.
4792          */
4793         union {
4794                 struct kvm_pit_state ps;
4795                 struct kvm_pit_state2 ps2;
4796                 struct kvm_pit_config pit_config;
4797         } u;
4798
4799         switch (ioctl) {
4800         case KVM_SET_TSS_ADDR:
4801                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4802                 break;
4803         case KVM_SET_IDENTITY_MAP_ADDR: {
4804                 u64 ident_addr;
4805
4806                 mutex_lock(&kvm->lock);
4807                 r = -EINVAL;
4808                 if (kvm->created_vcpus)
4809                         goto set_identity_unlock;
4810                 r = -EFAULT;
4811                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4812                         goto set_identity_unlock;
4813                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4814 set_identity_unlock:
4815                 mutex_unlock(&kvm->lock);
4816                 break;
4817         }
4818         case KVM_SET_NR_MMU_PAGES:
4819                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4820                 break;
4821         case KVM_GET_NR_MMU_PAGES:
4822                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4823                 break;
4824         case KVM_CREATE_IRQCHIP: {
4825                 mutex_lock(&kvm->lock);
4826
4827                 r = -EEXIST;
4828                 if (irqchip_in_kernel(kvm))
4829                         goto create_irqchip_unlock;
4830
4831                 r = -EINVAL;
4832                 if (kvm->created_vcpus)
4833                         goto create_irqchip_unlock;
4834
4835                 r = kvm_pic_init(kvm);
4836                 if (r)
4837                         goto create_irqchip_unlock;
4838
4839                 r = kvm_ioapic_init(kvm);
4840                 if (r) {
4841                         kvm_pic_destroy(kvm);
4842                         goto create_irqchip_unlock;
4843                 }
4844
4845                 r = kvm_setup_default_irq_routing(kvm);
4846                 if (r) {
4847                         kvm_ioapic_destroy(kvm);
4848                         kvm_pic_destroy(kvm);
4849                         goto create_irqchip_unlock;
4850                 }
4851                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4852                 smp_wmb();
4853                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4854         create_irqchip_unlock:
4855                 mutex_unlock(&kvm->lock);
4856                 break;
4857         }
4858         case KVM_CREATE_PIT:
4859                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4860                 goto create_pit;
4861         case KVM_CREATE_PIT2:
4862                 r = -EFAULT;
4863                 if (copy_from_user(&u.pit_config, argp,
4864                                    sizeof(struct kvm_pit_config)))
4865                         goto out;
4866         create_pit:
4867                 mutex_lock(&kvm->lock);
4868                 r = -EEXIST;
4869                 if (kvm->arch.vpit)
4870                         goto create_pit_unlock;
4871                 r = -ENOMEM;
4872                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4873                 if (kvm->arch.vpit)
4874                         r = 0;
4875         create_pit_unlock:
4876                 mutex_unlock(&kvm->lock);
4877                 break;
4878         case KVM_GET_IRQCHIP: {
4879                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4880                 struct kvm_irqchip *chip;
4881
4882                 chip = memdup_user(argp, sizeof(*chip));
4883                 if (IS_ERR(chip)) {
4884                         r = PTR_ERR(chip);
4885                         goto out;
4886                 }
4887
4888                 r = -ENXIO;
4889                 if (!irqchip_kernel(kvm))
4890                         goto get_irqchip_out;
4891                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4892                 if (r)
4893                         goto get_irqchip_out;
4894                 r = -EFAULT;
4895                 if (copy_to_user(argp, chip, sizeof(*chip)))
4896                         goto get_irqchip_out;
4897                 r = 0;
4898         get_irqchip_out:
4899                 kfree(chip);
4900                 break;
4901         }
4902         case KVM_SET_IRQCHIP: {
4903                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4904                 struct kvm_irqchip *chip;
4905
4906                 chip = memdup_user(argp, sizeof(*chip));
4907                 if (IS_ERR(chip)) {
4908                         r = PTR_ERR(chip);
4909                         goto out;
4910                 }
4911
4912                 r = -ENXIO;
4913                 if (!irqchip_kernel(kvm))
4914                         goto set_irqchip_out;
4915                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4916                 if (r)
4917                         goto set_irqchip_out;
4918                 r = 0;
4919         set_irqchip_out:
4920                 kfree(chip);
4921                 break;
4922         }
4923         case KVM_GET_PIT: {
4924                 r = -EFAULT;
4925                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4926                         goto out;
4927                 r = -ENXIO;
4928                 if (!kvm->arch.vpit)
4929                         goto out;
4930                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4931                 if (r)
4932                         goto out;
4933                 r = -EFAULT;
4934                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4935                         goto out;
4936                 r = 0;
4937                 break;
4938         }
4939         case KVM_SET_PIT: {
4940                 r = -EFAULT;
4941                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4942                         goto out;
4943                 r = -ENXIO;
4944                 if (!kvm->arch.vpit)
4945                         goto out;
4946                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4947                 break;
4948         }
4949         case KVM_GET_PIT2: {
4950                 r = -ENXIO;
4951                 if (!kvm->arch.vpit)
4952                         goto out;
4953                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4954                 if (r)
4955                         goto out;
4956                 r = -EFAULT;
4957                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4958                         goto out;
4959                 r = 0;
4960                 break;
4961         }
4962         case KVM_SET_PIT2: {
4963                 r = -EFAULT;
4964                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4965                         goto out;
4966                 r = -ENXIO;
4967                 if (!kvm->arch.vpit)
4968                         goto out;
4969                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4970                 break;
4971         }
4972         case KVM_REINJECT_CONTROL: {
4973                 struct kvm_reinject_control control;
4974                 r =  -EFAULT;
4975                 if (copy_from_user(&control, argp, sizeof(control)))
4976                         goto out;
4977                 r = kvm_vm_ioctl_reinject(kvm, &control);
4978                 break;
4979         }
4980         case KVM_SET_BOOT_CPU_ID:
4981                 r = 0;
4982                 mutex_lock(&kvm->lock);
4983                 if (kvm->created_vcpus)
4984                         r = -EBUSY;
4985                 else
4986                         kvm->arch.bsp_vcpu_id = arg;
4987                 mutex_unlock(&kvm->lock);
4988                 break;
4989         case KVM_XEN_HVM_CONFIG: {
4990                 struct kvm_xen_hvm_config xhc;
4991                 r = -EFAULT;
4992                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4993                         goto out;
4994                 r = -EINVAL;
4995                 if (xhc.flags)
4996                         goto out;
4997                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4998                 r = 0;
4999                 break;
5000         }
5001         case KVM_SET_CLOCK: {
5002                 struct kvm_clock_data user_ns;
5003                 u64 now_ns;
5004
5005                 r = -EFAULT;
5006                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5007                         goto out;
5008
5009                 r = -EINVAL;
5010                 if (user_ns.flags)
5011                         goto out;
5012
5013                 r = 0;
5014                 /*
5015                  * TODO: userspace has to take care of races with VCPU_RUN, so
5016                  * kvm_gen_update_masterclock() can be cut down to locked
5017                  * pvclock_update_vm_gtod_copy().
5018                  */
5019                 kvm_gen_update_masterclock(kvm);
5020                 now_ns = get_kvmclock_ns(kvm);
5021                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5022                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5023                 break;
5024         }
5025         case KVM_GET_CLOCK: {
5026                 struct kvm_clock_data user_ns;
5027                 u64 now_ns;
5028
5029                 now_ns = get_kvmclock_ns(kvm);
5030                 user_ns.clock = now_ns;
5031                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5032                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5033
5034                 r = -EFAULT;
5035                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5036                         goto out;
5037                 r = 0;
5038                 break;
5039         }
5040         case KVM_MEMORY_ENCRYPT_OP: {
5041                 r = -ENOTTY;
5042                 if (kvm_x86_ops->mem_enc_op)
5043                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5044                 break;
5045         }
5046         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5047                 struct kvm_enc_region region;
5048
5049                 r = -EFAULT;
5050                 if (copy_from_user(&region, argp, sizeof(region)))
5051                         goto out;
5052
5053                 r = -ENOTTY;
5054                 if (kvm_x86_ops->mem_enc_reg_region)
5055                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5056                 break;
5057         }
5058         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5059                 struct kvm_enc_region region;
5060
5061                 r = -EFAULT;
5062                 if (copy_from_user(&region, argp, sizeof(region)))
5063                         goto out;
5064
5065                 r = -ENOTTY;
5066                 if (kvm_x86_ops->mem_enc_unreg_region)
5067                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5068                 break;
5069         }
5070         case KVM_HYPERV_EVENTFD: {
5071                 struct kvm_hyperv_eventfd hvevfd;
5072
5073                 r = -EFAULT;
5074                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5075                         goto out;
5076                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5077                 break;
5078         }
5079         case KVM_SET_PMU_EVENT_FILTER:
5080                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5081                 break;
5082         default:
5083                 r = -ENOTTY;
5084         }
5085 out:
5086         return r;
5087 }
5088
5089 static void kvm_init_msr_list(void)
5090 {
5091         struct x86_pmu_capability x86_pmu;
5092         u32 dummy[2];
5093         unsigned i, j;
5094
5095         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5096                          "Please update the fixed PMCs in msrs_to_save[]");
5097
5098         perf_get_x86_pmu_capability(&x86_pmu);
5099
5100         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5101                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5102                         continue;
5103
5104                 /*
5105                  * Even MSRs that are valid in the host may not be exposed
5106                  * to the guests in some cases.
5107                  */
5108                 switch (msrs_to_save[i]) {
5109                 case MSR_IA32_BNDCFGS:
5110                         if (!kvm_mpx_supported())
5111                                 continue;
5112                         break;
5113                 case MSR_TSC_AUX:
5114                         if (!kvm_x86_ops->rdtscp_supported())
5115                                 continue;
5116                         break;
5117                 case MSR_IA32_RTIT_CTL:
5118                 case MSR_IA32_RTIT_STATUS:
5119                         if (!kvm_x86_ops->pt_supported())
5120                                 continue;
5121                         break;
5122                 case MSR_IA32_RTIT_CR3_MATCH:
5123                         if (!kvm_x86_ops->pt_supported() ||
5124                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5125                                 continue;
5126                         break;
5127                 case MSR_IA32_RTIT_OUTPUT_BASE:
5128                 case MSR_IA32_RTIT_OUTPUT_MASK:
5129                         if (!kvm_x86_ops->pt_supported() ||
5130                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5131                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5132                                 continue;
5133                         break;
5134                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5135                         if (!kvm_x86_ops->pt_supported() ||
5136                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5137                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5138                                 continue;
5139                         break;
5140                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5141                         if (msrs_to_save[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5142                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5143                                 continue;
5144                         break;
5145                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5146                         if (msrs_to_save[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5147                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5148                                 continue;
5149                 }
5150                 default:
5151                         break;
5152                 }
5153
5154                 if (j < i)
5155                         msrs_to_save[j] = msrs_to_save[i];
5156                 j++;
5157         }
5158         num_msrs_to_save = j;
5159
5160         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5161                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5162                         continue;
5163
5164                 if (j < i)
5165                         emulated_msrs[j] = emulated_msrs[i];
5166                 j++;
5167         }
5168         num_emulated_msrs = j;
5169
5170         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5171                 struct kvm_msr_entry msr;
5172
5173                 msr.index = msr_based_features[i];
5174                 if (kvm_get_msr_feature(&msr))
5175                         continue;
5176
5177                 if (j < i)
5178                         msr_based_features[j] = msr_based_features[i];
5179                 j++;
5180         }
5181         num_msr_based_features = j;
5182 }
5183
5184 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5185                            const void *v)
5186 {
5187         int handled = 0;
5188         int n;
5189
5190         do {
5191                 n = min(len, 8);
5192                 if (!(lapic_in_kernel(vcpu) &&
5193                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5194                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5195                         break;
5196                 handled += n;
5197                 addr += n;
5198                 len -= n;
5199                 v += n;
5200         } while (len);
5201
5202         return handled;
5203 }
5204
5205 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5206 {
5207         int handled = 0;
5208         int n;
5209
5210         do {
5211                 n = min(len, 8);
5212                 if (!(lapic_in_kernel(vcpu) &&
5213                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5214                                          addr, n, v))
5215                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5216                         break;
5217                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5218                 handled += n;
5219                 addr += n;
5220                 len -= n;
5221                 v += n;
5222         } while (len);
5223
5224         return handled;
5225 }
5226
5227 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5228                         struct kvm_segment *var, int seg)
5229 {
5230         kvm_x86_ops->set_segment(vcpu, var, seg);
5231 }
5232
5233 void kvm_get_segment(struct kvm_vcpu *vcpu,
5234                      struct kvm_segment *var, int seg)
5235 {
5236         kvm_x86_ops->get_segment(vcpu, var, seg);
5237 }
5238
5239 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5240                            struct x86_exception *exception)
5241 {
5242         gpa_t t_gpa;
5243
5244         BUG_ON(!mmu_is_nested(vcpu));
5245
5246         /* NPT walks are always user-walks */
5247         access |= PFERR_USER_MASK;
5248         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5249
5250         return t_gpa;
5251 }
5252
5253 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5254                               struct x86_exception *exception)
5255 {
5256         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5257         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5258 }
5259
5260  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5261                                 struct x86_exception *exception)
5262 {
5263         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5264         access |= PFERR_FETCH_MASK;
5265         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5266 }
5267
5268 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5269                                struct x86_exception *exception)
5270 {
5271         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5272         access |= PFERR_WRITE_MASK;
5273         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5274 }
5275
5276 /* uses this to access any guest's mapped memory without checking CPL */
5277 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5278                                 struct x86_exception *exception)
5279 {
5280         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5281 }
5282
5283 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5284                                       struct kvm_vcpu *vcpu, u32 access,
5285                                       struct x86_exception *exception)
5286 {
5287         void *data = val;
5288         int r = X86EMUL_CONTINUE;
5289
5290         while (bytes) {
5291                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5292                                                             exception);
5293                 unsigned offset = addr & (PAGE_SIZE-1);
5294                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5295                 int ret;
5296
5297                 if (gpa == UNMAPPED_GVA)
5298                         return X86EMUL_PROPAGATE_FAULT;
5299                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5300                                                offset, toread);
5301                 if (ret < 0) {
5302                         r = X86EMUL_IO_NEEDED;
5303                         goto out;
5304                 }
5305
5306                 bytes -= toread;
5307                 data += toread;
5308                 addr += toread;
5309         }
5310 out:
5311         return r;
5312 }
5313
5314 /* used for instruction fetching */
5315 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5316                                 gva_t addr, void *val, unsigned int bytes,
5317                                 struct x86_exception *exception)
5318 {
5319         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5320         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5321         unsigned offset;
5322         int ret;
5323
5324         /* Inline kvm_read_guest_virt_helper for speed.  */
5325         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5326                                                     exception);
5327         if (unlikely(gpa == UNMAPPED_GVA))
5328                 return X86EMUL_PROPAGATE_FAULT;
5329
5330         offset = addr & (PAGE_SIZE-1);
5331         if (WARN_ON(offset + bytes > PAGE_SIZE))
5332                 bytes = (unsigned)PAGE_SIZE - offset;
5333         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5334                                        offset, bytes);
5335         if (unlikely(ret < 0))
5336                 return X86EMUL_IO_NEEDED;
5337
5338         return X86EMUL_CONTINUE;
5339 }
5340
5341 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5342                                gva_t addr, void *val, unsigned int bytes,
5343                                struct x86_exception *exception)
5344 {
5345         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5346
5347         /*
5348          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5349          * is returned, but our callers are not ready for that and they blindly
5350          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5351          * uninitialized kernel stack memory into cr2 and error code.
5352          */
5353         memset(exception, 0, sizeof(*exception));
5354         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5355                                           exception);
5356 }
5357 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5358
5359 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5360                              gva_t addr, void *val, unsigned int bytes,
5361                              struct x86_exception *exception, bool system)
5362 {
5363         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5364         u32 access = 0;
5365
5366         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5367                 access |= PFERR_USER_MASK;
5368
5369         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5370 }
5371
5372 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5373                 unsigned long addr, void *val, unsigned int bytes)
5374 {
5375         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5376         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5377
5378         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5379 }
5380
5381 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5382                                       struct kvm_vcpu *vcpu, u32 access,
5383                                       struct x86_exception *exception)
5384 {
5385         void *data = val;
5386         int r = X86EMUL_CONTINUE;
5387
5388         while (bytes) {
5389                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5390                                                              access,
5391                                                              exception);
5392                 unsigned offset = addr & (PAGE_SIZE-1);
5393                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5394                 int ret;
5395
5396                 if (gpa == UNMAPPED_GVA)
5397                         return X86EMUL_PROPAGATE_FAULT;
5398                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5399                 if (ret < 0) {
5400                         r = X86EMUL_IO_NEEDED;
5401                         goto out;
5402                 }
5403
5404                 bytes -= towrite;
5405                 data += towrite;
5406                 addr += towrite;
5407         }
5408 out:
5409         return r;
5410 }
5411
5412 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5413                               unsigned int bytes, struct x86_exception *exception,
5414                               bool system)
5415 {
5416         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5417         u32 access = PFERR_WRITE_MASK;
5418
5419         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5420                 access |= PFERR_USER_MASK;
5421
5422         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5423                                            access, exception);
5424 }
5425
5426 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5427                                 unsigned int bytes, struct x86_exception *exception)
5428 {
5429         /* kvm_write_guest_virt_system can pull in tons of pages. */
5430         vcpu->arch.l1tf_flush_l1d = true;
5431
5432         /*
5433          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5434          * is returned, but our callers are not ready for that and they blindly
5435          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5436          * uninitialized kernel stack memory into cr2 and error code.
5437          */
5438         memset(exception, 0, sizeof(*exception));
5439         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5440                                            PFERR_WRITE_MASK, exception);
5441 }
5442 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5443
5444 int handle_ud(struct kvm_vcpu *vcpu)
5445 {
5446         int emul_type = EMULTYPE_TRAP_UD;
5447         char sig[5]; /* ud2; .ascii "kvm" */
5448         struct x86_exception e;
5449
5450         if (force_emulation_prefix &&
5451             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5452                                 sig, sizeof(sig), &e) == 0 &&
5453             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5454                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5455                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5456         }
5457
5458         return kvm_emulate_instruction(vcpu, emul_type);
5459 }
5460 EXPORT_SYMBOL_GPL(handle_ud);
5461
5462 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5463                             gpa_t gpa, bool write)
5464 {
5465         /* For APIC access vmexit */
5466         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5467                 return 1;
5468
5469         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5470                 trace_vcpu_match_mmio(gva, gpa, write, true);
5471                 return 1;
5472         }
5473
5474         return 0;
5475 }
5476
5477 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5478                                 gpa_t *gpa, struct x86_exception *exception,
5479                                 bool write)
5480 {
5481         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5482                 | (write ? PFERR_WRITE_MASK : 0);
5483
5484         /*
5485          * currently PKRU is only applied to ept enabled guest so
5486          * there is no pkey in EPT page table for L1 guest or EPT
5487          * shadow page table for L2 guest.
5488          */
5489         if (vcpu_match_mmio_gva(vcpu, gva)
5490             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5491                                  vcpu->arch.mmio_access, 0, access)) {
5492                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5493                                         (gva & (PAGE_SIZE - 1));
5494                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5495                 return 1;
5496         }
5497
5498         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5499
5500         if (*gpa == UNMAPPED_GVA)
5501                 return -1;
5502
5503         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5504 }
5505
5506 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5507                         const void *val, int bytes)
5508 {
5509         int ret;
5510
5511         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5512         if (ret < 0)
5513                 return 0;
5514         kvm_page_track_write(vcpu, gpa, val, bytes);
5515         return 1;
5516 }
5517
5518 struct read_write_emulator_ops {
5519         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5520                                   int bytes);
5521         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5522                                   void *val, int bytes);
5523         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5524                                int bytes, void *val);
5525         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5526                                     void *val, int bytes);
5527         bool write;
5528 };
5529
5530 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5531 {
5532         if (vcpu->mmio_read_completed) {
5533                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5534                                vcpu->mmio_fragments[0].gpa, val);
5535                 vcpu->mmio_read_completed = 0;
5536                 return 1;
5537         }
5538
5539         return 0;
5540 }
5541
5542 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5543                         void *val, int bytes)
5544 {
5545         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5546 }
5547
5548 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5549                          void *val, int bytes)
5550 {
5551         return emulator_write_phys(vcpu, gpa, val, bytes);
5552 }
5553
5554 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5555 {
5556         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5557         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5558 }
5559
5560 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5561                           void *val, int bytes)
5562 {
5563         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5564         return X86EMUL_IO_NEEDED;
5565 }
5566
5567 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5568                            void *val, int bytes)
5569 {
5570         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5571
5572         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5573         return X86EMUL_CONTINUE;
5574 }
5575
5576 static const struct read_write_emulator_ops read_emultor = {
5577         .read_write_prepare = read_prepare,
5578         .read_write_emulate = read_emulate,
5579         .read_write_mmio = vcpu_mmio_read,
5580         .read_write_exit_mmio = read_exit_mmio,
5581 };
5582
5583 static const struct read_write_emulator_ops write_emultor = {
5584         .read_write_emulate = write_emulate,
5585         .read_write_mmio = write_mmio,
5586         .read_write_exit_mmio = write_exit_mmio,
5587         .write = true,
5588 };
5589
5590 static int emulator_read_write_onepage(unsigned long addr, void *val,
5591                                        unsigned int bytes,
5592                                        struct x86_exception *exception,
5593                                        struct kvm_vcpu *vcpu,
5594                                        const struct read_write_emulator_ops *ops)
5595 {
5596         gpa_t gpa;
5597         int handled, ret;
5598         bool write = ops->write;
5599         struct kvm_mmio_fragment *frag;
5600         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5601
5602         /*
5603          * If the exit was due to a NPF we may already have a GPA.
5604          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5605          * Note, this cannot be used on string operations since string
5606          * operation using rep will only have the initial GPA from the NPF
5607          * occurred.
5608          */
5609         if (vcpu->arch.gpa_available &&
5610             emulator_can_use_gpa(ctxt) &&
5611             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5612                 gpa = vcpu->arch.gpa_val;
5613                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5614         } else {
5615                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5616                 if (ret < 0)
5617                         return X86EMUL_PROPAGATE_FAULT;
5618         }
5619
5620         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5621                 return X86EMUL_CONTINUE;
5622
5623         /*
5624          * Is this MMIO handled locally?
5625          */
5626         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5627         if (handled == bytes)
5628                 return X86EMUL_CONTINUE;
5629
5630         gpa += handled;
5631         bytes -= handled;
5632         val += handled;
5633
5634         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5635         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5636         frag->gpa = gpa;
5637         frag->data = val;
5638         frag->len = bytes;
5639         return X86EMUL_CONTINUE;
5640 }
5641
5642 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5643                         unsigned long addr,
5644                         void *val, unsigned int bytes,
5645                         struct x86_exception *exception,
5646                         const struct read_write_emulator_ops *ops)
5647 {
5648         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5649         gpa_t gpa;
5650         int rc;
5651
5652         if (ops->read_write_prepare &&
5653                   ops->read_write_prepare(vcpu, val, bytes))
5654                 return X86EMUL_CONTINUE;
5655
5656         vcpu->mmio_nr_fragments = 0;
5657
5658         /* Crossing a page boundary? */
5659         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5660                 int now;
5661
5662                 now = -addr & ~PAGE_MASK;
5663                 rc = emulator_read_write_onepage(addr, val, now, exception,
5664                                                  vcpu, ops);
5665
5666                 if (rc != X86EMUL_CONTINUE)
5667                         return rc;
5668                 addr += now;
5669                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5670                         addr = (u32)addr;
5671                 val += now;
5672                 bytes -= now;
5673         }
5674
5675         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5676                                          vcpu, ops);
5677         if (rc != X86EMUL_CONTINUE)
5678                 return rc;
5679
5680         if (!vcpu->mmio_nr_fragments)
5681                 return rc;
5682
5683         gpa = vcpu->mmio_fragments[0].gpa;
5684
5685         vcpu->mmio_needed = 1;
5686         vcpu->mmio_cur_fragment = 0;
5687
5688         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5689         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5690         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5691         vcpu->run->mmio.phys_addr = gpa;
5692
5693         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5694 }
5695
5696 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5697                                   unsigned long addr,
5698                                   void *val,
5699                                   unsigned int bytes,
5700                                   struct x86_exception *exception)
5701 {
5702         return emulator_read_write(ctxt, addr, val, bytes,
5703                                    exception, &read_emultor);
5704 }
5705
5706 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5707                             unsigned long addr,
5708                             const void *val,
5709                             unsigned int bytes,
5710                             struct x86_exception *exception)
5711 {
5712         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5713                                    exception, &write_emultor);
5714 }
5715
5716 #define CMPXCHG_TYPE(t, ptr, old, new) \
5717         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5718
5719 #ifdef CONFIG_X86_64
5720 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5721 #else
5722 #  define CMPXCHG64(ptr, old, new) \
5723         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5724 #endif
5725
5726 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5727                                      unsigned long addr,
5728                                      const void *old,
5729                                      const void *new,
5730                                      unsigned int bytes,
5731                                      struct x86_exception *exception)
5732 {
5733         struct kvm_host_map map;
5734         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5735         gpa_t gpa;
5736         char *kaddr;
5737         bool exchanged;
5738
5739         /* guests cmpxchg8b have to be emulated atomically */
5740         if (bytes > 8 || (bytes & (bytes - 1)))
5741                 goto emul_write;
5742
5743         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5744
5745         if (gpa == UNMAPPED_GVA ||
5746             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5747                 goto emul_write;
5748
5749         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5750                 goto emul_write;
5751
5752         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5753                 goto emul_write;
5754
5755         kaddr = map.hva + offset_in_page(gpa);
5756
5757         switch (bytes) {
5758         case 1:
5759                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5760                 break;
5761         case 2:
5762                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5763                 break;
5764         case 4:
5765                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5766                 break;
5767         case 8:
5768                 exchanged = CMPXCHG64(kaddr, old, new);
5769                 break;
5770         default:
5771                 BUG();
5772         }
5773
5774         kvm_vcpu_unmap(vcpu, &map, true);
5775
5776         if (!exchanged)
5777                 return X86EMUL_CMPXCHG_FAILED;
5778
5779         kvm_page_track_write(vcpu, gpa, new, bytes);
5780
5781         return X86EMUL_CONTINUE;
5782
5783 emul_write:
5784         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5785
5786         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5787 }
5788
5789 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5790 {
5791         int r = 0, i;
5792
5793         for (i = 0; i < vcpu->arch.pio.count; i++) {
5794                 if (vcpu->arch.pio.in)
5795                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5796                                             vcpu->arch.pio.size, pd);
5797                 else
5798                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5799                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5800                                              pd);
5801                 if (r)
5802                         break;
5803                 pd += vcpu->arch.pio.size;
5804         }
5805         return r;
5806 }
5807
5808 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5809                                unsigned short port, void *val,
5810                                unsigned int count, bool in)
5811 {
5812         vcpu->arch.pio.port = port;
5813         vcpu->arch.pio.in = in;
5814         vcpu->arch.pio.count  = count;
5815         vcpu->arch.pio.size = size;
5816
5817         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5818                 vcpu->arch.pio.count = 0;
5819                 return 1;
5820         }
5821
5822         vcpu->run->exit_reason = KVM_EXIT_IO;
5823         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5824         vcpu->run->io.size = size;
5825         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5826         vcpu->run->io.count = count;
5827         vcpu->run->io.port = port;
5828
5829         return 0;
5830 }
5831
5832 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5833                                     int size, unsigned short port, void *val,
5834                                     unsigned int count)
5835 {
5836         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5837         int ret;
5838
5839         if (vcpu->arch.pio.count)
5840                 goto data_avail;
5841
5842         memset(vcpu->arch.pio_data, 0, size * count);
5843
5844         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5845         if (ret) {
5846 data_avail:
5847                 memcpy(val, vcpu->arch.pio_data, size * count);
5848                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5849                 vcpu->arch.pio.count = 0;
5850                 return 1;
5851         }
5852
5853         return 0;
5854 }
5855
5856 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5857                                      int size, unsigned short port,
5858                                      const void *val, unsigned int count)
5859 {
5860         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5861
5862         memcpy(vcpu->arch.pio_data, val, size * count);
5863         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5864         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5865 }
5866
5867 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5868 {
5869         return kvm_x86_ops->get_segment_base(vcpu, seg);
5870 }
5871
5872 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5873 {
5874         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5875 }
5876
5877 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5878 {
5879         if (!need_emulate_wbinvd(vcpu))
5880                 return X86EMUL_CONTINUE;
5881
5882         if (kvm_x86_ops->has_wbinvd_exit()) {
5883                 int cpu = get_cpu();
5884
5885                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5886                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5887                                 wbinvd_ipi, NULL, 1);
5888                 put_cpu();
5889                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5890         } else
5891                 wbinvd();
5892         return X86EMUL_CONTINUE;
5893 }
5894
5895 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5896 {
5897         kvm_emulate_wbinvd_noskip(vcpu);
5898         return kvm_skip_emulated_instruction(vcpu);
5899 }
5900 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5901
5902
5903
5904 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5905 {
5906         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5907 }
5908
5909 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5910                            unsigned long *dest)
5911 {
5912         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5913 }
5914
5915 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5916                            unsigned long value)
5917 {
5918
5919         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5920 }
5921
5922 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5923 {
5924         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5925 }
5926
5927 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5928 {
5929         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5930         unsigned long value;
5931
5932         switch (cr) {
5933         case 0:
5934                 value = kvm_read_cr0(vcpu);
5935                 break;
5936         case 2:
5937                 value = vcpu->arch.cr2;
5938                 break;
5939         case 3:
5940                 value = kvm_read_cr3(vcpu);
5941                 break;
5942         case 4:
5943                 value = kvm_read_cr4(vcpu);
5944                 break;
5945         case 8:
5946                 value = kvm_get_cr8(vcpu);
5947                 break;
5948         default:
5949                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5950                 return 0;
5951         }
5952
5953         return value;
5954 }
5955
5956 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5957 {
5958         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5959         int res = 0;
5960
5961         switch (cr) {
5962         case 0:
5963                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5964                 break;
5965         case 2:
5966                 vcpu->arch.cr2 = val;
5967                 break;
5968         case 3:
5969                 res = kvm_set_cr3(vcpu, val);
5970                 break;
5971         case 4:
5972                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5973                 break;
5974         case 8:
5975                 res = kvm_set_cr8(vcpu, val);
5976                 break;
5977         default:
5978                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5979                 res = -1;
5980         }
5981
5982         return res;
5983 }
5984
5985 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5986 {
5987         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5988 }
5989
5990 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5991 {
5992         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5993 }
5994
5995 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5996 {
5997         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5998 }
5999
6000 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6001 {
6002         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6003 }
6004
6005 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6006 {
6007         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6008 }
6009
6010 static unsigned long emulator_get_cached_segment_base(
6011         struct x86_emulate_ctxt *ctxt, int seg)
6012 {
6013         return get_segment_base(emul_to_vcpu(ctxt), seg);
6014 }
6015
6016 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6017                                  struct desc_struct *desc, u32 *base3,
6018                                  int seg)
6019 {
6020         struct kvm_segment var;
6021
6022         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6023         *selector = var.selector;
6024
6025         if (var.unusable) {
6026                 memset(desc, 0, sizeof(*desc));
6027                 if (base3)
6028                         *base3 = 0;
6029                 return false;
6030         }
6031
6032         if (var.g)
6033                 var.limit >>= 12;
6034         set_desc_limit(desc, var.limit);
6035         set_desc_base(desc, (unsigned long)var.base);
6036 #ifdef CONFIG_X86_64
6037         if (base3)
6038                 *base3 = var.base >> 32;
6039 #endif
6040         desc->type = var.type;
6041         desc->s = var.s;
6042         desc->dpl = var.dpl;
6043         desc->p = var.present;
6044         desc->avl = var.avl;
6045         desc->l = var.l;
6046         desc->d = var.db;
6047         desc->g = var.g;
6048
6049         return true;
6050 }
6051
6052 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6053                                  struct desc_struct *desc, u32 base3,
6054                                  int seg)
6055 {
6056         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6057         struct kvm_segment var;
6058
6059         var.selector = selector;
6060         var.base = get_desc_base(desc);
6061 #ifdef CONFIG_X86_64
6062         var.base |= ((u64)base3) << 32;
6063 #endif
6064         var.limit = get_desc_limit(desc);
6065         if (desc->g)
6066                 var.limit = (var.limit << 12) | 0xfff;
6067         var.type = desc->type;
6068         var.dpl = desc->dpl;
6069         var.db = desc->d;
6070         var.s = desc->s;
6071         var.l = desc->l;
6072         var.g = desc->g;
6073         var.avl = desc->avl;
6074         var.present = desc->p;
6075         var.unusable = !var.present;
6076         var.padding = 0;
6077
6078         kvm_set_segment(vcpu, &var, seg);
6079         return;
6080 }
6081
6082 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6083                             u32 msr_index, u64 *pdata)
6084 {
6085         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6086 }
6087
6088 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6089                             u32 msr_index, u64 data)
6090 {
6091         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6092 }
6093
6094 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6095 {
6096         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6097
6098         return vcpu->arch.smbase;
6099 }
6100
6101 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6102 {
6103         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6104
6105         vcpu->arch.smbase = smbase;
6106 }
6107
6108 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6109                               u32 pmc)
6110 {
6111         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6112 }
6113
6114 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6115                              u32 pmc, u64 *pdata)
6116 {
6117         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6118 }
6119
6120 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6121 {
6122         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6123 }
6124
6125 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6126                               struct x86_instruction_info *info,
6127                               enum x86_intercept_stage stage)
6128 {
6129         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6130 }
6131
6132 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6133                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6134 {
6135         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6136 }
6137
6138 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6139 {
6140         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6141 }
6142
6143 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6144 {
6145         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6146 }
6147
6148 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6149 {
6150         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6151 }
6152
6153 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6154 {
6155         return emul_to_vcpu(ctxt)->arch.hflags;
6156 }
6157
6158 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6159 {
6160         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6161 }
6162
6163 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6164                                   const char *smstate)
6165 {
6166         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6167 }
6168
6169 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6170 {
6171         kvm_smm_changed(emul_to_vcpu(ctxt));
6172 }
6173
6174 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6175 {
6176         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6177 }
6178
6179 static const struct x86_emulate_ops emulate_ops = {
6180         .read_gpr            = emulator_read_gpr,
6181         .write_gpr           = emulator_write_gpr,
6182         .read_std            = emulator_read_std,
6183         .write_std           = emulator_write_std,
6184         .read_phys           = kvm_read_guest_phys_system,
6185         .fetch               = kvm_fetch_guest_virt,
6186         .read_emulated       = emulator_read_emulated,
6187         .write_emulated      = emulator_write_emulated,
6188         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6189         .invlpg              = emulator_invlpg,
6190         .pio_in_emulated     = emulator_pio_in_emulated,
6191         .pio_out_emulated    = emulator_pio_out_emulated,
6192         .get_segment         = emulator_get_segment,
6193         .set_segment         = emulator_set_segment,
6194         .get_cached_segment_base = emulator_get_cached_segment_base,
6195         .get_gdt             = emulator_get_gdt,
6196         .get_idt             = emulator_get_idt,
6197         .set_gdt             = emulator_set_gdt,
6198         .set_idt             = emulator_set_idt,
6199         .get_cr              = emulator_get_cr,
6200         .set_cr              = emulator_set_cr,
6201         .cpl                 = emulator_get_cpl,
6202         .get_dr              = emulator_get_dr,
6203         .set_dr              = emulator_set_dr,
6204         .get_smbase          = emulator_get_smbase,
6205         .set_smbase          = emulator_set_smbase,
6206         .set_msr             = emulator_set_msr,
6207         .get_msr             = emulator_get_msr,
6208         .check_pmc           = emulator_check_pmc,
6209         .read_pmc            = emulator_read_pmc,
6210         .halt                = emulator_halt,
6211         .wbinvd              = emulator_wbinvd,
6212         .fix_hypercall       = emulator_fix_hypercall,
6213         .intercept           = emulator_intercept,
6214         .get_cpuid           = emulator_get_cpuid,
6215         .set_nmi_mask        = emulator_set_nmi_mask,
6216         .get_hflags          = emulator_get_hflags,
6217         .set_hflags          = emulator_set_hflags,
6218         .pre_leave_smm       = emulator_pre_leave_smm,
6219         .post_leave_smm      = emulator_post_leave_smm,
6220         .set_xcr             = emulator_set_xcr,
6221 };
6222
6223 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6224 {
6225         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6226         /*
6227          * an sti; sti; sequence only disable interrupts for the first
6228          * instruction. So, if the last instruction, be it emulated or
6229          * not, left the system with the INT_STI flag enabled, it
6230          * means that the last instruction is an sti. We should not
6231          * leave the flag on in this case. The same goes for mov ss
6232          */
6233         if (int_shadow & mask)
6234                 mask = 0;
6235         if (unlikely(int_shadow || mask)) {
6236                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6237                 if (!mask)
6238                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6239         }
6240 }
6241
6242 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6243 {
6244         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6245         if (ctxt->exception.vector == PF_VECTOR)
6246                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6247
6248         if (ctxt->exception.error_code_valid)
6249                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6250                                       ctxt->exception.error_code);
6251         else
6252                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6253         return false;
6254 }
6255
6256 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6257 {
6258         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6259         int cs_db, cs_l;
6260
6261         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6262
6263         ctxt->eflags = kvm_get_rflags(vcpu);
6264         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6265
6266         ctxt->eip = kvm_rip_read(vcpu);
6267         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6268                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6269                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6270                      cs_db                              ? X86EMUL_MODE_PROT32 :
6271                                                           X86EMUL_MODE_PROT16;
6272         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6273         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6274         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6275
6276         init_decode_cache(ctxt);
6277         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6278 }
6279
6280 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6281 {
6282         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6283         int ret;
6284
6285         init_emulate_ctxt(vcpu);
6286
6287         ctxt->op_bytes = 2;
6288         ctxt->ad_bytes = 2;
6289         ctxt->_eip = ctxt->eip + inc_eip;
6290         ret = emulate_int_real(ctxt, irq);
6291
6292         if (ret != X86EMUL_CONTINUE) {
6293                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6294         } else {
6295                 ctxt->eip = ctxt->_eip;
6296                 kvm_rip_write(vcpu, ctxt->eip);
6297                 kvm_set_rflags(vcpu, ctxt->eflags);
6298         }
6299 }
6300 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6301
6302 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6303 {
6304         ++vcpu->stat.insn_emulation_fail;
6305         trace_kvm_emulate_insn_failed(vcpu);
6306
6307         if (emulation_type & EMULTYPE_VMWARE_GP) {
6308                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6309                 return 1;
6310         }
6311
6312         if (emulation_type & EMULTYPE_SKIP) {
6313                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6314                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6315                 vcpu->run->internal.ndata = 0;
6316                 return 0;
6317         }
6318
6319         kvm_queue_exception(vcpu, UD_VECTOR);
6320
6321         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6322                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6323                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6324                 vcpu->run->internal.ndata = 0;
6325                 return 0;
6326         }
6327
6328         return 1;
6329 }
6330
6331 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6332                                   bool write_fault_to_shadow_pgtable,
6333                                   int emulation_type)
6334 {
6335         gpa_t gpa = cr2;
6336         kvm_pfn_t pfn;
6337
6338         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6339                 return false;
6340
6341         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6342                 return false;
6343
6344         if (!vcpu->arch.mmu->direct_map) {
6345                 /*
6346                  * Write permission should be allowed since only
6347                  * write access need to be emulated.
6348                  */
6349                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6350
6351                 /*
6352                  * If the mapping is invalid in guest, let cpu retry
6353                  * it to generate fault.
6354                  */
6355                 if (gpa == UNMAPPED_GVA)
6356                         return true;
6357         }
6358
6359         /*
6360          * Do not retry the unhandleable instruction if it faults on the
6361          * readonly host memory, otherwise it will goto a infinite loop:
6362          * retry instruction -> write #PF -> emulation fail -> retry
6363          * instruction -> ...
6364          */
6365         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6366
6367         /*
6368          * If the instruction failed on the error pfn, it can not be fixed,
6369          * report the error to userspace.
6370          */
6371         if (is_error_noslot_pfn(pfn))
6372                 return false;
6373
6374         kvm_release_pfn_clean(pfn);
6375
6376         /* The instructions are well-emulated on direct mmu. */
6377         if (vcpu->arch.mmu->direct_map) {
6378                 unsigned int indirect_shadow_pages;
6379
6380                 spin_lock(&vcpu->kvm->mmu_lock);
6381                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6382                 spin_unlock(&vcpu->kvm->mmu_lock);
6383
6384                 if (indirect_shadow_pages)
6385                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6386
6387                 return true;
6388         }
6389
6390         /*
6391          * if emulation was due to access to shadowed page table
6392          * and it failed try to unshadow page and re-enter the
6393          * guest to let CPU execute the instruction.
6394          */
6395         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6396
6397         /*
6398          * If the access faults on its page table, it can not
6399          * be fixed by unprotecting shadow page and it should
6400          * be reported to userspace.
6401          */
6402         return !write_fault_to_shadow_pgtable;
6403 }
6404
6405 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6406                               unsigned long cr2,  int emulation_type)
6407 {
6408         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6409         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6410
6411         last_retry_eip = vcpu->arch.last_retry_eip;
6412         last_retry_addr = vcpu->arch.last_retry_addr;
6413
6414         /*
6415          * If the emulation is caused by #PF and it is non-page_table
6416          * writing instruction, it means the VM-EXIT is caused by shadow
6417          * page protected, we can zap the shadow page and retry this
6418          * instruction directly.
6419          *
6420          * Note: if the guest uses a non-page-table modifying instruction
6421          * on the PDE that points to the instruction, then we will unmap
6422          * the instruction and go to an infinite loop. So, we cache the
6423          * last retried eip and the last fault address, if we meet the eip
6424          * and the address again, we can break out of the potential infinite
6425          * loop.
6426          */
6427         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6428
6429         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6430                 return false;
6431
6432         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6433                 return false;
6434
6435         if (x86_page_table_writing_insn(ctxt))
6436                 return false;
6437
6438         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6439                 return false;
6440
6441         vcpu->arch.last_retry_eip = ctxt->eip;
6442         vcpu->arch.last_retry_addr = cr2;
6443
6444         if (!vcpu->arch.mmu->direct_map)
6445                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6446
6447         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6448
6449         return true;
6450 }
6451
6452 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6453 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6454
6455 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6456 {
6457         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6458                 /* This is a good place to trace that we are exiting SMM.  */
6459                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6460
6461                 /* Process a latched INIT or SMI, if any.  */
6462                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6463         }
6464
6465         kvm_mmu_reset_context(vcpu);
6466 }
6467
6468 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6469                                 unsigned long *db)
6470 {
6471         u32 dr6 = 0;
6472         int i;
6473         u32 enable, rwlen;
6474
6475         enable = dr7;
6476         rwlen = dr7 >> 16;
6477         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6478                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6479                         dr6 |= (1 << i);
6480         return dr6;
6481 }
6482
6483 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6484 {
6485         struct kvm_run *kvm_run = vcpu->run;
6486
6487         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6488                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6489                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6490                 kvm_run->debug.arch.exception = DB_VECTOR;
6491                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6492                 return 0;
6493         }
6494         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6495         return 1;
6496 }
6497
6498 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6499 {
6500         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6501         int r;
6502
6503         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6504         if (unlikely(!r))
6505                 return 0;
6506
6507         /*
6508          * rflags is the old, "raw" value of the flags.  The new value has
6509          * not been saved yet.
6510          *
6511          * This is correct even for TF set by the guest, because "the
6512          * processor will not generate this exception after the instruction
6513          * that sets the TF flag".
6514          */
6515         if (unlikely(rflags & X86_EFLAGS_TF))
6516                 r = kvm_vcpu_do_singlestep(vcpu);
6517         return r;
6518 }
6519 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6520
6521 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6522 {
6523         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6524             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6525                 struct kvm_run *kvm_run = vcpu->run;
6526                 unsigned long eip = kvm_get_linear_rip(vcpu);
6527                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6528                                            vcpu->arch.guest_debug_dr7,
6529                                            vcpu->arch.eff_db);
6530
6531                 if (dr6 != 0) {
6532                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6533                         kvm_run->debug.arch.pc = eip;
6534                         kvm_run->debug.arch.exception = DB_VECTOR;
6535                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6536                         *r = 0;
6537                         return true;
6538                 }
6539         }
6540
6541         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6542             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6543                 unsigned long eip = kvm_get_linear_rip(vcpu);
6544                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6545                                            vcpu->arch.dr7,
6546                                            vcpu->arch.db);
6547
6548                 if (dr6 != 0) {
6549                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6550                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6551                         kvm_queue_exception(vcpu, DB_VECTOR);
6552                         *r = 1;
6553                         return true;
6554                 }
6555         }
6556
6557         return false;
6558 }
6559
6560 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6561 {
6562         switch (ctxt->opcode_len) {
6563         case 1:
6564                 switch (ctxt->b) {
6565                 case 0xe4:      /* IN */
6566                 case 0xe5:
6567                 case 0xec:
6568                 case 0xed:
6569                 case 0xe6:      /* OUT */
6570                 case 0xe7:
6571                 case 0xee:
6572                 case 0xef:
6573                 case 0x6c:      /* INS */
6574                 case 0x6d:
6575                 case 0x6e:      /* OUTS */
6576                 case 0x6f:
6577                         return true;
6578                 }
6579                 break;
6580         case 2:
6581                 switch (ctxt->b) {
6582                 case 0x33:      /* RDPMC */
6583                         return true;
6584                 }
6585                 break;
6586         }
6587
6588         return false;
6589 }
6590
6591 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6592                             unsigned long cr2,
6593                             int emulation_type,
6594                             void *insn,
6595                             int insn_len)
6596 {
6597         int r;
6598         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6599         bool writeback = true;
6600         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6601
6602         vcpu->arch.l1tf_flush_l1d = true;
6603
6604         /*
6605          * Clear write_fault_to_shadow_pgtable here to ensure it is
6606          * never reused.
6607          */
6608         vcpu->arch.write_fault_to_shadow_pgtable = false;
6609         kvm_clear_exception_queue(vcpu);
6610
6611         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6612                 init_emulate_ctxt(vcpu);
6613
6614                 /*
6615                  * We will reenter on the same instruction since
6616                  * we do not set complete_userspace_io.  This does not
6617                  * handle watchpoints yet, those would be handled in
6618                  * the emulate_ops.
6619                  */
6620                 if (!(emulation_type & EMULTYPE_SKIP) &&
6621                     kvm_vcpu_check_breakpoint(vcpu, &r))
6622                         return r;
6623
6624                 ctxt->interruptibility = 0;
6625                 ctxt->have_exception = false;
6626                 ctxt->exception.vector = -1;
6627                 ctxt->perm_ok = false;
6628
6629                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6630
6631                 r = x86_decode_insn(ctxt, insn, insn_len);
6632
6633                 trace_kvm_emulate_insn_start(vcpu);
6634                 ++vcpu->stat.insn_emulation;
6635                 if (r != EMULATION_OK)  {
6636                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6637                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6638                                 kvm_queue_exception(vcpu, UD_VECTOR);
6639                                 return 1;
6640                         }
6641                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6642                                                 emulation_type))
6643                                 return 1;
6644                         if (ctxt->have_exception) {
6645                                 /*
6646                                  * #UD should result in just EMULATION_FAILED, and trap-like
6647                                  * exception should not be encountered during decode.
6648                                  */
6649                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6650                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6651                                 inject_emulated_exception(vcpu);
6652                                 return 1;
6653                         }
6654                         return handle_emulation_failure(vcpu, emulation_type);
6655                 }
6656         }
6657
6658         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6659             !is_vmware_backdoor_opcode(ctxt)) {
6660                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6661                 return 1;
6662         }
6663
6664         /*
6665          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6666          * for kvm_skip_emulated_instruction().  The caller is responsible for
6667          * updating interruptibility state and injecting single-step #DBs.
6668          */
6669         if (emulation_type & EMULTYPE_SKIP) {
6670                 kvm_rip_write(vcpu, ctxt->_eip);
6671                 if (ctxt->eflags & X86_EFLAGS_RF)
6672                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6673                 return 1;
6674         }
6675
6676         if (retry_instruction(ctxt, cr2, emulation_type))
6677                 return 1;
6678
6679         /* this is needed for vmware backdoor interface to work since it
6680            changes registers values  during IO operation */
6681         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6682                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6683                 emulator_invalidate_register_cache(ctxt);
6684         }
6685
6686 restart:
6687         /* Save the faulting GPA (cr2) in the address field */
6688         ctxt->exception.address = cr2;
6689
6690         r = x86_emulate_insn(ctxt);
6691
6692         if (r == EMULATION_INTERCEPTED)
6693                 return 1;
6694
6695         if (r == EMULATION_FAILED) {
6696                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6697                                         emulation_type))
6698                         return 1;
6699
6700                 return handle_emulation_failure(vcpu, emulation_type);
6701         }
6702
6703         if (ctxt->have_exception) {
6704                 r = 1;
6705                 if (inject_emulated_exception(vcpu))
6706                         return r;
6707         } else if (vcpu->arch.pio.count) {
6708                 if (!vcpu->arch.pio.in) {
6709                         /* FIXME: return into emulator if single-stepping.  */
6710                         vcpu->arch.pio.count = 0;
6711                 } else {
6712                         writeback = false;
6713                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6714                 }
6715                 r = 0;
6716         } else if (vcpu->mmio_needed) {
6717                 ++vcpu->stat.mmio_exits;
6718
6719                 if (!vcpu->mmio_is_write)
6720                         writeback = false;
6721                 r = 0;
6722                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6723         } else if (r == EMULATION_RESTART)
6724                 goto restart;
6725         else
6726                 r = 1;
6727
6728         if (writeback) {
6729                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6730                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6731                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6732                 if (!ctxt->have_exception ||
6733                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6734                         kvm_rip_write(vcpu, ctxt->eip);
6735                         if (r && ctxt->tf)
6736                                 r = kvm_vcpu_do_singlestep(vcpu);
6737                         __kvm_set_rflags(vcpu, ctxt->eflags);
6738                 }
6739
6740                 /*
6741                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6742                  * do nothing, and it will be requested again as soon as
6743                  * the shadow expires.  But we still need to check here,
6744                  * because POPF has no interrupt shadow.
6745                  */
6746                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6747                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6748         } else
6749                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6750
6751         return r;
6752 }
6753
6754 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6755 {
6756         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6757 }
6758 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6759
6760 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6761                                         void *insn, int insn_len)
6762 {
6763         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6764 }
6765 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6766
6767 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6768 {
6769         vcpu->arch.pio.count = 0;
6770         return 1;
6771 }
6772
6773 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6774 {
6775         vcpu->arch.pio.count = 0;
6776
6777         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6778                 return 1;
6779
6780         return kvm_skip_emulated_instruction(vcpu);
6781 }
6782
6783 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6784                             unsigned short port)
6785 {
6786         unsigned long val = kvm_rax_read(vcpu);
6787         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6788                                             size, port, &val, 1);
6789         if (ret)
6790                 return ret;
6791
6792         /*
6793          * Workaround userspace that relies on old KVM behavior of %rip being
6794          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6795          */
6796         if (port == 0x7e &&
6797             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6798                 vcpu->arch.complete_userspace_io =
6799                         complete_fast_pio_out_port_0x7e;
6800                 kvm_skip_emulated_instruction(vcpu);
6801         } else {
6802                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6803                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6804         }
6805         return 0;
6806 }
6807
6808 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6809 {
6810         unsigned long val;
6811
6812         /* We should only ever be called with arch.pio.count equal to 1 */
6813         BUG_ON(vcpu->arch.pio.count != 1);
6814
6815         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6816                 vcpu->arch.pio.count = 0;
6817                 return 1;
6818         }
6819
6820         /* For size less than 4 we merge, else we zero extend */
6821         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6822
6823         /*
6824          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6825          * the copy and tracing
6826          */
6827         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6828                                  vcpu->arch.pio.port, &val, 1);
6829         kvm_rax_write(vcpu, val);
6830
6831         return kvm_skip_emulated_instruction(vcpu);
6832 }
6833
6834 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6835                            unsigned short port)
6836 {
6837         unsigned long val;
6838         int ret;
6839
6840         /* For size less than 4 we merge, else we zero extend */
6841         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6842
6843         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6844                                        &val, 1);
6845         if (ret) {
6846                 kvm_rax_write(vcpu, val);
6847                 return ret;
6848         }
6849
6850         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6851         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6852
6853         return 0;
6854 }
6855
6856 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6857 {
6858         int ret;
6859
6860         if (in)
6861                 ret = kvm_fast_pio_in(vcpu, size, port);
6862         else
6863                 ret = kvm_fast_pio_out(vcpu, size, port);
6864         return ret && kvm_skip_emulated_instruction(vcpu);
6865 }
6866 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6867
6868 static int kvmclock_cpu_down_prep(unsigned int cpu)
6869 {
6870         __this_cpu_write(cpu_tsc_khz, 0);
6871         return 0;
6872 }
6873
6874 static void tsc_khz_changed(void *data)
6875 {
6876         struct cpufreq_freqs *freq = data;
6877         unsigned long khz = 0;
6878
6879         if (data)
6880                 khz = freq->new;
6881         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6882                 khz = cpufreq_quick_get(raw_smp_processor_id());
6883         if (!khz)
6884                 khz = tsc_khz;
6885         __this_cpu_write(cpu_tsc_khz, khz);
6886 }
6887
6888 #ifdef CONFIG_X86_64
6889 static void kvm_hyperv_tsc_notifier(void)
6890 {
6891         struct kvm *kvm;
6892         struct kvm_vcpu *vcpu;
6893         int cpu;
6894
6895         mutex_lock(&kvm_lock);
6896         list_for_each_entry(kvm, &vm_list, vm_list)
6897                 kvm_make_mclock_inprogress_request(kvm);
6898
6899         hyperv_stop_tsc_emulation();
6900
6901         /* TSC frequency always matches when on Hyper-V */
6902         for_each_present_cpu(cpu)
6903                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6904         kvm_max_guest_tsc_khz = tsc_khz;
6905
6906         list_for_each_entry(kvm, &vm_list, vm_list) {
6907                 struct kvm_arch *ka = &kvm->arch;
6908
6909                 spin_lock(&ka->pvclock_gtod_sync_lock);
6910
6911                 pvclock_update_vm_gtod_copy(kvm);
6912
6913                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6914                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6915
6916                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6917                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6918
6919                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6920         }
6921         mutex_unlock(&kvm_lock);
6922 }
6923 #endif
6924
6925 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6926 {
6927         struct kvm *kvm;
6928         struct kvm_vcpu *vcpu;
6929         int i, send_ipi = 0;
6930
6931         /*
6932          * We allow guests to temporarily run on slowing clocks,
6933          * provided we notify them after, or to run on accelerating
6934          * clocks, provided we notify them before.  Thus time never
6935          * goes backwards.
6936          *
6937          * However, we have a problem.  We can't atomically update
6938          * the frequency of a given CPU from this function; it is
6939          * merely a notifier, which can be called from any CPU.
6940          * Changing the TSC frequency at arbitrary points in time
6941          * requires a recomputation of local variables related to
6942          * the TSC for each VCPU.  We must flag these local variables
6943          * to be updated and be sure the update takes place with the
6944          * new frequency before any guests proceed.
6945          *
6946          * Unfortunately, the combination of hotplug CPU and frequency
6947          * change creates an intractable locking scenario; the order
6948          * of when these callouts happen is undefined with respect to
6949          * CPU hotplug, and they can race with each other.  As such,
6950          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6951          * undefined; you can actually have a CPU frequency change take
6952          * place in between the computation of X and the setting of the
6953          * variable.  To protect against this problem, all updates of
6954          * the per_cpu tsc_khz variable are done in an interrupt
6955          * protected IPI, and all callers wishing to update the value
6956          * must wait for a synchronous IPI to complete (which is trivial
6957          * if the caller is on the CPU already).  This establishes the
6958          * necessary total order on variable updates.
6959          *
6960          * Note that because a guest time update may take place
6961          * anytime after the setting of the VCPU's request bit, the
6962          * correct TSC value must be set before the request.  However,
6963          * to ensure the update actually makes it to any guest which
6964          * starts running in hardware virtualization between the set
6965          * and the acquisition of the spinlock, we must also ping the
6966          * CPU after setting the request bit.
6967          *
6968          */
6969
6970         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6971
6972         mutex_lock(&kvm_lock);
6973         list_for_each_entry(kvm, &vm_list, vm_list) {
6974                 kvm_for_each_vcpu(i, vcpu, kvm) {
6975                         if (vcpu->cpu != cpu)
6976                                 continue;
6977                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6978                         if (vcpu->cpu != raw_smp_processor_id())
6979                                 send_ipi = 1;
6980                 }
6981         }
6982         mutex_unlock(&kvm_lock);
6983
6984         if (freq->old < freq->new && send_ipi) {
6985                 /*
6986                  * We upscale the frequency.  Must make the guest
6987                  * doesn't see old kvmclock values while running with
6988                  * the new frequency, otherwise we risk the guest sees
6989                  * time go backwards.
6990                  *
6991                  * In case we update the frequency for another cpu
6992                  * (which might be in guest context) send an interrupt
6993                  * to kick the cpu out of guest context.  Next time
6994                  * guest context is entered kvmclock will be updated,
6995                  * so the guest will not see stale values.
6996                  */
6997                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6998         }
6999 }
7000
7001 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7002                                      void *data)
7003 {
7004         struct cpufreq_freqs *freq = data;
7005         int cpu;
7006
7007         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7008                 return 0;
7009         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7010                 return 0;
7011
7012         for_each_cpu(cpu, freq->policy->cpus)
7013                 __kvmclock_cpufreq_notifier(freq, cpu);
7014
7015         return 0;
7016 }
7017
7018 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7019         .notifier_call  = kvmclock_cpufreq_notifier
7020 };
7021
7022 static int kvmclock_cpu_online(unsigned int cpu)
7023 {
7024         tsc_khz_changed(NULL);
7025         return 0;
7026 }
7027
7028 static void kvm_timer_init(void)
7029 {
7030         max_tsc_khz = tsc_khz;
7031
7032         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7033 #ifdef CONFIG_CPU_FREQ
7034                 struct cpufreq_policy policy;
7035                 int cpu;
7036
7037                 memset(&policy, 0, sizeof(policy));
7038                 cpu = get_cpu();
7039                 cpufreq_get_policy(&policy, cpu);
7040                 if (policy.cpuinfo.max_freq)
7041                         max_tsc_khz = policy.cpuinfo.max_freq;
7042                 put_cpu();
7043 #endif
7044                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7045                                           CPUFREQ_TRANSITION_NOTIFIER);
7046         }
7047
7048         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7049                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7050 }
7051
7052 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7053 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7054
7055 int kvm_is_in_guest(void)
7056 {
7057         return __this_cpu_read(current_vcpu) != NULL;
7058 }
7059
7060 static int kvm_is_user_mode(void)
7061 {
7062         int user_mode = 3;
7063
7064         if (__this_cpu_read(current_vcpu))
7065                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7066
7067         return user_mode != 0;
7068 }
7069
7070 static unsigned long kvm_get_guest_ip(void)
7071 {
7072         unsigned long ip = 0;
7073
7074         if (__this_cpu_read(current_vcpu))
7075                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7076
7077         return ip;
7078 }
7079
7080 static void kvm_handle_intel_pt_intr(void)
7081 {
7082         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7083
7084         kvm_make_request(KVM_REQ_PMI, vcpu);
7085         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7086                         (unsigned long *)&vcpu->arch.pmu.global_status);
7087 }
7088
7089 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7090         .is_in_guest            = kvm_is_in_guest,
7091         .is_user_mode           = kvm_is_user_mode,
7092         .get_guest_ip           = kvm_get_guest_ip,
7093         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7094 };
7095
7096 #ifdef CONFIG_X86_64
7097 static void pvclock_gtod_update_fn(struct work_struct *work)
7098 {
7099         struct kvm *kvm;
7100
7101         struct kvm_vcpu *vcpu;
7102         int i;
7103
7104         mutex_lock(&kvm_lock);
7105         list_for_each_entry(kvm, &vm_list, vm_list)
7106                 kvm_for_each_vcpu(i, vcpu, kvm)
7107                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7108         atomic_set(&kvm_guest_has_master_clock, 0);
7109         mutex_unlock(&kvm_lock);
7110 }
7111
7112 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7113
7114 /*
7115  * Notification about pvclock gtod data update.
7116  */
7117 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7118                                void *priv)
7119 {
7120         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7121         struct timekeeper *tk = priv;
7122
7123         update_pvclock_gtod(tk);
7124
7125         /* disable master clock if host does not trust, or does not
7126          * use, TSC based clocksource.
7127          */
7128         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7129             atomic_read(&kvm_guest_has_master_clock) != 0)
7130                 queue_work(system_long_wq, &pvclock_gtod_work);
7131
7132         return 0;
7133 }
7134
7135 static struct notifier_block pvclock_gtod_notifier = {
7136         .notifier_call = pvclock_gtod_notify,
7137 };
7138 #endif
7139
7140 int kvm_arch_init(void *opaque)
7141 {
7142         int r;
7143         struct kvm_x86_ops *ops = opaque;
7144
7145         if (kvm_x86_ops) {
7146                 printk(KERN_ERR "kvm: already loaded the other module\n");
7147                 r = -EEXIST;
7148                 goto out;
7149         }
7150
7151         if (!ops->cpu_has_kvm_support()) {
7152                 printk(KERN_ERR "kvm: no hardware support\n");
7153                 r = -EOPNOTSUPP;
7154                 goto out;
7155         }
7156         if (ops->disabled_by_bios()) {
7157                 printk(KERN_ERR "kvm: disabled by bios\n");
7158                 r = -EOPNOTSUPP;
7159                 goto out;
7160         }
7161
7162         /*
7163          * KVM explicitly assumes that the guest has an FPU and
7164          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7165          * vCPU's FPU state as a fxregs_state struct.
7166          */
7167         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7168                 printk(KERN_ERR "kvm: inadequate fpu\n");
7169                 r = -EOPNOTSUPP;
7170                 goto out;
7171         }
7172
7173         r = -ENOMEM;
7174         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7175                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7176                                           NULL);
7177         if (!x86_fpu_cache) {
7178                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7179                 goto out;
7180         }
7181
7182         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7183         if (!shared_msrs) {
7184                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7185                 goto out_free_x86_fpu_cache;
7186         }
7187
7188         r = kvm_mmu_module_init();
7189         if (r)
7190                 goto out_free_percpu;
7191
7192         kvm_x86_ops = ops;
7193
7194         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7195                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7196                         PT_PRESENT_MASK, 0, sme_me_mask);
7197         kvm_timer_init();
7198
7199         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7200
7201         if (boot_cpu_has(X86_FEATURE_XSAVE))
7202                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7203
7204         kvm_lapic_init();
7205         if (pi_inject_timer == -1)
7206                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7207 #ifdef CONFIG_X86_64
7208         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7209
7210         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7211                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7212 #endif
7213
7214         return 0;
7215
7216 out_free_percpu:
7217         free_percpu(shared_msrs);
7218 out_free_x86_fpu_cache:
7219         kmem_cache_destroy(x86_fpu_cache);
7220 out:
7221         return r;
7222 }
7223
7224 void kvm_arch_exit(void)
7225 {
7226 #ifdef CONFIG_X86_64
7227         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7228                 clear_hv_tscchange_cb();
7229 #endif
7230         kvm_lapic_exit();
7231         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7232
7233         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7234                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7235                                             CPUFREQ_TRANSITION_NOTIFIER);
7236         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7237 #ifdef CONFIG_X86_64
7238         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7239 #endif
7240         kvm_x86_ops = NULL;
7241         kvm_mmu_module_exit();
7242         free_percpu(shared_msrs);
7243         kmem_cache_destroy(x86_fpu_cache);
7244 }
7245
7246 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7247 {
7248         ++vcpu->stat.halt_exits;
7249         if (lapic_in_kernel(vcpu)) {
7250                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7251                 return 1;
7252         } else {
7253                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7254                 return 0;
7255         }
7256 }
7257 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7258
7259 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7260 {
7261         int ret = kvm_skip_emulated_instruction(vcpu);
7262         /*
7263          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7264          * KVM_EXIT_DEBUG here.
7265          */
7266         return kvm_vcpu_halt(vcpu) && ret;
7267 }
7268 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7269
7270 #ifdef CONFIG_X86_64
7271 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7272                                 unsigned long clock_type)
7273 {
7274         struct kvm_clock_pairing clock_pairing;
7275         struct timespec64 ts;
7276         u64 cycle;
7277         int ret;
7278
7279         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7280                 return -KVM_EOPNOTSUPP;
7281
7282         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7283                 return -KVM_EOPNOTSUPP;
7284
7285         clock_pairing.sec = ts.tv_sec;
7286         clock_pairing.nsec = ts.tv_nsec;
7287         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7288         clock_pairing.flags = 0;
7289         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7290
7291         ret = 0;
7292         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7293                             sizeof(struct kvm_clock_pairing)))
7294                 ret = -KVM_EFAULT;
7295
7296         return ret;
7297 }
7298 #endif
7299
7300 /*
7301  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7302  *
7303  * @apicid - apicid of vcpu to be kicked.
7304  */
7305 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7306 {
7307         struct kvm_lapic_irq lapic_irq;
7308
7309         lapic_irq.shorthand = 0;
7310         lapic_irq.dest_mode = 0;
7311         lapic_irq.level = 0;
7312         lapic_irq.dest_id = apicid;
7313         lapic_irq.msi_redir_hint = false;
7314
7315         lapic_irq.delivery_mode = APIC_DM_REMRD;
7316         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7317 }
7318
7319 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7320 {
7321         if (!lapic_in_kernel(vcpu)) {
7322                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7323                 return;
7324         }
7325         if (!vcpu->arch.apicv_active)
7326                 return;
7327
7328         vcpu->arch.apicv_active = false;
7329         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7330 }
7331
7332 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7333 {
7334         struct kvm_vcpu *target = NULL;
7335         struct kvm_apic_map *map;
7336
7337         rcu_read_lock();
7338         map = rcu_dereference(kvm->arch.apic_map);
7339
7340         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7341                 target = map->phys_map[dest_id]->vcpu;
7342
7343         rcu_read_unlock();
7344
7345         if (target && READ_ONCE(target->ready))
7346                 kvm_vcpu_yield_to(target);
7347 }
7348
7349 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7350 {
7351         unsigned long nr, a0, a1, a2, a3, ret;
7352         int op_64_bit;
7353
7354         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7355                 return kvm_hv_hypercall(vcpu);
7356
7357         nr = kvm_rax_read(vcpu);
7358         a0 = kvm_rbx_read(vcpu);
7359         a1 = kvm_rcx_read(vcpu);
7360         a2 = kvm_rdx_read(vcpu);
7361         a3 = kvm_rsi_read(vcpu);
7362
7363         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7364
7365         op_64_bit = is_64_bit_mode(vcpu);
7366         if (!op_64_bit) {
7367                 nr &= 0xFFFFFFFF;
7368                 a0 &= 0xFFFFFFFF;
7369                 a1 &= 0xFFFFFFFF;
7370                 a2 &= 0xFFFFFFFF;
7371                 a3 &= 0xFFFFFFFF;
7372         }
7373
7374         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7375                 ret = -KVM_EPERM;
7376                 goto out;
7377         }
7378
7379         switch (nr) {
7380         case KVM_HC_VAPIC_POLL_IRQ:
7381                 ret = 0;
7382                 break;
7383         case KVM_HC_KICK_CPU:
7384                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7385                 kvm_sched_yield(vcpu->kvm, a1);
7386                 ret = 0;
7387                 break;
7388 #ifdef CONFIG_X86_64
7389         case KVM_HC_CLOCK_PAIRING:
7390                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7391                 break;
7392 #endif
7393         case KVM_HC_SEND_IPI:
7394                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7395                 break;
7396         case KVM_HC_SCHED_YIELD:
7397                 kvm_sched_yield(vcpu->kvm, a0);
7398                 ret = 0;
7399                 break;
7400         default:
7401                 ret = -KVM_ENOSYS;
7402                 break;
7403         }
7404 out:
7405         if (!op_64_bit)
7406                 ret = (u32)ret;
7407         kvm_rax_write(vcpu, ret);
7408
7409         ++vcpu->stat.hypercalls;
7410         return kvm_skip_emulated_instruction(vcpu);
7411 }
7412 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7413
7414 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7415 {
7416         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7417         char instruction[3];
7418         unsigned long rip = kvm_rip_read(vcpu);
7419
7420         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7421
7422         return emulator_write_emulated(ctxt, rip, instruction, 3,
7423                 &ctxt->exception);
7424 }
7425
7426 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7427 {
7428         return vcpu->run->request_interrupt_window &&
7429                 likely(!pic_in_kernel(vcpu->kvm));
7430 }
7431
7432 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7433 {
7434         struct kvm_run *kvm_run = vcpu->run;
7435
7436         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7437         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7438         kvm_run->cr8 = kvm_get_cr8(vcpu);
7439         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7440         kvm_run->ready_for_interrupt_injection =
7441                 pic_in_kernel(vcpu->kvm) ||
7442                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7443 }
7444
7445 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7446 {
7447         int max_irr, tpr;
7448
7449         if (!kvm_x86_ops->update_cr8_intercept)
7450                 return;
7451
7452         if (!lapic_in_kernel(vcpu))
7453                 return;
7454
7455         if (vcpu->arch.apicv_active)
7456                 return;
7457
7458         if (!vcpu->arch.apic->vapic_addr)
7459                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7460         else
7461                 max_irr = -1;
7462
7463         if (max_irr != -1)
7464                 max_irr >>= 4;
7465
7466         tpr = kvm_lapic_get_cr8(vcpu);
7467
7468         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7469 }
7470
7471 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7472 {
7473         int r;
7474
7475         /* try to reinject previous events if any */
7476
7477         if (vcpu->arch.exception.injected)
7478                 kvm_x86_ops->queue_exception(vcpu);
7479         /*
7480          * Do not inject an NMI or interrupt if there is a pending
7481          * exception.  Exceptions and interrupts are recognized at
7482          * instruction boundaries, i.e. the start of an instruction.
7483          * Trap-like exceptions, e.g. #DB, have higher priority than
7484          * NMIs and interrupts, i.e. traps are recognized before an
7485          * NMI/interrupt that's pending on the same instruction.
7486          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7487          * priority, but are only generated (pended) during instruction
7488          * execution, i.e. a pending fault-like exception means the
7489          * fault occurred on the *previous* instruction and must be
7490          * serviced prior to recognizing any new events in order to
7491          * fully complete the previous instruction.
7492          */
7493         else if (!vcpu->arch.exception.pending) {
7494                 if (vcpu->arch.nmi_injected)
7495                         kvm_x86_ops->set_nmi(vcpu);
7496                 else if (vcpu->arch.interrupt.injected)
7497                         kvm_x86_ops->set_irq(vcpu);
7498         }
7499
7500         /*
7501          * Call check_nested_events() even if we reinjected a previous event
7502          * in order for caller to determine if it should require immediate-exit
7503          * from L2 to L1 due to pending L1 events which require exit
7504          * from L2 to L1.
7505          */
7506         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7507                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7508                 if (r != 0)
7509                         return r;
7510         }
7511
7512         /* try to inject new event if pending */
7513         if (vcpu->arch.exception.pending) {
7514                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7515                                         vcpu->arch.exception.has_error_code,
7516                                         vcpu->arch.exception.error_code);
7517
7518                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7519                 vcpu->arch.exception.pending = false;
7520                 vcpu->arch.exception.injected = true;
7521
7522                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7523                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7524                                              X86_EFLAGS_RF);
7525
7526                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7527                         /*
7528                          * This code assumes that nSVM doesn't use
7529                          * check_nested_events(). If it does, the
7530                          * DR6/DR7 changes should happen before L1
7531                          * gets a #VMEXIT for an intercepted #DB in
7532                          * L2.  (Under VMX, on the other hand, the
7533                          * DR6/DR7 changes should not happen in the
7534                          * event of a VM-exit to L1 for an intercepted
7535                          * #DB in L2.)
7536                          */
7537                         kvm_deliver_exception_payload(vcpu);
7538                         if (vcpu->arch.dr7 & DR7_GD) {
7539                                 vcpu->arch.dr7 &= ~DR7_GD;
7540                                 kvm_update_dr7(vcpu);
7541                         }
7542                 }
7543
7544                 kvm_x86_ops->queue_exception(vcpu);
7545         }
7546
7547         /* Don't consider new event if we re-injected an event */
7548         if (kvm_event_needs_reinjection(vcpu))
7549                 return 0;
7550
7551         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7552             kvm_x86_ops->smi_allowed(vcpu)) {
7553                 vcpu->arch.smi_pending = false;
7554                 ++vcpu->arch.smi_count;
7555                 enter_smm(vcpu);
7556         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7557                 --vcpu->arch.nmi_pending;
7558                 vcpu->arch.nmi_injected = true;
7559                 kvm_x86_ops->set_nmi(vcpu);
7560         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7561                 /*
7562                  * Because interrupts can be injected asynchronously, we are
7563                  * calling check_nested_events again here to avoid a race condition.
7564                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7565                  * proposal and current concerns.  Perhaps we should be setting
7566                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7567                  */
7568                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7569                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7570                         if (r != 0)
7571                                 return r;
7572                 }
7573                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7574                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7575                                             false);
7576                         kvm_x86_ops->set_irq(vcpu);
7577                 }
7578         }
7579
7580         return 0;
7581 }
7582
7583 static void process_nmi(struct kvm_vcpu *vcpu)
7584 {
7585         unsigned limit = 2;
7586
7587         /*
7588          * x86 is limited to one NMI running, and one NMI pending after it.
7589          * If an NMI is already in progress, limit further NMIs to just one.
7590          * Otherwise, allow two (and we'll inject the first one immediately).
7591          */
7592         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7593                 limit = 1;
7594
7595         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7596         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7597         kvm_make_request(KVM_REQ_EVENT, vcpu);
7598 }
7599
7600 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7601 {
7602         u32 flags = 0;
7603         flags |= seg->g       << 23;
7604         flags |= seg->db      << 22;
7605         flags |= seg->l       << 21;
7606         flags |= seg->avl     << 20;
7607         flags |= seg->present << 15;
7608         flags |= seg->dpl     << 13;
7609         flags |= seg->s       << 12;
7610         flags |= seg->type    << 8;
7611         return flags;
7612 }
7613
7614 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7615 {
7616         struct kvm_segment seg;
7617         int offset;
7618
7619         kvm_get_segment(vcpu, &seg, n);
7620         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7621
7622         if (n < 3)
7623                 offset = 0x7f84 + n * 12;
7624         else
7625                 offset = 0x7f2c + (n - 3) * 12;
7626
7627         put_smstate(u32, buf, offset + 8, seg.base);
7628         put_smstate(u32, buf, offset + 4, seg.limit);
7629         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7630 }
7631
7632 #ifdef CONFIG_X86_64
7633 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7634 {
7635         struct kvm_segment seg;
7636         int offset;
7637         u16 flags;
7638
7639         kvm_get_segment(vcpu, &seg, n);
7640         offset = 0x7e00 + n * 16;
7641
7642         flags = enter_smm_get_segment_flags(&seg) >> 8;
7643         put_smstate(u16, buf, offset, seg.selector);
7644         put_smstate(u16, buf, offset + 2, flags);
7645         put_smstate(u32, buf, offset + 4, seg.limit);
7646         put_smstate(u64, buf, offset + 8, seg.base);
7647 }
7648 #endif
7649
7650 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7651 {
7652         struct desc_ptr dt;
7653         struct kvm_segment seg;
7654         unsigned long val;
7655         int i;
7656
7657         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7658         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7659         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7660         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7661
7662         for (i = 0; i < 8; i++)
7663                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7664
7665         kvm_get_dr(vcpu, 6, &val);
7666         put_smstate(u32, buf, 0x7fcc, (u32)val);
7667         kvm_get_dr(vcpu, 7, &val);
7668         put_smstate(u32, buf, 0x7fc8, (u32)val);
7669
7670         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7671         put_smstate(u32, buf, 0x7fc4, seg.selector);
7672         put_smstate(u32, buf, 0x7f64, seg.base);
7673         put_smstate(u32, buf, 0x7f60, seg.limit);
7674         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7675
7676         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7677         put_smstate(u32, buf, 0x7fc0, seg.selector);
7678         put_smstate(u32, buf, 0x7f80, seg.base);
7679         put_smstate(u32, buf, 0x7f7c, seg.limit);
7680         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7681
7682         kvm_x86_ops->get_gdt(vcpu, &dt);
7683         put_smstate(u32, buf, 0x7f74, dt.address);
7684         put_smstate(u32, buf, 0x7f70, dt.size);
7685
7686         kvm_x86_ops->get_idt(vcpu, &dt);
7687         put_smstate(u32, buf, 0x7f58, dt.address);
7688         put_smstate(u32, buf, 0x7f54, dt.size);
7689
7690         for (i = 0; i < 6; i++)
7691                 enter_smm_save_seg_32(vcpu, buf, i);
7692
7693         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7694
7695         /* revision id */
7696         put_smstate(u32, buf, 0x7efc, 0x00020000);
7697         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7698 }
7699
7700 #ifdef CONFIG_X86_64
7701 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7702 {
7703         struct desc_ptr dt;
7704         struct kvm_segment seg;
7705         unsigned long val;
7706         int i;
7707
7708         for (i = 0; i < 16; i++)
7709                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7710
7711         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7712         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7713
7714         kvm_get_dr(vcpu, 6, &val);
7715         put_smstate(u64, buf, 0x7f68, val);
7716         kvm_get_dr(vcpu, 7, &val);
7717         put_smstate(u64, buf, 0x7f60, val);
7718
7719         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7720         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7721         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7722
7723         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7724
7725         /* revision id */
7726         put_smstate(u32, buf, 0x7efc, 0x00020064);
7727
7728         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7729
7730         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7731         put_smstate(u16, buf, 0x7e90, seg.selector);
7732         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7733         put_smstate(u32, buf, 0x7e94, seg.limit);
7734         put_smstate(u64, buf, 0x7e98, seg.base);
7735
7736         kvm_x86_ops->get_idt(vcpu, &dt);
7737         put_smstate(u32, buf, 0x7e84, dt.size);
7738         put_smstate(u64, buf, 0x7e88, dt.address);
7739
7740         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7741         put_smstate(u16, buf, 0x7e70, seg.selector);
7742         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7743         put_smstate(u32, buf, 0x7e74, seg.limit);
7744         put_smstate(u64, buf, 0x7e78, seg.base);
7745
7746         kvm_x86_ops->get_gdt(vcpu, &dt);
7747         put_smstate(u32, buf, 0x7e64, dt.size);
7748         put_smstate(u64, buf, 0x7e68, dt.address);
7749
7750         for (i = 0; i < 6; i++)
7751                 enter_smm_save_seg_64(vcpu, buf, i);
7752 }
7753 #endif
7754
7755 static void enter_smm(struct kvm_vcpu *vcpu)
7756 {
7757         struct kvm_segment cs, ds;
7758         struct desc_ptr dt;
7759         char buf[512];
7760         u32 cr0;
7761
7762         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7763         memset(buf, 0, 512);
7764 #ifdef CONFIG_X86_64
7765         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7766                 enter_smm_save_state_64(vcpu, buf);
7767         else
7768 #endif
7769                 enter_smm_save_state_32(vcpu, buf);
7770
7771         /*
7772          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7773          * vCPU state (e.g. leave guest mode) after we've saved the state into
7774          * the SMM state-save area.
7775          */
7776         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7777
7778         vcpu->arch.hflags |= HF_SMM_MASK;
7779         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7780
7781         if (kvm_x86_ops->get_nmi_mask(vcpu))
7782                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7783         else
7784                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7785
7786         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7787         kvm_rip_write(vcpu, 0x8000);
7788
7789         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7790         kvm_x86_ops->set_cr0(vcpu, cr0);
7791         vcpu->arch.cr0 = cr0;
7792
7793         kvm_x86_ops->set_cr4(vcpu, 0);
7794
7795         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7796         dt.address = dt.size = 0;
7797         kvm_x86_ops->set_idt(vcpu, &dt);
7798
7799         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7800
7801         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7802         cs.base = vcpu->arch.smbase;
7803
7804         ds.selector = 0;
7805         ds.base = 0;
7806
7807         cs.limit    = ds.limit = 0xffffffff;
7808         cs.type     = ds.type = 0x3;
7809         cs.dpl      = ds.dpl = 0;
7810         cs.db       = ds.db = 0;
7811         cs.s        = ds.s = 1;
7812         cs.l        = ds.l = 0;
7813         cs.g        = ds.g = 1;
7814         cs.avl      = ds.avl = 0;
7815         cs.present  = ds.present = 1;
7816         cs.unusable = ds.unusable = 0;
7817         cs.padding  = ds.padding = 0;
7818
7819         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7820         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7821         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7822         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7823         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7824         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7825
7826 #ifdef CONFIG_X86_64
7827         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7828                 kvm_x86_ops->set_efer(vcpu, 0);
7829 #endif
7830
7831         kvm_update_cpuid(vcpu);
7832         kvm_mmu_reset_context(vcpu);
7833 }
7834
7835 static void process_smi(struct kvm_vcpu *vcpu)
7836 {
7837         vcpu->arch.smi_pending = true;
7838         kvm_make_request(KVM_REQ_EVENT, vcpu);
7839 }
7840
7841 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7842 {
7843         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7844 }
7845
7846 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7847 {
7848         if (!kvm_apic_present(vcpu))
7849                 return;
7850
7851         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7852
7853         if (irqchip_split(vcpu->kvm))
7854                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7855         else {
7856                 if (vcpu->arch.apicv_active)
7857                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7858                 if (ioapic_in_kernel(vcpu->kvm))
7859                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7860         }
7861
7862         if (is_guest_mode(vcpu))
7863                 vcpu->arch.load_eoi_exitmap_pending = true;
7864         else
7865                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7866 }
7867
7868 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7869 {
7870         u64 eoi_exit_bitmap[4];
7871
7872         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7873                 return;
7874
7875         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7876                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7877         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7878 }
7879
7880 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7881                 unsigned long start, unsigned long end,
7882                 bool blockable)
7883 {
7884         unsigned long apic_address;
7885
7886         /*
7887          * The physical address of apic access page is stored in the VMCS.
7888          * Update it when it becomes invalid.
7889          */
7890         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7891         if (start <= apic_address && apic_address < end)
7892                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7893
7894         return 0;
7895 }
7896
7897 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7898 {
7899         struct page *page = NULL;
7900
7901         if (!lapic_in_kernel(vcpu))
7902                 return;
7903
7904         if (!kvm_x86_ops->set_apic_access_page_addr)
7905                 return;
7906
7907         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7908         if (is_error_page(page))
7909                 return;
7910         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7911
7912         /*
7913          * Do not pin apic access page in memory, the MMU notifier
7914          * will call us again if it is migrated or swapped out.
7915          */
7916         put_page(page);
7917 }
7918 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7919
7920 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7921 {
7922         smp_send_reschedule(vcpu->cpu);
7923 }
7924 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7925
7926 /*
7927  * Returns 1 to let vcpu_run() continue the guest execution loop without
7928  * exiting to the userspace.  Otherwise, the value will be returned to the
7929  * userspace.
7930  */
7931 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7932 {
7933         int r;
7934         bool req_int_win =
7935                 dm_request_for_irq_injection(vcpu) &&
7936                 kvm_cpu_accept_dm_intr(vcpu);
7937
7938         bool req_immediate_exit = false;
7939
7940         if (kvm_request_pending(vcpu)) {
7941                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7942                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7943                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7944                         kvm_mmu_unload(vcpu);
7945                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7946                         __kvm_migrate_timers(vcpu);
7947                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7948                         kvm_gen_update_masterclock(vcpu->kvm);
7949                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7950                         kvm_gen_kvmclock_update(vcpu);
7951                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7952                         r = kvm_guest_time_update(vcpu);
7953                         if (unlikely(r))
7954                                 goto out;
7955                 }
7956                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7957                         kvm_mmu_sync_roots(vcpu);
7958                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7959                         kvm_mmu_load_cr3(vcpu);
7960                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7961                         kvm_vcpu_flush_tlb(vcpu, true);
7962                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7963                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7964                         r = 0;
7965                         goto out;
7966                 }
7967                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7968                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7969                         vcpu->mmio_needed = 0;
7970                         r = 0;
7971                         goto out;
7972                 }
7973                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7974                         /* Page is swapped out. Do synthetic halt */
7975                         vcpu->arch.apf.halted = true;
7976                         r = 1;
7977                         goto out;
7978                 }
7979                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7980                         record_steal_time(vcpu);
7981                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7982                         process_smi(vcpu);
7983                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7984                         process_nmi(vcpu);
7985                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7986                         kvm_pmu_handle_event(vcpu);
7987                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7988                         kvm_pmu_deliver_pmi(vcpu);
7989                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7990                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7991                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7992                                      vcpu->arch.ioapic_handled_vectors)) {
7993                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7994                                 vcpu->run->eoi.vector =
7995                                                 vcpu->arch.pending_ioapic_eoi;
7996                                 r = 0;
7997                                 goto out;
7998                         }
7999                 }
8000                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8001                         vcpu_scan_ioapic(vcpu);
8002                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8003                         vcpu_load_eoi_exitmap(vcpu);
8004                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8005                         kvm_vcpu_reload_apic_access_page(vcpu);
8006                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8007                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8008                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8009                         r = 0;
8010                         goto out;
8011                 }
8012                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8013                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8014                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8015                         r = 0;
8016                         goto out;
8017                 }
8018                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8019                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8020                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8021                         r = 0;
8022                         goto out;
8023                 }
8024
8025                 /*
8026                  * KVM_REQ_HV_STIMER has to be processed after
8027                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8028                  * depend on the guest clock being up-to-date
8029                  */
8030                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8031                         kvm_hv_process_stimers(vcpu);
8032         }
8033
8034         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8035                 ++vcpu->stat.req_event;
8036                 kvm_apic_accept_events(vcpu);
8037                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8038                         r = 1;
8039                         goto out;
8040                 }
8041
8042                 if (inject_pending_event(vcpu, req_int_win) != 0)
8043                         req_immediate_exit = true;
8044                 else {
8045                         /* Enable SMI/NMI/IRQ window open exits if needed.
8046                          *
8047                          * SMIs have three cases:
8048                          * 1) They can be nested, and then there is nothing to
8049                          *    do here because RSM will cause a vmexit anyway.
8050                          * 2) There is an ISA-specific reason why SMI cannot be
8051                          *    injected, and the moment when this changes can be
8052                          *    intercepted.
8053                          * 3) Or the SMI can be pending because
8054                          *    inject_pending_event has completed the injection
8055                          *    of an IRQ or NMI from the previous vmexit, and
8056                          *    then we request an immediate exit to inject the
8057                          *    SMI.
8058                          */
8059                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8060                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8061                                         req_immediate_exit = true;
8062                         if (vcpu->arch.nmi_pending)
8063                                 kvm_x86_ops->enable_nmi_window(vcpu);
8064                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8065                                 kvm_x86_ops->enable_irq_window(vcpu);
8066                         WARN_ON(vcpu->arch.exception.pending);
8067                 }
8068
8069                 if (kvm_lapic_enabled(vcpu)) {
8070                         update_cr8_intercept(vcpu);
8071                         kvm_lapic_sync_to_vapic(vcpu);
8072                 }
8073         }
8074
8075         r = kvm_mmu_reload(vcpu);
8076         if (unlikely(r)) {
8077                 goto cancel_injection;
8078         }
8079
8080         preempt_disable();
8081
8082         kvm_x86_ops->prepare_guest_switch(vcpu);
8083
8084         /*
8085          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8086          * IPI are then delayed after guest entry, which ensures that they
8087          * result in virtual interrupt delivery.
8088          */
8089         local_irq_disable();
8090         vcpu->mode = IN_GUEST_MODE;
8091
8092         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8093
8094         /*
8095          * 1) We should set ->mode before checking ->requests.  Please see
8096          * the comment in kvm_vcpu_exiting_guest_mode().
8097          *
8098          * 2) For APICv, we should set ->mode before checking PID.ON. This
8099          * pairs with the memory barrier implicit in pi_test_and_set_on
8100          * (see vmx_deliver_posted_interrupt).
8101          *
8102          * 3) This also orders the write to mode from any reads to the page
8103          * tables done while the VCPU is running.  Please see the comment
8104          * in kvm_flush_remote_tlbs.
8105          */
8106         smp_mb__after_srcu_read_unlock();
8107
8108         /*
8109          * This handles the case where a posted interrupt was
8110          * notified with kvm_vcpu_kick.
8111          */
8112         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8113                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8114
8115         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8116             || need_resched() || signal_pending(current)) {
8117                 vcpu->mode = OUTSIDE_GUEST_MODE;
8118                 smp_wmb();
8119                 local_irq_enable();
8120                 preempt_enable();
8121                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8122                 r = 1;
8123                 goto cancel_injection;
8124         }
8125
8126         if (req_immediate_exit) {
8127                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8128                 kvm_x86_ops->request_immediate_exit(vcpu);
8129         }
8130
8131         trace_kvm_entry(vcpu->vcpu_id);
8132         guest_enter_irqoff();
8133
8134         /* The preempt notifier should have taken care of the FPU already.  */
8135         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8136
8137         if (unlikely(vcpu->arch.switch_db_regs)) {
8138                 set_debugreg(0, 7);
8139                 set_debugreg(vcpu->arch.eff_db[0], 0);
8140                 set_debugreg(vcpu->arch.eff_db[1], 1);
8141                 set_debugreg(vcpu->arch.eff_db[2], 2);
8142                 set_debugreg(vcpu->arch.eff_db[3], 3);
8143                 set_debugreg(vcpu->arch.dr6, 6);
8144                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8145         }
8146
8147         kvm_x86_ops->run(vcpu);
8148
8149         /*
8150          * Do this here before restoring debug registers on the host.  And
8151          * since we do this before handling the vmexit, a DR access vmexit
8152          * can (a) read the correct value of the debug registers, (b) set
8153          * KVM_DEBUGREG_WONT_EXIT again.
8154          */
8155         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8156                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8157                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8158                 kvm_update_dr0123(vcpu);
8159                 kvm_update_dr6(vcpu);
8160                 kvm_update_dr7(vcpu);
8161                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8162         }
8163
8164         /*
8165          * If the guest has used debug registers, at least dr7
8166          * will be disabled while returning to the host.
8167          * If we don't have active breakpoints in the host, we don't
8168          * care about the messed up debug address registers. But if
8169          * we have some of them active, restore the old state.
8170          */
8171         if (hw_breakpoint_active())
8172                 hw_breakpoint_restore();
8173
8174         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8175
8176         vcpu->mode = OUTSIDE_GUEST_MODE;
8177         smp_wmb();
8178
8179         kvm_x86_ops->handle_exit_irqoff(vcpu);
8180
8181         /*
8182          * Consume any pending interrupts, including the possible source of
8183          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8184          * An instruction is required after local_irq_enable() to fully unblock
8185          * interrupts on processors that implement an interrupt shadow, the
8186          * stat.exits increment will do nicely.
8187          */
8188         kvm_before_interrupt(vcpu);
8189         local_irq_enable();
8190         ++vcpu->stat.exits;
8191         local_irq_disable();
8192         kvm_after_interrupt(vcpu);
8193
8194         guest_exit_irqoff();
8195         if (lapic_in_kernel(vcpu)) {
8196                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8197                 if (delta != S64_MIN) {
8198                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8199                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8200                 }
8201         }
8202
8203         local_irq_enable();
8204         preempt_enable();
8205
8206         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8207
8208         /*
8209          * Profile KVM exit RIPs:
8210          */
8211         if (unlikely(prof_on == KVM_PROFILING)) {
8212                 unsigned long rip = kvm_rip_read(vcpu);
8213                 profile_hit(KVM_PROFILING, (void *)rip);
8214         }
8215
8216         if (unlikely(vcpu->arch.tsc_always_catchup))
8217                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8218
8219         if (vcpu->arch.apic_attention)
8220                 kvm_lapic_sync_from_vapic(vcpu);
8221
8222         vcpu->arch.gpa_available = false;
8223         r = kvm_x86_ops->handle_exit(vcpu);
8224         return r;
8225
8226 cancel_injection:
8227         kvm_x86_ops->cancel_injection(vcpu);
8228         if (unlikely(vcpu->arch.apic_attention))
8229                 kvm_lapic_sync_from_vapic(vcpu);
8230 out:
8231         return r;
8232 }
8233
8234 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8235 {
8236         if (!kvm_arch_vcpu_runnable(vcpu) &&
8237             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8238                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8239                 kvm_vcpu_block(vcpu);
8240                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8241
8242                 if (kvm_x86_ops->post_block)
8243                         kvm_x86_ops->post_block(vcpu);
8244
8245                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8246                         return 1;
8247         }
8248
8249         kvm_apic_accept_events(vcpu);
8250         switch(vcpu->arch.mp_state) {
8251         case KVM_MP_STATE_HALTED:
8252                 vcpu->arch.pv.pv_unhalted = false;
8253                 vcpu->arch.mp_state =
8254                         KVM_MP_STATE_RUNNABLE;
8255                 /* fall through */
8256         case KVM_MP_STATE_RUNNABLE:
8257                 vcpu->arch.apf.halted = false;
8258                 break;
8259         case KVM_MP_STATE_INIT_RECEIVED:
8260                 break;
8261         default:
8262                 return -EINTR;
8263                 break;
8264         }
8265         return 1;
8266 }
8267
8268 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8269 {
8270         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8271                 kvm_x86_ops->check_nested_events(vcpu, false);
8272
8273         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8274                 !vcpu->arch.apf.halted);
8275 }
8276
8277 static int vcpu_run(struct kvm_vcpu *vcpu)
8278 {
8279         int r;
8280         struct kvm *kvm = vcpu->kvm;
8281
8282         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8283         vcpu->arch.l1tf_flush_l1d = true;
8284
8285         for (;;) {
8286                 if (kvm_vcpu_running(vcpu)) {
8287                         r = vcpu_enter_guest(vcpu);
8288                 } else {
8289                         r = vcpu_block(kvm, vcpu);
8290                 }
8291
8292                 if (r <= 0)
8293                         break;
8294
8295                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8296                 if (kvm_cpu_has_pending_timer(vcpu))
8297                         kvm_inject_pending_timer_irqs(vcpu);
8298
8299                 if (dm_request_for_irq_injection(vcpu) &&
8300                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8301                         r = 0;
8302                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8303                         ++vcpu->stat.request_irq_exits;
8304                         break;
8305                 }
8306
8307                 kvm_check_async_pf_completion(vcpu);
8308
8309                 if (signal_pending(current)) {
8310                         r = -EINTR;
8311                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8312                         ++vcpu->stat.signal_exits;
8313                         break;
8314                 }
8315                 if (need_resched()) {
8316                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8317                         cond_resched();
8318                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8319                 }
8320         }
8321
8322         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8323
8324         return r;
8325 }
8326
8327 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8328 {
8329         int r;
8330
8331         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8332         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8333         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8334         return r;
8335 }
8336
8337 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8338 {
8339         BUG_ON(!vcpu->arch.pio.count);
8340
8341         return complete_emulated_io(vcpu);
8342 }
8343
8344 /*
8345  * Implements the following, as a state machine:
8346  *
8347  * read:
8348  *   for each fragment
8349  *     for each mmio piece in the fragment
8350  *       write gpa, len
8351  *       exit
8352  *       copy data
8353  *   execute insn
8354  *
8355  * write:
8356  *   for each fragment
8357  *     for each mmio piece in the fragment
8358  *       write gpa, len
8359  *       copy data
8360  *       exit
8361  */
8362 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8363 {
8364         struct kvm_run *run = vcpu->run;
8365         struct kvm_mmio_fragment *frag;
8366         unsigned len;
8367
8368         BUG_ON(!vcpu->mmio_needed);
8369
8370         /* Complete previous fragment */
8371         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8372         len = min(8u, frag->len);
8373         if (!vcpu->mmio_is_write)
8374                 memcpy(frag->data, run->mmio.data, len);
8375
8376         if (frag->len <= 8) {
8377                 /* Switch to the next fragment. */
8378                 frag++;
8379                 vcpu->mmio_cur_fragment++;
8380         } else {
8381                 /* Go forward to the next mmio piece. */
8382                 frag->data += len;
8383                 frag->gpa += len;
8384                 frag->len -= len;
8385         }
8386
8387         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8388                 vcpu->mmio_needed = 0;
8389
8390                 /* FIXME: return into emulator if single-stepping.  */
8391                 if (vcpu->mmio_is_write)
8392                         return 1;
8393                 vcpu->mmio_read_completed = 1;
8394                 return complete_emulated_io(vcpu);
8395         }
8396
8397         run->exit_reason = KVM_EXIT_MMIO;
8398         run->mmio.phys_addr = frag->gpa;
8399         if (vcpu->mmio_is_write)
8400                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8401         run->mmio.len = min(8u, frag->len);
8402         run->mmio.is_write = vcpu->mmio_is_write;
8403         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8404         return 0;
8405 }
8406
8407 /* Swap (qemu) user FPU context for the guest FPU context. */
8408 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8409 {
8410         fpregs_lock();
8411
8412         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8413         /* PKRU is separately restored in kvm_x86_ops->run.  */
8414         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8415                                 ~XFEATURE_MASK_PKRU);
8416
8417         fpregs_mark_activate();
8418         fpregs_unlock();
8419
8420         trace_kvm_fpu(1);
8421 }
8422
8423 /* When vcpu_run ends, restore user space FPU context. */
8424 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8425 {
8426         fpregs_lock();
8427
8428         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8429         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8430
8431         fpregs_mark_activate();
8432         fpregs_unlock();
8433
8434         ++vcpu->stat.fpu_reload;
8435         trace_kvm_fpu(0);
8436 }
8437
8438 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8439 {
8440         int r;
8441
8442         vcpu_load(vcpu);
8443         kvm_sigset_activate(vcpu);
8444         kvm_load_guest_fpu(vcpu);
8445
8446         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8447                 if (kvm_run->immediate_exit) {
8448                         r = -EINTR;
8449                         goto out;
8450                 }
8451                 kvm_vcpu_block(vcpu);
8452                 kvm_apic_accept_events(vcpu);
8453                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8454                 r = -EAGAIN;
8455                 if (signal_pending(current)) {
8456                         r = -EINTR;
8457                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8458                         ++vcpu->stat.signal_exits;
8459                 }
8460                 goto out;
8461         }
8462
8463         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8464                 r = -EINVAL;
8465                 goto out;
8466         }
8467
8468         if (vcpu->run->kvm_dirty_regs) {
8469                 r = sync_regs(vcpu);
8470                 if (r != 0)
8471                         goto out;
8472         }
8473
8474         /* re-sync apic's tpr */
8475         if (!lapic_in_kernel(vcpu)) {
8476                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8477                         r = -EINVAL;
8478                         goto out;
8479                 }
8480         }
8481
8482         if (unlikely(vcpu->arch.complete_userspace_io)) {
8483                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8484                 vcpu->arch.complete_userspace_io = NULL;
8485                 r = cui(vcpu);
8486                 if (r <= 0)
8487                         goto out;
8488         } else
8489                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8490
8491         if (kvm_run->immediate_exit)
8492                 r = -EINTR;
8493         else
8494                 r = vcpu_run(vcpu);
8495
8496 out:
8497         kvm_put_guest_fpu(vcpu);
8498         if (vcpu->run->kvm_valid_regs)
8499                 store_regs(vcpu);
8500         post_kvm_run_save(vcpu);
8501         kvm_sigset_deactivate(vcpu);
8502
8503         vcpu_put(vcpu);
8504         return r;
8505 }
8506
8507 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8508 {
8509         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8510                 /*
8511                  * We are here if userspace calls get_regs() in the middle of
8512                  * instruction emulation. Registers state needs to be copied
8513                  * back from emulation context to vcpu. Userspace shouldn't do
8514                  * that usually, but some bad designed PV devices (vmware
8515                  * backdoor interface) need this to work
8516                  */
8517                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8518                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8519         }
8520         regs->rax = kvm_rax_read(vcpu);
8521         regs->rbx = kvm_rbx_read(vcpu);
8522         regs->rcx = kvm_rcx_read(vcpu);
8523         regs->rdx = kvm_rdx_read(vcpu);
8524         regs->rsi = kvm_rsi_read(vcpu);
8525         regs->rdi = kvm_rdi_read(vcpu);
8526         regs->rsp = kvm_rsp_read(vcpu);
8527         regs->rbp = kvm_rbp_read(vcpu);
8528 #ifdef CONFIG_X86_64
8529         regs->r8 = kvm_r8_read(vcpu);
8530         regs->r9 = kvm_r9_read(vcpu);
8531         regs->r10 = kvm_r10_read(vcpu);
8532         regs->r11 = kvm_r11_read(vcpu);
8533         regs->r12 = kvm_r12_read(vcpu);
8534         regs->r13 = kvm_r13_read(vcpu);
8535         regs->r14 = kvm_r14_read(vcpu);
8536         regs->r15 = kvm_r15_read(vcpu);
8537 #endif
8538
8539         regs->rip = kvm_rip_read(vcpu);
8540         regs->rflags = kvm_get_rflags(vcpu);
8541 }
8542
8543 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8544 {
8545         vcpu_load(vcpu);
8546         __get_regs(vcpu, regs);
8547         vcpu_put(vcpu);
8548         return 0;
8549 }
8550
8551 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8552 {
8553         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8554         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8555
8556         kvm_rax_write(vcpu, regs->rax);
8557         kvm_rbx_write(vcpu, regs->rbx);
8558         kvm_rcx_write(vcpu, regs->rcx);
8559         kvm_rdx_write(vcpu, regs->rdx);
8560         kvm_rsi_write(vcpu, regs->rsi);
8561         kvm_rdi_write(vcpu, regs->rdi);
8562         kvm_rsp_write(vcpu, regs->rsp);
8563         kvm_rbp_write(vcpu, regs->rbp);
8564 #ifdef CONFIG_X86_64
8565         kvm_r8_write(vcpu, regs->r8);
8566         kvm_r9_write(vcpu, regs->r9);
8567         kvm_r10_write(vcpu, regs->r10);
8568         kvm_r11_write(vcpu, regs->r11);
8569         kvm_r12_write(vcpu, regs->r12);
8570         kvm_r13_write(vcpu, regs->r13);
8571         kvm_r14_write(vcpu, regs->r14);
8572         kvm_r15_write(vcpu, regs->r15);
8573 #endif
8574
8575         kvm_rip_write(vcpu, regs->rip);
8576         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8577
8578         vcpu->arch.exception.pending = false;
8579
8580         kvm_make_request(KVM_REQ_EVENT, vcpu);
8581 }
8582
8583 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8584 {
8585         vcpu_load(vcpu);
8586         __set_regs(vcpu, regs);
8587         vcpu_put(vcpu);
8588         return 0;
8589 }
8590
8591 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8592 {
8593         struct kvm_segment cs;
8594
8595         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8596         *db = cs.db;
8597         *l = cs.l;
8598 }
8599 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8600
8601 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8602 {
8603         struct desc_ptr dt;
8604
8605         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8606         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8607         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8608         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8609         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8610         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8611
8612         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8613         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8614
8615         kvm_x86_ops->get_idt(vcpu, &dt);
8616         sregs->idt.limit = dt.size;
8617         sregs->idt.base = dt.address;
8618         kvm_x86_ops->get_gdt(vcpu, &dt);
8619         sregs->gdt.limit = dt.size;
8620         sregs->gdt.base = dt.address;
8621
8622         sregs->cr0 = kvm_read_cr0(vcpu);
8623         sregs->cr2 = vcpu->arch.cr2;
8624         sregs->cr3 = kvm_read_cr3(vcpu);
8625         sregs->cr4 = kvm_read_cr4(vcpu);
8626         sregs->cr8 = kvm_get_cr8(vcpu);
8627         sregs->efer = vcpu->arch.efer;
8628         sregs->apic_base = kvm_get_apic_base(vcpu);
8629
8630         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8631
8632         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8633                 set_bit(vcpu->arch.interrupt.nr,
8634                         (unsigned long *)sregs->interrupt_bitmap);
8635 }
8636
8637 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8638                                   struct kvm_sregs *sregs)
8639 {
8640         vcpu_load(vcpu);
8641         __get_sregs(vcpu, sregs);
8642         vcpu_put(vcpu);
8643         return 0;
8644 }
8645
8646 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8647                                     struct kvm_mp_state *mp_state)
8648 {
8649         vcpu_load(vcpu);
8650
8651         kvm_apic_accept_events(vcpu);
8652         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8653                                         vcpu->arch.pv.pv_unhalted)
8654                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8655         else
8656                 mp_state->mp_state = vcpu->arch.mp_state;
8657
8658         vcpu_put(vcpu);
8659         return 0;
8660 }
8661
8662 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8663                                     struct kvm_mp_state *mp_state)
8664 {
8665         int ret = -EINVAL;
8666
8667         vcpu_load(vcpu);
8668
8669         if (!lapic_in_kernel(vcpu) &&
8670             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8671                 goto out;
8672
8673         /* INITs are latched while in SMM */
8674         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8675             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8676              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8677                 goto out;
8678
8679         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8680                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8681                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8682         } else
8683                 vcpu->arch.mp_state = mp_state->mp_state;
8684         kvm_make_request(KVM_REQ_EVENT, vcpu);
8685
8686         ret = 0;
8687 out:
8688         vcpu_put(vcpu);
8689         return ret;
8690 }
8691
8692 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8693                     int reason, bool has_error_code, u32 error_code)
8694 {
8695         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8696         int ret;
8697
8698         init_emulate_ctxt(vcpu);
8699
8700         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8701                                    has_error_code, error_code);
8702         if (ret) {
8703                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8704                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8705                 vcpu->run->internal.ndata = 0;
8706                 return 0;
8707         }
8708
8709         kvm_rip_write(vcpu, ctxt->eip);
8710         kvm_set_rflags(vcpu, ctxt->eflags);
8711         kvm_make_request(KVM_REQ_EVENT, vcpu);
8712         return 1;
8713 }
8714 EXPORT_SYMBOL_GPL(kvm_task_switch);
8715
8716 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8717 {
8718         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8719                 /*
8720                  * When EFER.LME and CR0.PG are set, the processor is in
8721                  * 64-bit mode (though maybe in a 32-bit code segment).
8722                  * CR4.PAE and EFER.LMA must be set.
8723                  */
8724                 if (!(sregs->cr4 & X86_CR4_PAE)
8725                     || !(sregs->efer & EFER_LMA))
8726                         return -EINVAL;
8727         } else {
8728                 /*
8729                  * Not in 64-bit mode: EFER.LMA is clear and the code
8730                  * segment cannot be 64-bit.
8731                  */
8732                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8733                         return -EINVAL;
8734         }
8735
8736         return kvm_valid_cr4(vcpu, sregs->cr4);
8737 }
8738
8739 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8740 {
8741         struct msr_data apic_base_msr;
8742         int mmu_reset_needed = 0;
8743         int cpuid_update_needed = 0;
8744         int pending_vec, max_bits, idx;
8745         struct desc_ptr dt;
8746         int ret = -EINVAL;
8747
8748         if (kvm_valid_sregs(vcpu, sregs))
8749                 goto out;
8750
8751         apic_base_msr.data = sregs->apic_base;
8752         apic_base_msr.host_initiated = true;
8753         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8754                 goto out;
8755
8756         dt.size = sregs->idt.limit;
8757         dt.address = sregs->idt.base;
8758         kvm_x86_ops->set_idt(vcpu, &dt);
8759         dt.size = sregs->gdt.limit;
8760         dt.address = sregs->gdt.base;
8761         kvm_x86_ops->set_gdt(vcpu, &dt);
8762
8763         vcpu->arch.cr2 = sregs->cr2;
8764         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8765         vcpu->arch.cr3 = sregs->cr3;
8766         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8767
8768         kvm_set_cr8(vcpu, sregs->cr8);
8769
8770         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8771         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8772
8773         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8774         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8775         vcpu->arch.cr0 = sregs->cr0;
8776
8777         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8778         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8779                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8780         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8781         if (cpuid_update_needed)
8782                 kvm_update_cpuid(vcpu);
8783
8784         idx = srcu_read_lock(&vcpu->kvm->srcu);
8785         if (is_pae_paging(vcpu)) {
8786                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8787                 mmu_reset_needed = 1;
8788         }
8789         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8790
8791         if (mmu_reset_needed)
8792                 kvm_mmu_reset_context(vcpu);
8793
8794         max_bits = KVM_NR_INTERRUPTS;
8795         pending_vec = find_first_bit(
8796                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8797         if (pending_vec < max_bits) {
8798                 kvm_queue_interrupt(vcpu, pending_vec, false);
8799                 pr_debug("Set back pending irq %d\n", pending_vec);
8800         }
8801
8802         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8803         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8804         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8805         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8806         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8807         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8808
8809         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8810         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8811
8812         update_cr8_intercept(vcpu);
8813
8814         /* Older userspace won't unhalt the vcpu on reset. */
8815         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8816             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8817             !is_protmode(vcpu))
8818                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8819
8820         kvm_make_request(KVM_REQ_EVENT, vcpu);
8821
8822         ret = 0;
8823 out:
8824         return ret;
8825 }
8826
8827 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8828                                   struct kvm_sregs *sregs)
8829 {
8830         int ret;
8831
8832         vcpu_load(vcpu);
8833         ret = __set_sregs(vcpu, sregs);
8834         vcpu_put(vcpu);
8835         return ret;
8836 }
8837
8838 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8839                                         struct kvm_guest_debug *dbg)
8840 {
8841         unsigned long rflags;
8842         int i, r;
8843
8844         vcpu_load(vcpu);
8845
8846         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8847                 r = -EBUSY;
8848                 if (vcpu->arch.exception.pending)
8849                         goto out;
8850                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8851                         kvm_queue_exception(vcpu, DB_VECTOR);
8852                 else
8853                         kvm_queue_exception(vcpu, BP_VECTOR);
8854         }
8855
8856         /*
8857          * Read rflags as long as potentially injected trace flags are still
8858          * filtered out.
8859          */
8860         rflags = kvm_get_rflags(vcpu);
8861
8862         vcpu->guest_debug = dbg->control;
8863         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8864                 vcpu->guest_debug = 0;
8865
8866         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8867                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8868                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8869                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8870         } else {
8871                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8872                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8873         }
8874         kvm_update_dr7(vcpu);
8875
8876         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8877                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8878                         get_segment_base(vcpu, VCPU_SREG_CS);
8879
8880         /*
8881          * Trigger an rflags update that will inject or remove the trace
8882          * flags.
8883          */
8884         kvm_set_rflags(vcpu, rflags);
8885
8886         kvm_x86_ops->update_bp_intercept(vcpu);
8887
8888         r = 0;
8889
8890 out:
8891         vcpu_put(vcpu);
8892         return r;
8893 }
8894
8895 /*
8896  * Translate a guest virtual address to a guest physical address.
8897  */
8898 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8899                                     struct kvm_translation *tr)
8900 {
8901         unsigned long vaddr = tr->linear_address;
8902         gpa_t gpa;
8903         int idx;
8904
8905         vcpu_load(vcpu);
8906
8907         idx = srcu_read_lock(&vcpu->kvm->srcu);
8908         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8909         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8910         tr->physical_address = gpa;
8911         tr->valid = gpa != UNMAPPED_GVA;
8912         tr->writeable = 1;
8913         tr->usermode = 0;
8914
8915         vcpu_put(vcpu);
8916         return 0;
8917 }
8918
8919 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8920 {
8921         struct fxregs_state *fxsave;
8922
8923         vcpu_load(vcpu);
8924
8925         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8926         memcpy(fpu->fpr, fxsave->st_space, 128);
8927         fpu->fcw = fxsave->cwd;
8928         fpu->fsw = fxsave->swd;
8929         fpu->ftwx = fxsave->twd;
8930         fpu->last_opcode = fxsave->fop;
8931         fpu->last_ip = fxsave->rip;
8932         fpu->last_dp = fxsave->rdp;
8933         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8934
8935         vcpu_put(vcpu);
8936         return 0;
8937 }
8938
8939 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8940 {
8941         struct fxregs_state *fxsave;
8942
8943         vcpu_load(vcpu);
8944
8945         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8946
8947         memcpy(fxsave->st_space, fpu->fpr, 128);
8948         fxsave->cwd = fpu->fcw;
8949         fxsave->swd = fpu->fsw;
8950         fxsave->twd = fpu->ftwx;
8951         fxsave->fop = fpu->last_opcode;
8952         fxsave->rip = fpu->last_ip;
8953         fxsave->rdp = fpu->last_dp;
8954         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8955
8956         vcpu_put(vcpu);
8957         return 0;
8958 }
8959
8960 static void store_regs(struct kvm_vcpu *vcpu)
8961 {
8962         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8963
8964         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8965                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8966
8967         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8968                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8969
8970         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8971                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8972                                 vcpu, &vcpu->run->s.regs.events);
8973 }
8974
8975 static int sync_regs(struct kvm_vcpu *vcpu)
8976 {
8977         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8978                 return -EINVAL;
8979
8980         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8981                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8982                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8983         }
8984         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8985                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8986                         return -EINVAL;
8987                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8988         }
8989         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8990                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8991                                 vcpu, &vcpu->run->s.regs.events))
8992                         return -EINVAL;
8993                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8994         }
8995
8996         return 0;
8997 }
8998
8999 static void fx_init(struct kvm_vcpu *vcpu)
9000 {
9001         fpstate_init(&vcpu->arch.guest_fpu->state);
9002         if (boot_cpu_has(X86_FEATURE_XSAVES))
9003                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9004                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9005
9006         /*
9007          * Ensure guest xcr0 is valid for loading
9008          */
9009         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9010
9011         vcpu->arch.cr0 |= X86_CR0_ET;
9012 }
9013
9014 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9015 {
9016         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9017
9018         kvmclock_reset(vcpu);
9019
9020         kvm_x86_ops->vcpu_free(vcpu);
9021         free_cpumask_var(wbinvd_dirty_mask);
9022 }
9023
9024 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9025                                                 unsigned int id)
9026 {
9027         struct kvm_vcpu *vcpu;
9028
9029         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9030                 printk_once(KERN_WARNING
9031                 "kvm: SMP vm created on host with unstable TSC; "
9032                 "guest TSC will not be reliable\n");
9033
9034         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9035
9036         return vcpu;
9037 }
9038
9039 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9040 {
9041         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9042         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9043         kvm_vcpu_mtrr_init(vcpu);
9044         vcpu_load(vcpu);
9045         kvm_vcpu_reset(vcpu, false);
9046         kvm_init_mmu(vcpu, false);
9047         vcpu_put(vcpu);
9048         return 0;
9049 }
9050
9051 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9052 {
9053         struct msr_data msr;
9054         struct kvm *kvm = vcpu->kvm;
9055
9056         kvm_hv_vcpu_postcreate(vcpu);
9057
9058         if (mutex_lock_killable(&vcpu->mutex))
9059                 return;
9060         vcpu_load(vcpu);
9061         msr.data = 0x0;
9062         msr.index = MSR_IA32_TSC;
9063         msr.host_initiated = true;
9064         kvm_write_tsc(vcpu, &msr);
9065         vcpu_put(vcpu);
9066
9067         /* poll control enabled by default */
9068         vcpu->arch.msr_kvm_poll_control = 1;
9069
9070         mutex_unlock(&vcpu->mutex);
9071
9072         if (!kvmclock_periodic_sync)
9073                 return;
9074
9075         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9076                                         KVMCLOCK_SYNC_PERIOD);
9077 }
9078
9079 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9080 {
9081         vcpu->arch.apf.msr_val = 0;
9082
9083         vcpu_load(vcpu);
9084         kvm_mmu_unload(vcpu);
9085         vcpu_put(vcpu);
9086
9087         kvm_x86_ops->vcpu_free(vcpu);
9088 }
9089
9090 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9091 {
9092         kvm_lapic_reset(vcpu, init_event);
9093
9094         vcpu->arch.hflags = 0;
9095
9096         vcpu->arch.smi_pending = 0;
9097         vcpu->arch.smi_count = 0;
9098         atomic_set(&vcpu->arch.nmi_queued, 0);
9099         vcpu->arch.nmi_pending = 0;
9100         vcpu->arch.nmi_injected = false;
9101         kvm_clear_interrupt_queue(vcpu);
9102         kvm_clear_exception_queue(vcpu);
9103         vcpu->arch.exception.pending = false;
9104
9105         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9106         kvm_update_dr0123(vcpu);
9107         vcpu->arch.dr6 = DR6_INIT;
9108         kvm_update_dr6(vcpu);
9109         vcpu->arch.dr7 = DR7_FIXED_1;
9110         kvm_update_dr7(vcpu);
9111
9112         vcpu->arch.cr2 = 0;
9113
9114         kvm_make_request(KVM_REQ_EVENT, vcpu);
9115         vcpu->arch.apf.msr_val = 0;
9116         vcpu->arch.st.msr_val = 0;
9117
9118         kvmclock_reset(vcpu);
9119
9120         kvm_clear_async_pf_completion_queue(vcpu);
9121         kvm_async_pf_hash_reset(vcpu);
9122         vcpu->arch.apf.halted = false;
9123
9124         if (kvm_mpx_supported()) {
9125                 void *mpx_state_buffer;
9126
9127                 /*
9128                  * To avoid have the INIT path from kvm_apic_has_events() that be
9129                  * called with loaded FPU and does not let userspace fix the state.
9130                  */
9131                 if (init_event)
9132                         kvm_put_guest_fpu(vcpu);
9133                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9134                                         XFEATURE_BNDREGS);
9135                 if (mpx_state_buffer)
9136                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9137                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9138                                         XFEATURE_BNDCSR);
9139                 if (mpx_state_buffer)
9140                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9141                 if (init_event)
9142                         kvm_load_guest_fpu(vcpu);
9143         }
9144
9145         if (!init_event) {
9146                 kvm_pmu_reset(vcpu);
9147                 vcpu->arch.smbase = 0x30000;
9148
9149                 vcpu->arch.msr_misc_features_enables = 0;
9150
9151                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9152         }
9153
9154         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9155         vcpu->arch.regs_avail = ~0;
9156         vcpu->arch.regs_dirty = ~0;
9157
9158         vcpu->arch.ia32_xss = 0;
9159
9160         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9161 }
9162
9163 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9164 {
9165         struct kvm_segment cs;
9166
9167         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9168         cs.selector = vector << 8;
9169         cs.base = vector << 12;
9170         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9171         kvm_rip_write(vcpu, 0);
9172 }
9173
9174 int kvm_arch_hardware_enable(void)
9175 {
9176         struct kvm *kvm;
9177         struct kvm_vcpu *vcpu;
9178         int i;
9179         int ret;
9180         u64 local_tsc;
9181         u64 max_tsc = 0;
9182         bool stable, backwards_tsc = false;
9183
9184         kvm_shared_msr_cpu_online();
9185         ret = kvm_x86_ops->hardware_enable();
9186         if (ret != 0)
9187                 return ret;
9188
9189         local_tsc = rdtsc();
9190         stable = !kvm_check_tsc_unstable();
9191         list_for_each_entry(kvm, &vm_list, vm_list) {
9192                 kvm_for_each_vcpu(i, vcpu, kvm) {
9193                         if (!stable && vcpu->cpu == smp_processor_id())
9194                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9195                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9196                                 backwards_tsc = true;
9197                                 if (vcpu->arch.last_host_tsc > max_tsc)
9198                                         max_tsc = vcpu->arch.last_host_tsc;
9199                         }
9200                 }
9201         }
9202
9203         /*
9204          * Sometimes, even reliable TSCs go backwards.  This happens on
9205          * platforms that reset TSC during suspend or hibernate actions, but
9206          * maintain synchronization.  We must compensate.  Fortunately, we can
9207          * detect that condition here, which happens early in CPU bringup,
9208          * before any KVM threads can be running.  Unfortunately, we can't
9209          * bring the TSCs fully up to date with real time, as we aren't yet far
9210          * enough into CPU bringup that we know how much real time has actually
9211          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9212          * variables that haven't been updated yet.
9213          *
9214          * So we simply find the maximum observed TSC above, then record the
9215          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9216          * the adjustment will be applied.  Note that we accumulate
9217          * adjustments, in case multiple suspend cycles happen before some VCPU
9218          * gets a chance to run again.  In the event that no KVM threads get a
9219          * chance to run, we will miss the entire elapsed period, as we'll have
9220          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9221          * loose cycle time.  This isn't too big a deal, since the loss will be
9222          * uniform across all VCPUs (not to mention the scenario is extremely
9223          * unlikely). It is possible that a second hibernate recovery happens
9224          * much faster than a first, causing the observed TSC here to be
9225          * smaller; this would require additional padding adjustment, which is
9226          * why we set last_host_tsc to the local tsc observed here.
9227          *
9228          * N.B. - this code below runs only on platforms with reliable TSC,
9229          * as that is the only way backwards_tsc is set above.  Also note
9230          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9231          * have the same delta_cyc adjustment applied if backwards_tsc
9232          * is detected.  Note further, this adjustment is only done once,
9233          * as we reset last_host_tsc on all VCPUs to stop this from being
9234          * called multiple times (one for each physical CPU bringup).
9235          *
9236          * Platforms with unreliable TSCs don't have to deal with this, they
9237          * will be compensated by the logic in vcpu_load, which sets the TSC to
9238          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9239          * guarantee that they stay in perfect synchronization.
9240          */
9241         if (backwards_tsc) {
9242                 u64 delta_cyc = max_tsc - local_tsc;
9243                 list_for_each_entry(kvm, &vm_list, vm_list) {
9244                         kvm->arch.backwards_tsc_observed = true;
9245                         kvm_for_each_vcpu(i, vcpu, kvm) {
9246                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9247                                 vcpu->arch.last_host_tsc = local_tsc;
9248                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9249                         }
9250
9251                         /*
9252                          * We have to disable TSC offset matching.. if you were
9253                          * booting a VM while issuing an S4 host suspend....
9254                          * you may have some problem.  Solving this issue is
9255                          * left as an exercise to the reader.
9256                          */
9257                         kvm->arch.last_tsc_nsec = 0;
9258                         kvm->arch.last_tsc_write = 0;
9259                 }
9260
9261         }
9262         return 0;
9263 }
9264
9265 void kvm_arch_hardware_disable(void)
9266 {
9267         kvm_x86_ops->hardware_disable();
9268         drop_user_return_notifiers();
9269 }
9270
9271 int kvm_arch_hardware_setup(void)
9272 {
9273         int r;
9274
9275         r = kvm_x86_ops->hardware_setup();
9276         if (r != 0)
9277                 return r;
9278
9279         if (kvm_has_tsc_control) {
9280                 /*
9281                  * Make sure the user can only configure tsc_khz values that
9282                  * fit into a signed integer.
9283                  * A min value is not calculated because it will always
9284                  * be 1 on all machines.
9285                  */
9286                 u64 max = min(0x7fffffffULL,
9287                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9288                 kvm_max_guest_tsc_khz = max;
9289
9290                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9291         }
9292
9293         kvm_init_msr_list();
9294         return 0;
9295 }
9296
9297 void kvm_arch_hardware_unsetup(void)
9298 {
9299         kvm_x86_ops->hardware_unsetup();
9300 }
9301
9302 int kvm_arch_check_processor_compat(void)
9303 {
9304         return kvm_x86_ops->check_processor_compatibility();
9305 }
9306
9307 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9308 {
9309         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9310 }
9311 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9312
9313 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9314 {
9315         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9316 }
9317
9318 struct static_key kvm_no_apic_vcpu __read_mostly;
9319 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9320
9321 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9322 {
9323         struct page *page;
9324         int r;
9325
9326         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9327         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9328                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9329         else
9330                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9331
9332         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9333         if (!page) {
9334                 r = -ENOMEM;
9335                 goto fail;
9336         }
9337         vcpu->arch.pio_data = page_address(page);
9338
9339         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9340
9341         r = kvm_mmu_create(vcpu);
9342         if (r < 0)
9343                 goto fail_free_pio_data;
9344
9345         if (irqchip_in_kernel(vcpu->kvm)) {
9346                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9347                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9348                 if (r < 0)
9349                         goto fail_mmu_destroy;
9350         } else
9351                 static_key_slow_inc(&kvm_no_apic_vcpu);
9352
9353         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9354                                        GFP_KERNEL_ACCOUNT);
9355         if (!vcpu->arch.mce_banks) {
9356                 r = -ENOMEM;
9357                 goto fail_free_lapic;
9358         }
9359         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9360
9361         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9362                                 GFP_KERNEL_ACCOUNT)) {
9363                 r = -ENOMEM;
9364                 goto fail_free_mce_banks;
9365         }
9366
9367         fx_init(vcpu);
9368
9369         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9370
9371         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9372
9373         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9374
9375         kvm_async_pf_hash_reset(vcpu);
9376         kvm_pmu_init(vcpu);
9377
9378         vcpu->arch.pending_external_vector = -1;
9379         vcpu->arch.preempted_in_kernel = false;
9380
9381         kvm_hv_vcpu_init(vcpu);
9382
9383         return 0;
9384
9385 fail_free_mce_banks:
9386         kfree(vcpu->arch.mce_banks);
9387 fail_free_lapic:
9388         kvm_free_lapic(vcpu);
9389 fail_mmu_destroy:
9390         kvm_mmu_destroy(vcpu);
9391 fail_free_pio_data:
9392         free_page((unsigned long)vcpu->arch.pio_data);
9393 fail:
9394         return r;
9395 }
9396
9397 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9398 {
9399         int idx;
9400
9401         kvm_hv_vcpu_uninit(vcpu);
9402         kvm_pmu_destroy(vcpu);
9403         kfree(vcpu->arch.mce_banks);
9404         kvm_free_lapic(vcpu);
9405         idx = srcu_read_lock(&vcpu->kvm->srcu);
9406         kvm_mmu_destroy(vcpu);
9407         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9408         free_page((unsigned long)vcpu->arch.pio_data);
9409         if (!lapic_in_kernel(vcpu))
9410                 static_key_slow_dec(&kvm_no_apic_vcpu);
9411 }
9412
9413 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9414 {
9415         vcpu->arch.l1tf_flush_l1d = true;
9416         kvm_x86_ops->sched_in(vcpu, cpu);
9417 }
9418
9419 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9420 {
9421         if (type)
9422                 return -EINVAL;
9423
9424         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9425         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9426         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9427         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9428         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9429
9430         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9431         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9432         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9433         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9434                 &kvm->arch.irq_sources_bitmap);
9435
9436         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9437         mutex_init(&kvm->arch.apic_map_lock);
9438         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9439
9440         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9441         pvclock_update_vm_gtod_copy(kvm);
9442
9443         kvm->arch.guest_can_read_msr_platform_info = true;
9444
9445         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9446         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9447
9448         kvm_hv_init_vm(kvm);
9449         kvm_page_track_init(kvm);
9450         kvm_mmu_init_vm(kvm);
9451
9452         return kvm_x86_ops->vm_init(kvm);
9453 }
9454
9455 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9456 {
9457         vcpu_load(vcpu);
9458         kvm_mmu_unload(vcpu);
9459         vcpu_put(vcpu);
9460 }
9461
9462 static void kvm_free_vcpus(struct kvm *kvm)
9463 {
9464         unsigned int i;
9465         struct kvm_vcpu *vcpu;
9466
9467         /*
9468          * Unpin any mmu pages first.
9469          */
9470         kvm_for_each_vcpu(i, vcpu, kvm) {
9471                 kvm_clear_async_pf_completion_queue(vcpu);
9472                 kvm_unload_vcpu_mmu(vcpu);
9473         }
9474         kvm_for_each_vcpu(i, vcpu, kvm)
9475                 kvm_arch_vcpu_free(vcpu);
9476
9477         mutex_lock(&kvm->lock);
9478         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9479                 kvm->vcpus[i] = NULL;
9480
9481         atomic_set(&kvm->online_vcpus, 0);
9482         mutex_unlock(&kvm->lock);
9483 }
9484
9485 void kvm_arch_sync_events(struct kvm *kvm)
9486 {
9487         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9488         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9489         kvm_free_pit(kvm);
9490 }
9491
9492 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9493 {
9494         int i, r;
9495         unsigned long hva;
9496         struct kvm_memslots *slots = kvm_memslots(kvm);
9497         struct kvm_memory_slot *slot, old;
9498
9499         /* Called with kvm->slots_lock held.  */
9500         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9501                 return -EINVAL;
9502
9503         slot = id_to_memslot(slots, id);
9504         if (size) {
9505                 if (slot->npages)
9506                         return -EEXIST;
9507
9508                 /*
9509                  * MAP_SHARED to prevent internal slot pages from being moved
9510                  * by fork()/COW.
9511                  */
9512                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9513                               MAP_SHARED | MAP_ANONYMOUS, 0);
9514                 if (IS_ERR((void *)hva))
9515                         return PTR_ERR((void *)hva);
9516         } else {
9517                 if (!slot->npages)
9518                         return 0;
9519
9520                 hva = 0;
9521         }
9522
9523         old = *slot;
9524         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9525                 struct kvm_userspace_memory_region m;
9526
9527                 m.slot = id | (i << 16);
9528                 m.flags = 0;
9529                 m.guest_phys_addr = gpa;
9530                 m.userspace_addr = hva;
9531                 m.memory_size = size;
9532                 r = __kvm_set_memory_region(kvm, &m);
9533                 if (r < 0)
9534                         return r;
9535         }
9536
9537         if (!size)
9538                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9539
9540         return 0;
9541 }
9542 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9543
9544 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9545 {
9546         int r;
9547
9548         mutex_lock(&kvm->slots_lock);
9549         r = __x86_set_memory_region(kvm, id, gpa, size);
9550         mutex_unlock(&kvm->slots_lock);
9551
9552         return r;
9553 }
9554 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9555
9556 void kvm_arch_destroy_vm(struct kvm *kvm)
9557 {
9558         if (current->mm == kvm->mm) {
9559                 /*
9560                  * Free memory regions allocated on behalf of userspace,
9561                  * unless the the memory map has changed due to process exit
9562                  * or fd copying.
9563                  */
9564                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9565                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9566                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9567         }
9568         if (kvm_x86_ops->vm_destroy)
9569                 kvm_x86_ops->vm_destroy(kvm);
9570         kvm_pic_destroy(kvm);
9571         kvm_ioapic_destroy(kvm);
9572         kvm_free_vcpus(kvm);
9573         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9574         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9575         kvm_mmu_uninit_vm(kvm);
9576         kvm_page_track_cleanup(kvm);
9577         kvm_hv_destroy_vm(kvm);
9578 }
9579
9580 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9581                            struct kvm_memory_slot *dont)
9582 {
9583         int i;
9584
9585         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9586                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9587                         kvfree(free->arch.rmap[i]);
9588                         free->arch.rmap[i] = NULL;
9589                 }
9590                 if (i == 0)
9591                         continue;
9592
9593                 if (!dont || free->arch.lpage_info[i - 1] !=
9594                              dont->arch.lpage_info[i - 1]) {
9595                         kvfree(free->arch.lpage_info[i - 1]);
9596                         free->arch.lpage_info[i - 1] = NULL;
9597                 }
9598         }
9599
9600         kvm_page_track_free_memslot(free, dont);
9601 }
9602
9603 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9604                             unsigned long npages)
9605 {
9606         int i;
9607
9608         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9609                 struct kvm_lpage_info *linfo;
9610                 unsigned long ugfn;
9611                 int lpages;
9612                 int level = i + 1;
9613
9614                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9615                                       slot->base_gfn, level) + 1;
9616
9617                 slot->arch.rmap[i] =
9618                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9619                                  GFP_KERNEL_ACCOUNT);
9620                 if (!slot->arch.rmap[i])
9621                         goto out_free;
9622                 if (i == 0)
9623                         continue;
9624
9625                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9626                 if (!linfo)
9627                         goto out_free;
9628
9629                 slot->arch.lpage_info[i - 1] = linfo;
9630
9631                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9632                         linfo[0].disallow_lpage = 1;
9633                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9634                         linfo[lpages - 1].disallow_lpage = 1;
9635                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9636                 /*
9637                  * If the gfn and userspace address are not aligned wrt each
9638                  * other, or if explicitly asked to, disable large page
9639                  * support for this slot
9640                  */
9641                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9642                     !kvm_largepages_enabled()) {
9643                         unsigned long j;
9644
9645                         for (j = 0; j < lpages; ++j)
9646                                 linfo[j].disallow_lpage = 1;
9647                 }
9648         }
9649
9650         if (kvm_page_track_create_memslot(slot, npages))
9651                 goto out_free;
9652
9653         return 0;
9654
9655 out_free:
9656         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9657                 kvfree(slot->arch.rmap[i]);
9658                 slot->arch.rmap[i] = NULL;
9659                 if (i == 0)
9660                         continue;
9661
9662                 kvfree(slot->arch.lpage_info[i - 1]);
9663                 slot->arch.lpage_info[i - 1] = NULL;
9664         }
9665         return -ENOMEM;
9666 }
9667
9668 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9669 {
9670         /*
9671          * memslots->generation has been incremented.
9672          * mmio generation may have reached its maximum value.
9673          */
9674         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9675 }
9676
9677 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9678                                 struct kvm_memory_slot *memslot,
9679                                 const struct kvm_userspace_memory_region *mem,
9680                                 enum kvm_mr_change change)
9681 {
9682         return 0;
9683 }
9684
9685 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9686                                      struct kvm_memory_slot *new)
9687 {
9688         /* Still write protect RO slot */
9689         if (new->flags & KVM_MEM_READONLY) {
9690                 kvm_mmu_slot_remove_write_access(kvm, new);
9691                 return;
9692         }
9693
9694         /*
9695          * Call kvm_x86_ops dirty logging hooks when they are valid.
9696          *
9697          * kvm_x86_ops->slot_disable_log_dirty is called when:
9698          *
9699          *  - KVM_MR_CREATE with dirty logging is disabled
9700          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9701          *
9702          * The reason is, in case of PML, we need to set D-bit for any slots
9703          * with dirty logging disabled in order to eliminate unnecessary GPA
9704          * logging in PML buffer (and potential PML buffer full VMEXT). This
9705          * guarantees leaving PML enabled during guest's lifetime won't have
9706          * any additional overhead from PML when guest is running with dirty
9707          * logging disabled for memory slots.
9708          *
9709          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9710          * to dirty logging mode.
9711          *
9712          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9713          *
9714          * In case of write protect:
9715          *
9716          * Write protect all pages for dirty logging.
9717          *
9718          * All the sptes including the large sptes which point to this
9719          * slot are set to readonly. We can not create any new large
9720          * spte on this slot until the end of the logging.
9721          *
9722          * See the comments in fast_page_fault().
9723          */
9724         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9725                 if (kvm_x86_ops->slot_enable_log_dirty)
9726                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9727                 else
9728                         kvm_mmu_slot_remove_write_access(kvm, new);
9729         } else {
9730                 if (kvm_x86_ops->slot_disable_log_dirty)
9731                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9732         }
9733 }
9734
9735 void kvm_arch_commit_memory_region(struct kvm *kvm,
9736                                 const struct kvm_userspace_memory_region *mem,
9737                                 const struct kvm_memory_slot *old,
9738                                 const struct kvm_memory_slot *new,
9739                                 enum kvm_mr_change change)
9740 {
9741         if (!kvm->arch.n_requested_mmu_pages)
9742                 kvm_mmu_change_mmu_pages(kvm,
9743                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9744
9745         /*
9746          * Dirty logging tracks sptes in 4k granularity, meaning that large
9747          * sptes have to be split.  If live migration is successful, the guest
9748          * in the source machine will be destroyed and large sptes will be
9749          * created in the destination. However, if the guest continues to run
9750          * in the source machine (for example if live migration fails), small
9751          * sptes will remain around and cause bad performance.
9752          *
9753          * Scan sptes if dirty logging has been stopped, dropping those
9754          * which can be collapsed into a single large-page spte.  Later
9755          * page faults will create the large-page sptes.
9756          *
9757          * There is no need to do this in any of the following cases:
9758          * CREATE:      No dirty mappings will already exist.
9759          * MOVE/DELETE: The old mappings will already have been cleaned up by
9760          *              kvm_arch_flush_shadow_memslot()
9761          */
9762         if (change == KVM_MR_FLAGS_ONLY &&
9763                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9764                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9765                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9766
9767         /*
9768          * Set up write protection and/or dirty logging for the new slot.
9769          *
9770          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9771          * been zapped so no dirty logging staff is needed for old slot. For
9772          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9773          * new and it's also covered when dealing with the new slot.
9774          *
9775          * FIXME: const-ify all uses of struct kvm_memory_slot.
9776          */
9777         if (change != KVM_MR_DELETE)
9778                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9779 }
9780
9781 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9782 {
9783         kvm_mmu_zap_all(kvm);
9784 }
9785
9786 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9787                                    struct kvm_memory_slot *slot)
9788 {
9789         kvm_page_track_flush_slot(kvm, slot);
9790 }
9791
9792 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9793 {
9794         return (is_guest_mode(vcpu) &&
9795                         kvm_x86_ops->guest_apic_has_interrupt &&
9796                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9797 }
9798
9799 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9800 {
9801         if (!list_empty_careful(&vcpu->async_pf.done))
9802                 return true;
9803
9804         if (kvm_apic_has_events(vcpu))
9805                 return true;
9806
9807         if (vcpu->arch.pv.pv_unhalted)
9808                 return true;
9809
9810         if (vcpu->arch.exception.pending)
9811                 return true;
9812
9813         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9814             (vcpu->arch.nmi_pending &&
9815              kvm_x86_ops->nmi_allowed(vcpu)))
9816                 return true;
9817
9818         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9819             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9820                 return true;
9821
9822         if (kvm_arch_interrupt_allowed(vcpu) &&
9823             (kvm_cpu_has_interrupt(vcpu) ||
9824             kvm_guest_apic_has_interrupt(vcpu)))
9825                 return true;
9826
9827         if (kvm_hv_has_stimer_pending(vcpu))
9828                 return true;
9829
9830         return false;
9831 }
9832
9833 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9834 {
9835         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9836 }
9837
9838 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9839 {
9840         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9841                 return true;
9842
9843         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9844                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9845                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9846                 return true;
9847
9848         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9849                 return true;
9850
9851         return false;
9852 }
9853
9854 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9855 {
9856         return vcpu->arch.preempted_in_kernel;
9857 }
9858
9859 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9860 {
9861         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9862 }
9863
9864 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9865 {
9866         return kvm_x86_ops->interrupt_allowed(vcpu);
9867 }
9868
9869 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9870 {
9871         if (is_64_bit_mode(vcpu))
9872                 return kvm_rip_read(vcpu);
9873         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9874                      kvm_rip_read(vcpu));
9875 }
9876 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9877
9878 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9879 {
9880         return kvm_get_linear_rip(vcpu) == linear_rip;
9881 }
9882 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9883
9884 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9885 {
9886         unsigned long rflags;
9887
9888         rflags = kvm_x86_ops->get_rflags(vcpu);
9889         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9890                 rflags &= ~X86_EFLAGS_TF;
9891         return rflags;
9892 }
9893 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9894
9895 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9896 {
9897         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9898             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9899                 rflags |= X86_EFLAGS_TF;
9900         kvm_x86_ops->set_rflags(vcpu, rflags);
9901 }
9902
9903 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9904 {
9905         __kvm_set_rflags(vcpu, rflags);
9906         kvm_make_request(KVM_REQ_EVENT, vcpu);
9907 }
9908 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9909
9910 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9911 {
9912         int r;
9913
9914         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9915               work->wakeup_all)
9916                 return;
9917
9918         r = kvm_mmu_reload(vcpu);
9919         if (unlikely(r))
9920                 return;
9921
9922         if (!vcpu->arch.mmu->direct_map &&
9923               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9924                 return;
9925
9926         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9927 }
9928
9929 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9930 {
9931         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9932 }
9933
9934 static inline u32 kvm_async_pf_next_probe(u32 key)
9935 {
9936         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9937 }
9938
9939 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9940 {
9941         u32 key = kvm_async_pf_hash_fn(gfn);
9942
9943         while (vcpu->arch.apf.gfns[key] != ~0)
9944                 key = kvm_async_pf_next_probe(key);
9945
9946         vcpu->arch.apf.gfns[key] = gfn;
9947 }
9948
9949 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9950 {
9951         int i;
9952         u32 key = kvm_async_pf_hash_fn(gfn);
9953
9954         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9955                      (vcpu->arch.apf.gfns[key] != gfn &&
9956                       vcpu->arch.apf.gfns[key] != ~0); i++)
9957                 key = kvm_async_pf_next_probe(key);
9958
9959         return key;
9960 }
9961
9962 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9963 {
9964         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9965 }
9966
9967 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9968 {
9969         u32 i, j, k;
9970
9971         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9972         while (true) {
9973                 vcpu->arch.apf.gfns[i] = ~0;
9974                 do {
9975                         j = kvm_async_pf_next_probe(j);
9976                         if (vcpu->arch.apf.gfns[j] == ~0)
9977                                 return;
9978                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9979                         /*
9980                          * k lies cyclically in ]i,j]
9981                          * |    i.k.j |
9982                          * |....j i.k.| or  |.k..j i...|
9983                          */
9984                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9985                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9986                 i = j;
9987         }
9988 }
9989
9990 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9991 {
9992
9993         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9994                                       sizeof(val));
9995 }
9996
9997 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9998 {
9999
10000         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10001                                       sizeof(u32));
10002 }
10003
10004 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10005 {
10006         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10007                 return false;
10008
10009         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10010             (vcpu->arch.apf.send_user_only &&
10011              kvm_x86_ops->get_cpl(vcpu) == 0))
10012                 return false;
10013
10014         return true;
10015 }
10016
10017 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10018 {
10019         if (unlikely(!lapic_in_kernel(vcpu) ||
10020                      kvm_event_needs_reinjection(vcpu) ||
10021                      vcpu->arch.exception.pending))
10022                 return false;
10023
10024         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10025                 return false;
10026
10027         /*
10028          * If interrupts are off we cannot even use an artificial
10029          * halt state.
10030          */
10031         return kvm_x86_ops->interrupt_allowed(vcpu);
10032 }
10033
10034 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10035                                      struct kvm_async_pf *work)
10036 {
10037         struct x86_exception fault;
10038
10039         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10040         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10041
10042         if (kvm_can_deliver_async_pf(vcpu) &&
10043             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10044                 fault.vector = PF_VECTOR;
10045                 fault.error_code_valid = true;
10046                 fault.error_code = 0;
10047                 fault.nested_page_fault = false;
10048                 fault.address = work->arch.token;
10049                 fault.async_page_fault = true;
10050                 kvm_inject_page_fault(vcpu, &fault);
10051         } else {
10052                 /*
10053                  * It is not possible to deliver a paravirtualized asynchronous
10054                  * page fault, but putting the guest in an artificial halt state
10055                  * can be beneficial nevertheless: if an interrupt arrives, we
10056                  * can deliver it timely and perhaps the guest will schedule
10057                  * another process.  When the instruction that triggered a page
10058                  * fault is retried, hopefully the page will be ready in the host.
10059                  */
10060                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10061         }
10062 }
10063
10064 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10065                                  struct kvm_async_pf *work)
10066 {
10067         struct x86_exception fault;
10068         u32 val;
10069
10070         if (work->wakeup_all)
10071                 work->arch.token = ~0; /* broadcast wakeup */
10072         else
10073                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10074         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10075
10076         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10077             !apf_get_user(vcpu, &val)) {
10078                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10079                     vcpu->arch.exception.pending &&
10080                     vcpu->arch.exception.nr == PF_VECTOR &&
10081                     !apf_put_user(vcpu, 0)) {
10082                         vcpu->arch.exception.injected = false;
10083                         vcpu->arch.exception.pending = false;
10084                         vcpu->arch.exception.nr = 0;
10085                         vcpu->arch.exception.has_error_code = false;
10086                         vcpu->arch.exception.error_code = 0;
10087                         vcpu->arch.exception.has_payload = false;
10088                         vcpu->arch.exception.payload = 0;
10089                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10090                         fault.vector = PF_VECTOR;
10091                         fault.error_code_valid = true;
10092                         fault.error_code = 0;
10093                         fault.nested_page_fault = false;
10094                         fault.address = work->arch.token;
10095                         fault.async_page_fault = true;
10096                         kvm_inject_page_fault(vcpu, &fault);
10097                 }
10098         }
10099         vcpu->arch.apf.halted = false;
10100         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10101 }
10102
10103 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10104 {
10105         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10106                 return true;
10107         else
10108                 return kvm_can_do_async_pf(vcpu);
10109 }
10110
10111 void kvm_arch_start_assignment(struct kvm *kvm)
10112 {
10113         atomic_inc(&kvm->arch.assigned_device_count);
10114 }
10115 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10116
10117 void kvm_arch_end_assignment(struct kvm *kvm)
10118 {
10119         atomic_dec(&kvm->arch.assigned_device_count);
10120 }
10121 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10122
10123 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10124 {
10125         return atomic_read(&kvm->arch.assigned_device_count);
10126 }
10127 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10128
10129 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10130 {
10131         atomic_inc(&kvm->arch.noncoherent_dma_count);
10132 }
10133 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10134
10135 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10136 {
10137         atomic_dec(&kvm->arch.noncoherent_dma_count);
10138 }
10139 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10140
10141 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10142 {
10143         return atomic_read(&kvm->arch.noncoherent_dma_count);
10144 }
10145 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10146
10147 bool kvm_arch_has_irq_bypass(void)
10148 {
10149         return true;
10150 }
10151
10152 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10153                                       struct irq_bypass_producer *prod)
10154 {
10155         struct kvm_kernel_irqfd *irqfd =
10156                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10157
10158         irqfd->producer = prod;
10159
10160         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10161                                            prod->irq, irqfd->gsi, 1);
10162 }
10163
10164 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10165                                       struct irq_bypass_producer *prod)
10166 {
10167         int ret;
10168         struct kvm_kernel_irqfd *irqfd =
10169                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10170
10171         WARN_ON(irqfd->producer != prod);
10172         irqfd->producer = NULL;
10173
10174         /*
10175          * When producer of consumer is unregistered, we change back to
10176          * remapped mode, so we can re-use the current implementation
10177          * when the irq is masked/disabled or the consumer side (KVM
10178          * int this case doesn't want to receive the interrupts.
10179         */
10180         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10181         if (ret)
10182                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10183                        " fails: %d\n", irqfd->consumer.token, ret);
10184 }
10185
10186 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10187                                    uint32_t guest_irq, bool set)
10188 {
10189         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10190 }
10191
10192 bool kvm_vector_hashing_enabled(void)
10193 {
10194         return vector_hashing;
10195 }
10196 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10197
10198 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10199 {
10200         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10201 }
10202 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10203
10204
10205 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10206 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10207 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10208 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10209 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10210 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10211 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10212 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10213 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10214 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10215 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10216 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10217 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);